WO2006018784A2

WO2006018784A2 - High accuracy power detector for handset applications

Info

Publication number: WO2006018784A2
Application number: PCT/IB2005/052631
Authority: WO
Inventors: Dmitry P. Prikhodko; John J. Hug; Rob M. Heeres; Ronald Koster
Original assignee: Koninklijke Philips Electronics N.V.
Priority date: 2004-08-16
Filing date: 2005-08-08
Publication date: 2006-02-23
Also published as: WO2006018784A3

Abstract

An output power of an RF power amplifier PA having amplifier transistors having coupled outputs, is sensed by a power detection circuit having a sensing transistor B having a common input circuit with one or more of the amplifier transistors A. By sharing a common input circuit, any changes in the output load on the PA influences the output of not only the PA transistors, but also the output of the sensing transistor. This can help overcome electrical mismatch and keep the sensing transistor is in saturation when the amplifier transistors are in saturation. A common base connection can mean collector currents of the sensing and amplifier transistors are forced to be close. Accuracy can be further increased by locating the detection circuit centrally in a row of amplifier transistors and having feed resistor and feed capacitor matched in shape to corresponding components of the amplifier.

Description

High accuracy power detector for handset applications

This invention relates to power detectors, to power amplifiers having such detectors, and to mobile wireless devices having such power amplifiers, to integrated circuits for the same, to methods of producing RP signals, and to methods of operating communications services over such devices. Power amplifiers are frequently used in high-frequency RF amplifiers, such as those used in wireless communications apparatus, as well as in audio amplifiers and other applications. In such amplifiers, particularly when used in RP applications, it is desirable to provide an indication of the power in the output stage. Mobile terminals, such as wireless telephones, generally require that a specified radio frequency (RP) output power be delivered to a radiating antenna. Further, many such systems are required to control the transmitted power to achieve a specific level depending upon signal strength. To meet these requirements, system architectures generally incorporate a closed-loop power control scheme. Typically, the signal indicating the detected output of the power amplifier is sent to control circuitry. The control circuitry generates a control signal that adjusts the output power of the amplifier until it is within the specified power level.

Detecting amplifier power output is typically accomplished by one of two techniques. First, a directional coupler or voltage divider may be provided at the output of the power amplifier to sense a fraction of the signal applied to the load, and this sample signal is then used to indicate the power in the load. Such sampling of the output power is disadvantageous in that it can increase the insertion loss between the output of the power amplifier and the radiating antenna. This can increase the required output power from the power amplifier and reduce battery life, which in turn reduces talk and standby time of the mobile terminal. Also, directional couplers are bulky and lossy, and resistive dividers are inefficient.

A second known technique involves using a resistor in series with the supply line to the PA. DC collector current drawn by the PA is proportional, in reduced conduction angle modes, to PA output power. The disadvantage here is the power loss associated with having a resistor in series with the supply.

Another solution, described in US 6,329,809, shows two sensing transistors, of which one is used as reference and is coupled only to the bias network. By subtracting the reference output, the sensed signal can be corrected for unwanted shifts in bias. This circuit has the disadvantage of having a detector current that is too dependent on the load presented to the detector.

An attempt to solve this problem is presented in WO 03/026333. In this circuit a detector topology is described that intends to sample the RF signal directly (as opposed to DC) from the detector transistor. However, as the RF signal amplitude on the collector of the detector transistor still depends on the load presented to it, the problem is not solved.

WO 2004/023648 shows using multiple sense transistors with a combined output. A power amplifier control loop includes various error amplifiers in the feedback loop. The sensing transistors are located close to the amplifying transistors to reduce temperature differences. Using multiple sense transistors has the disadvantage of unnecessary complexity, particularly in the layout, and unnecessary current draw that can have a negative impact on power dissipation and efficiency.

It is therefore an object of the present invention to provide a power detection circuit for use in a power amplifier circuit which is compact and efficient in design, easy to implement, and which can provide a more accurate indication of amplifier power than prior- art circuits.

In accordance with a first aspect of the invention, these objects are achieved by a detection circuit for sensing an output power of a power amplifier means (PAM), the power amplifier means having one or more transistors having coupled outputs, each of the amplifier transistors having an input circuit, the power detection circuit comprising a sensing transistor having a common input circuit with one or more of the amplifier transistors. The amplifier means can be a single amplifier or a module of circuits which make up an amplifier. The power sensing circuit may, or may not, also include an additional DC sensing transistor, having a base connection to the bias that is similar with that of the other transistors, but no connection to the RF input, for the purpose of subtraction from the main detector signal, increasing the total accuracy of the RF signal detection and allowing operation in the linear mode. By sharing a common input circuit, any changes in the output load on the PAM influences the output of not only the PA transistors, but also the output of the sensing transistor. This can help overcome electrical mismatch problems generally, and in particular can assure that the sensing transistor is in saturation when the power amplifier transistors are in saturation. Thus, the output power can be sensed more accurately without great loss in efficiency. This can enable the output power to be controlled more accurately, even under conditions of changing output impedance caused by mismatch between antenna and environment, such as occurs when a user of a mobile phone is moving. This in turn can enable wireless connections to be maintained more consistently, with lower average transmitted power, and thus battery life can be extended for example. There can of course be multiple sense transistors with a combined output.

As an additional feature the common input circuit can be arranged as a common base or common gate connection. This can mean collector (or drain) currents of the sensing and amplifier transistors are forced to be close to one another in value. Thus, the load presented to the PAM influences the current waveform at the collector of the sensing transistor.

As another such additional feature, the sensing transistor is a scaled down version of the amplifier transistors, i.e. it has a lower chip area. This can enable the influence of PAM load changes to be increased, compared to the effect of sensing transistor load changes.

As another such additional feature, the common input circuit may comprise a feed capacitor and a bias feed resistor. These can be dimensioned to take account of them being shared by two or more transistors, so as to maintain similar characteristics to any other amplifier transistors which are not sharing their input circuit, if desired. As another such additional feature, the sensing transistor is located on a substrate between transistors of the power amplifier means. This can reduce inaccuracies from susceptibility to temperature changes or parasitic currents for example.

As another such additional feature, the detection circuit has components which have a shape to match corresponding components of the power amplifier means. As an additional such feature, the power amplifier means is an RF amplifier and the detection circuit is arranged to detect RF output power.

Another aspect of the invention provides a detection circuit for sensing an output power of a power amplifier means, the detection circuit having a sensing transistor coupled to share an input and supply lines of the power amplifier means, and a second transistor coupled between an output of the power amplifier means and an input of the sensing transistor, so that amplifier means output load changes affect an output of the sensing transistor. The amplifier means can be one or more power amplifiers, e.g. in a module providing power amplification. In this case, the second transistor need not be a power amplifying transistor to gain the advantage of reduced load dependence. The power detector can be embodied with at least two transistors, the collector (or gate) of one thereof is connected to the RF output signal. Again this can help assure that the sensing transistor is in saturation when the power amplifier transistors are in saturation, and help minimize electrical mismatch. Another aspect of the invention provides a power amplifier means having a network of at least two amplifier transistors having outputs coupled together, and a detection circuit for sensing an output power of a power amplifier means, the detection circuit comprising a sensing transistor sharing the same substrate with the amplifier transistors, and being located between the two of the amplifier transistors, and the detection circuit having components matched in shape to corresponding components of the power amplifier means.

All connections leading to and from the power detector "block" are preferably of identical form to those for the RF transistors (i.e. same metal layers, etc.). This can enable accuracy to be improved by reducing mismatch between the sensing transistor and the amplifier transistor. In particular, locating the sensing transistor in between the amplifier transistors can reduce temperature differences. Matching shapes can reduce unwanted parasitic differences. Having identical connections to the inputs and outputs further reduce unwanted parasitics and ensure that the load impedance seen by the detector transistor is identical to that seen by the RF devices.

Another aspect of the invention provides an integrated circuit having such a detection circuit.

Another aspect provides a mobile device having a wireless communication circuit, having an RF power amplifier means arranged to be controlled according to a power detection signal generated by such a power detection circuit.

Another aspect provides a method of operating a communication service over handsets, using the power detection circuit. This is a recognition that an ultimate purpose of the improved device can be to enable improved communication services which can be charged for. The value of the services can be much greater than the sales value of the devices, which in some cases can be provided free of charge, so all the value comes from the services. In these improved topologies, the detector can be composed of (at least) two transistors, of which one is connected (with collector or drain) to the RF output of the power amplifier means. They can offer a solution in particular for electrical mismatch between the power amplifier means and the power detector. Preferably, but not essentially, the power detector can be centrally located within a PA cell. This can also minimize mismatch of temperature and parasitics.

How the present invention may be put into effect will now be described with reference to the appended schematic drawings. Obviously, numerous variations and modifications can be made without departing from the claims of the present invention. Therefore, it should be clearly understood that the examples shown are illustrative only and not intended to limit the scope of the present invention.

The features of the invention will be better understood by reference to the accompanying drawings, which illustrate preferred embodiments of the invention. In the drawings:

Fig. 1 shows a wireless device having a power amplifier, Fig. 2 shows a known power amplifier having a detection circuit, Fig. 3 shows a power amplifier having a detection circuit according to an embodiment,

Figs. 4 and 5 show examples of output circuits for coupling to an output of a sensing transistor of a detection circuit,

Fig. 6 shows a layout of a power amplifier with a conventional placement of the detection circuit, and Figs. 7 and 8 show a layout of a power amplifier according to another embodiment of the invention.

The present invention will be described with respect to particular embodiments and with reference to certain drawings but the invention is not limited thereto but only by the claims. The drawings described are only schematic and are non-limiting. In the drawings, the size of some of the elements may be exaggerated and not drawn on scale for illustrative purposes. Where the term "comprising" is used in the present description and claims, it does not exclude other elements or steps. Where an indefinite or definite article is used when referring to a singular noun e.g. "a" or "an", "the", this includes a plural of that noun unless something else is specifically stated.

Furthermore, the terms first, second, third and the like in the description and in the claims, are used for distinguishing between similar elements and not necessarily for describing a sequential or chronological order. It is to be understood that the terms so used are interchangeable under appropriate circumstances and that the embodiments of the invention described herein are capable of operation in other sequences than described or illustrated herein.

The term "power amplifier" in accordance with the present invention should be construed broadly. It not only includes a single power amplifier but also a group of amplifiers, e.g. in the form of a module.

Power amplifiers for handset applications often contain built in power control loops to constantly monitor output power and feed this information back through an input signal controlling the PA. This topology necessitates a mechanism (preferably on chip) for sensing the output power of the PA at a given instance. This "power sense" should provide a signal that can be used as an accurate representation of the output power over changes in temperature, supply voltage, and frequency. Before describing how to generate this signal, a typical example of how it can be used in a wireless device will be described with reference to Fig. 1, which is known from WO03/026333. Fig. 1, mobile terminal in which embodiments can be applied

Embodiments of the present invention may be incorporated in a mobile terminal 20, such as a mobile telephone, wireless personal digital assistant, or like communication device. The basic architecture of a mobile terminal 20 is represented in Fig. 1 and may include a receiver front end 22, a radio frequency transmitter section 24, an antenna 26, a duplexer or switch 28, a baseband processor 30, a control system 32, a frequency synthesizer 34, and an interface 36. The receiver front end 22 receives information bearing radio frequency signals from one or more remote transmitters provided by a base station. A low noise amplifier 38 amplifies the signal. A filter circuit 40 minimizes broadband interference in the received signal, while downconversion and digitization circuitry 42 downconverts the filtered, received signal to an intermediate or baseband frequency signal, which is then digitized into one or more digital streams. The receiver front end 22 typically uses one or more mixing frequencies generated by the frequency synthesizer 34.

The baseband processor 30 processes the digitized received signal to extract the information or data bits conveyed in the received signal. This processing typically comprises demodulation, decoding, and error correction operations. As such, the baseband processor 30 is generally implemented in one or more digital signal processors (DSPs). On the transmit side, the baseband processor 30 receives digitized data, which may represent voice, data, or control information, from the control system 32, which it encodes for transmission. The encoded data is output to the transmitter 24, where it is used by a modulator 44 to modulate a carrier signal that is at a desired transmit frequency. Power amplifier circuitry 46 amplifies the modulated carrier signal to a level appropriate for transmission, and delivers the modulated carrier signal to antenna 26 through a matching network 48. A user may interact with the mobile terminal 20 via the interface 36, which may include interface circuitry 50 associated with a microphone 52, a speaker 54, a keypad 56, and a display 58. The interface circuitry 50 typically includes analog-to-digital converters, digital-to-analog converters, amplifiers, and the like. Additionally, it may include a voice encoder/decoder, in which case it may communicate directly with the baseband processor 30.

The microphone 52 will typically convert audio input, such as the user's voice, into an electrical signal, which is then digitized and passed directly or indirectly to the baseband processor 30. Audio information encoded in the received signal is recovered by the baseband processor 30, and converted by the interface circuitry 50 into an analog signal suitable for driving speaker 54. The keypad 56 and display 58 enable the user to interact with the mobile terminal 20, input numbers to be dialed, address book information, or the like, as well as monitor call progress information.

As noted, the embodiments of the present invention can provide a more efficient or effective way to detect the transmit power provided by the power amplifier circuitry 46. Typically, a signal indicative of transmit power, referred to as power sense (POWER SENSE) 60, is generated in the power amplifier circuitry 46 and fed back to the control system 32, which will react accordingly to control input signal levels, bias, gain, or a combination thereof in traditional fashion to control transmit power. Fig. 2, amplifier circuitry with conventional sensing It is known to implement the amplifier 46 with detector circuitry using the topology shown in Fig. 2. In this case the detector circuitry includes a scaled version of one cell of the PA itself is used to generate a scaled version of the RF output current waveform. This current is then detected in the block 120 labeled "PS Detection, Decoupling, and Loading". The amplifier has a transistor network including N devices or cells, each represented by a single transistor A, a bias resistor Rb, and coupling capacitor Cb. A bias network 100 is configured to deliver bias through the bias resistor Rb to the base of each transistor. The radio frequency (RF) input to the amplifier is coupled to the base of each transistor through capacitor Cb. The transistor network will amplify the RF drive in light of the bias provided by the bias network to create an output signal, the combination of outputs of all the cells, which is output through a matching network 110 or 48, typically a network of capacitors and resistors, to the antenna. The transistor network is typically coupled to a voltage source (VCC) through inductor (not shown).

The detector circuitry block 120 can be implemented in various ways. Two possible implementations of this block are shown in Figs. 4 and 5 described in more detail below (which are derived from US6307364B1 and WO03/026333A1 respectively). Fig. 4 depicts one of the simplest implementations, while that in Fig. 5 depicts a more complicated implementation that has the advantage of true RF signal rectification at the collector of the PS device (generating, in principle, a more accurate representation of the output power of the PA).

For proper scaling, the power output capability of transistor B of the detector is proportionally less than that of the transistors of the amplifier. Preferably, the emitter area associated with transistor B relates to the total emitter area of the amplifier transistor network A by a scaling ratio R. Since the sizes differ by the scaling ratio R, the input and output impedances of the two transistors differ by the scaling ratio R. This in turn will mean that the RF drive will be proportionally divided between the two transistors of the detector and of the amplifier. The RF drive delivered to the transistor B will be 1/ (R + 1) times the total RF drive. The bias provided to the amplifier transistor network and the transistor B of the detector circuitry is set such that the scaled output signal of the detector circuitry relates to the output signal of the amplifier by a factor of R.

For a given scaling ratio R, the total emitter area, or device size, for transistor network equals R times the emitter area for transistor B. The scaling ratio chosen is not critical, as long as the above equations are met. For example, the detector circuitry 66 has been fabricated for applications at 900 MHz and 1800 MHz, and scaling ratios of 144, 72 and 48 have been used.

A disadvantage of such arrangements is apparent when one considers the impact of the loading of the "PS Detection, Decoupling, and Loading" block on the PS transistor. In the case of the circuit shown in Fig. 4, the detection method is most useful when the PA (and, thus, the PS transistor) is driven into the nonlinear region of operation. Increasing output power results in increasing DC collector current. The voltage measured at PS Output should consistently represent the PA output power. However, when in saturation, the shape of the voltage and current waveforms at the collector of the PS device are for a large part determined by the load presented to it. This effect necessitates that the load presented to the collector of the PS transistor is also a scaled version of that presented to the PA. In most cases, this is not the case (particularly when it comes to the harmonic impedances). Instantaneous voltages and currents at the collector of the PA and PS transistors can be shown to differ according to load. Different loading results in the current waveforms at the collector of the two devices having different shapes. The average of the current waveform at the collector of the PS transistor (multiplied by a resistance in the "PS

Detection, Decoupling, and Loading" block 120) is the PS Output signal after filtering. Having different waveforms (varying in different ways over changes in supply voltage, temperature, and frequency) results in PS Output voltage being an inconsistent representation of the output power. In the case of the circuit shown in Fig. 5, the RF signal at the collector of the

PS transistor is rectified. Loading is critical here as well, as the RF signal level at the collector of the PS device (and its sensitivity to supply voltage, temperature, and frequency deviations) is significantly affected by it. Changing the load impedance (at the fundamental and/or harmonic frequencies) usually has a considerable impact on the efficiency of the PA itself, so it is not surprising that the PS signal should also be affected since the PS circuitry is, after all, a scaled version of the PA circuitry. Fig. 3, embodiment of the invention

An embodiment of the present invention with a different topology is shown in Fig. 3. The basic difference is that the PS structure is now composed of two transistors, "A", which is one of the transistors of the amplifier, having its collector connected to the RF output (and connected to the collectors of the other transistors of the PA), and transistor "B", having its collector connected to the PS Output. The two PS transistors are directly connected at their bases. This is an example of a common input circuit. Transistor B can be a scaled version of the transistors of a transistor network forming the output stage of the amplifier. The detector circuitry includes a scaled version of the amplifier and is configured to include a transistor B receiving bias at its base from the bias network 100 through resistor Rb/2 and RF drive through capacitor 2*Cb.

An advantage of this circuit is that it makes use of the PA collector waveforms as seen by transistor "A". The load presented to the PA determines the voltage and current waveforms at the collector of the PA and that of transistor "A" in the PS. Through the common base connection of transistors "A" and "B", the collector currents of these two devices are forced to be very close to one another in value. Thus, the load presented to the PA influences the current waveform at the collector of transistor "B". Increasing the emitter area ratio of transistor "A" to transistor "B" increases the influence of the PA load impedance on the PS Output current while decreasing the influence of the PS load impedance. The tradeoff ultimately comes down to PS susceptibility to variations in PS load vs. PS sensitivity (if transistor "B" is too small, then the PS Output is too low: i.e. low sensitivity as measured in μA/dB). A consequence of the two transistors being coupled at the base is that the coupling capacitor should have a larger value, 2*Cb, and the resister to the bias network should have a smaller value, such as Rb/2, as shown in the Figure. Otherwise, much of the circuitry can be similar to that shown in Fig. 2, and corresponding reference signs have been used as appropriate. Figs. 4 and 5, PS detection circuitry 120.

Fig. 4, shows an example of how to implement the PS detection, decoupling and loading block 120 in accordance with further embodiments. Resistor 200 is a bias resistor coupled to a bias voltage, for reducing the voltage across capacitor 210. The other end of the resistor is coupled to the collector of the PS transistor, transistor B in Fig. 3, and to the PS output. Capacitor 210 is also coupled to ground. The voltage across the capacitor or across the resistor represents the sensed output. Fig. 5 shows another example of detector circuitry which can be used to implement the "PS Detection, Decoupling, and Loading" block 120. This is coupled to transistor B in Fig. 3. The collector of power sense (PS) transistor B is coupled to voltage source VCC through inductor 220. The detector circuitry receives the RF drive and bias from the bias network 100 and creates a scaled output signal, which is a scaled version of the output signal generated by the amplifier, at the collector of transistor B.

Diode 250 rectifies the scaled output signal, and capacitor 260 and resistor 270 filter the rectified signal to create a power sense signal PS output proportional to the transmit power associated with the output signal of the amplifier. In operation, capacitor 230 and resistor 240 represent the RF load impedance for the transistor B, and this impedance is a scaled replica of the RF load impedance presented to the transistor network A (of the amplifier) by output matching network 110. Capacitor 260 filters RF from the power sense signal 60, and resistor 270, the load resistance of the detector, is selected to set the level of the power sense PS output signal. Both the previously existing and the proposed power sense topologies have been fabricated using GaAs HBT technology in front-end module for use in handset applications. The environment surrounding the power sense can be kept identical with regards to the load presented to the RF stage. The load presented to the PS (similar in topology to that shown in Fig. 4) needed to be optimized if used in the arrangement of Fig. 2. With the new topology no load optimization is necessary. This can make design easier, or remove a set up step during manufacture.

Detector current, measured as a function of output power in Watts, can be shown to be accurate for variations in supply voltage between 3 V, 3.5V, and 4.8V for example. (Detector accuracy is dominated by variations with supply voltage). The accuracy of the conventional PS deteriorates significantly at power outputs above 1.5 Watts, while that of the new PS remains good. This is especially notable when considering that no PS load tuning is necessary for the new PS. Figs. 6-8, PS and PA layout A layout of these cells on a substrate of an integrated circuit can affect the performance. Fig. 6 shows a layout for a power amplifier for handset application as discussed above having a built in power control loop to constantly monitor output power and feed this information back through an input signal controlling the PA. This topology necessitates a mechanism (preferably on chip) for sensing the output power of the PA at a given instance. This "power sense" must provide a signal that can be used as an accurate representation of the output power over changes in temperature, supply voltage, and frequency. Fig. 6 shows a conventional layout. Power amplifier modules having built-in power detection schemes often give little thought to the placement and layout of the PS cell (see for example US6307364B1 and WO03/026333A1). The PS cell is often placed outside the row of PA cells entirely (as in Fig. 6), adding additional parasitics and creating unwanted differences in the PS cell's behavior.

The layout of the PS device with respect to the layout of the PA can be a critical element of the PS design, particularly for RF devices. Small differences in parasitic elements between the "PS cell" and a "PA cell" can have significant impact on PS accuracy over variations in supply voltage, temperature, and frequency. In addition, the location of the PS cell (whether it is at the base-side, midpoint, or collector-side of a row or column of PA cells) can be important as well.

Figs. 7 and 8 show improved layouts according to embodiments of the invention. Fig. 7 shows an improved layout, in which the detector is centrally located within a PA cell. This can offer improvements in accuracy of detection in particular to overcome mismatch of temperature and parastics between the Power amplifier and power detector.

Fig. 7 depicts how such a PS cell can be centrally located among the neighboring PA cells in a row. Compared to placing the PS at different locations in a row of PA cells such as at either end, or elsewhere outside the row, detector current variations resulting from changes in supply voltage, or temperature changes, can be reduced. In a typical device, detector current can be measured as a function of output power in Watts, at supply voltages such as 3V, 3.5V, and 4.8V for example. In a typical example, the power output is approximately 2W. Fig. 8 shows a layout in which an output power of an RF power amplifier PA

(in a PA cell) having amplifier transistors having coupled outputs, is sensed by a power detection circuit (in a PS cell) having a sensing transistor B having a common input circuit with one or more of the amplifier transistors A. The circuit has an RF feed capacitor 70 (to the PS cell) and a bias feed resistor 72 (to the PS cell) that is identical in shape and form to those in the PA cells (capacitor 75, resistor 74), to reduce unwanted parasitic differences. Applications.

Embodiments of the invention are useful for power amplifier modules for handset applications where power detection is necessary. It is particularly attractive for PAs having built in power control. It can be embodied in integrated circuit form using GaAs, or Si (or any other BiPolar or HBT technology). Many applications using a power amplifier module with built in power detection can be conceived. Embodiments of the invention can be applied to RF Power amplifiers with control loops in the last stage of the amplifier for example. A preferred implementation is in an integrated circuit such as a bipolar device made in a substrate of a III-V material, i.e. a "HBT"-transistor in a GaAs substrate. Applications include RF Modules, Power Amplifiers for mobile phones or other mobile battery powered devices with wireless transmitters.

As described above, an output power of an RF power amplifier PA having amplifier transistors having coupled outputs, is sensed by a power detection circuit having a sensing transistor B having a common input circuit with one or more of the amplifier transistors A. By sharing a common input circuit, any changes in the output load on the PA influences the output of not only the PA transistors, but also the output of the sensing transistor. This can help overcome electrical mismatch and keep the sensing transistor is in saturation when the amplifier transistors are in saturation. A common base connection can mean collector currents of the sensing and amplifier transistors are forced to be close. Accuracy can be further increased by locating the detection circuit centrally in a row of amplifier transistors and having feed resistor and feed capacitor matched in shape to corresponding components of the amplifier.

Other variations can be conceived by the skilled person and are within the scope of the claims.

Claims

CLAIMS:

1. A detection circuit for sensing an output power of a power amplifier means (46), the power amplifier means having one ore more amplifier transistors having coupled outputs, each of the amplifier transistors having an input circuit, the power detection circuit comprising a sensing transistor B having a common input circuit with one or more of the amplifier transistors A.

2. The detection circuit of claim 1 , the common input circuit being arranged as a common base or common gate connection.

3. The detection circuit of claim 1, the sensing transistor being a scaled down version of the amplifier transistors.

4. The detection circuit of claim 1, the common input circuit comprising a feed capacitor and a bias feed resistor.

5. The detection circuit of claim 1, the sensing transistor being located on a substrate between transistors of the power amplifier means.

6. The detection circuit of claim 1, the detection circuit having components which have a shape to match corresponding components of the power amplifier means.

7. The detection circuit of claim 1, the amplifier means being an RF amplifier and the detection circuit being arranged to detect RF output power.

8. A detection circuit for sensing an output power of a power amplifier means

(46), the detection circuit having a sensing transistor B coupled to share an input and supply lines of the power amplifier means, and a second transistor A coupled between an output of the power amplifier means and an input of the sensing transistor, so that amplifier output load changes affect an output of the sensing transistor.

9. A power amplifier means (46) having a network of at least two amplifier transistors A having outputs coupled together, and a detection circuit for sensing an output power of a power amplifier means, the detection circuit comprising a sensing transistor B sharing the same substrate with the amplifier transistors, and being located between the two of the amplifier transistors, and the detection circuit having components matched in shape to corresponding components of the power amplifier means.

10. The power amplifier of claim 9 or the detection circuit of claim 1 or 8, in the form of an integrated circuit.

11. A mobile device (20) having a wireless communication having the integrated circuit of claim 10.

12. A method of producing RF signals by controlling a power amplifier means using a sensing signal generated by a detection circuit as set out claim 1 or 8.

13. A method of operating a communication service over the mobile device of claim 11, or making use of the method of claim 12.