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WO2023013017A1 - Dispositif, système et procédé d'émission - Google Patents

Dispositif, système et procédé d'émission Download PDF

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Publication number
WO2023013017A1
WO2023013017A1 PCT/JP2021/029276 JP2021029276W WO2023013017A1 WO 2023013017 A1 WO2023013017 A1 WO 2023013017A1 JP 2021029276 W JP2021029276 W JP 2021029276W WO 2023013017 A1 WO2023013017 A1 WO 2023013017A1
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WO
WIPO (PCT)
Prior art keywords
signal
unit
transmission
receiver
clock
Prior art date
Application number
PCT/JP2021/029276
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English (en)
Japanese (ja)
Inventor
佑紀 岡南
正樹 日比野
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to JP2023538675A priority Critical patent/JP7439996B2/ja
Priority to PCT/JP2021/029276 priority patent/WO2023013017A1/fr
Publication of WO2023013017A1 publication Critical patent/WO2023013017A1/fr

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines

Definitions

  • Patent Document 1 discloses that a measuring instrument called a network analyzer is installed in the transmitter and the receiver to measure the frequency characteristics (reflection characteristics, pass characteristics) of the transmission line connecting the transmitter and the receiver. It is stated that Further, in Patent Document 1, based on the measured frequency characteristics (reflection characteristics, pass characteristics), while suppressing the influence of fluctuations in the frequency characteristics of the transmission line, a clock frequency that can suppress a decrease in transmission speed is determined. is stated.
  • the transmitter 1 of the transmission system 100 is an example of a transmission device, and includes a control section 10, a modulation section 12, a clock generation section 13, and a waveform detection section 14.
  • the control unit 10 is composed of, for example, a CPU and a memory.
  • the control unit 10 implements functions of a signal generation unit 15 , a pass characteristics calculation unit 16 , and a clock determination unit 17 by executing programs stored in the memory by the CPU.
  • the waveform detection unit 14 is, for example, an AD converter, and detects the voltage waveform at the output end of the transmitter 1 (hereinafter referred to as output end voltage).
  • This output terminal voltage indicates, for example, a reflected waveform from the transmission line 3 when a step signal is output from the modulating section 12 .
  • the output terminal voltage indicates, for example, the noise waveform from the transmission line 3 when the step signal is not output from the modulating section 12 .
  • the transmitter 1 may include an AFE (Analog Front End) circuit composed of, for example, an amplifier for adjusting the voltage value of the data signal and/or a filter for reducing noise.
  • AFE Analog Front End
  • the receiver 2 includes a receiving section 21, a control section 22, and a variable resistance section 23.
  • the control section 22 is composed of a CPU and a memory, and controls each section of the receiver 2 according to the signal input from the receiving section 21 . Specifically, the control section 22 may output a control signal to the variable resistance section 23 . Also, the control unit 22 may store the data signal in a storage unit (not shown). The variable resistance section 23 is connected between the transmission line 3 and GND of the receiver 2 .
  • the receiver 2 may include an AFE circuit including, for example, an amplifier for adjusting the voltage value of the data signal and/or a filter for reducing noise.
  • FIG. 2 is a diagram showing an example of the hardware configuration of the transmitter 1.
  • the transmitter 1 includes a control circuit 31 , a modulation circuit 32 , a clock generation circuit 33 and a waveform detection circuit 34 .
  • the control circuit 31 implements the functions of the signal generator 15, the pass characteristic calculator 16, and the clock determiner 17 shown in FIG. 1 by executing programs stored in the memory.
  • the memory stores various programs executed by the control circuit 31 and various data used for processing executed by the control circuit 31 .
  • the modulation circuit 32 realizes the function of the modulation section 12 shown in FIG.
  • the clock generation circuit 33 implements the function of the clock generation section 13 shown in FIG.
  • the waveform detection circuit 34 realizes the function of the waveform detection section 14 shown in FIG.
  • the control unit 10 transmits a control signal for setting the initial value of the degree of multilevel to the modulation unit 12 .
  • the control unit 10 also transmits a control signal for setting the initial value of the clock frequency to the clock generation unit 13 (S101).
  • the control unit 10 has set binary signal voltages (voltage values V 0 and 0) as the initial values of the multilevel degree.
  • the control unit 10 sets, as the initial value of the clock frequency, a frequency equal to or greater than the cycle covering the round trip time of the propagation delay time of the cable length. For example, if the upper limit of the cable length is 50 m, the initial value of the clock frequency is set to 0.5 MHz.
  • the output end voltage of the transmitter 1 detected by the waveform detection unit 14 when the resistance value of the variable resistance unit 23 is Z i is tdr (i) (t)
  • the step function is ⁇ (t)
  • each frequency is Assuming that ⁇ is an imaginary unit of j, the reflection characteristic s 11 (i) of the transmission path when the resistance value of the variable resistance section 23 is Z i is expressed by Equation (1).
  • the clock determination unit 17 determines the clock frequency to be set in the clock generation unit 13 based on the pass characteristic S21 calculated in S109 (S110).
  • S109 As a method for determining the clock frequency of the pulse signal from the pass characteristic S21 , for example, as shown in FIG.
  • the maximum frequency f 1 among the frequencies is determined as the clock frequency of the clock generator 13 .
  • this method of determining the clock frequency is merely an example and is not limited to this. That is, the predetermined value is not limited to -6 dB, and may be appropriately set according to the system configuration. Moreover, the reference value is not limited to a frequency of 0, and may be set as appropriate according to the configuration of the system.
  • the clock frequency is determined from the pass characteristic S21 of the transmission path 3, but in the second embodiment, the ratio of signal power to noise power (SN ratio) is calculated to determine the multilevel degree of the pulse signal. .
  • the ratio of signal power to noise power SN ratio
  • the control unit 10 (signal generation unit 15) transmits a control signal and sets the resistance value R of the variable resistance unit 23 (S201).
  • the resistance value R is desirably the same resistance value as the characteristic impedance of the transmission line 3 .
  • the SN ratio calculation unit 18 calculates noise power from the root mean square (RMS value) of the noise voltage waveform detected by the waveform detection unit 14 and the resistance value R of the variable resistance unit 23 (S204).
  • the SN ratio calculator 18 calculates the SN ratio from the noise power calculated in S204 and the signal power calculated in S205 (S206).
  • a table is stored in advance in a memory, and the table values are read out to determine the multilevel degree.
  • the abnormality detection unit 11 converts the output terminal voltage V(t) into an impedance value Z(t) according to Equation (4) (S301).
  • the abnormality detection unit 11 determines that the abnormality determination condition is satisfied, it stops the flow and notifies the abnormality (S304).
  • the abnormality detection unit 11 may notify the abnormality through, for example, a speaker or a display unit (not shown).
  • the abnormality detection unit 11 determines that the abnormality determination condition is not satisfied, it determines that there is no abnormality in the transmission line 3 and continues the process (S304).

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)

Abstract

La présente invention concerne un dispositif d'émission (1) comprenant : une unité de génération de signaux (15) conçue pour générer un signal de données, un signal échelon et un signal de commande destiné à commander la commutation de N (N étant supérieur ou égal à 3) types de valeurs de résistance d'une unité à résistance variable (23) située dans un récepteur (2) ; une unité de modulation (12) conçue pour moduler chaque signal généré par l'unité de génération de signaux (15) en un signal à multiples niveaux ayant au moins deux valeurs et pour délivrer au récepteur (2) le signal obtenu ; une unité de détection de forme d'onde (14) conçue pour détecter une tension d'une borne de sortie d'un dispositif d'émission (2) ; une unité de génération signal d'horloge (13) conçue pour générer une fréquence de signal d'horloge permettant de synchroniser l'unité de modulation (12) et l'unité de détection de forme d'onde (14) ; une unité de calcul de caractéristique de passage (16) conçue pour calculer, pour chacun des N types de valeurs de résistance, la caractéristique de passage d'un chemin d'émission (3) à partir des N types de valeurs de résistance commutées en fonction du signal de commande délivré par l'unité de modulation (12) et de la tension de borne de sortie détectée par l'unité de détection de forme d'onde (14) en fonction du signal échelon délivré par l'unité de modulation (12) ; et une unité de détermination de signal d'horloge (17) conçue pour déterminer la fréquence de signal d'horloge de l'unité de génération de signal d'horloge (13) sur la base de la caractéristique de passage calculée par l'unité de calcul de caractéristique de passage (16).
PCT/JP2021/029276 2021-08-06 2021-08-06 Dispositif, système et procédé d'émission WO2023013017A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2023538675A JP7439996B2 (ja) 2021-08-06 2021-08-06 伝送装置、伝送システム、及び、伝送方法
PCT/JP2021/029276 WO2023013017A1 (fr) 2021-08-06 2021-08-06 Dispositif, système et procédé d'émission

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2021/029276 WO2023013017A1 (fr) 2021-08-06 2021-08-06 Dispositif, système et procédé d'émission

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WO2023013017A1 true WO2023013017A1 (fr) 2023-02-09

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JP (1) JP7439996B2 (fr)
WO (1) WO2023013017A1 (fr)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005333222A (ja) * 2004-05-18 2005-12-02 Matsushita Electric Works Ltd 端末制御装置及びこれを用いた端末制御システム
JP2010034778A (ja) * 2008-07-28 2010-02-12 Fujitsu Ltd 信号伝送装置、信号伝送装置制御方法
WO2018203372A1 (fr) * 2017-05-01 2018-11-08 三菱電機株式会社 Dispositif de détection de borne

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005333222A (ja) * 2004-05-18 2005-12-02 Matsushita Electric Works Ltd 端末制御装置及びこれを用いた端末制御システム
JP2010034778A (ja) * 2008-07-28 2010-02-12 Fujitsu Ltd 信号伝送装置、信号伝送装置制御方法
WO2018203372A1 (fr) * 2017-05-01 2018-11-08 三菱電機株式会社 Dispositif de détection de borne

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JPWO2023013017A1 (fr) 2023-02-09
JP7439996B2 (ja) 2024-02-28

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