WO2018126542A1

WO2018126542A1 - Pop (package on package) structure and terminal

Info

Publication number: WO2018126542A1
Application number: PCT/CN2017/078636
Authority: WO
Inventors: 史洪宾; 叶润清; 龙浩晖
Original assignee: 华为技术有限公司
Priority date: 2017-01-04
Filing date: 2017-03-29
Publication date: 2018-07-12
Also published as: CN108780790B; CN108780790A

Abstract

Disclosed are a PoP (package on package) structure and a terminal. The PoP structure comprises: a main board (10) and at least two package layers arranged in a stacked manner along the direction away from the main board, wherein the package layer, closest to one side of the main board, in the at least two package layers is in welded connection with the main board; the package layer, close to one side of the main board, in any two adjacent package layers is a lower package layer (20), and the package layer away from one side of the main board is an upper package layer (30); the lower package layer is in welded connection with the upper package layer; a first adhesive pouring layer (40) is also arranged between the lower package layer and the upper package layer; a first adhesive pouring area (21) corresponding to the first adhesive pouring layer is arranged in the lower package layer; and the first adhesive pouring area does not overlap with the upper package layer. During dispensing, a dispensing material is dripped in the first adhesive pouring area of the lower package layer, after the dispensing material fully fills the first adhesive pouring area, dispensing is stopped, and the first adhesive pouring layer is formed after the dispensing material is cured, thus solving the problem in the prior art that a space between the lower package layer and the upper package layer is difficult to fill completely or is easily filled partially.

Description

Stacked package structure and terminal

This application claims the priority of the Chinese Patent Application filed on Jan. 4, 2017, filed on Jan. 4, 2017, filed Jan. In this application.

Technical field

The present application relates to the field of electronic devices, and in particular, to a stacked package structure and a terminal.

Background technique

In order to meet the requirements of portable and wearable devices for thin and light, the solution of stacking the upper and lower packages of memory and application processor through stack on package (PoP) has become more and more widely used. As the largest electronic component in the end product, PoP faces serious mechanical and environmental reliability risks, such as solder joints between boards (between PoP and motherboard) under drop shock and temperature cyclic loading. After the thermal stress, the intermetallic compound (IMC) or the lead breakage between the solder joints is broken.

In order to improve the reliability of PoP under loads such as drop, bend and temperature cycling, underfill materials are widely used to protect board-level solder joints. In a typical underfill process, a liquid underfill material is applied to the periphery of the component to be dispensed by injection or spraying, and then penetrates between the component to be dispensed and the main board by capillary flow, and finally heated or ultraviolet (ultraviolet, UV ) curing under conditions. Underfill material can distribute the mechanical stress and thermal stress originally concentrated on the corner solder joints of the component to all solder joints relatively evenly, thereby improving the overall reliability of the PoP.

In order to improve the filling speed and reworkability of underfill materials, current board-level underfill materials are usually made of low-viscosity underfill without fillers, which makes low-viscosity underfill materials tend to be under gravity when filling PoP. Flowing along the main board in the XY plane instead of climbing to the Z direction eventually causes the underfill material to completely fill only the gap between the PoP lower package and the main board, and it is difficult to completely fill the gap between the PoP lower layer and the upper package. The mechanical stress/thermal stress experienced by the filled area is evenly distributed to all filled solder joints, while the stress not filled with the protected area is still concentrated on the individual solder joints farthest from the center of the element, which results in the lower and upper layers of the PoP. The failure of these high-stress solder joints in the unfilled areas between the packages also causes the wafers in the PoP upper package to break and the function of the entire component to be affected.

Summary of the invention

The present application provides a stacked package structure and a terminal for solving the problem of complete filling or easy partial filling between two adjacent packaging layers in the prior art, and improving the reliability of the stacked package structure.

The present application provides a stacked package structure including a main board and at least two encapsulation layers stacked in a direction away from the main board, wherein

An encapsulation layer of the at least two encapsulation layers closest to a side of the main board is soldered to the main board;

The encapsulation layer adjacent to the side of the main board of any two adjacent encapsulation layers is a lower encapsulation layer, and the encapsulation layer away from the side of the main board is an upper encapsulation layer, and the lower encapsulation layer is soldered to the upper encapsulation layer ;

a first potting layer is further disposed between the lower encapsulating layer and the upper encapsulating layer, and a first potting area corresponding to the first potting layer is disposed in the lower encapsulating layer, and the The first potting zone does not overlap the upper encapsulating layer.

In the above embodiment, in any two adjacent encapsulation layers, the lower encapsulation layer is provided with a first potting zone, and the first potting zone does not overlap with the upper encapsulation layer, and when the stacking package structure is dispensed, Taking any two adjacent encapsulation layers as one structural unit, respectively, the lower encapsulation layer in each structural unit is separately dispensed, that is, the dispensing material is dropped into the first potting area by using a dispensing tool, and the dispensing material is The first potting zone penetrates into the gap between the lower encapsulating layer and the upper encapsulating layer, and after the filling is sufficiently filled, the dispensing is stopped, and the dispensing material is solidified to form a first potting layer; thus, any adjacent two encapsulating layers The complete filling can be achieved between the two, which solves the problem that the top and bottom encapsulation layers are completely filled or easily partially filled in the prior art. The stacked package structure protects the solder joint between the lower package layer and the upper package layer under load such as drop impact, bending and temperature cycling, so that the mechanical stress concentrated on the edge solder joint It is distributed relatively evenly on all solder joints with thermal stress, preventing the failure of high stress solder joints at the edges and improving the reliability of the structure.

In order to prevent the solder joint between the main board and the encapsulation layer near the main board from failing, the reliability of the stacked package structure is further improved. In a specific arrangement, the encapsulation layer of the at least two encapsulation layers closest to the side of the main board a second potting layer is further disposed between the main boards, the second potting area corresponding to the second potting layer is disposed on the main board, and the second potting area and the at least two The encapsulation layers do not overlap.

In a specific embodiment, an orthographic projection of the upper encapsulation layer on a plane of the lower encapsulation layer is located in the lower encapsulation layer.

In a specifically set embodiment, the lower encapsulation layer is a polygon, and at least one of the lower encapsulation layers is provided with the first potting zone.

In the above embodiment, the setting of the first potting zone comprises a plurality of forms, and in the specific setting, when at least two sides of the lower encapsulating layer are provided with the first potting zone, the at least two A glue filling area is not connected to each other.

In a specific setting, when at least two sides of the lower encapsulation layer are respectively provided with the first potting zone, the at least two first potting zones are connected to form a whole.

Wherein, at least two first potting zones are connected to form a plurality of shapes. Specifically, when the first potting zone is disposed on each side of the lower encapsulating layer, the first irrigation provided on each side The glue zones are connected to each other to form a frame shape.

Specifically, when one side of the lower encapsulation layer and two sides adjacent to the side are respectively provided with the first potting zone, the three first potting zones are connected to form a whole.

In addition, the above various embodiments are also applicable to the arrangement between the silicon wafer and the silicon wafer in the encapsulation layer and the arrangement between the silicon wafer and the substrate. In a specific embodiment, the encapsulation layer includes the substrate and is away from the At least two silicon wafers stacked in a direction of the substrate, wherein

One of the at least two silicon wafers closest to the side of the substrate is soldered to the substrate;

The silicon wafer adjacent to one side of the substrate of any two adjacent silicon wafers is a lower silicon wafer, and the silicon wafer away from one side of the substrate is an upper silicon wafer, and the lower silicon wafer is soldered to the upper silicon wafer. And a third potting layer is further disposed between the lower silicon wafer and the upper silicon wafer;

Between at least one pair of two adjacent silicon wafers, a third potting layer is further disposed between the lower layer silicon wafer and the upper layer silicon wafer, and the lower layer silicon wafer is provided with the third potting layer Corresponding third potting zone, and the third potting zone does not overlap with the upper silicon wafer.

In the above embodiment, any two adjacent silicon wafers can be completely filled with the dispensing material during dispensing, preventing solder joint breakage between the silicon wafers, and improving the reliability of the stacked package structure.

Similarly, in order to prevent solder joint failure between the substrate and the silicon wafer close to the substrate, the reliability of the stacked package structure is further improved, and in a specific arrangement, the silicon wafer closest to the side of the substrate among the at least two silicon wafers a fourth potting layer is further disposed between the substrate, and the fourth potting zone corresponding to the fourth potting layer is disposed on the substrate, and the fourth The potting zone does not overlap with the at least two silicon wafers.

In a specific embodiment, in the two adjacent silicon wafers, the third silicon filling region is disposed on the lower silicon wafer.

The orthographic projection of the upper silicon wafer on the plane of the lower silicon wafer is located in the lower silicon wafer.

In a specifically set embodiment, the lower silicon wafer is polygonal, and at least one of the lower silicon wafers is provided with a third potting zone.

In a specific setting, when at least two sides of the lower silicon wafer are provided with a third potting zone, the at least two third potting zones are not connected to each other, or the at least two third potting zones are Connected to form a whole.

The embodiment of the present application further provides a terminal, including the foregoing stacked package structure. In the above embodiment, any two adjacent encapsulating layers can be completely filled with the dispensing material when dispensing, and any adjacent two silicon wafers in each encapsulating layer can also be dispensed. It is completely filled with the dispensing material to prevent the solder joint between the package layers and the solder joint breakage between the silicon wafers, thereby improving the quality and reliability of the terminal.

DRAWINGS

1a is a schematic diagram of a stacked package structure according to an embodiment of the present application;

FIG. 1b is a schematic diagram of another stacked package structure according to an embodiment of the present application; FIG.

2a is a top view of a single-sided dispensing package layer according to Embodiment 1 of the present application;

Figure 2b is a front view of the encapsulation layer of the single-sided dispensing of Figure 2a;

Figure 2c is a left side view of the encapsulation layer of the single-sided dispensing of Figure 2a;

3a is a top view of a portion of a single-sided dispensing package provided in Embodiment 1 of the present application;

Figure 3b is a front view of the encapsulation layer of a portion of the single-sided dispensing of Figure 3a;

Figure 3c is a left side view of the encapsulation layer of a portion of the single-sided dispensing of Figure 3a;

4a is a top view of an encapsulation layer of a double-sided dispensing provided in Embodiment 2 of the present application;

Figure 4b is a front view of the encapsulation layer of the double-sided dispensing of Figure 4a;

Figure 4c is a left side view of the encapsulation layer of the double-sided dispensing in Figure 4a;

5a is a top view of a portion of a double-sided dispensing package provided in Embodiment 2 of the present application;

Figure 5b is a front view of the encapsulation layer of a portion of the double-sided dispensing of Figure 5a;

Figure 5c is a left side view of the encapsulation layer of a portion of the double-sided dispensing of Figure 5a;

6a is a top view of a package layer of a frame-shaped four-sided dispensing provided in Embodiment 3 of the present application;

Figure 6b is a front view of the encapsulation layer of the frame-shaped four-sided dispensing of Figure 6a;

Figure 6c is a left side view of the encapsulation layer of the frame-shaped four-sided dispensing of Figure 6a;

7a is a top view of an L-shaped double-sided dispensing encapsulation layer according to Embodiment 4 of the present application;

Figure 7b is a front view of the encapsulation layer of the L-shaped double-sided dispensing of Figure 7a;

Figure 7c is a left side view of the encapsulation layer of the L-shaped double-sided dispensing in Figure 7a;

8a is a top view of a portion of an L-shaped double-sided dispensing package provided in Embodiment 4 of the present application;

Figure 8b is a front view of the encapsulation layer of the partial L-shaped double-sided dispensing of Figure 8a;

Figure 8c is a left side view of the encapsulation layer of a portion of the L-shaped double-sided dispensing of Figure 8a;

9a is a top view of another partial L-shaped double-sided dispensing encapsulation layer according to Embodiment 4 of the present application;

Figure 9b is a front view of the encapsulation layer of the partial L-shaped double-sided dispensing of Figure 9a;

Figure 9c is a left side view of the encapsulation layer of the partial L-shaped double-sided dispensing of Figure 9a;

10a is a top view of a package layer of a U-shaped three-sided dispensing provided in Embodiment 5 of the present application;

Figure 10b is a front view of the encapsulation layer of the U-shaped three-sided dispensing of Figure 10a;

Figure 10c is a left side view of the encapsulation layer of the U-shaped three-sided dispensing of Figure 10a;

FIG. 11 is a schematic structural diagram of an encapsulation layer according to Embodiment 6 of the present application; FIG.

FIG. 11b is a schematic structural diagram of another encapsulation layer according to Embodiment 6 of the present application; FIG.

FIG. 12 is a schematic structural diagram of an encapsulation layer according to Embodiment 7 of the present application; FIG.

FIG. 12b is a schematic structural diagram of another encapsulation layer according to Embodiment 7 of the present application.

detailed description

The embodiment of the present application provides a stacked package structure for solving the problem that it is difficult to completely fill or easily partially fill between the lower package layer and the upper package layer in the prior art. Specifically, the stacked package structure includes a motherboard and is far away. At least two encapsulation layers are stacked in the direction of the main board, wherein

The encapsulation layer of the at least two encapsulation layers closest to the side of the main board is soldered to the main board;

The encapsulation layer adjacent to the motherboard side of any two adjacent encapsulation layers is a lower encapsulation layer, and the encapsulation layer away from the main board side is an upper encapsulation layer, and the lower encapsulation layer is soldered to the upper encapsulation layer;

A first potting layer is further disposed between the lower encapsulating layer and the upper encapsulating layer, and a first potting area corresponding to the first potting layer is disposed in the lower encapsulating layer, and the first potting area and the upper encapsulating layer are not overlapping.

In the above embodiment, the first potting layer is formed by solidifying and coagulating the liquid dispensing material, and the first potting area is a liquid dispensing material that is dropped on the lower encapsulating layer, and the stacked encapsulating structure shown in FIG. The first potting zone is a region in which the lower encapsulating layer is exposed outside the upper encapsulating layer, that is, a portion of the lower encapsulating layer that extends to the outside of the upper encapsulating layer is the first potting zone, or The upper encapsulation layer is recessed inwardly at a position on the side to form a notch, and the portion corresponding to the notch in the lower encapsulation layer is the first potting area; when dispensing, the dispensing material is dropped on the dispensing material In the first potting zone, according to the principle of capillary flow, the dispensing material penetrates from the first potting zone into the gap between the lower encapsulating layer and the upper encapsulating layer, thereby filling the adjacent two encapsulating layers. In order to speed up the filling speed of the dispensing material, the dispensing tool is moved in the first filling zone to widen the flow channel of the dispensing material, and the dispensing gap is stopped after the gap between the upper and lower packaging layers is completely filled, and the dispensing material is In heating or ultraviolet (ultraviolet, The first potting layer is formed after curing under UV conditions.

When the stacked package structure is dispensed, any two adjacent package layers are used as one structural unit, and the lower package layer in each structural unit is separately dispensed, and the first potting layer is formed after the dispensing material is solidified, and the solution is solved. The problem that the encapsulation layers stacked on the main board are completely filled or difficult to be partially filled, and the first potting layer protects the solder joint between the lower encapsulation layer and the upper encapsulation layer, so that the drop impact, Under the stresses such as bending and temperature cycling, the mechanical stress and thermal stress concentrated on the edge solder joints can be distributed relatively evenly on all solder joints, preventing the high stress solder joints at the edges from failing, and improving the reliability of the stacked package structure.

In the above implementation, the adjacent two structural units share one encapsulation layer, that is, in the stacked package structure, the encapsulation layer located in the middle serves as both the upper encapsulation layer of one structural unit and the lower encapsulation layer of another structural unit. When the stacked package structure includes three or more package layers, the package layer on the middle portion has a first potting area except for the package layers located at the uppermost end and the lowermost end. In a specific embodiment, when a plurality of encapsulation layers are used, in the encapsulation layer having the first potting zone, the first potting zone is located on the same side, forming a step-like structure, so that when dispensing, Dispense sequentially from bottom to top (or top to bottom) to facilitate the entire dispensing operation.

In addition, the encapsulation layer of the at least two encapsulation layers adjacent to the main board side is soldered to the main board, and at least two encapsulation layers a second potting layer is disposed between the encapsulating layer on the side of the main board and the main board, and the second potting area corresponding to the second potting layer is disposed on the main board, and the second potting area and the at least two packages are The layers do not overlap; the second potting layer is also formed by solidifying the liquid dispensing material, and the second potting area is a liquid dispensing material that is dropped on the main board. In the specific setting, the area of the main board is much larger than that of the encapsulating layer. Area, and there are multiple components on the main board. In order to reasonably lay out and save space, a second potting area is set on the area of the main board near the edge of the encapsulation layer; when dispensing, the dispensing material is dropped on the main board. In the second potting area, according to the principle of capillary flow, the dispensing material is infiltrated into the gap between the main board and the encapsulating layer near the side of the main board by the second potting area, and the dispensing material stops the dispensing after the gap is completely filled. After the rubber material is solidified, a second potting layer is formed. During the dispensing process, the adjacent two first potting layers and the first potting layer and the second potting layer are integrated, and The tension of the surface of the rubber material, the entire potting layer has a trapezoid Along. When the stacked package structure is subjected to loads such as drop impact, bending and temperature cycling, the second potting layer distributes the mechanical stress and thermal stress concentrated on the edge solder joints relatively uniformly over all the solder joints, preventing the encapsulation layer and the main board. The high stress solder joint breaks between failures.

In order to more clearly understand the structure in the embodiment of the present application, a stacked package structure having two package layers will be described in detail below as an example.

As shown in FIG. 1a, the stacked package structure includes a main board 10 and two encapsulation layers stacked in a direction away from the main board 10. The encapsulation layer on the side close to the main board 10 is referred to as a lower encapsulation layer 20, away from the side of the main board 10. The encapsulation layer is referred to as the upper encapsulation layer 30, and the lower encapsulation layer 20 is soldered to the upper encapsulation layer 30. Specifically, the lower encapsulation layer 20 and the upper encapsulation layer 30 are soldered by a reflow soldering process, and the lower encapsulation layer 20 and the upper encapsulation layer are A plurality of solder joints 60 are formed between 30, and a plurality of solder joints 60 are formed in a frame shape. In addition, the lower package layer 20 is soldered to the main board 10 and can also be soldered by a reflow soldering process.

In the stacked package structure, a first potting layer 40 is disposed between the lower encapsulating layer 20 and the upper encapsulating layer 30, and a first potting area 21 corresponding to the first potting layer 40 is disposed in the lower encapsulating layer 20, The first potting zone 21 and the upper encapsulating layer 30 do not overlap. As shown in FIG. 1a, the first potting zone 21 is located in a region surrounded by a circle on the lower encapsulation layer 20. For example, the orthographic projection of the upper encapsulation layer 30 on the plane of the lower encapsulation layer 20 is located in the lower encapsulation layer 20, and it can be understood that the projection of the frame of the upper encapsulation layer 30 is completely within the frame of the lower encapsulation layer 20, or the upper encapsulation layer 30. The projection of the frame overlaps with the frame portion of the lower encapsulation layer 20, wherein the first potting area 21 is an area between the frame projection of the upper encapsulation layer 30 and the bezel of the lower encapsulation layer 20; or, as shown in FIG. 1b, The orthographic projection portion of the encapsulation layer 30 on the plane of the lower encapsulation layer 20 is located in the lower encapsulation layer 20. In FIG. 1b, the upper encapsulation layer 30 is shifted to the right in the horizontal direction, and the lower encapsulation layer 20 is exposed on the upper encapsulation layer. The outer portion of the 30 is set as the first potting zone 21.

In a specific arrangement, the lower encapsulation layer 20 is a polygon, and at least one side of the lower encapsulation layer 20 is provided with a first potting area 21, wherein the setting of the first potting area 21 includes various forms, Several specific embodiments are described in detail.

Example 1

The lower encapsulation layer 20 is polygonal, and only one side of the lower encapsulation layer 20 is provided with a first potting area. In a specific embodiment, as shown in FIG. 2a to FIG. 2c, wherein FIG. 2a is a top view when the upper encapsulation layer 30 and the lower encapsulation layer 20 are stacked, FIG. 2b is a front view thereof, and FIG. 2c is a left side view thereof. In the stacked package structure, the upper package layer 30 and the lower package layer 20 are both rectangular, one side of the upper package layer 30 and one side of the lower package layer 20 are equal in length, and the area of the upper package layer 30 is smaller than the lower package. The area of layer 20. When the package is packaged, the upper package layer 30 is aligned with the equal length sides of the lower package layer 20, such that one side of the lower package layer 20 will extend to the outside of the upper package layer 30, and the lower package layer 20 is extended to the lower package layer 20 The portion outside the upper encapsulation layer 30 is set as the first potting zone 21a, and as shown in FIG. 2a, the first potting zone 21a is disposed on the entire area of the side of the lower encapsulation layer 20.

In another specific embodiment, as shown in FIG. 3a to FIG. 3c, wherein FIG. 3a is a top view when the upper encapsulation layer 30 and the lower encapsulation layer 20 are stacked, FIG. 3b is a front view thereof, and FIG. 3c is a left side thereof. In the stacked package structure, the upper package layer 30 and the lower package layer 20 are rectangular of the same size, but one side of the upper package layer 30 is provided with a notch, and when the package is packaged, the upper package layer 30 and the lower package layer are provided. The four end angles of 20 are aligned, and a portion of the lower encapsulation layer 20 corresponding to the notch of the upper encapsulation layer 30 is set as the first potting area 21b, and the first potting area 21b is disposed on a partial area of the side of the lower encapsulation layer 20. As shown in FIG. 3a, the notch on the upper encapsulation layer 30 is rectangular, and correspondingly, the first potting area 21b on the lower encapsulation layer 20 is also rectangular.

Example 2

The lower encapsulation layer 20 is polygonal, and at least two sides of the lower encapsulation layer 20 are provided with a first potting zone, and at least two first potting zones are disposed that are not in communication with each other. In a specific embodiment, as shown in FIG. 4a to FIG. 4c, wherein FIG. 4a is a top view when the upper encapsulation layer 30 and the lower encapsulation layer 20 are stacked, FIG. 4b is a front view thereof, and FIG. 4c is a left side view thereof. In the stacked package structure, the upper package layer 30 and the lower package layer 20 are both rectangular, one side of the upper package layer 30 and one side of the lower package layer 20 are equal in length, and the area of the upper package layer 30 is smaller than the lower package. The area of the layer 20 is such that the upper package layer 30 and the lower package layer 20 are vertically aligned while the package is stacked, and the sides of the upper package layer 30 are kept parallel to the sides of the lower package layer 20, so that the lower package layer There are two opposite sides of the opposite arrangement, and the two sides will extend to the outside of the upper package layer 30, and then the portions of the lower package layer 20 that are extended to the outside of the upper package layer 30 are respectively set as the first glue filling area 21c, as shown in the figure. As shown in 4a, each of the first potting zones 21c is disposed over the entire area of the side of the lower encapsulation layer 20.

In another specific embodiment, as shown in FIG. 5a to FIG. 5c, wherein FIG. 5a is a top view when the upper encapsulation layer 30 and the lower encapsulation layer 20 are stacked, FIG. 5b is a front view thereof, and FIG. 5c is a left side thereof. In the stacked package structure, the upper encapsulation layer 30 and the lower encapsulation layer 20 are rectangular of the same size, but the upper encapsulation layer 30 is respectively provided with a notch on the opposite sides, and when the package is packaged, the upper encapsulation layer 30 is provided. Aligning with the four end angles of the lower encapsulation layer 20, the portions of the lower encapsulation layer 20 corresponding to the two notches of the upper encapsulation layer 30 are respectively set as the first potting area 21d, and each of the first potting areas 21d is disposed under On a partial area of the side of the encapsulation layer 20, as shown in FIG. 5a, the two notches on the upper encapsulation layer 30 are rectangular, and correspondingly, the two first encapsulation areas 21d on the lower encapsulation layer 20 are also rectangular.

Example 3

The lower encapsulation layer 20 is a polygonal shape. When each of the lower encapsulation layers 20 is provided with a first potting zone, the first potting zones provided on each side are connected to each other to form a frame shape. In a specific embodiment, as shown in FIG. 6a to FIG. 6c, wherein FIG. 6a is a top view when the upper encapsulation layer 30 and the lower encapsulation layer 20 are stacked, FIG. 6b is a front view thereof, and FIG. 6c is a left side view thereof. In the stacked package structure, the upper package layer 30 and the lower package layer 20 are both rectangular, and the length and width of the upper package layer 30 are smaller than the length and width of the lower package layer 20, and when the package is packaged, the upper package layer 30 is The center of the lower encapsulation layer 20 is vertically aligned, while the sides of the upper encapsulation layer 30 are kept parallel to the sides of the lower encapsulation layer 20, such that each side of the lower encapsulation layer 20 will extend to the outside of the upper encapsulation layer 30. The portions of each of the lower encapsulation layers 20 that are extended to the outside of the upper encapsulation layer 30 are respectively set as the first potting regions 21e. As shown in FIG. 6a, the four first potting regions 21e are connected to each other to form a frame shape.

Example 4

The lower encapsulation layer 20 is a polygon. When two adjacent sides of the lower encapsulation layer 20 are respectively provided with the first potting area, the two first potting areas are connected to form a whole. In a specific embodiment, as shown in FIG. 7a to FIG. 7c, wherein FIG. 7a is a top view when the upper encapsulation layer 30 and the lower encapsulation layer 20 are stacked, FIG. 7b is a front view thereof, and FIG. 7c is a left side view thereof. In the stacked package structure, the upper package layer 30 and the lower package layer 20 are both rectangular, and the length and width of the upper package layer 30 are smaller than the length and width of the lower package layer 20, and when the package is packaged, the upper package layer 30 is One end angle is aligned with one end corner of the lower encapsulation layer 20 such that adjacent sides of the lower encapsulation layer 20 will extend to the upper encapsulation layer 30. Externally, the portions of the lower encapsulation layer 20 that are extended to the outside of the upper encapsulation layer 30 are respectively set as the first potting area 21f. As shown in FIG. 7a, each of the first potting areas 21f is set. On the entire area of the side of the lower encapsulation layer 20, the two first potting zones 21f are connected to form an L shape.

In another specific embodiment, as shown in FIG. 8a to FIG. 8c, wherein FIG. 5a is a top view when the upper encapsulation layer 30 and the lower encapsulation layer 20 are stacked, FIG. 8b is a front view thereof, and FIG. 8c is a left side thereof. In the stacked package structure, the upper encapsulation layer 30 and the lower encapsulation layer 20 are rectangular of the same size, but the upper encapsulation layer 30 is provided with an L-shaped notch at one end corner, and the other encapsulation layer 30 is laminated when the package is packaged. The three end angles are respectively aligned with the three end angles of the lower encapsulation layer 20, and the portion of the lower encapsulation layer 20 corresponding to the L-shaped notch of the upper encapsulation layer 30 is set as the first potting area 21g, as shown in FIG. 8a, under A first potting zone 21g is respectively disposed on a portion of the adjacent sides of the encapsulating layer 20, and the two first potting zones 21g are connected to form an L shape.

In addition, as shown in FIG. 9a to FIG. 9c, FIG. 9a is a top view when the upper encapsulation layer 30 and the lower encapsulation layer 20 are stacked, FIG. 9b is a front view thereof, and FIG. 9c is a left side view thereof. The upper encapsulation layer 30 and the lower encapsulation layer 20 are rectangular of the same size, but the lower encapsulation layer 20 is outwardly expanded at one end corner, and the other three end angles of the lower encapsulation layer 20 and the upper encapsulation layer 30 are laminated when the package is packaged. The three end corners are respectively aligned, and the portion of the lower encapsulation layer 20 that extends outward at the corners is set as the first potting zone 21h. As shown in FIG. 9a, the first potting zone 21h is L-shaped.

Example 5

The lower encapsulation layer 20 is a polygon. When one side of the lower encapsulation layer 20 and two sides adjacent thereto are respectively provided with the first potting area, the three first potting areas are connected to form a whole. In a specific embodiment, as shown in FIG. 10a to FIG. 10c, wherein FIG. 10a is a top view when the upper encapsulation layer 30 and the lower encapsulation layer 20 are stacked, FIG. 10b is a front view thereof, and FIG. 10c is a left side view thereof. In the stacked package structure, the upper package layer 30 and the lower package layer 20 are both rectangular, and the length and width of the upper package layer 30 are smaller than the length and width of the lower package layer 20, and when the package is packaged, the upper package layer 30 is One side is aligned with one side of the lower encapsulation layer 20, but the end points do not coincide. Thus, the lower encapsulation layer 20 will have three sides extending to the outside of the upper encapsulation layer 30, and then the three sides of the lower encapsulation layer 20 are extended to The portions outside the upper encapsulation layer 30 are respectively set as the first potting zone 21i, as shown in FIG. 10a, each of the first potting zones 21i is disposed on the entire area of the side, and three first potting zones 21i communicates to form a U shape.

Embodiments 1 to 5 describe the arrangement of the upper encapsulation layer 30, the lower encapsulation layer 20, and the first potting area 21 in detail, and the upper encapsulation layer 30 and the lower encapsulation layer can be adjusted according to the development of the dispensing technology level. The difference in size of 20 makes the width of the first potting zone set to meet the dispensing requirements. Specifically, the width of the first potting zone can be set to 0.5 mm. It should be noted that any solution that adjusts the size and shape of the upper encapsulation layer 30 and the lower encapsulation layer 20 to form a first encapsulation region on the lower encapsulation layer 20 that does not overlap with the upper encapsulation layer 30 belongs to the protection scope of the present application. In addition, a second potting layer 50 is disposed between the lower encapsulating layer 20 and the main board 10, and a second potting area corresponding to the second potting layer 50 is disposed on the main board 10, and the second potting area is compared. Freely, the area of the main board is much larger than the area of the encapsulation layer, and the second filling area can be set in any area on the main board near the edge of the lower encapsulation layer 20, which will not be described in detail herein.

When the stacked package structure is dispensed, it is completed in two steps. First, the dispensing material is dropped into the first potting area 21 on the lower encapsulation layer 20. According to the principle of capillary flow, the dispensing material will be filled by the first potting material. The region penetrates into the gap between the lower encapsulation layer 20 and the upper encapsulation layer 30. In order to speed up the filling speed of the dispensing material, the dispensing tool is moved in the first potting zone 21 to widen the flow channel of the dispensing material. After the dispensing material is sufficiently filled in the gap, the dispensing is stopped, the dispensing material is cured to form the first potting layer 40; secondly, the dispensing material is dropped on the second potting area on the main board 10, and the dispensing material is The second potting zone penetrates into the gap between the encapsulating layer 20 and the main board 10. After the dispensing material is sufficiently filled in the gap, the dispensing is stopped, and the dispensing material is cured to form the second potting layer 50. In the dispensing process, the first potting layer 40 and the second filling The glue layers 50 are integrally connected, and the entire potting layer has a trapezoidal edge due to the tension of the surface of the dispensing material, and the entire potting layer is opposite to the solder joint 60 between the lower encapsulation layer 20 and the upper encapsulation layer 30 and the lower package. The solder joint 60 between the layer 20 and the main plate 10 serves to protect the mechanical stress and thermal stress concentrated on the edge solder joint 60 from being uniformly distributed under all loads such as drop impact, bending and temperature cycling. At point 60, the high stress solder joint 60 of the edge is prevented from failing.

In the embodiment of the present application, dispensing between the lower encapsulation layer 20 and the upper encapsulation layer 30 and between the lower encapsulation layer 20 and the main board 10 respectively ensures that the dispensing material can be completely filled in both spaces, improving the stacking. The reliability of the package structure; and, when dispensing, the dispensing material stops filling after each gap is fully filled, effectively controlling the dispensing of the dispensing material to the peripheral components, and reducing the peripheral point of the motherboard 10. The area of the forbidden area of the adhesive sensitive component improves the layout flexibility of the motherboard 10, and eliminates the plate vibration, fine pitch component dendrites, and WLCSP (Wafer Level Chip Scale Package) environment associated with the overflow. In addition, in the prior art, since the dispensing material is partially filled between the upper encapsulation layer 30 and the lower encapsulation layer 20, the heat dissipation channel from the application processor to the memory is mainly located at the solder joint 60 and the dispensing material portion. a filled area, and in the present application, the dispensing material is completely filled between the upper encapsulation layer 30 and the lower encapsulation layer 20, the solder joint 60 between the upper encapsulation layer 30 and the lower encapsulation layer 20, and the first potting layer 40 whole Area can be used for cooling, the cooling channel widening from the application processor to the memory, to improve the heat dissipation effect of the stack package, in particular the use of dispensing a material of high thermal conductivity.

The above is a detailed description of a stacked package structure having two package layers. It should be noted that the structural features of the upper package layer 30 and the lower package layer 20 are applicable to the settings of any two adjacent package layers in the plurality of package layers. . In the TSV (Through Silicon Via) 3D packaging technology, a plurality of silicon wafers are stacked in each of the package layers, and the arrangement between the silicon wafers is also applicable to the structural features of the package layers in the above embodiments.

In a specific embodiment, as shown in FIG. 11a, each encapsulation layer includes a substrate 70 and at least two silicon wafers stacked in a direction away from the substrate 70, wherein any adjacent two silicon wafers are adjacent to the substrate. The silicon wafer on one side is the lower silicon wafer, the silicon wafer on the side away from the substrate 70 is the upper silicon wafer, the lower silicon wafer is soldered to the upper silicon wafer, and the third silicon filler is also provided between the lower silicon wafer and the upper silicon wafer. The layer 101; at least one pair of two adjacent silicon wafers, the lower layer of silicon wafer is provided with a third potting zone 103 corresponding to the third potting layer 101, and the third potting zone 103 does not overlap with the upper layer of silicon wafers. In Fig. 11a, the third potting zone 103 is located in a region surrounded by a circle on the lower silicon wafer. The third potting layer 101 is formed by solidifying and coagulating the liquid dispensing material, and the third potting area 103 is a region in which the liquid dispensing material drops on the lower silicon wafer. When specifically disposed, at least one pair of adjacent two In the silicon wafer, a third potting zone 103 is disposed on a portion of the lower silicon wafer that is extended to the outside of the upper silicon wafer, or the upper silicon wafer is recessed inward at a position on the side to form a gap, and in the lower silicon wafer The portion corresponding to the notch is provided with a third potting zone 103.

In order to more clearly understand the internal structure of the encapsulation layer, an encapsulation layer having four silicon wafers will be described in detail below as an example.

The encapsulation layer comprises a substrate 70 and four silicon wafers, and four silicon wafers are stacked in a direction away from the substrate 70, and a plastic encapsulation layer 90 is disposed on the outer side of the silicon wafer. For convenience of description, the reference is made in a direction away from the substrate 70. The silicon wafers are sequentially referred to as the first silicon wafer 81, the second silicon wafer 82, the third silicon wafer 83, and the fourth silicon wafer 84; the adjacent two silicon wafers are soldered and connected, and between the adjacent two silicon wafers The third potting layer 101 is provided, and at least one pair of two silicon wafers are disposed in the four silicon wafers, wherein the lower silicon wafer is provided with a third potting area 103 corresponding to the third potting layer 101. And the third potting zone 103 does not overlap with the upper silicon wafer.

Example 6

As shown in FIG. 11a, there is only one pair of adjacent two silicon wafers in the encapsulation layer, wherein the lower silicon wafer is provided with the upper silicon layer. The third potting zone 103 is not overlapped, and the pair of adjacent two silicon wafers are a pair of silicon wafers farthest from the substrate 70. When specifically disposed, the first silicon wafer 81, the second silicon wafer 82, and the first The three silicon wafers 83 are the same size and aligned, and the orthographic projection of the fourth silicon wafer 84 on the plane of the third silicon wafer 83 is located on the third silicon wafer 83. It can be understood that the projection of the fourth silicon wafer 84 frame is completely located. The projection of the frame of the third silicon wafer 83 or the frame of the fourth silicon wafer 84 coincides with the frame portion of the third silicon wafer 83, wherein the third potting region 103 is the frame projection of the fourth silicon wafer 84 and the third silicon wafer. The area between the borders of 83.

Alternatively, the orthographic projection portion of the fourth silicon wafer 84 on the plane of the third silicon wafer 83 is located in the third silicon wafer 83, as shown in FIG. 11b, the fourth silicon wafer 84 is shifted to the right in the horizontal direction, and A portion of the third silicon wafer 83 exposed on the outside of the fourth silicon wafer 84 is set as the third potting region 103. When the glue is specifically dispensed, the dispensing material is dropped into the third potting zone 103 by using a dispensing tool. According to the capillary flow principle, the dispensing material penetrates into the gap between the third silicon wafer 83 and the fourth silicon wafer 84. After the gap is completely filled, the dispensing continues, and the dispensing material will penetrate along the sidewall of the third silicon wafer 83 to the gap between the third silicon wafer 83 and the second silicon wafer 82, and so on, and the silicon material to be dispensed After the gap between the gaps is completely filled, the dispensing is stopped, and after the dispensing material is cured, a third potting layer 101 is formed between the adjacent two silicon wafers.

Example 7

As shown in FIG. 12a, in any pair of adjacent two silicon wafers of the encapsulation layer, the lower silicon wafer is provided with a third potting region 103 which does not overlap with the upper silicon wafer. In specific arrangement, the upper silicon wafer is The orthographic projection on the plane of the lower silicon wafer is located in the lower silicon wafer, and when the lower silicon wafer is polygonal, at least one side of the lower silicon wafer is provided with a third potting region 103, specifically, at least one of the lower silicon wafers When the third potting zone 103 is disposed on both sides, the at least two third potting zones 103 are not connected to each other, or the at least two third potting zones 103 are arranged to form a whole; or, as shown in the figure In 12b, in the adjacent two silicon wafers, the orthographic projection portion of the upper silicon wafer on the plane of the lower silicon wafer is located in the lower silicon wafer. Specifically, the four silicon wafers are respectively shifted and displaced in a direction parallel to the substrate. Therefore, in any two adjacent silicon wafers, a portion where the lower silicon wafer is exposed outside the upper silicon wafer is set as the third potting region 103. The specific arrangement of the package layer described above is also applicable to the silicon wafer, and the detailed description thereof will not be repeated here.

In addition, a silicon wafer on a side of the at least two silicon wafers adjacent to the substrate 70 is soldered to the substrate 70, and a fourth potting layer is further disposed between the silicon wafer on the side of the substrate 70 adjacent to the substrate 70 and the substrate 70. 102, the substrate 70 is provided with a fourth potting zone corresponding to the fourth potting layer 102, the fourth potting zone does not overlap with at least two silicon wafers; the fourth potting layer 102 is also composed of a liquid dispensing material. Forming and solidifying, the fourth potting zone is a region where the liquid dispensing material is dropped on the substrate 70. When specifically disposed, a fourth potting zone is disposed on the substrate 70 near the edge of the silicon wafer layer; when dispensing, The dispensing material is dropped on the fourth potting zone on the substrate 70. According to the principle of capillary flow, the dispensing material is infiltrated into the gap between the substrate 70 and the silicon wafer near the side of the substrate 70 by the fourth potting zone. After the adhesive material completely fills the void, the dispensing is stopped, and the dispensing material is solidified to form a fourth potting layer 102. During the dispensing process, the adjacent two third potting layers 101 and the third potting glue The layer 101 and the fourth potting layer 102 are integrally connected, and due to the tension of the surface of the dispensing material, the entire irrigation Layer has a trapezoidal edges. The entire potting layer protects the solder joint 60 between the lower silicon wafer and the upper silicon wafer and the solder joint 60 between the lower silicon wafer and the substrate 70, so that under load such as drop impact, bending and temperature cycling, The mechanical and thermal stresses concentrated on the edge solder joints can be distributed relatively evenly over all solder joints to prevent high stress solder joints from failing at the edges.

The embodiment of the present application further provides a terminal, including the above-mentioned stacked package structure, wherein the arrangement of the package layer in the stacked package structure may refer to the structural features described in Embodiments 1 to 5, and the silicon wafer in each package layer For the setting of the structure, the structural features described in Embodiment 6 and Embodiment 7 can be referred to.

As can be seen from the above description, in any two adjacent encapsulation layers in this embodiment, the lower encapsulation layer 20 is provided. a first potting zone 21 that does not overlap with the upper encapsulating layer 30, so that when dispensing, any two adjacent encapsulating layers are used as one structural unit, and the first filling on the lower encapsulating layer 20 in each structural unit The glue zone 21 is dispensed, so that the plurality of package layers disposed in the stack can be completely filled with the glue material, thereby improving the reliability of the package structure; the TSV 3D package technology is adopted between the plurality of silicon wafers in the package layer. At least one pair of adjacent silicon wafers is present, wherein the lower silicon wafer is provided with a third potting zone which does not overlap with the upper silicon wafer, so as to ensure that the silicon wafer can be dispensed between materials during dispensing. Fully filled, improving the reliability of the stacked package structure. Specifically, a third potting zone can be disposed on any of the two adjacent silicon wafers on the lower silicon wafer.

It is apparent that those skilled in the art can make various modifications and variations to the embodiments of the present application without departing from the spirit and scope of the application. Thus, it is intended that the present invention cover the modifications and variations of the embodiments of the present invention.

Claims

a stacked package structure, comprising: a main board; and at least two encapsulation layers stacked in a direction away from the main board, wherein

An encapsulation layer of the at least two encapsulation layers closest to a side of the main board is soldered to the main board;

The encapsulation layer adjacent to the side of the main board of any two adjacent encapsulation layers is a lower encapsulation layer, and the encapsulation layer away from the side of the main board is an upper encapsulation layer, and the lower encapsulation layer is soldered to the upper encapsulation layer ;

a first potting layer is disposed between the lower encapsulating layer and the upper encapsulating layer, and a first potting area corresponding to the first potting layer is disposed in the lower encapsulating layer, and the A glue filling zone does not overlap the upper encapsulation layer.
The stacked package structure of claim 1 , wherein a second potting layer is disposed between the encapsulating layer of the at least two encapsulating layers closest to the side of the main board and the main board, and the main board A second potting zone corresponding to the second potting layer is disposed, and the second potting zone does not overlap with the at least two encapsulating layers.
The stacked package structure of claim 1 , wherein an orthographic projection of the upper encapsulation layer on a plane of the lower encapsulation layer is located in the lower encapsulation layer.
The stacked package structure according to claim 3, wherein the lower encapsulation layer is a polygon, and the first encapsulation region is disposed on at least one side of the lower encapsulation layer.
The stacked package structure according to claim 4, wherein when at least two of the lower encapsulation layers are provided with the first potting zone, the at least two first potting zones are not connected to each other .
The stacked package structure according to claim 4, wherein when at least two of the lower encapsulation layers are provided with the first potting zone, the at least two first potting zones are connected to form one overall.
The stacked package structure according to claim 6, wherein when the first potting zone is provided on each side of the lower encapsulation layer, the first potting zones provided on each side are connected to each other. Framed.
The stacked package structure according to claim 6, wherein when the first potting zone is provided on one side of the lower encapsulating layer and the two sides adjacent to the side, the three A glue filling zone is connected to form a whole.
The stacked package structure according to any one of claims 1 to 8, wherein the encapsulation layer comprises a substrate and at least two silicon wafers stacked in a direction away from the substrate, wherein

One of the at least two silicon wafers closest to the side of the substrate is soldered to the substrate;

The silicon wafer adjacent to one side of the substrate of any two adjacent silicon wafers is a lower silicon wafer, and the silicon wafer away from one side of the substrate is an upper silicon wafer, and the lower silicon wafer is soldered to the upper silicon wafer. And a third potting layer is disposed between the lower silicon wafer and the upper silicon wafer;

In at least one pair of adjacent two silicon wafers, the lower silicon wafer is provided with a third potting zone corresponding to the third potting layer, and the third potting zone and the upper layer of silicon The pieces do not overlap.
The stacked package structure according to claim 9, wherein a fourth potting layer is disposed between the silicon wafer closest to the substrate side of the at least two silicon wafers and the substrate, and the substrate A fourth potting zone corresponding to the fourth potting layer is disposed, and the fourth potting zone does not overlap with the at least two silicon wafers.
The stacked package structure according to claim 9, wherein in the two adjacent silicon wafers, the third silicon filling region is disposed on the lower silicon wafer.
The stacked package structure according to claim 11, wherein an orthographic projection of the upper silicon wafer on a plane in which the lower silicon wafer is located is located in the lower silicon wafer.
The stacked package structure according to claim 12, wherein the lower silicon wafer is a polygon, A third potting zone is disposed on at least one side of the lower layer silicon wafer.
The stacked package structure according to claim 13, wherein when at least two sides of the lower silicon wafer are provided with a third potting zone, the at least two third potting zones are not connected to each other, or At least two third potting zones are connected to form a unitary body.
A terminal comprising the stacked package structure according to any one of claims 1 to 14.