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WO2018018847A1 - Module de puissance intelligent et son procédé de fabrication - Google Patents

Module de puissance intelligent et son procédé de fabrication Download PDF

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Publication number
WO2018018847A1
WO2018018847A1 PCT/CN2016/113966 CN2016113966W WO2018018847A1 WO 2018018847 A1 WO2018018847 A1 WO 2018018847A1 CN 2016113966 W CN2016113966 W CN 2016113966W WO 2018018847 A1 WO2018018847 A1 WO 2018018847A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
circuit
power module
intelligent power
insulating layer
Prior art date
Application number
PCT/CN2016/113966
Other languages
English (en)
Chinese (zh)
Inventor
冯宇翔
Original Assignee
广东美的制冷设备有限公司
美的集团股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 广东美的制冷设备有限公司, 美的集团股份有限公司 filed Critical 广东美的制冷设备有限公司
Publication of WO2018018847A1 publication Critical patent/WO2018018847A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Definitions

  • the power component is a planar power device.
  • the manufacturing method of the above intelligent power module has the beneficial effects that the metal is exposed at the top and the bottom of the module, which reduces the difficulty of positioning due to the thickness control of the upper and lower surfaces when the full-encapsulation technology is injected;
  • the line bonding and cleaning process saves equipment investment, improves production efficiency, reduces process control requirements, greatly reduces the manufacturing difficulty of intelligent power modules, improves manufacturing yield, and further reduces the cost of intelligent power modules.
  • 6(A) and 6(B) are schematic side and top plan views of the assembled circuit components and leads, respectively;
  • the substrate 16 acts as a carrier for the smart power module 10 and has a first surface and a second surface opposite the first surface.
  • the insulating layer 17 is disposed on the first surface of the substrate.
  • a circuit wiring layer 18 is formed on the surface of the insulating layer; the circuit component 14 is inverted and soldered to a predetermined position on the upper surface of the circuit wiring layer 18; a power component mounted on the circuit component 14 by the heat sink 15; a sealing layer 12 is coated on the surface of the insulating layer 17, covering the circuit wiring layer 18 and the circuit component 14, and the surface of the heat sink 15 is exposed.
  • the aluminum substrate of a suitable size is formed by directly processing a 1 m ⁇ 1 m aluminum material, and the file is made of high-speed steel, and the motor is rotated at 5000 rpm, and the boring tool and the aluminum material are used.
  • the plane is cut at a right angle to make the edge of the 1100 aluminum material at right angles, and the burr is less than 10 ⁇ m. It can also be etched into a specific shape by chemical reaction through an etching tool. Referring to the X-X' line cross-sectional view 3(B) of the extension 3(A) and the Y-Y' line cross-sectional view 3(C) of the extension 3(A).
  • a gold layer may be formed on the surface of the circuit wiring 18 by means of electroplating gold or chemical immersion gold.
  • the pin 11 of the present invention is a single pin, which is different from the entire row of pins of the prior art, because the circuit wiring 18 to which the pin 11 is fixed is only wrapped by a resin portion.
  • the impact strength is limited, and the separate pins avoid the process of cutting the ribs, and the systemic impact on the smart power module 10 of the present invention can be reduced.
  • the fourth step 908 of the present invention is a step of the present invention. This step is a step of flip-chip bonding the circuit element 14 on the surface of the circuit wiring 18 and arranging the lead pins 11.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

L'invention concerne un module de puissance intelligent et son procédé de fabrication. Le module de puissance intelligent comprend : un substrat (16) servant de support et ayant une première surface et une seconde surface opposée à la première surface; une couche isolante (17) disposée sur une première surface du substrat (16); une couche de câblage de circuit (18) formée à la surface de la couche isolante (17); des éléments de circuit (14) montés en sens inverse et soudés en des endroits prédéterminés sur une surface supérieure de la couche de câblage de circuit (18); un radiateur (15) monté en surface sur un élément de puissance dans les éléments de circuit (14); et une couche d'étanchéité (12) revêtu à la surface de la couche isolante (17), recouvrant la couche de câblage de circuit (18) et les éléments de circuit (14), et exposant une partie de la surface du radiateur (15). Les éléments de circuit sont connectés électriquement dans un mode de montage inversé, aucun fil métallique n'est nécessaire, et le coût est réduit. Une ailette de rayonnement et un substrat en aluminium sont totalement exposés à l'extérieur de la résine, et l'effet de rayonnement est maximisé. Même si l'humidité extérieure pénètre, il est difficile de provoquer la corrosion parce qu'il n'y a pas de fil métallique.
PCT/CN2016/113966 2016-07-29 2016-12-30 Module de puissance intelligent et son procédé de fabrication WO2018018847A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201610624890.2 2016-07-29
CN201610624890.2A CN106158801A (zh) 2016-07-29 2016-07-29 一种智能功率模块及其制造方法

Publications (1)

Publication Number Publication Date
WO2018018847A1 true WO2018018847A1 (fr) 2018-02-01

Family

ID=57328763

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2016/113966 WO2018018847A1 (fr) 2016-07-29 2016-12-30 Module de puissance intelligent et son procédé de fabrication

Country Status (2)

Country Link
CN (1) CN106158801A (fr)
WO (1) WO2018018847A1 (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113079651A (zh) * 2021-03-10 2021-07-06 京信网络系统股份有限公司 Pcb板上实现自动焊接的方法及pcb板印刷用钢网
CN113314515A (zh) * 2021-06-09 2021-08-27 广东汇芯半导体有限公司 半导体电路和半导体电路的制备方法
US20210385937A1 (en) * 2018-10-09 2021-12-09 Covestro Llc Insert-molded electronic modules using thermally conductive polycarbonate and molded interlocking features

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106158801A (zh) * 2016-07-29 2016-11-23 广东美的制冷设备有限公司 一种智能功率模块及其制造方法
CN113643987A (zh) * 2021-07-30 2021-11-12 南京长峰航天电子科技有限公司 一种载体裸片共晶工艺

Citations (4)

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KR20130055358A (ko) * 2011-11-18 2013-05-28 삼성전기주식회사 전력 모듈 패키지 및 그 제조방법
CN105070695A (zh) * 2015-08-14 2015-11-18 株洲南车时代电气股份有限公司 双面散热电动汽车功率模块
CN106158801A (zh) * 2016-07-29 2016-11-23 广东美的制冷设备有限公司 一种智能功率模块及其制造方法
CN205845942U (zh) * 2016-07-29 2016-12-28 广东美的制冷设备有限公司 智能功率模块

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CN101101880A (zh) * 2006-07-03 2008-01-09 矽品精密工业股份有限公司 散热型封装结构及其制法
KR20100008460A (ko) * 2008-07-16 2010-01-26 주식회사 케이이씨 전력용 반도체 장치 및 그 제조 방법
KR101321282B1 (ko) * 2011-06-17 2013-10-28 삼성전기주식회사 전력 모듈 패키지 및 이를 구비한 시스템 모듈
CN104112730A (zh) * 2013-06-09 2014-10-22 广东美的制冷设备有限公司 智能功率模块及其制造方法
CN104332453A (zh) * 2013-07-22 2015-02-04 西安永电电气有限责任公司 基于塑封式ipm引线框架的双边固定散热结构

Patent Citations (4)

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KR20130055358A (ko) * 2011-11-18 2013-05-28 삼성전기주식회사 전력 모듈 패키지 및 그 제조방법
CN105070695A (zh) * 2015-08-14 2015-11-18 株洲南车时代电气股份有限公司 双面散热电动汽车功率模块
CN106158801A (zh) * 2016-07-29 2016-11-23 广东美的制冷设备有限公司 一种智能功率模块及其制造方法
CN205845942U (zh) * 2016-07-29 2016-12-28 广东美的制冷设备有限公司 智能功率模块

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20210385937A1 (en) * 2018-10-09 2021-12-09 Covestro Llc Insert-molded electronic modules using thermally conductive polycarbonate and molded interlocking features
CN113079651A (zh) * 2021-03-10 2021-07-06 京信网络系统股份有限公司 Pcb板上实现自动焊接的方法及pcb板印刷用钢网
CN113314515A (zh) * 2021-06-09 2021-08-27 广东汇芯半导体有限公司 半导体电路和半导体电路的制备方法

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