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WO2013012194A2 - Procédé de fabrication d'un substrat pour diode électroluminescente, substrat pour diode électroluminescente fabriqué au moyen du procédé et procédé de fabrication d'une diode électroluminescente comprenant un substrat pour diode électroluminescente - Google Patents

Procédé de fabrication d'un substrat pour diode électroluminescente, substrat pour diode électroluminescente fabriqué au moyen du procédé et procédé de fabrication d'une diode électroluminescente comprenant un substrat pour diode électroluminescente Download PDF

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Publication number
WO2013012194A2
WO2013012194A2 PCT/KR2012/005465 KR2012005465W WO2013012194A2 WO 2013012194 A2 WO2013012194 A2 WO 2013012194A2 KR 2012005465 W KR2012005465 W KR 2012005465W WO 2013012194 A2 WO2013012194 A2 WO 2013012194A2
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WO
WIPO (PCT)
Prior art keywords
substrate
light emitting
emitting diode
substrate member
manufacturing
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PCT/KR2012/005465
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English (en)
Korean (ko)
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WO2013012194A3 (fr
Inventor
이종람
이환건
손준호
송양희
김범준
Original Assignee
포항공과대학교 산학협력단
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Publication of WO2013012194A2 publication Critical patent/WO2013012194A2/fr
Publication of WO2013012194A3 publication Critical patent/WO2013012194A3/fr

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/013—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
    • H10H20/0133—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials
    • H10H20/01335—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials the light-emitting regions comprising nitride materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/819—Bodies characterised by their shape, e.g. curved or truncated substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/819—Bodies characterised by their shape, e.g. curved or truncated substrates
    • H10H20/82—Roughened surfaces, e.g. at the interface between epitaxial layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/822—Materials of the light-emitting regions
    • H10H20/824—Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP
    • H10H20/825—Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP containing nitrogen, e.g. GaN

Definitions

  • the present invention relates to a method for manufacturing a light emitting diode substrate, a light emitting diode substrate manufactured by the same, and a method for manufacturing a light emitting diode having the light emitting diode substrate, and more particularly, to reduce manufacturing time and cost.
  • the present invention relates to a method of manufacturing a light emitting diode substrate capable of further improving light extraction efficiency of a light emitting diode, a light emitting diode substrate manufactured by the same, and a method of manufacturing a light emitting diode having the light emitting diode substrate.
  • a light emitting diode converts current directly into light by using a principle of emitting light when electrons in the n region meet and recombine with holes in the p region when a voltage is applied to the pn junction of the semiconductor. Because of its good long life, good light directivity, low voltage driving, no preheating time, no complicated driving circuit, and strong resistance to shock and vibration, it replaces conventional light sources such as incandescent, fluorescent and mercury lamps. It is attracting attention as a next generation light source.
  • the improvement of the efficiency of the light emitting diode is made in two directions. The first is to increase the internal quantum efficiency determined by the crystalline and epilayer structure, and the second is that the generated light can be emitted to the outside of the light emitting diode as much as possible. So as to improve the light extraction efficiency.
  • the internal light loss due to the development of easy heat dissipation structure or the total reflection at the interface between layers is minimized.
  • the internal light loss due to the total reflection at the interface between layers is minimized.
  • a method of reducing the total reflection characteristic of the interlayer interface by patterning the interlayer interface is known.
  • FIG. 1 is a schematic cross-sectional view of a gallium nitride-based horizontal light emitting diode in which the uneven portion 11-1 is formed on the upper surface of the substrate member 11 to reduce the total reflection characteristic of the interlayer interface.
  • a light emitting diode using a conventional light emitting diode substrate hereinafter, referred to as a substrate
  • light generated in the active layer 30 passes through the first semiconductor layer 20 and the substrate 10 in order.
  • part of the light is totally reflected at the interface of the first semiconductor layer 20 and the substrate 10 is not emitted to the front side of the light emitting diode, but is lost inside, the upper surface of the substrate member 11 Due to the uneven portion 11-1 formed in the first semiconductor layer 20 and the substrate 10, the total reflection characteristic of the interface is reduced, thereby reducing the amount of light lost inside the light emitting diode.
  • substrate 10 uses the photolithography system when forming the uneven
  • the photolithography method used in the conventional method of manufacturing the substrate 10 not only has a complicated process of forming a dry etching protective film, but also takes a long time and has a high manufacturing cost.
  • the conventional light emitting diode using the substrate 10 reduces only the total reflection characteristic of the interface on the side of the first semiconductor layer 20 of the substrate 10, there is a limit that does not significantly improve the light extraction efficiency of the light emitting diode.
  • the present invention can easily form the uneven portion by easily forming a mask for dry etching on the surface of the substrate member without high manufacturing cost and complex photolithography patterning, A method of manufacturing a substrate for a light emitting diode that can maximize not only the upper surface of the substrate but also the total reflection characteristic of the surface of the substrate in contact with air, and by forming an uneven portion so that a flat surface does not exist, thereby maximizing the effect of reducing the total reflection characteristic.
  • the present invention provides a substrate for a light emitting diode and a method for manufacturing the light emitting diode having the light emitting diode substrate.
  • substrate which concerns on this invention is a manufacturing method of the light emitting diode board
  • the nanostructures may be spherical.
  • the nanostructure may have a diameter of 100 nm to 3 ⁇ m.
  • the nanostructures may be made of one or more selected from silica (SiO 2 ), glass, and polystyrene.
  • Coating with the nanostructures may include spin coating the nanostructures to form a uniform single layer.
  • the method of manufacturing a substrate for a light emitting diode may further include forming a buffer layer on the upper concave and convex portions to prevent defects caused by gaps between the atoms of the substrate member and the first semiconductor layer or differences in thermal expansion rates. Can be.
  • a substrate for a light emitting diode according to the present invention is a substrate for a light emitting diode in which a first semiconductor layer, an active layer and a second semiconductor layer are sequentially formed on an upper surface thereof, comprising: a predetermined substrate member; And upper and lower concave-convex portions respectively formed on the upper and lower surfaces of the substrate member by coating the upper and lower surfaces of the substrate member with a nanostructure made of a material which is easier to dry etch than the substrate member and dry etching.
  • the upper and lower concave-convex portions may be formed in a hemispherical shape by coating and etching the upper and lower surfaces of the substrate member with the spherical nanostructures, respectively.
  • the substrate for light emitting diodes may further include a buffer layer formed on the top uneven portion to prevent defects caused by gaps between the atoms of the substrate member and the first semiconductor layer or differences in thermal expansion rates.
  • a method of manufacturing a light emitting diode includes coating a top surface of a predetermined substrate member with a nanostructure made of a material that is easier to dry etch than the substrate member; Forming an upper surface uneven portion on the upper surface of the substrate member by dry etching together with the substrate member using the nanostructure as a mask; Sequentially forming a first semiconductor layer, an active layer, and a second semiconductor layer on the upper uneven portion; Coating the bottom surface of the substrate member with the nanostructures; And forming an uneven portion on the bottom surface of the substrate member by dry etching together with the substrate member using the nanostructure as a mask.
  • the nanostructures may be spherical.
  • the nanostructure may have a diameter of 100 nm to 3 ⁇ m.
  • the nanostructures may be made of one or more selected from silica (SiO 2 ), glass, and polystyrene.
  • Coating with the nanostructures may include spin coating the nanostructures to form a uniform single layer.
  • the manufacturing method of the light emitting diode may further include forming a buffer layer on the upper surface irregularities to prevent defects caused by gaps between the atoms of the substrate member and the first semiconductor layer or a difference in thermal expansion rate. .
  • the manufacturing cost of the light emitting diode substrate of the present invention is high, and the manufacturing cost is high without using complicated photolithography patterning.
  • the structure and using it as a mask it is possible to easily manufacture a substrate for a light emitting diode having a concave-convex portion formed by dry etching, thereby reducing the manufacturing time and cost.
  • Coating of the nanostructures is made through a simple spin coating method, so that the nanostructures can be easily coated on the substrate member to form a uniform single layer.
  • the upper and lower concave-convex portions are formed on the upper and lower surfaces of the substrate member, thereby improving the light extraction efficiency while reducing the total reflection characteristic of the interface at the interface between the substrate and the first semiconductor layer. In this case, the light extraction efficiency may be further improved while the total reflection characteristic of the substrate surface is reduced by the uneven portion.
  • the top and bottom uneven portions may be formed in a hemispherical shape where a flat surface does not exist, thereby maximizing a reduction in total reflection characteristics of the interface through the uneven portions.
  • the light extraction efficiency can be further improved.
  • FIG. 1 is a schematic cross-sectional view of a gallium nitride-based horizontal light emitting diode using a conventional light emitting diode substrate having irregularities formed on one surface thereof;
  • FIG. 2 is a schematic cross-sectional view of a gallium nitride-based horizontal light emitting diode using a light emitting diode substrate manufactured by a method of manufacturing a light emitting diode substrate according to a preferred embodiment of the present invention
  • FIG. 3 is a flowchart illustrating a method of manufacturing a substrate for a light emitting diode according to a preferred embodiment of the present invention
  • 4 to 10 is a schematic view for explaining a manufacturing method of a substrate for a light emitting diode according to a preferred embodiment of the present invention
  • 11 and 12 are scanning electron micrographs of the upper concave-convex portion formed in the substrate member through a method of manufacturing a substrate for a light emitting diode according to a preferred embodiment of the present invention
  • FIG. 13 and 14 show simulation results of light extraction efficiency of a light emitting diode using a conventional light emitting diode substrate having irregularities formed on one surface and a light emitting diode using a light emitting diode substrate according to a preferred embodiment of the present invention, respectively. It's a window.
  • buffer layer 200 first semiconductor layer
  • first pad 300 active layer
  • the term 'spherical' encompasses not only a sphere of mathematical definition of a three-dimensional shape consisting of all points at the same distance from one point, but also an apparently round shape, and the term 'nano structure' refers to a size of 10 ⁇ m or less. Refers to a structure.
  • FIG. 2 is a schematic cross-sectional view of a gallium nitride-based horizontal light emitting diode using a light emitting diode substrate (hereinafter, referred to as a “substrate”) manufactured by a method of manufacturing a light emitting diode substrate according to a preferred embodiment of the present invention. to be.
  • substrate a light emitting diode substrate
  • the substrate 100 manufactured by the method of manufacturing a substrate for a light emitting diode according to an exemplary embodiment of the present invention has upper and lower uneven portions 111 and 112 formed on upper and lower surfaces of a predetermined substrate member 110, respectively.
  • the buffer layer 120 is formed on the upper surface uneven portion 111 to prevent defects caused by gaps between the atoms of the substrate member 110 and the first semiconductor layer 200 or differences in thermal expansion rates.
  • upper and lower uneven portions 111 and 112 are formed on the upper and lower surfaces of the substrate member 110, respectively.
  • 111 and 112 have a hemispherical shape.
  • the first semiconductor layer 200 made of an n-type gallium nitride-based semiconductor on the substrate 100, an active layer 300 including a multilayer quantum well layer in which light is generated while electrons and holes are combined, and a p-type gallium nitride
  • a light emitting diode is manufactured.
  • the substrate 100 forms a mask for dry etching through a simple coating process of the nanostructure (NS) without using complicated photolithography patterning, and on the upper and lower surfaces of the substrate 100
  • Both the upper and lower concave-convex portions 111 and 112 are formed on the upper and lower surfaces of the substrate member 110 so that the total reflection characteristics can be reduced, and the nanostructures acting as masks to maximize the effect of reducing the total reflection characteristics (
  • the main feature is that the convex and concave portions 111 and 112 are formed in a hemispherical shape by applying the shape of NS) in a spherical shape.
  • the substrate member 110 having a predetermined plate shape as shown in FIG. 4 is prepared, and as shown in FIG. 4B, the upper surface of the substrate member 110 is made of a material that is easier to dry etch than the substrate member 110. It is coated with a spherical nanostructure (NS) (s100).
  • NS spherical nanostructure
  • the nanostructure (NS) coating is dispersed after dropping the spherical nanostructure (NS) on the upper surface of the substrate member 110, so that the nanostructure (NS) forms a uniform single layer on the upper surface of the substrate member (110). It is preferable to proceed in the form of spin coating after maintaining for about 1 minute to be possible.
  • This spin coating is preferably carried out step by step so that the nanostructure (NS) can form a uniform monolayer.
  • first spin coating at 200 rpm for 1 minute and then spin coating may be performed in the form of 30 seconds at 800 rpm, and finally 10 seconds at 1200 rpm.
  • the nanostructure (NS) is easy to form a uniform single layer through spin coating, and can be formed in the hemispherical upper and lower concave-convex portions (111, 112) during dry etching
  • the shape is not limited thereto.
  • the nanostructure (NS) used a nanostructure (NS) having a diameter of 500nm the size is not limited to this nanostructure having a diameter in the range of 100nm ⁇ 3 ⁇ m ( NS) can be applied freely.
  • the size of the nanostructure NS is less than 100 nm or more than 3 ⁇ m, because the uneven portion having a sufficient height in the case where the diameter of the nanostructure NS is less than 100 nm or more than 3 ⁇ m may be used. This is because it is not formed or the gap between the uneven parts is formed too wide, which does not sufficiently reduce the total reflection characteristic of the interface.
  • the substrate member 110 is provided with aluminum oxide
  • the nanostructure (NS) is provided with a spherical silica nanostructure, but is not limited to this requires a different etching ratio than silica
  • the nanostructure NS may be made of glass, polystyrene, or the like, or may be made of a plurality of mixed materials selected from silica, glass, and polystyrene.
  • dry etching is used by mixing the Cl 2 and BCl 3 gas in a 7: 3 ratio, wherein the plasma power can be etched using a chuck bias -300 Volt at about 300Watt.
  • the nano-structure (NS) easier to dry etching is etched faster than the substrate member 110, nanostructure
  • the etching range of the upper surface of the substrate member 110 naturally widens, and an upper surface uneven portion 111 having a hemispherical shape is formed.
  • the upper concave-convex portion 111 formed as described above reduces the total reflection characteristic of the interface between the substrate member 110 and the first semiconductor layer 200, so that light passing through the interface is not lost inside the light emitting diode due to total reflection. It can be discharged to the front side of the light emitting diode (surface side in contact with the air of the substrate).
  • 11 and 12 are scanning electron micrographs of the hemispherical upper surface irregularities 111 formed on the upper surface of the substrate member 110 by coating the nanostructure NS and dry etching the nanostructure NS with a mask. .
  • the shape of the upper surface uneven portion 111 is not necessarily limited to a hemispherical shape, and by changing the dry etching conditions in consideration of the difference in etching rate between the substrate member 110 and the nanostructure NS, the upper surface uneven portion 111 May be implemented in other shapes.
  • the uneven part 111 has a buffer layer 120 that prevents defects caused by gaps between the atoms of the substrate member 110 and the first semiconductor layer 200 or a difference in thermal expansion coefficient. It is formed on (s300).
  • the buffer layer 120 is not necessarily provided, and various materials known to those skilled in the art may be applied.
  • a second semiconductor layer 400 made of a p-type gallium nitride based semiconductor is formed in order to epitaxial growth (s400).
  • the substrate 100 having the first semiconductor layer 200, the active layer 300, and the second semiconductor layer 400 formed on the top surface of the substrate 100 is turned upside down, and the bottom surface of the substrate member 110 is disposed on the nanostructure NS. Spin coating).
  • the bottom surface of the substrate member 110 is dry-etched using a nanostructure NS uniformly coated with a single layer on the bottom surface of the substrate member 110 to form a hemispherical bottom surface concave portion 112 ( s600).
  • the first pad 210, the transparent electrode 410, and the second pad 420 for applying a voltage to the first and second semiconductor layers 200 and 400, respectively, may be removed.
  • the manufacture of the gallium nitride-based horizontal light emitting diode is completed.
  • the present invention is not limited thereto, and the method of manufacturing the substrate 110 and the method of manufacturing the light emitting diode according to the present invention may be performed using different semiconductors. Similar applications may be applied to light emitting diodes or vertical light emitting diodes.
  • FIG. 13 and 14 illustrate simulation results of light extraction efficiency of a light emitting diode manufactured using a conventional substrate having an uneven portion formed only on an upper surface thereof, and a light emitting diode manufactured using a substrate 100 according to a preferred embodiment of the present invention.
  • the result window of each simulation program is shown.
  • FIG. 13 is a simulation result of a light emitting diode manufactured using a conventional substrate, while the total light extraction efficiency is about 66.36%, while a simulation result of a light emitting diode manufactured using the substrate 100 according to a preferred embodiment of the present invention.
  • the total light extraction efficiency is about 77.64%, it can be seen that about 11.28% is improved compared to the light emitting diode using the conventional substrate.
  • the light extraction amount under the same conditions is increased by about 16.98% based on the light emitting diode using the conventional substrate, which is 11.15% to 20.58% of the light extracted from the upper side of the light emitting diode. It can be seen that the increase especially.
  • the manufacturing cost is high and complicated photolithography patterning Since it is possible to easily manufacture the substrate 100 for the light emitting diode formed with the uneven parts 111 and 112 by coating the nanostructure (NS) and dry etching using it as a mask without the use of,
  • the unit cost can be reduced, and upper and lower concave and convex portions 111 and 112 are formed on the upper and lower surfaces of the substrate member 110, so that the upper and lower concave portions are formed at the interface between the substrate 100 and the first semiconductor layer 200.
  • the light extraction efficiency is improved while the total reflection characteristic of the interface is reduced by (111), and then the total reflection characteristic of the substrate surface is reduced by the uneven portion 112 at the lower surface of the substrate 100.
  • the output efficiency can be further improved.

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Abstract

La présente invention concerne un procédé de fabrication d'un substrat pour une diode électroluminescente, un substrat pour une diode électroluminescente fabriquée au moyen du procédé, et un procédé de fabrication d'une diode électroluminescente comprenant le substrat pour une diode électroluminescente. Le procédé de fabrication d'un substrat pour une diode électroluminescente, selon la présente invention, comprend les étapes qui consistent à: recouvrir la surface supérieure d'un élément substrat prédéterminé avec une nanostructure qui comprend un matériau qui est plus à même d'être gravée à sec que l'élément substrat; à former une partie inégale de surface supérieure sur la surface supérieure de l'élément substrat par gravure à sec de la nanostructure et de l'élément substrat; à utiliser la nanostructure en tant que masque: à recouvrir la surface inférieure de l'élément substrat avec la nanostructure; et à former une partie inégale de surface inférieure sur la surface inférieure de l'élément substrat par gravure à sec de la nanostructure et de l'élément substrat, en utilisant la nanostructure en tant que masque. La présente invention permet de fabriquer le substrat pour une diode électroluminescente qui comprend la partie inégale formée facilement par le dépôt de la nanostructure et l'utilisation de cette dernière en tant que masque pour la gravure à sec, plutôt que par la formation de motifs par photolithographie qui présente un coût de fabrication élevé et qui est compliquée, ceci permettant de réduire le temps de fabrication et le coût du substrat pour une diode électroluminescente.
PCT/KR2012/005465 2011-07-15 2012-07-10 Procédé de fabrication d'un substrat pour diode électroluminescente, substrat pour diode électroluminescente fabriqué au moyen du procédé et procédé de fabrication d'une diode électroluminescente comprenant un substrat pour diode électroluminescente WO2013012194A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2011-0070488 2011-07-15
KR1020110070488A KR20130009399A (ko) 2011-07-15 2011-07-15 발광다이오드용 기판의 제조방법, 이에 의해 제조된 발광다이오드용 기판 및 이 발광다이오드용 기판을 구비한 발광다이오드의 제조방법

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WO2013012194A2 true WO2013012194A2 (fr) 2013-01-24
WO2013012194A3 WO2013012194A3 (fr) 2013-03-14

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US9142730B2 (en) 2013-09-25 2015-09-22 Samsung Electronics Co., Ltd. Method of manufacturing semiconductor light emitting device

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JP2016527713A (ja) 2013-06-18 2016-09-08 グロ アーベーＧｌｏ Ａｂ ドライエッチングによる３ｄ半導体構造の除去
EP3011606A1 (fr) * 2013-06-18 2016-04-27 Glo Ab Arrêt de la gravure dans une couche plane après gravure d'une structure en 3d
KR101535852B1 (ko) * 2014-02-11 2015-07-13 포항공과대학교 산학협력단 나노구조체 전사를 이용한 발광다이오드 제조방법과 그 발광다이오드
KR102764183B1 (ko) 2024-03-29 2025-02-07 주식회사 루다시스 무인 드론의 비행 경로 파악 시스템
KR102764188B1 (ko) 2024-03-29 2025-02-07 주식회사 루다시스 도심항공교통 항공기 이륙/착륙 경로 파악 시스템

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* Cited by examiner, † Cited by third party
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KR100568297B1 (ko) * 2004-03-30 2006-04-05 삼성전기주식회사 질화물 반도체 발광 소자 및 그 제조 방법
US7476910B2 (en) * 2004-09-10 2009-01-13 Kabushiki Kaisha Toshiba Semiconductor light emitting device and method for manufacturing the same
KR100644052B1 (ko) * 2004-11-08 2006-11-10 엘지전자 주식회사 고 광적출 효율 발광 다이오드 및 그의 제조 방법
JP2007019318A (ja) * 2005-07-08 2007-01-25 Sumitomo Chemical Co Ltd 半導体発光素子、半導体発光素子用基板の製造方法及び半導体発光素子の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9142730B2 (en) 2013-09-25 2015-09-22 Samsung Electronics Co., Ltd. Method of manufacturing semiconductor light emitting device

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