WO2011071111A1 - Substrat en résine avec composant électronique et module de circuit électronique incorporés - Google Patents
Substrat en résine avec composant électronique et module de circuit électronique incorporés Download PDFInfo
- Publication number
- WO2011071111A1 WO2011071111A1 PCT/JP2010/072130 JP2010072130W WO2011071111A1 WO 2011071111 A1 WO2011071111 A1 WO 2011071111A1 JP 2010072130 W JP2010072130 W JP 2010072130W WO 2011071111 A1 WO2011071111 A1 WO 2011071111A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- electronic component
- built
- resin substrate
- resin
- substrate
- Prior art date
Links
- 229920005989 resin Polymers 0.000 title claims abstract description 136
- 239000011347 resin Substances 0.000 title claims abstract description 136
- 239000000758 substrate Substances 0.000 title claims abstract description 124
- 229910000679 solder Inorganic materials 0.000 claims abstract description 42
- 238000007789 sealing Methods 0.000 claims abstract description 27
- 239000004020 conductor Substances 0.000 claims description 4
- 239000000463 material Substances 0.000 claims description 2
- 239000000155 melt Substances 0.000 abstract description 2
- 238000005476 soldering Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 description 12
- 238000004519 manufacturing process Methods 0.000 description 11
- 239000003822 epoxy resin Substances 0.000 description 8
- 229920000647 polyepoxide Polymers 0.000 description 8
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 7
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 4
- 229920001187 thermosetting polymer Polymers 0.000 description 4
- 239000011889 copper foil Substances 0.000 description 3
- 239000011256 inorganic filler Substances 0.000 description 3
- 229910003475 inorganic filler Inorganic materials 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 239000000945 filler Substances 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 239000011800 void material Substances 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
- H05K1/186—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0272—Adaptations for fluid transport, e.g. channels, holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0183—Dielectric layers
- H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
- H05K2203/1147—Sealing or impregnating, e.g. of pores
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3442—Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Definitions
- the present invention relates to an electronic component built-in resin substrate in which an electronic component is built in a resin layer, and more particularly to an electronic component built-in resin substrate in which solder is used to mount the built-in electronic component.
- the present invention also relates to an electronic circuit module using the above-described electronic component built-in resin substrate.
- FIG. 12 shows an example of a resin substrate with a built-in electronic component conventionally used.
- the terminal electrodes 104a and 104b of the electronic component 103 are connected and fixed to the land electrodes 102a and 102b formed on the core substrate 101 by the solders 105a and 105b, and the electronic component 103 is covered.
- a resin layer 106 is provided on the core substrate 101.
- an electronic component is further mounted on the surface of the electronic component built-in resin substrate 600 to constitute an electronic circuit module.
- this conventional resin substrate 600 with built-in electronic components is further soldered to a circuit board of an electronic device by reflow
- the solder 105a, 105b re-melts and expands in volume.
- the melted solder loses its place, enters the interface between the electronic component 103 and the resin layer 106, the interface between the resin layer 106 and the core substrate 101, etc., thereby short-circuiting the terminal electrodes 104a and 104b or reducing the insulation.
- This phenomenon is called a solder splash phenomenon.
- Patent Document 1 Japanese Patent Laid-Open No. 2007-142182 describes that a hygroscopic filler that absorbs moisture is added in advance to a resin that forms a resin layer of a resin substrate with a built-in electronic component. That is, when moisture is contained in the resin, the moisture is vaporized in the resin layer forming process, which causes a void in the resin layer. In some cases, the void weakens the adhesion between the resin layer and the built-in electronic component and the adhesion between the resin layer and the core substrate, and the solder splash phenomenon is likely to occur. Patent Document 1 focuses on the fact that the solder splash phenomenon occurs via the gap, and attempts to suppress the occurrence of the solder splash phenomenon by removing moisture by using a hygroscopic filler to suppress the occurrence of the gap. is there.
- Patent Document 2 Japanese Patent Laid-Open No. 2005-39158 improves the adhesion between the resin layer and the built-in electronic component by regulating the particle size of the inorganic filler added to the resin layer. And trying to suppress the occurrence of the solder splash phenomenon.
- Patent Document 1 and Patent Document 2 improve the adhesion between the resin layer and the electronic component and the adhesion between the resin layer and the core substrate, so that the resin layer, the electronic component, and the resin layer are improved. This prevents the remelted solder from entering the interface between the core substrate and the core substrate, and does not fundamentally prevent the occurrence of the solder splash phenomenon. Therefore, in the case where a gap is generated between the resin layer and the electronic component or between the resin layer and the core substrate due to vibration, impact, thermal expansion difference, etc., the occurrence of the solder splash phenomenon can be suppressed. It was difficult.
- the present invention has been made in order to solve the problems of the above-described conventional resin substrate with a built-in electronic component, and as a means therefor, the resin substrate with a built-in electronic component has a core on which a land electrode is formed.
- a hollow via having one end reaching the solder and the other end sealed by a sealing member is formed.
- the electronic component built-in resin substrate of the present invention can also be configured as a so-called core substrate-less resin substrate with built-in electronic component that does not have a core substrate.
- the resin substrate with a built-in electronic component of the present invention can be configured by reducing the cavity via from the atmospheric pressure. In this case, since the remelted solder can be surely flowed into the hollow via and accommodated, it is more preferable.
- the electronic circuit module of the present invention can be configured by mounting electronic components on the surface of the above-described resin substrate with built-in electronic components.
- the electronic circuit module when the electronic circuit module is solder-mounted on the circuit board of the electronic device by reflow, it is heated and incorporated.
- the solder used for mounting the electronic component even if the solder expands, the remelted solder can flow into the hollow via and be accommodated. Therefore, the solder splash phenomenon can be effectively suppressed.
- FIG. 1 thru It is sectional drawing which shows the electronic component built-in resin substrate 100 manufactured through the process shown to FIG. 1 thru
- FIG. 1 to 7 show an electronic component built-in resin substrate 100 according to a first embodiment of the present invention.
- 1 to 6 are cross-sectional views showing respective steps of an example of the method of manufacturing the electronic component built-in resin substrate 100 according to the first embodiment of the present invention
- FIG. 7 is a cross-sectional view showing the completed electronic component built-in resin substrate 100.
- the electronic component built-in resin substrate 100 includes a core substrate 1.
- a core substrate 1 ceramic, resin, or the like can be used.
- ceramic is used.
- Land electrodes 2a and 2b for mounting the electronic component and a connection electrode 2c for connecting the conductive via are formed on the surface of the core substrate 1 on the mounting surface side of the electronic component.
- External connection electrodes 2d used for mounting the completed electronic component built-in resin substrate 100 on a circuit board of an electronic device or the like are formed on the back surface of the mounting surface of the electronic component.
- Various conductive materials can be used for the land electrodes 2a and 2b, the connection electrode 2c, and the external connection electrode 2d, but copper is preferably used.
- the chip-shaped electronic component 3 is built. Terminal electrodes 4 a and 4 b are formed on both ends of the electronic component 3.
- the electronic component 3 is mounted on the core substrate 1 by connecting and fixing the terminal electrodes 4a and 4b to the land electrodes 2a and 2b of the core substrate 1 with solders 5a and 5b.
- a capacitor, a coil, a resistor, or the like can be used, but the illustrated one is intended as a capacitor.
- FIG. 7 a plurality of types of electronic components 3 can be built in at the same time to form a desired circuit in the electronic component built-in resin substrate 100. it can.
- a resin layer 6 is formed on the core substrate 1 so as to cover the electronic component 3.
- a thermosetting epoxy resin containing an inorganic filler is used for the resin layer 6, but other resins can also be used.
- Cavity vias 7 a and 7 b are formed in the resin layer 6.
- Each of the hollow vias 7a and 7b reaches one end of the solder 5a and 5b, and the other end is sealed with the sealing member layer 8, thereby forming a sealed space in the hollow vias 7a and 7b.
- the insides of the hollow vias 7a and 7b are depressurized from the atmospheric pressure. Preferably, it is set to 1000 hPa or less.
- a thermosetting epoxy resin containing the same inorganic filler as the resin layer 6 is used.
- bulging portions 8a and 8b that slightly enter the cavity vias 7a and 7b from the sealing member layer 8 are formed in the cavity vias 7a and 7b in which the resin used for the sealing member layer 8 is decompressed from the atmospheric pressure. It was formed because it was pulled in.
- a conductive via 10 is formed through the resin layer 6 and the sealing member layer 8.
- the conductive via 10 is filled with a conductive material. Although various materials can be used as the conductive material, copper is preferably used.
- Wiring electrodes 12 a, 12 b, and 12 c are formed on the surface of the sealing member layer 8 opposite to the surface in contact with the resin layer 6.
- the wiring electrodes 12a, 12b, and 12c have a predetermined pattern, and a predetermined connection is made there.
- the wiring electrode 12 c is connected to the conductive via 10.
- copper is also used for the wiring electrodes 12a, 12b, and 12c.
- the electronic component built-in resin substrate 100 according to the first embodiment configured as described above is manufactured by, for example, the following manufacturing method.
- the electronic component 3 is solder-mounted on the core substrate 1 by reflow. Specifically, the terminal electrodes 4a and 4b of the electronic component 3 are connected and fixed to the land electrodes 2a and 2b of the core substrate 1 with the solders 5a and 5b.
- thermosetting epoxy resin that is heated to be in a semi-molten state is placed on the core substrate 1 on which the electronic component 3 is mounted, and is further heated and cured to form a resin layer. 6 is formed.
- the cured resin layer 6 is irradiated with laser light to form cavity vias 7a, 7b, and 7c.
- the hollow vias 7a and 7b are formed so that one end reaches the solders 5a and 5b, and the hollow via 7c is formed so that one end reaches the connection electrode 2c.
- an uncured thermosetting epoxy resin sheet 8 ′ having holes 9 formed in advance is disposed on the resin layer 6.
- the epoxy resin sheet 8 ' is arranged so as to block the hollow vias 7a and 7b and so that the holes 9 are continuous with the hollow via 7c.
- a conductive paste 10 'containing copper as a main component is filled into the hollow vias 7c of the resin layer 6 and the holes 9 of the epoxy resin sheet 8'.
- the whole is heated to cure the epoxy resin sheet 8 ′ and form the sealing member layer 8.
- the conductive via 10 is baked to form the conductive via 10.
- the resin layer 6 and the sealing member layer 8 are joined by heating the whole, and the sealing member layer 8 and the copper foil 11 are joined.
- this process is performed in the environment decompressed from atmospheric pressure. That is, by carrying out under a reduced pressure environment, the inside of the sealed cavity vias 7a and 7b can be brought into a state where the pressure is reduced from the atmospheric pressure.
- the copper foil 11 is patterned by a commonly used method to form wiring electrodes 12a, 12b, and 12c, and the electronic component built-in resin substrate 100 according to the first embodiment is formed. To complete.
- the electronic component built-in resin substrate 100 manufactured as described above can be used as a substrate of an electronic circuit module.
- the electronic component 13 is mounted on the surface of the electronic component built-in resin substrate 100 to form a predetermined electronic circuit, and the electronic circuit module 200 is manufactured.
- the electronic circuit module 200 is configured by connecting and fixing the terminal electrodes 14a and 14b of the electronic component 13 to the wiring electrodes 12a and 12b with solders 15a and 15b.
- the electronic component built-in resin substrate 100 and the electronic circuit module 200 according to the first embodiment described above are heated when solder mounted on the circuit board of an electronic device by reflow, and the solders 5a and 5b are remelted.
- the remelted solder can flow into the hollow vias 7a and 7b and be accommodated.
- the remelted solder enters the gap between the core substrate 1 and the resin layer 6 and the gap between the electronic component 3 and the resin layer 6, and short-circuits between the terminal electrodes 4a and 4b of the electronic component 3, There is no reduction in insulation. Since the hollow vias 7a and 7b are in a sealed state, there is no path for moisture absorption, and there is no gap between the resin layer 6 and the sealing member layer 8, or between the core substrate 1 and the resin layer 6. It does not cause peeling.
- FIG. 9 shows an electronic component built-in resin substrate 300 according to the second embodiment of the present invention.
- FIG. 9 is a cross-sectional view of the electronic component built-in resin substrate 300.
- a substrate 21 is further provided on the surface of the sealing member layer 8 opposite to the surface in contact with the resin layer 6.
- a connection electrode 22 a for connecting to the conductive via 10 is formed in a portion of the substrate 21 that contacts the conductive via 10, and a wiring electrode 22 b is formed on the surface opposite to the surface in contact with the sealing member layer 8. Yes.
- Other configurations are the same as those of the electronic component built-in resin substrate 100 according to the first embodiment.
- the substrate 21 on which the connection electrode 22a and the wiring electrode 22b are formed in advance is disposed on an uncured resin sheet on which the sealing member layer 8 is formed. Then, by heating, the resin sheet is cured to form the sealing member layer 8, and the conductive via is baked to form the conductive via 10. In this way, by heating, the resin layer 6 and the sealing member layer 8 are joined, the sealing member layer 8 and the substrate 21 are joined, and conduction between the conductive via 10 and the connection electrode 22a is measured. can do.
- FIG. 10 shows an electronic component built-in resin substrate 400 according to the third embodiment of the present invention.
- FIG. 10 is a cross-sectional view of the electronic component built-in resin substrate 400.
- the substrate 31 is directly bonded to the surface of the resin layer 6 opposite to the surface in contact with the core substrate 1 with an adhesive (not shown). did. That is, in this embodiment, the substrate 31 serves as a sealing member that seals the hollow vias 7a and 7b.
- a connection electrode 32 a for connecting to the conductive via 10 is formed on the surface of the substrate 31 in contact with the resin layer 6, and a wiring electrode 32 b is formed on the surface opposite to the surface in contact with the resin layer 6. ing.
- Other configurations are the same as those of the electronic component built-in resin substrate 100 according to the first embodiment.
- the electronic component built-in resin substrate 400 according to the third embodiment is heated after, for example, the substrate 31 on which the connection electrode 32a and the wiring electrode 32b are formed in advance on the resin layer 6 with an adhesive.
- the conductive paste is baked to form the conductive via 10, and the conductive via 10 and the connection electrode 32 a are electrically connected and manufactured.
- FIG. 11 shows an electronic component built-in resin substrate 500 according to a fourth embodiment of the present invention.
- FIG. 11 is a cross-sectional view of the electronic component built-in resin substrate 500.
- the electronic component built-in resin substrate 500 according to the fourth embodiment is configured as a so-called core substrate-less resin substrate with built-in electronic component that does not have a core substrate.
- the terminal electrodes 4a and 4b of the built-in electronic component 3 are connected and fixed to the land electrodes 42a and 42b exposed on the surface of the resin layer 6 by solders 5a and 5b.
- the conductive via 10 is connected to the land electrode 42 c exposed on the surface of the resin layer 6.
- Other configurations are the same as those of the electronic component built-in resin substrate 100 according to the first embodiment.
- the resin substrate 500 with a built-in electronic component according to the fourth embodiment is prepared, for example, by using a jig substrate (not shown) used only for manufacturing, and forming land electrodes 42a, 42b, 42c on the surface of the jig substrate.
- the electronic component 3 is mounted on 42a and 42b.
- the electronic component built-in resin substrate 500 is completed by a manufacturing method similar to the manufacturing method shown in the first embodiment, and finally completed by removing the completed electronic component built-in resin substrate 500 from the jig substrate. it can.
- the electronic component built-in resin substrate 500 can be reduced in height, and raw material costs can be reduced.
- Connection electrode 2d External connection electrode 3: Electronic component 4a, 4b: Terminal electrode (electronic component) 5a, 5b: Solder 6: Resin layers 7a, 7b: Cavity via 8: Sealing member layer 10: Conductive vias 12a, 12b, 12c: Wiring electrodes
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011545242A JP5229401B2 (ja) | 2009-12-09 | 2010-12-09 | 電子部品内蔵樹脂基板および電子回路モジュール |
CN2010800553048A CN102648671A (zh) | 2009-12-09 | 2010-12-09 | 电子部件内置树脂基板及电子电路模块 |
US13/485,958 US20120236508A1 (en) | 2009-12-09 | 2012-06-01 | Electronic-component embedded resin substrate and electronic circuit module |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009-279412 | 2009-12-09 | ||
JP2009279412 | 2009-12-09 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US13/485,958 Continuation US20120236508A1 (en) | 2009-12-09 | 2012-06-01 | Electronic-component embedded resin substrate and electronic circuit module |
Publications (1)
Publication Number | Publication Date |
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WO2011071111A1 true WO2011071111A1 (fr) | 2011-06-16 |
Family
ID=44145656
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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PCT/JP2010/072130 WO2011071111A1 (fr) | 2009-12-09 | 2010-12-09 | Substrat en résine avec composant électronique et module de circuit électronique incorporés |
Country Status (4)
Country | Link |
---|---|
US (1) | US20120236508A1 (fr) |
JP (1) | JP5229401B2 (fr) |
CN (1) | CN102648671A (fr) |
WO (1) | WO2011071111A1 (fr) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013026234A (ja) * | 2011-07-14 | 2013-02-04 | Mitsubishi Electric Corp | 半導体装置 |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103846549B (zh) * | 2012-11-29 | 2016-02-10 | 北京航星机器制造公司 | 一种电子成件及电子产品壳体的激光焊接封装方法 |
WO2020261969A1 (fr) * | 2019-06-24 | 2020-12-30 | 株式会社村田製作所 | Module électronique |
KR102789025B1 (ko) * | 2019-12-16 | 2025-04-01 | 삼성전기주식회사 | 전자부품 내장기판 |
KR102776266B1 (ko) | 2019-12-16 | 2025-03-07 | 삼성전기주식회사 | 전자부품 내장기판 |
Citations (4)
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JPH11214819A (ja) * | 1998-01-28 | 1999-08-06 | Sony Corp | 配線板及びその製造方法 |
JP2007096182A (ja) * | 2005-09-30 | 2007-04-12 | Toshiba Corp | プリント配線板、その製造方法、およびプリント配線板を内蔵した電子機器 |
JP2007142182A (ja) * | 2005-11-18 | 2007-06-07 | Matsushita Electric Ind Co Ltd | 電子部品内蔵モジュール |
WO2008155967A1 (fr) * | 2007-06-15 | 2008-12-24 | Murata Manufacturing Co., Ltd. | Carte avec un composant encastré et son procédé de fabrication |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
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US5255431A (en) * | 1992-06-26 | 1993-10-26 | General Electric Company | Method of using frozen epoxy for placing pin-mounted components in a circuit module |
US6670719B2 (en) * | 1999-08-25 | 2003-12-30 | Micron Technology, Inc. | Microelectronic device package filled with liquid or pressurized gas and associated method of manufacture |
JP2005109135A (ja) * | 2003-09-30 | 2005-04-21 | Matsushita Electric Ind Co Ltd | 電子部品内蔵モジュールの製造方法 |
CN101911847B (zh) * | 2007-12-25 | 2012-07-18 | 株式会社村田制作所 | 多层配线基板的制造方法 |
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2010
- 2010-12-09 JP JP2011545242A patent/JP5229401B2/ja not_active Expired - Fee Related
- 2010-12-09 CN CN2010800553048A patent/CN102648671A/zh active Pending
- 2010-12-09 WO PCT/JP2010/072130 patent/WO2011071111A1/fr active Application Filing
-
2012
- 2012-06-01 US US13/485,958 patent/US20120236508A1/en not_active Abandoned
Patent Citations (4)
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JPH11214819A (ja) * | 1998-01-28 | 1999-08-06 | Sony Corp | 配線板及びその製造方法 |
JP2007096182A (ja) * | 2005-09-30 | 2007-04-12 | Toshiba Corp | プリント配線板、その製造方法、およびプリント配線板を内蔵した電子機器 |
JP2007142182A (ja) * | 2005-11-18 | 2007-06-07 | Matsushita Electric Ind Co Ltd | 電子部品内蔵モジュール |
WO2008155967A1 (fr) * | 2007-06-15 | 2008-12-24 | Murata Manufacturing Co., Ltd. | Carte avec un composant encastré et son procédé de fabrication |
Cited By (1)
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JP2013026234A (ja) * | 2011-07-14 | 2013-02-04 | Mitsubishi Electric Corp | 半導体装置 |
Also Published As
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US20120236508A1 (en) | 2012-09-20 |
JPWO2011071111A1 (ja) | 2013-04-22 |
CN102648671A (zh) | 2012-08-22 |
JP5229401B2 (ja) | 2013-07-03 |
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