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WO2009000608A2 - Procédé de fabrication de matériaux semi-conducteurs et/ou d'éléments électroniques en forme de feuille par préformage initial et/ou revêtement - Google Patents

Procédé de fabrication de matériaux semi-conducteurs et/ou d'éléments électroniques en forme de feuille par préformage initial et/ou revêtement Download PDF

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Publication number
WO2009000608A2
WO2009000608A2 PCT/EP2008/056693 EP2008056693W WO2009000608A2 WO 2009000608 A2 WO2009000608 A2 WO 2009000608A2 EP 2008056693 W EP2008056693 W EP 2008056693W WO 2009000608 A2 WO2009000608 A2 WO 2009000608A2
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WO
WIPO (PCT)
Prior art keywords
substrate
semiconductor material
mold
film
coating
Prior art date
Application number
PCT/EP2008/056693
Other languages
German (de)
English (en)
Other versions
WO2009000608A3 (fr
Inventor
Martin Trocha
Georg-J. Schmitz
Dieter Franke
Thomas Bähr
Rüdiger TIEFERS
Stephan Rex
Markus Apel
Original Assignee
Evonik Degussa Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Evonik Degussa Gmbh filed Critical Evonik Degussa Gmbh
Priority to EP08760281A priority Critical patent/EP2160755A2/fr
Publication of WO2009000608A2 publication Critical patent/WO2009000608A2/fr
Publication of WO2009000608A3 publication Critical patent/WO2009000608A3/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02601—Nanoparticles
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/0242—Crystalline insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02422—Non-crystalline insulating materials, e.g. glass, polymers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/0245—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02623—Liquid deposition
    • H01L21/02628—Liquid deposition using solutions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/10—Semiconductor bodies
    • H10F77/16—Material structures, e.g. crystalline structures, film structures or crystal plane orientations
    • H10F77/169—Thin semiconductor films on metallic or insulating substrates
    • H10F77/1692—Thin semiconductor films on metallic or insulating substrates the films including only Group IV materials

Definitions

  • the present invention relates to a method for the production of film-like semiconductor materials and / or electronic elements by prototyping and / or coating.
  • sizing agents are coating materials that form castings and / or casting cores are applied to smooth the porous molding surface. For this one uses usually finely ground refractory to highly refractory materials as base material. The coating layer insulates the substrate and protects against thermal and / or chemical stress on the mold by the molten metal.
  • Forming methods essentially shape the spatial shape of a component.
  • the educts or educt mixtures used in the form of a powdery state of matter for the component are referred to here and hereinafter as the starting powder.
  • Examples of primary molding processes are casting, solidification, crystallization, but also melting or sintering with or without mold, and curing processes.
  • Semiconductor materials are understood to mean materials which contain at least one element of groups 3 and 4 of the Periodic Table, as well as their compounds and mixtures thereof. These materials can be present as a solid, as a layer or as a powder or powder mixture.
  • the element distribution, in particular of dopants, in Film-like semiconductor material, in particular the distribution of dopants selected from elements of the 3 and 5 th group of the periodic table, is preferably such in the production of electronic elements that at least one charge-separating pn junction is represented.
  • Lift-off of a layer means the detachment of this layer from a substrate without significantly damaging the layer.
  • An electronic element is understood here and hereinafter to mean an element which has at least one charge-separating transition, as it is known, for example. occurs in diodes and transistors.
  • Special electronic elements are, for example, solar cells or photodiodes.
  • Nanoscale is understood to mean all sizes from 1 nm (10 ⁇ 9 m) to 999.9 nm.
  • systemically inherent components / powders which only contain chemical elements which appear desirable in the later semiconductor material or electronic element.
  • these are all elements of the 3rd, 4th and 5th group of the periodic table, their compounds with each other and / or their mixtures.
  • the prior art relating to prototypes and / or coating methods of film-type semiconductor materials, in particular Si discloses, for example, methods described below: a) thin-film methods in which the material is deposited from the gas phase. These include, for example, plasma vapor deposition (PVD), chemical vapor deposition (CVD), low-pressure chemical vapor deposition (LPCVD), "hot wire” vapor deposition (HWCVD) Use of relatively expensive substrates and a generally low productivity, which manifests itself in a low thickness growth at the level of 1 to several 10 nm / min of the deposited material on the substrate.
  • PVD plasma vapor deposition
  • CVD chemical vapor deposition
  • LPCVD low-pressure chemical vapor deposition
  • HWCVD hot wire” vapor deposition
  • Coating methods for producing layers with thicknesses typical for wafers are, for example, thermal spraying methods with which highly adhesive coatings, in particular in the area of wear protection coatings, are achieved.
  • the thermal spraying of silicon powders was already patented in 1977.
  • US 4,003,770 discloses the deposition of p- and n-doped layers with thicknesses between 3 and 18 mils, corresponding to thicknesses between about 75 and about 425 microns, on various substrates using a suitable atmosphere, and the subsequent heat treatment to improve the grain size.
  • the replacement of thick silicon layers is mentioned, but without saying anything about the process conditions for the detachment or about the parameters for a lift-off of such silicon layers.
  • this A layer is obtained which is detached from the remaining volume of wafers and onto which crystalline silicon in the last process step is applied epitaxially in a thickness of 50 ⁇ m
  • a similar process is described by HJ Kim et al in the "Layer Transfer Process” (Proceedings WCPEC IV, US Pat. Hawaii, May 2006).
  • the "consumption" of the wafer material occurring in these processes and the required processing of the single-crystal surface after each detachment of a layer are complicated and expensive, and the achievable layer surface sizes are limited by the available wafer sizes.
  • material costs and a possible flexibility of the semiconductor material it is desirable to obtain self-supporting or, if appropriate, low-cost films, for example plastic films, laminated semiconductor materials or films applied to such films.
  • the object of the invention was therefore to provide a comparison with the prior art improved manufacturing process for film-like semiconductor materials and / or electronic elements.
  • film-like semiconductor materials can be produced by an original molding and / or coating process, which is characterized in that at least one system-immanent, nano-sized sizing, at least partially, on the mold used in the primary molding process prior to the actual coating and / or molding the substrate used in the coating process is brought.
  • the present invention thus provides a process for producing film-like semiconductor materials or electronic elements by a master mold and / or Coating process, characterized in that at least one system-immanent nanoscale size is at least partially applied to the mold used in the primary molding process or to the substrate used in the coating process prior to the coating and / or primary molding.
  • the subject of the present invention is also a film-like semiconductor material, characterized in that the semiconductor material has on the contact side with the mold or the substrate up and / or melted particles of the system-immanent, nanosize sizing.
  • the present invention likewise relates to an electronic component which contains the film-type semiconductor material according to the invention.
  • the inventive method has the advantage that the film-like semiconductor materials or electronic elements on the substrate show no liability, so that they are easily removable after a prototyping or coating process over the prior art, without being separated from the substrate in complex additional process steps to have to.
  • the method according to the invention has the further advantage that the sizing reduces the heat transfer between the starting powder or the melt and the substrate during the primary molding process or thermal spraying process compared with the prior art processes and thus the fusion or sintering of the particles of the starting powder favored.
  • Another advantage of the method according to the invention is the lower thermal conductivity of a nanoscale size compared to the sizes used in known methods.
  • the method according to the invention also has the advantage that the foil-like semiconductor materials are not contaminated by foreign substances, because the only contact during the conversion of the starting powder to the finished semiconductor material is given by the system-immanent sizing.
  • the method according to the invention also has the advantage that due to the lower thermal conductivity of the nanoscale size compared to the sizes used in conventional processes, the starting powders can be fused or sintered with a lower heat input than is achieved in the prior art.
  • the thermally driven diffusion of atoms or particles from the substrate or the mold is suppressed and a reaction with the substrate or molding material is reduced.
  • the inventive method has the advantage that a diffusion of desired elements in the material of the starting powder can be controlled by the choice of dopants in the sizing, so that the properties of the semiconductor material can be specifically influenced during the production and thus costly post-treatment steps such Example ion implantation of dopants omitted.
  • a dopant pattern can be generated in a defined pattern by controlled introduction of the dopant or the dopants in the system-immanent size or system-immanent sizes provided with different dopants.
  • This dopant pattern can be transferred by diffusion into the semiconductor material during the prototyping or coating process. In zones with different doping, charge separation may occur.
  • electronic elements can be obtained in the inventive method, from which electronic components can be constructed.
  • the present invention is a process for producing film-like semiconductor materials or electronic elements by a prototype and / or Coating process, characterized in that at least one system-immanent, nanoscale size is at least partially applied to the mold used in the primary molding process or to the substrate used in the coating process before the coating and / or Urformung.
  • the mold or the substrate may preferably be chosen to be temperature-stable, particularly preferably high-temperature-stable.
  • a size can be used which has at least one dispersion of at least one nanoscale, systemic powder in a dispersion medium.
  • preference may be given to using a size which contains or consists of silicon powder, doped and / or undoped.
  • a powder in the method according to the invention a powder can be used, which has particles with a diameter dso % of 4 to 900 nm. Preference is given to using particles having a diameter dso% of from 10 to 600 nm, particularly preferably from 15 to 250 nm.
  • an organic dispersion or binder can be used.
  • the organic dispersant or binder may preferably be selected in the process of the invention from alcohols, esters, ethers, acrylates, polymethyl methacrylates, polyvinyl alkylates, or a mixture of these dispersants or binders.
  • a nitrogen-free organic dispersant or binder can be used in the process according to the invention.
  • an aqueous dispersion medium selected from silicic acid, water, or a mixture of these dispersants can be used in the process according to the invention. It may be advantageous if a dispersing agent or binder is used in the process according to the invention which evaporates or sublimates without residue before the melting or sintering of the starting powder. In the method according to the invention, it is just as advantageous to use a dispersing agent or binder which depolymerises without leaving any residue before the starting powder melts or sinters together.
  • the advantage lies in both cases in the fact that no material of the dispersion or binder can penetrate into the film-like semiconductor material or can be incorporated into it during the original molding and / or coating process, so that the film-like semiconductor material can remain free from impurities and thus its electronic , Mechanical and / or chemical properties can be controlled solely by the choice of the starting powder and the nanoscale, systemic powder.
  • the nano-scale, system-immanent sizing according to the invention may preferably be knife-coated onto the mold or the substrate, painted, brushed, sprayed, blown, printed, applied by screen printing, sprayed with a mask, or applied by immersing the mold or the substrate.
  • the size may particularly preferably be applied to the mold or the substrate by means of screen printing.
  • a size with pasty properties is used in the process according to the invention, which can be obtained by suitable choice and dosage of said dispersion or binder and their intimate mixing with the nanoscale, system-inherent powder. Suitable process steps of the mixing are known to the person skilled in the art.
  • the advantage lies in the fact that a size with pasty properties can be applied to inclined or vertical surfaces of the mold or of the substrate without the size running or running off uncontrolled on such surfaces.
  • the size is pressed dry onto the mold or the substrate. This allows a particularly rapid application of the size, which is cost-saving, especially in processes of mass production.
  • the sizing dry on the mold or the substrate to press is in that no vapors, sublimates or depolymerization products of binders or dispersants can be released and thus the inventive film-like semiconductor material can be prepared under high vacuum conditions.
  • a size which has at least one dopant selected from the 3rd or 5th main group it is preferably possible to use a size which has at least one dopant selected from the 3rd or 5th main group. In a further option, at least two sizes, each containing a dopant selected from the 3rd or 5th main group, can be used.
  • the method according to the invention it may be advantageous if at least two nanoscale, system-immanent sizing with different dopants or dopant components are arranged on the surface of the mold or the substrate.
  • 2, 3, 4, or 5, more preferably 2, 3, or 4, most preferably 2 or 3 nanoscale, system-immanent sizing with different dopants or Dotierstoffan turnover on the surface of the mold or the substrate can be arranged.
  • the method according to the invention has the advantage that a dopant pattern can be generated in a defined pattern by arranging different dopants or different dopant components in the system-immanent sizings.
  • This Dotierstoffmuster can be transferred during the prototyping or coating process by diffusion into the starting material or the reactants of the semiconductor material. In zones with different doping, charge separation may occur.
  • foil-like semiconductor materials can be obtained, which have electronic elements, for example diodes by an alternating arrangement of 2 nanoscale, system-immanent p-type or n-doped soils, or transistors by an arrangement of 3 alternating doping grades .
  • system-immanent sizing with different dopants or Dotierstoffan lateral or vertical relative to the surface of the mold or the substrate, different dimensions of the zones in which charge separation can occur, and thus different charge density distributions can be obtained.
  • the educt or the educts used in the coating and / or reshaping can preferably be applied in the process according to the invention by screen printing, printing, casting, thermal spraying, or plasma spraying.
  • the starting material or the educts can be applied by casting, thermal spraying, or plasma spraying, very particularly preferably by plasma spraying.
  • the starting material or the educts can be applied in a defined, two- or three-dimensional pattern.
  • different starting materials preferably 2, 3, 4, or 5 different starting materials, wherein the starting materials in at least one property selected from particle size, dopant content, chemical composition, particle morphology, or in several These properties differ, be applied.
  • film-like semiconductor materials can be obtained after the primary molding and / or coating process, in which 2, 3, 4, or 5 zones with different properties, preferably different dopant content, can abut each other.
  • sheet-like semiconductor materials having electronic elements can be obtained.
  • the educt or the educts can preferably be applied to the size according to the invention in the process according to the invention and then be fused or sintered.
  • the starting material or the starting materials can preferably be melted at a temperature which is the melting temperature of the non-sized substrate and / or the mold for a period of from 0.01 to 60 s, particularly preferably for a period of from 0.1 to 40 s, most preferably over a period of 0.5 to 20 s by a maximum of 200 0 C, preferably by a maximum of 100 0 C, more preferably by more than 80 0 C exceeds.
  • the educt or the educts can preferably be applied several times in the process according to the invention.
  • the starting material or the educts can be fused or sintered after each application.
  • the starting material or the educts can after each, every second to fourth, more preferably every third Application, or even in an irregular sequence after application fused or sintered.
  • the starting material or the educts can be fused or sintered after each application.
  • any variation of the order of repeated application and fusing or sintering can also be selected. With very particular preference, all starting materials can first be applied and then fused or sintered, or all starting materials can be fused or sintered after the last application.
  • the educt or the educts may preferably first be melted, and then the melt obtained in this way may be applied to the systemic, nano-sized size according to the invention.
  • the application can be carried out in a manner known to the person skilled in the art, for example by casting, printing, injection molding, or spinning.
  • the mold or the substrate is preheated to 200 to 800 ° C. and then the educt or the educts or the molten starting material or the molten educts are applied.
  • the temperature of the mold or of the substrate can be changed during the application of the educt or of the educts or of the molten educt or the molten educts.
  • the cooling rate can be controlled in a manner known to the person skilled in the art. This has the advantage that a film-like semiconductor material with a coarse-grained crystal structure can be obtained.
  • the film-type semiconductor material can be detached from the mold or the substrate after the primary or coating process.
  • the semiconductor material can be removed from the mold or the substrate by stripping, unwinding, peeling, or with the aid of transfer films made of plastic.
  • the semiconductor material can be detached from the mold or the substrate by means of an adhesive film known to the person skilled in the art.
  • the present invention therefore also relates to a film-type semiconductor material which is obtained by the method according to the invention.
  • the film-type semiconductor materials according to the invention may preferably contain or be at least one electronic element, preferably a diode or a transistor.
  • the present invention also provides a film-type semiconductor material, characterized in that the semiconductor material has on the contact side with the mold or the substrate and / or melted particles of the system-immanent, nanosize sizing.
  • the subject of the present invention is such a semiconductor material which is obtained by the method according to the invention.
  • Another object of the present invention is an electronic component, comprising the film-like semiconductor material according to the invention.
  • the film-type semiconductor material according to the invention may preferably have a thickness of 10 to 500 ⁇ m. Further preferably, the film-like semiconductor material may have a longitudinal extent of the crystallites of 10 nm to 300 microns.
  • the electronic component according to the invention may preferably be a photodiode, particularly preferably a solar cell.
  • a size of nano-scale Si powder in a dispersion of 8 wt .-% Si in ethanol was applied by spraying on a quartz glass substrate and at room temperature by Evaporation of the ethanol dried.
  • the further coating of the substrate with the semiconductor material Si was carried out by means of a known thermal spraying method, plasma spraying in argon plasma in air, using silicon powder with particle sizes in the range of 50-150 ⁇ m as the material to be sprayed.
  • the deposited layer thicknesses were typically between 50 and 100 ⁇ m, in some cases up to 300 ⁇ m.
  • Figures 1 and 2 show a strip of the film-like semiconductor material (1) according to the invention, which has been removed after cooling to room temperature of the quartz glass substrate (2) using a commercially available adhesive film as a thin layer.
  • EXAMPLE 2 Preparation of a Silicon Foil by Immersion in a Melting Bath A layer of the size which is several ⁇ m thick was produced on a quartz glass substrate by spraying a dispersion of nanoscale Si powder, 8% by weight of Si in ethanol and drying at room temperature by evaporation of the ethanol , The thus provided with the sizing quartz glass substrate was then preheated in a vacuum oven under less than 1 mbar residual pressure to a temperature of about 1000 0 C, then for a short time of 1 to 2 seconds in a silicon melt having a temperature of about 1450 0 C. exhibited, dipped and then pulled out. It formed a silicon film, which could be removed after cooling using a commercially available adhesive film as a thin layer of the substrate.
  • nanoscale Si powder in ethanol was wetted in a wet pressing process, which wetted a quartz glass surface.
  • Example 4 Generation of a doping and a p-n junction by using a doped size
  • a single-crystal wafer of n-doped silicon was spin-coated with a dispersion of boron p-doped nano-Si particles in ethanol, 6.25 wt .-% Si in ethanol, coated on one side and a heat treatment at a Temperature of 800 0 C for a period of 0.5 hours under inert gas subjected. After this treatment, the size was removed from the wafer. The p-dopants were diffused into the n-doped wafer, and the pn junction thus produced by local re-doping of the previously n-doped wafer could be detected by measuring a diode characteristic.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Nanotechnology (AREA)
  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
  • Application Of Or Painting With Fluid Materials (AREA)

Abstract

La présente invention concerne un procédé de fabrication de matériaux semi-conducteurs et/ou d'éléments électroniques en forme de feuille par préformage et/ou revêtement. La propriété caractéristique du procédé est l'application d'un apprêt de substances nanoscopiques immanentes au système à la surface du substrat à recouvrir et/ou à la surface du moule utilisé dans le procédé de préformage. Cet apprêt permet de décoller facilement le matériau semi-conducteur en forme de feuille du substrat après le processus de préformage et/ou de revêtement, réduit les réactions avec le matériau du substrat et/ou du moule et donc la contamination du matériau semi-conducteur et réduit le transfert de chaleur du matériau semi-conducteur dans le substrat avec le cas échéant des conséquences avantageuses sur la microstructure du matériau semi-conducteur, en particulier la taille moyenne de ses grains. Dans un mode de réalisation avantageux de l'invention, l'apprêt n'est pas utilisé seulement afin d'améliorer le décollement du substrat et de réduire la contamination du matériau semi-conducteur, mais peut aussi être utilisé pour produire un modèle de substance dopante dans le matériau semi-conducteur. Dans ce cas, au moins deux apprêts aux teneurs en substances dopantes différentes sont appliqués en un modèle défini sur le substrat. Ces modèles de substance dopante sont transmis dans le matériau semi-conducteur par diffusion au moment du processus de préformage et/ou de revêtement.
PCT/EP2008/056693 2007-06-26 2008-05-30 Procédé de fabrication de matériaux semi-conducteurs et/ou d'éléments électroniques en forme de feuille par préformage initial et/ou revêtement WO2009000608A2 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP08760281A EP2160755A2 (fr) 2007-06-26 2008-05-30 Procédé de fabrication de matériaux semi-conducteurs et/ou d'éléments électroniques en forme de feuille par préformage initial et/ou revêtement

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102007029576.8 2007-06-26
DE102007029576A DE102007029576A1 (de) 2007-06-26 2007-06-26 Verfahren zur Herstellung von folienartigen Halbleiterwerkstoffen und/oder elektronischen Elementen durch Urformen und/oder Beschichtung

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WO2009000608A2 true WO2009000608A2 (fr) 2008-12-31
WO2009000608A3 WO2009000608A3 (fr) 2009-02-19

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EP (1) EP2160755A2 (fr)
CN (1) CN101335194A (fr)
DE (1) DE102007029576A1 (fr)
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DE102008049303B4 (de) * 2008-09-29 2012-05-24 Qimonda Ag Verfahren zur Herstellung eines Silizium-Wafers und Siliziumwafer für Solarzellen
DE102015226516B4 (de) * 2015-12-22 2018-02-22 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung eingetragener Verein Verfahren zur Dotierung von Halbleitersubstraten mittels eines Co-Diffusionsprozesses

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DE2927086C2 (de) 1979-07-04 1987-02-05 Siemens AG, 1000 Berlin und 8000 München Verfahren zum Herstellen von platten- oder bandförmigen Siliziumkristallkörpern mit Säulenstruktur für Solarzellen
JP3968566B2 (ja) * 2002-03-26 2007-08-29 日立電線株式会社 窒化物半導体結晶の製造方法及び窒化物半導体ウエハ並びに窒化物半導体デバイス
DE102004060737B4 (de) * 2004-12-15 2007-03-08 Degussa Ag Verfahren zur Herstellung von halbleitenden oder photovoltaisch aktiven Filmen
KR100682880B1 (ko) * 2005-01-07 2007-02-15 삼성코닝 주식회사 결정 성장 방법
US20090008652A1 (en) * 2005-03-22 2009-01-08 Sumitomo Chemical Company, Ltd. Free-Standing Substrate, Method for Producing the Same and Semiconductor Light-Emitting Device
US8946674B2 (en) * 2005-08-31 2015-02-03 University Of Florida Research Foundation, Inc. Group III-nitrides on Si substrates using a nanostructured interlayer

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EP2160755A2 (fr) 2010-03-10
DE102007029576A1 (de) 2009-01-08
WO2009000608A3 (fr) 2009-02-19

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