WO2009060625A1 - Circuit de verrouillage non volatile et circuit bascule non volatile - Google Patents
Circuit de verrouillage non volatile et circuit bascule non volatile Download PDFInfo
- Publication number
- WO2009060625A1 WO2009060625A1 PCT/JP2008/003236 JP2008003236W WO2009060625A1 WO 2009060625 A1 WO2009060625 A1 WO 2009060625A1 JP 2008003236 W JP2008003236 W JP 2008003236W WO 2009060625 A1 WO2009060625 A1 WO 2009060625A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- potential
- operating current
- circuit
- nonvolatile
- latch circuit
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356104—Bistable circuits using complementary field-effect transistors
- H03K3/356182—Bistable circuits using complementary field-effect transistors with additional means for controlling the main nodes
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
- G11C14/0054—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell
- G11C14/009—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell and the nonvolatile element is a resistive RAM element, i.e. programmable resistors, e.g. formed of phase change or chalcogenide material
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/037—Bistable circuits
- H03K3/0375—Bistable circuits provided with means for increasing reliability; for protection; for ensuring a predetermined initial state when the supply voltage has been applied; for storing the actual state when the supply voltage fails
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/50—Resistive cell structure aspects
- G11C2213/52—Structure characterized by the electrode material, shape, etc.
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Materials Engineering (AREA)
- Static Random-Access Memory (AREA)
Abstract
L'invention concerne un circuit de verrouillage non volatile comportant un circuit de verrouillage (6), des bornes de sortie (8, 9) de deux inverseurs constituant le circuit de verrouillage, un premier inverseur (INV1) relié à une extrémité du passage de l'intensité de fonctionnement d'un inverseur, un second inverseur (INV2) relié à une extrémité du passage de l'intensité de fonctionnement de l'autre inverseur, une paire d'éléments de variation de résistance (1, 2), reliés en série entre un premier nœud (n13) et un deuxième nœud (n14) à un troisième nœud (n15) de façon à inverser le sens de conduction, une borne de commande de stockage (STR) reliée à une extrémité de chaque passage d'intensité de fonctionnement des premier et second inverseurs, un circuit de commutation (Trn1) possédant une borne d'E/S reliée au troisième nœud, un circuit de commande de données (15) relié à la première borne de sortie (8) et un circuit de commande de potentiel (Trp10) pour fournir l'intensité de fonctionnement à l'autre extrémité de chaque passage de l'intensité de fonctionnement de la paire d'inverseurs du circuit de verrouillage et transmettre un potentiel tout en effectuant une variation d'un premier potentiel à un second potentiel, l'autre extrémité de chaque passage d'intensité de fonctionnement des premier et second inverseurs et l'autre borne d'E/S du circuit de commutation étant reliées à une borne de transmission de potentiel pour transmettre le premier potentiel.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007-290892 | 2007-11-08 | ||
JP2007290892 | 2007-11-08 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2009060625A1 true WO2009060625A1 (fr) | 2009-05-14 |
Family
ID=40625532
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2008/003236 WO2009060625A1 (fr) | 2007-11-08 | 2008-11-07 | Circuit de verrouillage non volatile et circuit bascule non volatile |
Country Status (1)
Country | Link |
---|---|
WO (1) | WO2009060625A1 (fr) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7961005B1 (en) | 2009-12-09 | 2011-06-14 | Samsung Electronics Co., Ltd. | Non-volatile logic circuits, integrated circuits including the non-volatile logic circuits, and methods of operating the integrated circuits |
JP4995360B1 (ja) * | 2011-01-20 | 2012-08-08 | パナソニック株式会社 | 不揮発性ラッチ回路および不揮発性フリップフロップ回路 |
JP2013218778A (ja) * | 2012-03-13 | 2013-10-24 | Semiconductor Energy Lab Co Ltd | 記憶装置及びその駆動方法 |
US8604827B2 (en) | 2011-02-21 | 2013-12-10 | Samsung Electronics Co., Ltd. | Logic circuit, integrated circuit including the logic circuit, and method of operating the integrated circuit |
US8619466B2 (en) | 2011-02-07 | 2013-12-31 | Panasonic Corporation | Nonvolatile latch circuit, nonvolatile flip-flop circuit, and nonvolatile signal processing device |
US8792268B2 (en) | 2011-11-22 | 2014-07-29 | Panasonic Corporation | Nonvolatile latch circuit, nonvolatile flip-flop circuit, and nonvolatile signal processing device |
WO2019203019A1 (fr) * | 2018-04-19 | 2019-10-24 | ソニーセミコンダクタソリューションズ株式会社 | Circuit de stockage non volatil |
CN117789795A (zh) * | 2023-12-27 | 2024-03-29 | 无锡中微亿芯有限公司 | 基于可变阻值电阻的fpga用非易失性dff |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003016773A (ja) * | 2001-04-27 | 2003-01-17 | Internatl Business Mach Corp <Ibm> | レジスタ、データの記憶方法及びデータの読み出し方法 |
WO2004040582A1 (fr) * | 2002-11-01 | 2004-05-13 | Matsushita Electric Industrial Co., Ltd. | Procede permettant d'amorcer un circuit bistable non volatile a l'aide d'une element de changement de resistance |
JP2005166170A (ja) * | 2003-12-03 | 2005-06-23 | Internatl Business Mach Corp <Ibm> | 磁気記憶装置 |
JP2008085770A (ja) * | 2006-09-28 | 2008-04-10 | Toshiba Corp | 不揮発ラッチ回路および不揮発性フリップフロップ回路 |
-
2008
- 2008-11-07 WO PCT/JP2008/003236 patent/WO2009060625A1/fr active Application Filing
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003016773A (ja) * | 2001-04-27 | 2003-01-17 | Internatl Business Mach Corp <Ibm> | レジスタ、データの記憶方法及びデータの読み出し方法 |
WO2004040582A1 (fr) * | 2002-11-01 | 2004-05-13 | Matsushita Electric Industrial Co., Ltd. | Procede permettant d'amorcer un circuit bistable non volatile a l'aide d'une element de changement de resistance |
JP2005166170A (ja) * | 2003-12-03 | 2005-06-23 | Internatl Business Mach Corp <Ibm> | 磁気記憶装置 |
JP2008085770A (ja) * | 2006-09-28 | 2008-04-10 | Toshiba Corp | 不揮発ラッチ回路および不揮発性フリップフロップ回路 |
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7961005B1 (en) | 2009-12-09 | 2011-06-14 | Samsung Electronics Co., Ltd. | Non-volatile logic circuits, integrated circuits including the non-volatile logic circuits, and methods of operating the integrated circuits |
JP4995360B1 (ja) * | 2011-01-20 | 2012-08-08 | パナソニック株式会社 | 不揮発性ラッチ回路および不揮発性フリップフロップ回路 |
US8437177B2 (en) | 2011-01-20 | 2013-05-07 | Panasonic Corporation | Nonvolatile latch circuit and nonvolatile flip-flop circuit |
US8619466B2 (en) | 2011-02-07 | 2013-12-31 | Panasonic Corporation | Nonvolatile latch circuit, nonvolatile flip-flop circuit, and nonvolatile signal processing device |
US8604827B2 (en) | 2011-02-21 | 2013-12-10 | Samsung Electronics Co., Ltd. | Logic circuit, integrated circuit including the logic circuit, and method of operating the integrated circuit |
US8792268B2 (en) | 2011-11-22 | 2014-07-29 | Panasonic Corporation | Nonvolatile latch circuit, nonvolatile flip-flop circuit, and nonvolatile signal processing device |
JP2013218778A (ja) * | 2012-03-13 | 2013-10-24 | Semiconductor Energy Lab Co Ltd | 記憶装置及びその駆動方法 |
WO2019203019A1 (fr) * | 2018-04-19 | 2019-10-24 | ソニーセミコンダクタソリューションズ株式会社 | Circuit de stockage non volatil |
CN112020744A (zh) * | 2018-04-19 | 2020-12-01 | 索尼半导体解决方案公司 | 非易失性存储电路 |
CN112020744B (zh) * | 2018-04-19 | 2024-09-17 | 索尼半导体解决方案公司 | 非易失性存储电路 |
TWI863904B (zh) * | 2018-04-19 | 2024-12-01 | 日商索尼半導體解決方案公司 | 非揮發性記憶電路 |
CN117789795A (zh) * | 2023-12-27 | 2024-03-29 | 无锡中微亿芯有限公司 | 基于可变阻值电阻的fpga用非易失性dff |
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