WO2008036053A1

WO2008036053A1 - Method for automatically controlling the amplitude of input signals

Info

Publication number: WO2008036053A1
Application number: PCT/SI2007/000016
Authority: WO
Inventors: Anton Pletersek; Andrej Vodopivec
Original assignee: Anton Pletersek; Andrej Vodopivec
Priority date: 2006-09-21
Filing date: 2007-03-28
Publication date: 2008-03-27
Also published as: SI22403A; EP2064524A1

Abstract

Input signals having the same functional time dependence, e.g. a sinusoidal one, and being out-of-phase with regard to each other are amplified selectively according to the result of a previous comparison of the amplitudes of a first and a second matched signals (s1m, s2m), which were formed from the input signals (s1, s2) by means of said selective amplifying, which step-by-step matches the output signals to each other in amplitude. There is measured the duration (T) of a time interval between such passings of the matched signals through a signal ground (gnd) that both matched signals have the same polarity in said time interval. It is ascertained on the basis of the time duration (T) that the frequency of the input signals is within preset frequency limits. The first matched signal is sampled the moment the second matched signal passed through the signal ground and the second one the moment the first one passed through the signal ground. Values obtained by sampling are compared to each other. A selective gain control signal is generated as a result of said comparison of the sample values. The gain applied to either input signal is increased or decreased. The method of the invention for automatically controlling the amplitude of input signals initiates an automatic selective amplification of individual input signals.

Description

Method for automatically controlling the amplitude of input signals

The invention relates to a method for automatically controlling the amplitude of input signals, which are e.g. output signals of encoders in a position measuring device, and which all have the same functional time dependence with properties of being periodic and symmetric with regard to the middle of their half-periods and are out-of-phase with regard to each other, the amplitudes of the input signals being selectively matched to each other.

Circuits are known, in which the amplitudes of input signals are automatically controlled by controlling a mean value of the amplitudes of the input signals. The input signals are supposed to be adjusted to each other with regard to amplitude and phase, channels pertaining to said input signals, however, with regard to offset. An automatic gain control (AGC) is performed, for example, in that a signal source is regulated by means of a control signal regardless of the frequency of the input signals. Therefore the amplitudes of the input signals do not match to each other in a selective way. Namely, an automatic selective gain matching during the operation namely has not yet been known. The amplitude and the phase of the input signals are calibrated only by a presetting. Accordingly, the matching of unbalanced amplitudes of the input signals to each other has not yet been known, although the balance of amplitudes of the input signals is required in some applications, for example, when performing an interpolation. Namely, a difference between amplitudes of orthogonal signals in encoders strongly reduces the interpolation factor and raises the error of measurement. The patent US 4,097,732 discloses a technical solution in which the light source intensity in an encoder is regulated or a common gain is regulated (AGC).

Adequate amplitudes are also achieved in a circuit as disclosed in the patent application US 2003/00091126 by means of a common amplification (AGC) and not in a selective way.

The invention solves the technical problem how to improve a method of said kind for automatically controlling the amplitude of input signals so that the amplitude of each input signal will be calibrated selectively, namely taking into account an upper and a lower limit of an allowable frequency range and also with regard to the highest allowable level of a gain, to the allowable highest amplitude level of matched signals and to excitation characteristics of the generators of the input signals.

The technical problem is solved by the method of the invention for automatically controlling the amplitude of input signals as characterized by the features of the characterizing portion of the first claim, and the variants of the method embodiment are characterized by dependent claims.

The method of the invention for automatically controlling the amplitude of input signals initiates an automatic selective amplification of individual input signals, simultaneously taking into account the limits of the frequency range of the input signals as set by the circuit carrying out the method of the invention are. For this reason, the system dynamics is only slightly influenced by the proposed method. The method may be carried out in a way that no special clock signal to carry out this method is needed; in this way also disturbances are avoided, which in the mentioned application (performing an interpolation) would affect the evaluation of the result of the measurement, which result is reproduced by the signals matched to each other in amplitude.

The invention will now be explained in more detail by way of the description of an embodiment of the method of the invention and with reference to the accompanying drawing representing in Fig. 1 a circuit for carrying out the method of the invention for automatically controlling the amplitude of input signals,

Fig. 2 a graph illustrating the time dependence of two output signals, which are matched to each other in amplitude, and of several signals, which are generated after the circuit represented in Fig. 1 has been switched on, Fig. 3 a circuit for measuring the duration of a time interval between contiguous passings of two matched signals through a signal ground and for ascertaining that the frequency of the input signals is within an allowed frequency range, and

Fig. 4 a circuit for checking the action sequence of the signals, the circuits in Figs. 3 and 4 being component parts of the circuit in Fig. 1.

The method of the invention for automatically controlling the amplitude of input signals, which is provided for two or several input signals, automatically carries out a gradual matching of their amplitudes to each other or an equalizing of their amplitudes. The explanation below refers to two input signals si and s2. The method is carried out digitally.

The method of the invention is applicable to two input signals si and s2, which have the same functional time dependence f(x) with the property of f(π-x) = f(x), which function is a periodic function with a period of 2τ. The functional time dependence of said input signals si, s2 in the described variant embodiment is sinus-shaped and such is also the functional time dependence of output matched signals slm, s2m (Fig. 2). The input signals si and s2 are out-of-phase with regard to each other for an arbitrary- phase angle.

Reference characters from Fig. 1, where a possible embodiment of a circuit for carrying out the method of the invention for automatically controlling the amplitude of input signals is represented, are used in order to clearly describe the method of the invention.

The input signals si and s2 are amplified selectively according to the result of a previous comparison of the amplitude of the output first matched signal slm and the amplitude of the output second matched signal s2m, which were step-by-step formed from the input signals si, s2 by means of said selective amplifying. The selective amplifying thus gradually matches the output matched signals slm, s2m to each other in amplitude.

According to the method of the invention there is measured a duration T of a time interval between the passing of the output first matched signal slm through a signal ground gnd and the first passing, which follows said passing, of the output second matched signal s2m through the signal ground gnd. But at the same time the two passings of the matched signals slm, s2m through the signal ground gnd must be such that both matched signals slm, s2m have the same polarity in the intermediate time interval between said passings.

The frequency of the input signals si, s2 must lie below a prescribed upper frequency limit Rh and above a prescribed lower frequency limit Rl, thus it must be within a frequency range allowed for the circuit carrying out the method of the invention. The adequacy of the frequency of the input signals is checked on the basis of the duration T of said time interval.

If said requirement is met, the first matched signal slm is sampled at the moment the second matched signal s2m passes through the signal ground gnd and the second matched signal s2m is sampled the moment the first matched signal slm passes through the signal ground gnd.

Since the amplitude of the matched signals slm and s2m is measured by means of sampling it is actually important, to which degree a sample value svl remains stable in spite of leakage currents in sampling circuits or to which degree it is reduced (drop-rate) after the time interval of the duration T when also the second matched signal s2m is sampled. For this reason the lower frequency limit Rl of the frequency range for the input signals si and s2 is set. But on the other hand time (settling time) is required to attain the output value of the sampling circuit, whereas, the amplitude of the fast varying signal at a specified time moment is to be measured. For this reason the upper frequency limit Rh of the frequency range for the input signals si and s2 is set. Hence, the method of the invention is allowed to be carried out at a high enough frequency of the input signals si and s2, yet not at to a high one.

According to the method of the invention, the values svl and sv2 obtained by sampling the respective matched signals slm and s2m in the same said time interval are compared to each other. The sample values svl and sv2 should be equal because of the symmetry of the functional time dependence of the signal amplitude with regard to the middle of their half-periods after the output matched signals slm, s2m have been matched to each other up to the resolution of the system. A control signal sgcs for a selective determination of the amount of amplification (gain) applied to the input signals si, s2 is generated with regard to the result of comparing the sample values svl, sv2 as well as with regard to instantaneous values of gains gl, g2 applied to the input signals si and s2, respectively, and to a highest allowable level L of the gains gl, g2. The gain values gl and g2 are really information on the amplification as set at that moment of time for the respective first and second input signals.

According to the method of the invention the equalization or the matching of the signal amplitudes to each other is carried out in a way that the gain applied to either input signal si, s2 is step-by-step gradually increased or decreased from one period of the input signals to another. In this way the amplitude of the matched signal slm, s2m, which resulted from the input signal si, s2, approximates to the amplitude of the other one of the matched signals slm, s2m. Here attention is paid that no gain value gl, g2 related to the input signal si and s2, respectively, exceeds an allowed upper limit value P for the amplitude of the matched signals slm, s2m.

However, with regard to the result of comparing the sample values svl, sv2 as well as with regard to instantaneous values of gains gl, g2 applied to the respective input signals si and s2 or/and to the highest allowable level L of the gains gl, g2, a control signal sc can be generated, by means of which control signal an increase or decrease of the amplitude of the input signals si, s2 is caused, or a first warning signal sth or a second warning signal stl is generated, which warns that the signals in the circuit for carrying out the proposed method have exceeded the upper or the lower amplitude limit. The mutual phase shift of the input signals si and s2 must be constant or it is allowed to vary only slowly. The frequency of the input signals si and s2, however, may be in the range from very low frequencies to several megahertz.

An embodiment of the circuit AGCC for carrying out the method of the invention for automatically controlling the amplitude of two input signals si, s2 is represented in Fig. 1.

The input signals si and s2, which have to be matched to each other in amplitude, are conducted to the input of respective amplifiers Al and A2. The matched signals slm and s2m are output signals of the circuit AGCC and they are the output of the amplifiers Al and A2, which are controlled by the respective first gain control signal gel and the second gain control signal gc2.

The time dependence of the matched signals slm, s2m and of several signals generated in the circuit AGCC (Fig. 1) is represented in Fig. 2 . The circuit AGCC has been switched on at the time moment t = 0. The first matched signal slm becomes equal to the signal ground gnd at the time moments tl , t2, t3 for the first, second and third time, respectively. Already in the first period beginning at tl, the active low logical state of a time measuring signal tms appears.

The matched signals slm and s2m are conducted to respective comparators CgI and

Cg2, wherein they are compared to the signal ground gnd and respective signals zcl and zc2 are generated. The signals zcl and zc2 change their logical state the moments the matched signals slm and s2m pass the signal ground gnd. The signals zcl and zc2 are conducted to a time-interval measuring circuit IMC, whereto also the upper limit Rh and the lower limit Rl of the allowed frequency range for the input signals si and s2 are conducted from a register REG.

A signal ame, which in the high logical state enables the sampling of the amplitude of the matched signals slm, s2m, is generated in a time-interval measuring circuit IMC. Therefore, it is actually in the time-interval measuring circuit IMC, where it is checked whether it is at all possible to carry out an automatic matching of the signal amplitudes to each other. The construction and the operation of the time-interval measuring circuit IMC (Fig. 3) will be explained below. The signal ame is conducted back to said comparators CgI and Cg2 and to a circuit SEQ for checking the sequence of the input signal ame and control signals cl and c2 controlling the sampling of the matched signals slm, s2m in respective sample-and-hold circuits SHl and SH2. Said control signal c2 controlling the sample-and-hold circuit SH2 is generated in the comparator CgI at the next passing of the matched signal slm through the signal ground gnd not until and only when the signal ame at the input of the comparator CgI is already in the high logical state. A similar process takes place in the case of the control signal cl.

The sample values svl and sv2 obtained by sampling the respective matched signals slm and s2m in the same time interval are conducted to a sample values comparator Csv. A signal ce enabling the comparison is generated in the circuit SEQ and is conducted to the comparator Csv. A signal cc generated in the comparator Csv after the comparison has been carried out is conducted back to the circuit SEQ. A signal Ib2 or 2b 1 is output from the comparator Csv, which depends on which matched signal slm and s2m has a lower sample value of the amplitude in the instantaneous period, and it is conducted to a controlled level controller CLC and to a selective gain controller SGC. The sample values svl and sv2 obtained by sampling the respective matched signals slm and s2m, the signals gl and g2 representing the instantaneous gain of the respective amplifiers Al and A2 as well as the value L of the highest allowable gain level are also conducted to the controlled level controller CLC.

The control signal sgcs for the selective determination of the gain is generated in the controlled level controller CLC and is conducted to the selective gain controller SGC.

Here the gain control signals gel and gc2 are generated taking into account the value

P from the register REG for the allowable upper limit of the amplitude of the matched signals slm and s2m - the noise properties of the generator generating the input signals si and s2 determine the value P - and said control signals gel and gc2 are conducted to the respective amplifiers Al and A2. The matching of the input signals si and s2 to each other is carried out by means of the respective control signals gel and gc2.

Further, the sensor control signal sc is generated in the controlled level controller CLC, which sensor control signal sc generates a correcting signal Co in the selective gain controller SGC taking into account information M from the register REG on excitation properties of the sensors generating input signals si, s2₅ said sensors being influenced by the correcting signal Co.

And finally, the first warning signal sth or the second warning signal stl, both already mentioned above, are generated in the controlled level controller CLC. The warning signals sth and stl indicate that the signals in the circuit AGCC for carrying out the proposed method have exceeded the respective upper and the lower amplitude limit.

According to the proposed method 1) there is automatically measured the duration T of the time interval between the appropriate passings of the one and the other matched signal slm, s2m through the signal ground gnd and it is automatically examined whether the input signals si, s2 are suited for carrying out the proposed method with regard to their frequency, 2) it is automatically examined whether a couple of the neighbouring passings through the signal ground gnd is appropriate in the sense that both matched signals slm, s2m must have the same polarity in the time interval between said passings, and in the represented possible circuit AGCC for carrying out the method of the invention 3) it is automatically checked whether the operations under 1) and 2), the sampling of the first and second matched signals slm, s2m and the comparison of the sample values svl, sv2 are carried out in the correct sequence one after another.

The operations under 1) and 2) are carried out in the time-interval measuring circuit IMC, which comprises a direction control unit DCU and a unit TMFCU for measuring time and controlling frequency (Fig. 3).

The direction control unit DCU consists of flip-flops F 1 , F2, invertors 11 , 12 and NOR gates. Here an explanation of the operation of the unit DCU is given for the case that the second input signal s2 runs in front of the first input signal si (Fig. 2). The high logical state of the signal zc2 is input into the flip-flop Fl by means of the upward slope of the signal zcl.- Since there is the high logical state at the output Q of the flip- flop Fl, the time measuring signal tms at the output of the NOR gate changes to the low logical state. When thereafter the signal zc2 changes to the low logical state, the flip-flop Fl is reset and its output Q changes to the low logical state and the time measuring signal tms is deactivated by changing to the high logical state. However, no new state is input at the input D of the flip-flop F2 since the flip-flop F2 is being reset because of the high logical state of the signal zc2 and with the low logical state of the signal zcl all the time the low logical state is at the output Q of the flip-flop F2. The roles of the flip-flops Fl and F2 are interchanged if the first input signal si runs in front of the second input signal s2. The unit TMFCU for measuring the duration T of said time interval and controlling the frequency of the input signals si, s2 comprises a capacitor C, which is charged through a resistor R and a controlled switch Sl and discharged through a controlled switch S2. The switch Sl is controlled by the inverted time measuring signal tms and the switch S2 is controlled by the time measuring signal tms. Therefore the highest voltage on the capacitor C is a measure for the duration T of said time interval. The upper terminal of the capacitor C is connected to the input of a window comparator WC, the window of which comparator is determined by the upper limit Rh and the lower limit Rl of the allowed frequency range for the circuit AGCC. The output of the window comparator WC is connected to a cascade of flip-flops F3, F4, F5. A signal por (power-on-reset) appears when the circuit AGCC is switched on, i.e. at the time moment t = 0 in Fig. 2. The outputs of the last two flip-flops F4 and F5 are through AND gates connected to the output of the time-interval measuring circuit IMC. The time measuring signal tmc indicates when a requirement for measuring or sampling is met. The mentioned signal ame is generated from said signal tmc through signals tme, tme', tme", which allow said measuring. The signal ame in the next period of the input signals enables the generation of the control signals cl, c2 for the first sample-and- hold circuit SHl and the second sample-and-hold circuit SH2, respectively. Then in the same period the measurement of the amplitudes of the matched signals slm and s2m, i.e. values svl and sv2, is carried out (Fig. 2).

The operation under 3) is carried out in the circuit SEQ for checking the sequence of the operations of the control signals cl, c2 controlling the sample-and-hold circuits SHl and SH2, respectively, of the signal ce enabling the comparison of the sample values svl, sv2 in the comparator Csv and of the signal cc, by means of which signal the comparator Csv communicates that said comparison has been carried out (Fig. 4). The circuit SEQ holds up said comparison in the comparator Csv till both samplings have been made. When it has been ascertained in the time-interval measuring circuit IMC that the requirements for the sampling are met, the signal ame is in the high logical state and this state is input into the flip-flop F7 by means of the downward slope of the control signal c2 after the sampling of the second matched signal s2m has been carried out and it is input also into the flip-flop F6 by means of the downward slope front of the control signal cl after the sampling of the first matched signal slm has been carried out. The high logical state is at both inputs of NAND gates and at the output of the NAND gates the signal ce is in the active low logical state. The circuit SEQ is reset by the signal cc, which is generated in the comparator Csv and confirms that the comparison has been carried out. The circuit SEQ is now prepared for the next period.

The circuit SEQ prevents all unnecessary activities in the circuit AGCC₅ contributing thereby to a very slight influence of the method proposed by the invention on the dynamics of the system.

The described circuit AGCC is made in a way that it does not need its own clock signal. Thus no interferences due to an integrated oscillator appear in the circuit AGCC.

Claims

1. Method for automatically controlling an amplitude of input signals, characterized in that the first input signal (si) and the second input signal (s2), which have the same functional time dependence f(x) with properties of f(x) being a periodic function with a period of 2τ and f(7T-x) = f(x), and are out-of-phase with regard to each other, are amplified selectively according to the result of a previous comparison of the amplitude of an output first matched signal (slm) and the amplitude of an output second matched signal (s2m), which were formed from the input signals (si, s2) by means of said selective amplifying, which step-by- step matches the output first and second matched signals (slm, s2m) to each other in amplitude.

2. Method as recited in claim 1, characterized in that there is measured a duration (T) of a time interval between such passing of the output first matched signal (slm) through a signal ground (gnd) and a first such passing, which follows said passing, of the output second matched signal

(s2m) through the signal ground (gnd) that both matched signals (slm, s2m) have the same polarity in said time interval, that it is ascertained on the basis of the duration (T) of said time interval that the frequency of the input signals (si, s2) is within preset frequency limits, that the first matched signal (slm) is sampled the moment the second matched signal

(s2m) passed through the signal ground (gnd) and the second matched signal (s2m) is sampled the moment the first matched signal (slm) passed through the signal ground (gnd), that values (svl, sv2) obtained by sampling the matched signals (slm, s2m) in the same said time interval are compared to each other, that a selective gain control signal (sgcs) is generated as a result of said comparison of the sample values (svl, sv2), of instantaneous values of gains applied to the input signals (si, s2) and of a highest allowable level of the gains applied to the input signals (si, s2), and that the gain applied to either input signal (si, s2) is increased or decreased in a way that the amplitude of the matched signal (slm, s2m), which resulted from said one input signal, approximates to the amplitude of the other one of the matched signals (slm, s2m).

3. Method as recited in claim 2, characterized in that said functional time dependence f(x) is a sinusoidal one.

4. Method as recited in claim 2 or 3, characterized in that the gain applied to either input signal (si, s2) is determined with respect to an allowable highest amplitude level of the matched signals (slm, s2m).

5. Method as recited in claim 4, characterized in that the gain applied to the input signals (si, s2) changes gradually.

6. Method as recited in claim 5, characterized in that a control signal (sc), by means of which control signal an increase or decrease of the amplitude of the input signals (si, s2) is caused, is generated according to the result of said comparison of the sample values (svl, sv2), to the instantaneous values of the gains applied to the input signals (si, s2) and to the highest allowable level of said gains.

7. Method as recited in claim 6, characterized in that a first warning signal (sth) or a second warning signal (stl) is generated when a signal amplitude range, which is specified for a circuit for automatically controlling the amplitude of the input signals, is exceeded upwards or downwards, respectively.