+

WO2008005781A3 - Amélioration de la fiabilité, de la disponibilité et de la facilité de maintenance dans un dispositif à mémoire - Google Patents

Amélioration de la fiabilité, de la disponibilité et de la facilité de maintenance dans un dispositif à mémoire Download PDF

Info

Publication number
WO2008005781A3
WO2008005781A3 PCT/US2007/072295 US2007072295W WO2008005781A3 WO 2008005781 A3 WO2008005781 A3 WO 2008005781A3 US 2007072295 W US2007072295 W US 2007072295W WO 2008005781 A3 WO2008005781 A3 WO 2008005781A3
Authority
WO
WIPO (PCT)
Prior art keywords
memory device
bits
serviceability
availability
error correction
Prior art date
Application number
PCT/US2007/072295
Other languages
English (en)
Other versions
WO2008005781A2 (fr
Inventor
Kuljit S Bains
Original Assignee
Intel Corp
Kuljit S Bains
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp, Kuljit S Bains filed Critical Intel Corp
Priority to AT07799113T priority Critical patent/ATE545910T1/de
Priority to EP07799113A priority patent/EP2035938B1/fr
Priority to KR1020087031500A priority patent/KR101047241B1/ko
Priority to JP2009530716A priority patent/JP5135348B2/ja
Publication of WO2008005781A2 publication Critical patent/WO2008005781A2/fr
Publication of WO2008005781A3 publication Critical patent/WO2008005781A3/fr

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/38—Response verification devices
    • G11C29/42—Response verification devices using error correcting codes [ECC] or parity check
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Detection And Correction Of Errors (AREA)
  • Debugging And Monitoring (AREA)

Abstract

Des modes de réalisation de l'invention concernent généralement l'amélioration de la fiabilité, de la disponibilité et de la facilité de maintenance d'un dispositif à mémoire. Dans certains modes de réalisation, un dispositif à mémoire comprend un noyau de mémoire possédant une première partie pour le stockage de bits de données et une seconde partie pour stockage de bits de code de correction d'erreur (ECC) correspondant aux bits de données. Le dispositif à mémoire peut également comprendre une logique de détection d'erreur sur la même puce que le noyau de mémoire. Dans certains modes de réalisation, la logique de correction d'erreur permet au dispositif à mémoire de calculer des bits ECC et de comparer les bits ECC avec les bits ECC calculés.
PCT/US2007/072295 2006-06-30 2007-06-27 Amélioration de la fiabilité, de la disponibilité et de la facilité de maintenance dans un dispositif à mémoire WO2008005781A2 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
AT07799113T ATE545910T1 (de) 2006-06-30 2007-06-27 Erhöhung der zuverlässigkeit, verfügbarkeit und zweckdienlichkeit einer speichervorrichtung
EP07799113A EP2035938B1 (fr) 2006-06-30 2007-06-27 Amélioration de la fiabilité, de la disponibilité et de la facilité de maintenance dans un dispositif à mémoire
KR1020087031500A KR101047241B1 (ko) 2006-06-30 2007-06-27 메모리 디바이스 및 메모리 디바이스의 신뢰성, 가용성 및 서비스능력을 개선하기 위한 방법 및 시스템
JP2009530716A JP5135348B2 (ja) 2006-06-30 2007-06-27 メモリ装置の信頼性、可用性、およびサービス性の改善

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/479,067 US7774684B2 (en) 2006-06-30 2006-06-30 Reliability, availability, and serviceability in a memory device
US11/479,067 2006-06-30

Publications (2)

Publication Number Publication Date
WO2008005781A2 WO2008005781A2 (fr) 2008-01-10
WO2008005781A3 true WO2008005781A3 (fr) 2008-03-06

Family

ID=38878338

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2007/072295 WO2008005781A2 (fr) 2006-06-30 2007-06-27 Amélioration de la fiabilité, de la disponibilité et de la facilité de maintenance dans un dispositif à mémoire

Country Status (8)

Country Link
US (2) US7774684B2 (fr)
EP (1) EP2035938B1 (fr)
JP (1) JP5135348B2 (fr)
KR (1) KR101047241B1 (fr)
CN (2) CN102394112B (fr)
AT (1) ATE545910T1 (fr)
TW (1) TWI343581B (fr)
WO (1) WO2008005781A2 (fr)

Families Citing this family (144)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100681429B1 (ko) * 2005-10-24 2007-02-15 삼성전자주식회사 반도체 메모리 장치 및 그것의 비트 에러 검출 방법
US7774684B2 (en) * 2006-06-30 2010-08-10 Intel Corporation Reliability, availability, and serviceability in a memory device
JP2008090451A (ja) * 2006-09-29 2008-04-17 Toshiba Corp 記憶装置
JP2008090433A (ja) * 2006-09-29 2008-04-17 Toshiba Corp メモリコントローラ、メモリシステム及びデータ転送方法
US7856588B2 (en) * 2006-10-19 2010-12-21 Hewlett-Packard Development Company, L.P. Data allocation in memory chips
JP4564520B2 (ja) * 2007-08-31 2010-10-20 株式会社東芝 半導体記憶装置およびその制御方法
US8621138B2 (en) 2007-12-27 2013-12-31 Sandisk Enterprise Ip Llc Flash storage controller execute loop
US7740488B2 (en) * 2008-01-17 2010-06-22 Amphenol Corporation Interposer assembly and method
US8161356B2 (en) * 2008-03-28 2012-04-17 Intel Corporation Systems, methods, and apparatuses to save memory self-refresh power
US8255783B2 (en) * 2008-04-23 2012-08-28 International Business Machines Corporation Apparatus, system and method for providing error protection for data-masking bits
US8321778B2 (en) * 2008-06-16 2012-11-27 Intel Corporation Efficient in-band reliability with separate cyclic redundancy code frames
US8196009B2 (en) 2008-06-18 2012-06-05 Intel Corporation Systems, methods, and apparatuses to transfer data and data mask bits in a common frame with a shared error bit code
US8103928B2 (en) * 2008-08-04 2012-01-24 Micron Technology, Inc. Multiple device apparatus, systems, and methods
KR20100096616A (ko) * 2009-02-25 2010-09-02 삼성전자주식회사 저항성 메모리 장치 및 저항성 메모리 장치에서의 입출력 제어 방법
US8307258B2 (en) * 2009-05-18 2012-11-06 Fusion-10, Inc Apparatus, system, and method for reconfiguring an array to operate with less storage elements
US8738995B2 (en) 2009-09-10 2014-05-27 Hewlett-Packard Development Company, L.P. Memory subsystem having a first portion to store data with error correction code information and a second portion to store data without error correction code information
US8612828B2 (en) * 2009-12-22 2013-12-17 Intel Corporation Error correction mechanisms for 8-bit memory devices
US8589766B2 (en) * 2010-02-24 2013-11-19 Apple Inc. Codeword remapping schemes for non-volatile memories
US8639964B2 (en) * 2010-03-17 2014-01-28 Dell Products L.P. Systems and methods for improving reliability and availability of an information handling system
US8365041B2 (en) 2010-03-17 2013-01-29 Sandisk Enterprise Ip Llc MLC self-raid flash data protection scheme
US8874958B2 (en) 2010-11-09 2014-10-28 International Business Machines Corporation Error detection in a mirrored data storage system
CN102203740B (zh) 2011-05-27 2013-06-05 华为技术有限公司 数据处理方法、装置及系统
US8732557B2 (en) * 2011-05-31 2014-05-20 Micron Technology, Inc. Data protection across multiple memory blocks
US8910020B2 (en) 2011-06-19 2014-12-09 Sandisk Enterprise Ip Llc Intelligent bit recovery for flash memory
US8909982B2 (en) 2011-06-19 2014-12-09 Sandisk Enterprise Ip Llc System and method for detecting copyback programming problems
US8527836B2 (en) * 2011-07-01 2013-09-03 Intel Corporation Rank-specific cyclic redundancy check
US8793543B2 (en) 2011-11-07 2014-07-29 Sandisk Enterprise Ip Llc Adaptive read comparison signal generation for memory systems
US8924815B2 (en) 2011-11-18 2014-12-30 Sandisk Enterprise Ip Llc Systems, methods and devices for decoding codewords having multiple parity segments
US9048876B2 (en) 2011-11-18 2015-06-02 Sandisk Enterprise Ip Llc Systems, methods and devices for multi-tiered error correction
US8954822B2 (en) 2011-11-18 2015-02-10 Sandisk Enterprise Ip Llc Data encoder and decoder using memory-specific parity-check matrix
US8707133B2 (en) 2011-12-05 2014-04-22 Lsi Corporation Method and apparatus to reduce a quantity of error detection/correction bits in memory coupled to a data-protected processor port
EP2672387B1 (fr) * 2012-06-04 2018-08-01 Amplidata NV Système de stockage d'objets distribués
US9699263B1 (en) 2012-08-17 2017-07-04 Sandisk Technologies Llc. Automatic read and write acceleration of data accessed by virtual machines
US9299400B2 (en) 2012-09-28 2016-03-29 Intel Corporation Distributed row hammer tracking
US9501398B2 (en) 2012-12-26 2016-11-22 Sandisk Technologies Llc Persistent storage device with NVRAM for staging writes
US9239751B1 (en) 2012-12-27 2016-01-19 Sandisk Enterprise Ip Llc Compressing data from multiple reads for error control management in memory systems
US9612948B2 (en) 2012-12-27 2017-04-04 Sandisk Technologies Llc Reads and writes between a contiguous data block and noncontiguous sets of logical address blocks in a persistent storage device
US9454420B1 (en) 2012-12-31 2016-09-27 Sandisk Technologies Llc Method and system of reading threshold voltage equalization
US9003264B1 (en) 2012-12-31 2015-04-07 Sandisk Enterprise Ip Llc Systems, methods, and devices for multi-dimensional flash RAID data protection
US9183082B2 (en) * 2013-01-29 2015-11-10 Qualcomm Incorporated Error detection and correction of one-time programmable elements
US9214965B2 (en) 2013-02-20 2015-12-15 Sandisk Enterprise Ip Llc Method and system for improving data integrity in non-volatile storage
US9329928B2 (en) 2013-02-20 2016-05-03 Sandisk Enterprise IP LLC. Bandwidth optimization in a non-volatile memory system
US9870830B1 (en) 2013-03-14 2018-01-16 Sandisk Technologies Llc Optimal multilevel sensing for reading data from a storage medium
US9009576B1 (en) 2013-03-15 2015-04-14 Sandisk Enterprise Ip Llc Adaptive LLR based on syndrome weight
US9244763B1 (en) 2013-03-15 2016-01-26 Sandisk Enterprise Ip Llc System and method for updating a reading threshold voltage based on symbol transition information
US9092350B1 (en) 2013-03-15 2015-07-28 Sandisk Enterprise Ip Llc Detection and handling of unbalanced errors in interleaved codewords
US9367246B2 (en) 2013-03-15 2016-06-14 Sandisk Technologies Inc. Performance optimization of data transfer for soft information generation
US9236886B1 (en) 2013-03-15 2016-01-12 Sandisk Enterprise Ip Llc Universal and reconfigurable QC-LDPC encoder
US9136877B1 (en) 2013-03-15 2015-09-15 Sandisk Enterprise Ip Llc Syndrome layered decoding for LDPC codes
US9170941B2 (en) 2013-04-05 2015-10-27 Sandisk Enterprises IP LLC Data hardening in a storage system
US10049037B2 (en) 2013-04-05 2018-08-14 Sandisk Enterprise Ip Llc Data management in a storage system
US9021334B2 (en) * 2013-05-01 2015-04-28 Apple Inc. Calculation of analog memory cell readout parameters using code words stored over multiple memory dies
CN104184543B (zh) * 2013-05-24 2018-10-30 华为技术有限公司 一种数据传输的方法、装置和系统
US9159437B2 (en) 2013-06-11 2015-10-13 Sandisk Enterprise IP LLC. Device and method for resolving an LM flag issue
US10031802B2 (en) * 2013-06-28 2018-07-24 Intel Corporation Embedded ECC address mapping
US9384126B1 (en) 2013-07-25 2016-07-05 Sandisk Technologies Inc. Methods and systems to avoid false negative results in bloom filters implemented in non-volatile data storage systems
US9043517B1 (en) 2013-07-25 2015-05-26 Sandisk Enterprise Ip Llc Multipass programming in buffers implemented in non-volatile data storage systems
US9524235B1 (en) 2013-07-25 2016-12-20 Sandisk Technologies Llc Local hash value generation in non-volatile data storage systems
US9235509B1 (en) 2013-08-26 2016-01-12 Sandisk Enterprise Ip Llc Write amplification reduction by delaying read access to data written during garbage collection
US9639463B1 (en) 2013-08-26 2017-05-02 Sandisk Technologies Llc Heuristic aware garbage collection scheme in storage systems
US9519577B2 (en) 2013-09-03 2016-12-13 Sandisk Technologies Llc Method and system for migrating data between flash memory devices
US9442670B2 (en) 2013-09-03 2016-09-13 Sandisk Technologies Llc Method and system for rebalancing data stored in flash memory devices
US9934143B2 (en) 2013-09-26 2018-04-03 Intel Corporation Mapping a physical address differently to different memory devices in a group
US9158349B2 (en) 2013-10-04 2015-10-13 Sandisk Enterprise Ip Llc System and method for heat dissipation
US9323637B2 (en) 2013-10-07 2016-04-26 Sandisk Enterprise Ip Llc Power sequencing and data hardening architecture
US9213595B2 (en) * 2013-10-15 2015-12-15 International Business Machines Corporation Handling errors in ternary content addressable memories
US9298608B2 (en) 2013-10-18 2016-03-29 Sandisk Enterprise Ip Llc Biasing for wear leveling in storage systems
US9442662B2 (en) 2013-10-18 2016-09-13 Sandisk Technologies Llc Device and method for managing die groups
US9436831B2 (en) 2013-10-30 2016-09-06 Sandisk Technologies Llc Secure erase in a memory device
US9263156B2 (en) 2013-11-07 2016-02-16 Sandisk Enterprise Ip Llc System and method for adjusting trip points within a storage device
US9244785B2 (en) 2013-11-13 2016-01-26 Sandisk Enterprise Ip Llc Simulated power failure and data hardening
US9152555B2 (en) 2013-11-15 2015-10-06 Sandisk Enterprise IP LLC. Data management with modular erase in a data storage system
US9703816B2 (en) 2013-11-19 2017-07-11 Sandisk Technologies Llc Method and system for forward reference logging in a persistent datastore
US9520197B2 (en) 2013-11-22 2016-12-13 Sandisk Technologies Llc Adaptive erase of a storage device
US9122636B2 (en) 2013-11-27 2015-09-01 Sandisk Enterprise Ip Llc Hard power fail architecture
US9280429B2 (en) 2013-11-27 2016-03-08 Sandisk Enterprise Ip Llc Power fail latching based on monitoring multiple power supply voltages in a storage device
US9520162B2 (en) 2013-11-27 2016-12-13 Sandisk Technologies Llc DIMM device controller supervisor
US10073731B2 (en) * 2013-11-27 2018-09-11 Intel Corporation Error correction in memory
US9250676B2 (en) 2013-11-29 2016-02-02 Sandisk Enterprise Ip Llc Power failure architecture and verification
US9582058B2 (en) 2013-11-29 2017-02-28 Sandisk Technologies Llc Power inrush management of storage devices
US9092370B2 (en) 2013-12-03 2015-07-28 Sandisk Enterprise Ip Llc Power failure tolerant cryptographic erase
US9235245B2 (en) 2013-12-04 2016-01-12 Sandisk Enterprise Ip Llc Startup performance and power isolation
US9129665B2 (en) 2013-12-17 2015-09-08 Sandisk Enterprise Ip Llc Dynamic brownout adjustment in a storage device
US9798620B2 (en) 2014-02-06 2017-10-24 Sandisk Technologies Llc Systems and methods for non-blocking solid-state memory
US9549457B2 (en) 2014-02-12 2017-01-17 Sandisk Technologies Llc System and method for redirecting airflow across an electronic assembly
US9497889B2 (en) 2014-02-27 2016-11-15 Sandisk Technologies Llc Heat dissipation for substrate assemblies
US9703636B2 (en) 2014-03-01 2017-07-11 Sandisk Technologies Llc Firmware reversion trigger and control
US9485851B2 (en) 2014-03-14 2016-11-01 Sandisk Technologies Llc Thermal tube assembly structures
US9519319B2 (en) 2014-03-14 2016-12-13 Sandisk Technologies Llc Self-supporting thermal tube structure for electronic assemblies
US9348377B2 (en) 2014-03-14 2016-05-24 Sandisk Enterprise Ip Llc Thermal isolation techniques
US9448876B2 (en) 2014-03-19 2016-09-20 Sandisk Technologies Llc Fault detection and prediction in storage devices
US9390814B2 (en) 2014-03-19 2016-07-12 Sandisk Technologies Llc Fault detection and prediction for data storage elements
US9454448B2 (en) 2014-03-19 2016-09-27 Sandisk Technologies Llc Fault testing in storage devices
US9626400B2 (en) 2014-03-31 2017-04-18 Sandisk Technologies Llc Compaction of information in tiered data structure
US9390021B2 (en) 2014-03-31 2016-07-12 Sandisk Technologies Llc Efficient cache utilization in a tiered data structure
US9626399B2 (en) 2014-03-31 2017-04-18 Sandisk Technologies Llc Conditional updates for reducing frequency of data modification operations
US9697267B2 (en) 2014-04-03 2017-07-04 Sandisk Technologies Llc Methods and systems for performing efficient snapshots in tiered data structures
US9093160B1 (en) 2014-05-30 2015-07-28 Sandisk Technologies Inc. Methods and systems for staggered memory operations
US10114557B2 (en) 2014-05-30 2018-10-30 Sandisk Technologies Llc Identification of hot regions to enhance performance and endurance of a non-volatile storage device
US10146448B2 (en) 2014-05-30 2018-12-04 Sandisk Technologies Llc Using history of I/O sequences to trigger cached read ahead in a non-volatile storage device
US9703491B2 (en) 2014-05-30 2017-07-11 Sandisk Technologies Llc Using history of unaligned writes to cache data and avoid read-modify-writes in a non-volatile storage device
US10656840B2 (en) 2014-05-30 2020-05-19 Sandisk Technologies Llc Real-time I/O pattern recognition to enhance performance and endurance of a storage device
US10372613B2 (en) 2014-05-30 2019-08-06 Sandisk Technologies Llc Using sub-region I/O history to cache repeatedly accessed sub-regions in a non-volatile storage device
US9645749B2 (en) 2014-05-30 2017-05-09 Sandisk Technologies Llc Method and system for recharacterizing the storage density of a memory device or a portion thereof
US8891303B1 (en) 2014-05-30 2014-11-18 Sandisk Technologies Inc. Method and system for dynamic word line based configuration of a three-dimensional memory device
US10656842B2 (en) 2014-05-30 2020-05-19 Sandisk Technologies Llc Using history of I/O sizes and I/O sequences to trigger coalesced writes in a non-volatile storage device
US9070481B1 (en) 2014-05-30 2015-06-30 Sandisk Technologies Inc. Internal current measurement for age measurements
US10162748B2 (en) 2014-05-30 2018-12-25 Sandisk Technologies Llc Prioritizing garbage collection and block allocation based on I/O history for logical address regions
US9652381B2 (en) 2014-06-19 2017-05-16 Sandisk Technologies Llc Sub-block garbage collection
KR102204391B1 (ko) 2014-08-18 2021-01-18 삼성전자주식회사 공유 가능한 ecc 셀 어레이를 갖는 메모리 장치
US10002044B2 (en) * 2014-08-19 2018-06-19 Samsung Electronics Co., Ltd. Memory devices and modules
US9443601B2 (en) 2014-09-08 2016-09-13 Sandisk Technologies Llc Holdup capacitor energy harvesting
US9558066B2 (en) * 2014-09-26 2017-01-31 Intel Corporation Exchanging ECC metadata between memory and host system
US9811420B2 (en) * 2015-03-27 2017-11-07 Intel Corporation Extracting selective information from on-die dynamic random access memory (DRAM) error correction code (ECC)
US10061645B2 (en) * 2015-06-30 2018-08-28 Qualcomm Incorporated Memory array and link error correction in a low power memory sub-system
ITUB20153367A1 (it) * 2015-09-03 2017-03-03 St Microelectronics Srl Procedimento per la gestione di memorie, dispositivo ed apparecchiatura corrispondenti
US9692455B2 (en) * 2015-09-11 2017-06-27 Micron Technology, Inc. Multi channel memory with flexible code-length ECC
US10140175B2 (en) * 2015-11-20 2018-11-27 Qualcomm Incorporated Protecting an ECC location when transmitting correction data across a memory link
US9965352B2 (en) * 2015-11-20 2018-05-08 Qualcomm Incorporated Separate link and array error correction in a memory system
US9952925B2 (en) * 2016-01-06 2018-04-24 Micron Technology, Inc. Error code calculation on sensing circuitry
US10872011B2 (en) * 2016-05-02 2020-12-22 Intel Corporation Internal error checking and correction (ECC) with extra system bits
KR102498208B1 (ko) 2016-06-07 2023-02-10 삼성전자주식회사 여분의 용량을 포함하는 메모리 장치 및 이를 포함하는 적층 메모리 장치
US10169126B2 (en) * 2016-10-12 2019-01-01 Samsung Electronics Co., Ltd. Memory module, memory controller and systems responsive to memory chip read fail information and related methods of operation
KR102766654B1 (ko) * 2016-11-16 2025-02-12 에스케이하이닉스 주식회사 반도체장치 및 반도체시스템
US10705912B2 (en) 2017-06-07 2020-07-07 Rambus Inc. Energy efficient storage of error-correction-detection information
US10387242B2 (en) 2017-08-21 2019-08-20 Qualcomm Incorporated Dynamic link error protection in memory systems
US10606690B2 (en) * 2017-09-29 2020-03-31 Intel Corporation Memory controller error checking process using internal memory device codes
JP7182373B2 (ja) * 2018-04-24 2022-12-02 ラピスセミコンダクタ株式会社 半導体集積回路、記憶装置及びエラー訂正方法
US11265022B2 (en) 2018-05-18 2022-03-01 SK Hynix Inc. Memory system and operating method thereof
KR20190132237A (ko) * 2018-05-18 2019-11-27 에스케이하이닉스 주식회사 메모리 시스템 및 메모리 시스템의 동작 방법
KR20190132238A (ko) 2018-05-18 2019-11-27 에스케이하이닉스 주식회사 메모리 시스템 및 메모리 시스템의 동작 방법
US10957413B2 (en) * 2018-10-31 2021-03-23 Micron Technology, Inc. Shared error check and correct logic for multiple data banks
US11514174B2 (en) 2019-01-23 2022-11-29 Micron Technology, Inc. Memory devices with cryptographic components
US11023320B2 (en) * 2019-04-04 2021-06-01 Intel Corporation Technologies for providing multiple levels of error correction
TWI703572B (zh) * 2019-06-06 2020-09-01 華邦電子股份有限公司 記憶體儲存裝置及其記憶體測試方法
US11237903B2 (en) * 2019-06-25 2022-02-01 Intel Corporation Technologies for providing ECC pre-provisioning and handling for cross-point memory and compute operations
US10762977B1 (en) 2019-07-22 2020-09-01 Winbond Electronics Corp. Memory storage device and memory testing method thereof
US11294766B2 (en) 2019-08-13 2022-04-05 Micron Technology, Inc. Coordinated error correction
US11099929B2 (en) * 2019-12-17 2021-08-24 Micron Technology, Inc. Separating parity data from host data in a memory sub-system
KR20210147132A (ko) 2020-05-27 2021-12-07 삼성전자주식회사 메모리 장치 및 메모리 장치를 포함하는 메모리 모듈
EP4200702B1 (fr) * 2020-09-14 2024-05-29 Huawei Technologies Co., Ltd. Vérification résistante aux fautes
US12210456B2 (en) 2021-03-26 2025-01-28 Intel Corporation Dynamic random access memory (DRAM) with scalable meta data
US20220318603A1 (en) * 2021-03-31 2022-10-06 International Business Machines Corporation Nvm-based high-capacity neural network inference engine
US12190981B2 (en) 2022-07-18 2025-01-07 Winbond Electronics Corp. Memory array having error checking and correction circuit

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5134616A (en) * 1990-02-13 1992-07-28 International Business Machines Corporation Dynamic ram with on-chip ecc and optimized bit and word redundancy
US20030041299A1 (en) * 2001-08-23 2003-02-27 Fujitsu Limited Memory controller for multilevel cell memory
US6957377B2 (en) * 2001-01-25 2005-10-18 Fujitsu Limited Marking of and searching for initial defective blocks in semiconductor memory
US20060120166A1 (en) * 2004-11-16 2006-06-08 Samsung Electronics Co., Ltd. Data processing apparatus and method for flash memory

Family Cites Families (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US692900A (en) * 1901-08-28 1902-02-11 Elihu Thomson Mechanism for operating motion-checking devices.
US4319356A (en) * 1979-12-19 1982-03-09 Ncr Corporation Self-correcting memory system
JPS61192100A (ja) * 1985-02-20 1986-08-26 Mitsubishi Electric Corp 半導体記憶装置
JPS61217999A (ja) * 1985-03-25 1986-09-27 Toshiba Corp 半導体メモリ
JPH03162800A (ja) * 1989-08-29 1991-07-12 Mitsubishi Electric Corp 半導体メモリ装置
JPH04282736A (ja) * 1991-03-12 1992-10-07 Hitachi Ltd 半導体記憶装置のロード及びアンロード方式
JPH06250935A (ja) * 1993-02-24 1994-09-09 Fujitsu Ltd 半導体メモリ装置
US5896404A (en) * 1997-04-04 1999-04-20 International Business Machines Corporation Programmable burst length DRAM
KR100266748B1 (ko) 1997-12-31 2000-10-02 윤종용 반도체 메모리 장치 및 그 장치의 에러 정정 방법
KR100287018B1 (ko) * 1998-08-07 2001-04-16 윤종용 에러 정정 회로를 구비한 반도체 메모리 장치
US6038693A (en) * 1998-09-23 2000-03-14 Intel Corporation Error correction scheme for an integrated L2 cache
JP2002023966A (ja) * 2000-06-30 2002-01-25 Toshiba Corp 転送データを冗長化したディスクシステム
US7117420B1 (en) * 2001-05-17 2006-10-03 Lsi Logic Corporation Construction of an optimized SEC-DED code and logic for soft errors in semiconductor memories
US7117421B1 (en) * 2002-05-31 2006-10-03 Nvidia Corporation Transparent error correction code memory system and method
US7043679B1 (en) * 2002-06-27 2006-05-09 Advanced Micro Devices, Inc. Piggybacking of ECC corrections behind loads
US7043579B2 (en) * 2002-12-05 2006-05-09 International Business Machines Corporation Ring-topology based multiprocessor data access bus
US7219294B2 (en) 2003-11-14 2007-05-15 Intel Corporation Early CRC delivery for partial frame
JP2005203064A (ja) * 2004-01-19 2005-07-28 Toshiba Corp 半導体記憶装置
JP4102313B2 (ja) * 2004-02-05 2008-06-18 株式会社東芝 半導体集積回路装置
JP2005327437A (ja) * 2004-04-12 2005-11-24 Nec Electronics Corp 半導体記憶装置
JP2005310313A (ja) * 2004-04-23 2005-11-04 Toshiba Corp 半導体記憶装置
JP2006004560A (ja) * 2004-06-18 2006-01-05 Elpida Memory Inc 半導体記憶装置及びその誤り訂正方法
KR100634414B1 (ko) * 2004-09-06 2006-10-16 삼성전자주식회사 에러 검출용 패러티 발생기를 구비한 낸드 플래시 메모리 장치 및 그것의 에러 검출 방법
US7409623B2 (en) * 2004-11-04 2008-08-05 Sigmatel, Inc. System and method of reading non-volatile computer memory
JP4802515B2 (ja) * 2005-03-01 2011-10-26 株式会社日立製作所 半導体装置
ITMI20050780A1 (it) * 2005-04-29 2006-10-30 St Microelectronics Srl Metodo di memorizzazione di un array di celle di memoria non-volatile con codice di correzione di errore e relativo dispositivo
US7650558B2 (en) 2005-08-16 2010-01-19 Intel Corporation Systems, methods, and apparatuses for using the same memory type for both error check and non-error check memory systems
US7328384B1 (en) * 2005-09-29 2008-02-05 Xilinx, Inc. Method and apparatus using device defects as an identifier
US7221615B2 (en) * 2005-10-04 2007-05-22 Infineon Technologies Ag Semiconductor memory chip
KR100681429B1 (ko) * 2005-10-24 2007-02-15 삼성전자주식회사 반도체 메모리 장치 및 그것의 비트 에러 검출 방법
US7447948B2 (en) * 2005-11-21 2008-11-04 Intel Corporation ECC coding for high speed implementation
US7734985B2 (en) * 2006-02-27 2010-06-08 Intel Corporation Systems, methods, and apparatuses for using the same memory type to support an error check mode and a non-error check mode
US7774684B2 (en) * 2006-06-30 2010-08-10 Intel Corporation Reliability, availability, and serviceability in a memory device
US8136016B1 (en) * 2007-11-08 2012-03-13 Marvell International Ltd. Split sector recovery method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5134616A (en) * 1990-02-13 1992-07-28 International Business Machines Corporation Dynamic ram with on-chip ecc and optimized bit and word redundancy
US6957377B2 (en) * 2001-01-25 2005-10-18 Fujitsu Limited Marking of and searching for initial defective blocks in semiconductor memory
US20030041299A1 (en) * 2001-08-23 2003-02-27 Fujitsu Limited Memory controller for multilevel cell memory
US20060120166A1 (en) * 2004-11-16 2006-06-08 Samsung Electronics Co., Ltd. Data processing apparatus and method for flash memory

Also Published As

Publication number Publication date
TW200809867A (en) 2008-02-16
EP2035938B1 (fr) 2012-02-15
US20100262889A1 (en) 2010-10-14
JP2009540477A (ja) 2009-11-19
KR101047241B1 (ko) 2011-07-06
US8806298B2 (en) 2014-08-12
CN101097784B (zh) 2011-11-09
EP2035938A4 (fr) 2010-08-04
CN102394112B (zh) 2014-11-12
ATE545910T1 (de) 2012-03-15
US20080005646A1 (en) 2008-01-03
CN102394112A (zh) 2012-03-28
EP2035938A2 (fr) 2009-03-18
KR20090016604A (ko) 2009-02-16
JP5135348B2 (ja) 2013-02-06
CN101097784A (zh) 2008-01-02
US7774684B2 (en) 2010-08-10
TWI343581B (en) 2011-06-11
WO2008005781A2 (fr) 2008-01-10

Similar Documents

Publication Publication Date Title
WO2008005781A3 (fr) Amélioration de la fiabilité, de la disponibilité et de la facilité de maintenance dans un dispositif à mémoire
WO2007136447A3 (fr) Système et procédé de correction d'erreur de mémoire non volatile
WO2010078167A3 (fr) Correction d'erreur améliorée dans un disque ssd
WO2010080257A3 (fr) Reprise sur erreur de données dans une mémoire non volatile
WO2008053472A3 (fr) Lecture de cellules de mémoire à l'aide de seuils multiples
WO2010062655A3 (fr) Correction d'erreur dans les unités de mémoire semi-conductrices multiples
WO2008086237A3 (fr) Codes destinés à des erreurs asymétriques à intensité limitée dans des mémoires flash
WO2007036800A3 (fr) Procede et appareil de gestion d'erreurs
WO2008004226A3 (fr) Procédé de correction d'erreur dans une mémoire flash multi-bits-par-cellule
WO2007046084A3 (fr) Correction d'erreur probabiliste dans une memoire flash a bits multiples par cellule
WO2007036834A3 (fr) Circuit de detection/correction d'erreurs et procede associe
TW200943300A (en) Memory system and method for providing error correction
WO2009055293A3 (fr) Procédé pour déterminer l'état de présence d'un utilisateur final associé à de multiples terminaux d'accès
WO2007133963A3 (fr) Mémoire non volatile à codage de convolution
WO2011041047A3 (fr) Gestion de données et de mémoire d'agent mère
WO2007010189A3 (fr) Correction d'erreurs flash
ATE502333T1 (de) Verlässlichkeits-, zuverlässigkeits- und dienstbarkeitslösungen für die speichertechnologie
WO2008021045A3 (fr) Système et procédé pour corriger des erreurs dans une mémoire rémanente en utilisant des codes de produits
WO2009069628A1 (fr) Dispositif et procédé de traitement de données
ATE492072T1 (de) Fehlerschutz für gruppen von datenwörtern
WO2009002999A3 (fr) Présentation de contenu à une installation de communication mobile basée sur des données de contexte et de comportement relatives à une partie d'un contenu mobile
WO2005048098A3 (fr) Procede et appareil pour la composition logicielle
TW200710653A (en) Memory device
ATE506649T1 (de) Korrektur von fehlern in einem speicherarray
WO2013085670A3 (fr) Correction d'erreur améliorée dans des dispositifs de mémoire

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 2007799113

Country of ref document: EP

ENP Entry into the national phase

Ref document number: 2009530716

Country of ref document: JP

Kind code of ref document: A

WWE Wipo information: entry into national phase

Ref document number: 1020087031500

Country of ref document: KR

NENP Non-entry into the national phase

Ref country code: DE

NENP Non-entry into the national phase

Ref country code: RU

点击 这是indexloc提供的php浏览器服务，不要输入任何密码和下载