WO2006033151A1

WO2006033151A1 - Wireless receiver and digital demodulating method

Info

Publication number: WO2006033151A1
Application number: PCT/JP2004/013921
Authority: WO
Inventors: Toshiaki Funakubo
Original assignee: Fujitsu Limited
Priority date: 2004-09-24
Filing date: 2004-09-24
Publication date: 2006-03-30
Also published as: JP4382095B2; JPWO2006033151A1

Abstract

In a wireless receiver, an A/D converter (11) A/D converts an antenna input signal at a sampling rate of N·fs, and a DEMUX part (12) demultiplexes N A/D conversion outputs. Each of N quadrature demodulators (13a-13N), in which the carrier phase is shifted by 1/N·fs, uses the thus phase-shifted carrier to digital quadrature demodulate the respective one of the N DEMUX output data. A section averaging part averages the results of the digital quadrature demodulations to output a section average value for an under-sampling rate of fs. A band limit filter limits the band of the output signals of the section averaging part to input the thus limited output signals to a baseband processing part.

Description

Specification

Wireless receiver and digital demodulation method

Technical field

The present invention relates to a radio receiver and a digital demodulation method thereof, and more particularly to a radio receiver and a digital demodulation method provided with a digital demodulator that directly digitally demodulates a radio frequency signal in order to reduce the size of the radio receiver. .

Background art

In order to reduce the size of a multicarrier receiver, a direct RF demodulation method, a multicarrier collective demodulation method, and the like have been proposed. Figure 4 is a block diagram of the direct RF demodulation method. The AD converter 101 samples the antenna input signal of the RF frequency fo at the sampling frequency fs which is the same frequency as the RF frequency and performs AD conversion. The digital demodulator 102 uses a sin carrier (= sin2 π fo X (kZfs )) And cos carrier (= cos2 π fo X (kZfs)) discrete data are sequentially generated with period lZfs (k = 0, 1, 2...), And these are multiplied by the AD conversion output signal, respectively. In-phase component (Ich signal) and quadrature component (Qch signal) are output. The Ich and Qch root roll-off filters 103 and 104 limit the bandwidth of the Ich signal and the Qch signal and add predetermined characteristics to the baseband processing unit 105, respectively. The baseband processing unit 105 performs processing such as demodulation and decoding on the input signal. Note that Fig. 4 shows a configuration corresponding to only one wave of the RF frequency fo. In order to cope with force multi-carrier fo-fn, an orthogonal unit 102-baseband processing unit 105 is provided corresponding to the carrier, and AD conversion is performed. Connected in parallel to the output of the device 101.

[0003] In this direct RF demodulation method, as described above, the AD conversion rate and the processing speed of the digital section are equivalent to the RF frequency. For this reason, the device performance is limited, and systems with RF frequencies of several hundred MHz or less can be realized, and cannot be used for radio receivers beyond that. For example, when the direct RF demodulation method is applied to a radio system in the GHz band, the conversion rate of AD conversion and the operation speed of the digital quadrature demodulation unit must also be in the GHz class, which is difficult to realize with current devices. It is. Regarding AD converters, GHz-class devices have been released in recent years.ASIC and FPGA (Field Programmable The operating speed of LSIs (such as Gate Array) is generally several hundred MHz, and cannot be applied to wireless systems beyond that.

Therefore, when sampling data with an AD converter, an undersampling method may be considered in which undersampling is performed with a clock having a frequency that is larger than the baseband rate of the modulation signal but smaller than the RF frequency, and digitally converted. However, undersampling simply with a low clock frequency is affected by the jitter of the sampling clock at the RF frequency, so the clock purity needs to be (radio frequency Z clock frequency) times as high as normal. This method is also difficult to realize.

[0004] On the other hand, the multi-carrier collective demodulation method is a method in which the RF frequency of the antenna input signal is down-converted to an intermediate frequency and then AD conversion is performed, and quadrature demodulation processing is performed on the AD conversion output. Fig. 5 is a block diagram of the multi-carrier simultaneous demodulation method. The mixer 201 mixes the antenna reception signal of the RF frequency fo—fc with the frequency (fo + fc) / 2−f output from the local oscillator 202 to the intermediate frequency. The low pass filter 203 generates high frequency components.

IF

Cut and input to AD Transform 204. AD transformation 204 has a sampling frequency of f / n.

IF

The intermediate frequency signal is sampled and converted to digital, and input to the receiving circuits 205a to 205η corresponding to each carrier. The receiving circuits 205a to 205m have the same configuration except that the orthogonal demodulation unit has a different carrier frequency.

[0005] In the receiving circuit 205a, the digital demodulator 206a converts the discrete data of the sin carrier wave (= sin2wfoX (k / fs)) and the cos carrier wave (= cos2πfoX (k / fs)) to the period lZfs.

Are sequentially generated (k = 0, 1, 2...) And multiplied by the AD conversion output signal to output the in-phase component (Ich signal) and quadrature component (Qch signal). The Ich and Qch root roll-off filters 207a and 208a limit the bandwidth of the Ich signal and the Qch signal, add predetermined characteristics to each, and input to the baseband processing unit 209a. The baseband processing unit 209a performs processing such as demodulation and decoding on the input signal.

In the receiving circuit 205m, the digital demodulator 206111 sequentially generates discrete data of 3 carrier waves (= 3 2 兀; ^ (k / fs)) and cos carrier waves (= cos2 π fc X (k / fs)) with a period of lZfs. The AD conversion output signal is then multiplied to output the in-phase component (Ich signal) and quadrature component (Qch signal). Root roll-off filter for Ich and Qch 207m and 208m are Ich signal and Qch signal Are added to the baseband processing unit 209 m with predetermined characteristics added thereto. The baseband processing unit 209m performs processing such as demodulation and decoding on the input signal. The digital receiver has also been proposed in which the RF frequency of the antenna input signal is down-converted to an intermediate frequency for a single wave, which is the case of multicarrier, and then AD conversion is performed, and the AD conversion output is subjected to quadrature demodulation processing. (See Patent Document 1).

[0006] In recent years, software defined radio has been proposed, and the goal is to realize different radio systems with the same hardware. In other words, the goal is to make the hardware the same so that the software can be applied to different wireless systems simply by changing the configuration data. However, the multi-carrier simultaneous demodulation method of FIG. 5 requires analog down converters (201, 202), and the receivable frequency band is determined by the oscillation frequency of the local oscillation signal output from the local oscillator 202. For this reason, application to a system with a different receivable frequency band requires a change of the local oscillator 202, and there is a problem that software radio cannot be realized.

In view of the above, an object of the present invention is to reduce the analog portion, in particular, not to use an analog down converter and to realize a software wireless interface. Another object of the present invention is to obtain a highly accurate quadrature demodulation result without requiring a highly accurate clock purity as in the prior art.

Patent Document 1: JP-A-8-162990

Disclosure of the invention

[0007] According to the present invention, the above-described problem is achieved by a radio receiver and a digital demodulator that directly AD-convert an antenna input signal and perform orthogonal demodulation and band limitation using the conversion result. The digital demodulator of the present invention uses N antenna input signals sampled at a sampling frequency N′fs (N is an integer of 2 or more) lower than the antenna input signal frequency and higher than a predetermined undersampling rate fs. A demax unit that holds and outputs at the rate fs, a digital quadrature demodulation unit that shifts the phase of the carrier wave by lZN'fs, and performs digital quadrature demodulation processing on each of the N pieces of data using a carrier wave that is shifted in phase, N An interval averaging unit is provided that averages the digital quadrature demodulation results and outputs the interval average value for each undersampling rate fs. The wireless receiver of the present invention samples an antenna input signal at a predetermined sampling rate N′fs and performs AD conversion, and holds N AD converter outputs at an undersampling rate fs. Output demultiplexer, shift carrier phase by lZN'fs, perform digital quadrature demodulation on each of the N data using carrier waves shifted in phase Digital quadrature demodulator, average N digital quadrature demodulation results Section average unit that outputs the section average value for each undersampling rate fs, band limit filter section that limits the band of the output signal of the section average section, and baseband processing section that performs baseband processing on the band limit filter output It is equipped with. When the antenna input signal is a multicarrier signal, the radio receiver of the present invention includes at least a digital quadrature demodulation unit, a section average unit, and a band limiting filter unit for each multicarrier carrier. Demodulate and process the signal sent by each carrier

To do.

[0009] According to the present invention, the above object is achieved by a reception method and a digital demodulation method of a wireless receiver that directly AD converts an antenna input signal and performs orthogonal demodulation and band limitation using the conversion result. In the digital demodulation method of the present invention, N antenna input signals sampled at a sampling frequency N'fs (N is an integer of 2 or more) lower than the antenna input signal frequency and higher than the under sampling rate fs are set at the under sampling rate fs. The step of saving, shifting the phase of the carrier wave by lZN'fs, using the carrier wave whose phase is shifted by V, performing digital quadrature demodulation on each of the N pieces of data, and averaging each digital quadrature demodulation result And a step of outputting an average value of the section for each undersampling rate fs.

In the receiving method of the present invention, the antenna input signal is sampled and AD converted at a predetermined sampling rate N′fs, and the outputs of the N AD converters are shifted at the sampling rate N · fs and the undersampling rate fs. The step of storing in step 1, shifting the carrier phase by 1 ZN'fs, performing digital quadrature demodulation on each of the N pieces of data using carriers shifted in phase, and averaging each digital quadrature demodulation result The step of outputting the average value of the section at each undersampling rate fs, the step of limiting the band of the output signal of the section average section, and baseband processing on the band-limited signal. Have a step to apply!

According to the present invention, it is possible to reduce the analog portion, in particular, not to use the analog down converter, and to reduce the size of the radio receiver. In addition, since it is possible not to use an analog down converter, according to the present invention, the software of the wireless processing unit can be realized. Further, according to the present invention, it is possible to obtain a quadrature demodulation result with high accuracy without requiring high-accuracy clock purity as in the prior art.

Brief Description of Drawings

FIG. 1 is a block diagram of a wireless receiver according to the present invention.

FIG. 2 is a configuration diagram of a quadrature demodulator.

FIG. 3 is a configuration diagram of a radio receiver of the present invention that can be applied when an antenna input signal is a multicarrier signal.

FIG. 4 is a block diagram of a direct RF demodulation method.

FIG. 5 is a configuration diagram of a multicarrier collective demodulation method.

BEST MODE FOR CARRYING OUT THE INVENTION

[0011] (1) Outline of the present invention

In the wireless receiver of the present invention, the AD converter samples and converts the antenna input signal at a predetermined sampling rate N'fs (fs is an undersampling rate larger than the baseband rate), and converts the AD into N pieces of demultiplexing parts. Shift AD output at sampling rate N · fs and save at undersampling rate fs. The digital quadrature demodulator includes N quadrature demodulators whose carrier phases are shifted by lZN'fs, and each quadrature demodulator uses a carrier whose phase is shifted to each of the N pieces of data. Quadrature demodulation is performed, and the interval average unit averages the results of digital orthogonal demodulation and outputs the interval average value for each undersampling rate fs. A band limiting filter (or a loop-off filter) limits the band of the output signal of the section average part and inputs it to the baseband processing part, and the baseband processing part performs baseband processing on the band-limited signal.

In the digital demodulator of the present invention, the demux portion has a predetermined frequency lower than the RF frequency.

Sampling rate N'fs (N is an integer greater than or equal to 2) The N-pulled antenna input signals are held and output at the undersampling rate fs, and the quadrature demodulator shifts the phase of the carrier wave by lZN 'fs, and uses each carrier wave with shifted phases. The digital quadrature demodulation process is applied to the data, and the interval average unit averages the results of each digital orthogonal demodulation and outputs the interval average value for each undersampling rate fs.

[0012] (2) First embodiment

(A) Configuration of wireless receiver

FIG. 1 is a block diagram of the radio receiver of the first embodiment. The AD converter 11 performs AD conversion by undersampling the antenna input signal of the RF frequency fo at a predetermined sampling rate N'fs (fs is an undersampling rate larger than the baseband rate, N is an integer of 2 or more). Demax 12 is composed of flip-flops FF1—FF1 connected in series.

1 N shift section 12a and holding section 12b composed of flip-flops FF2-FF2

1 N

ing. The shift unit 12a shifts the N data output from the AD conversion in the flip-flops FF1-FF1 at the sampling rate N-fs, and the holding unit 12b

1 N

Flip-flop FF1—FF1 contents at flip-flop FF2—F

1 N 1

Save to F2 and output.

N

The digital quadrature demodulator 13 includes N quadrature demodulators 13a to 13N whose carrier phases are shifted by 1ZN · fs, and each quadrature demodulator outputs from the demultiplexer 12 using each carrier whose phase is shifted. The N pieces of data are subjected to digital quadrature demodulation and output.

FIG. 2 is a configuration diagram of one quadrature demodulator 13a, which includes a cos memory 31, a sin memory 32, and two multipliers 33 and 34. The cos memory 31 stores discrete data ( _{= cos (} a.k ₎₎ k = ₀ , 1, 2,..., obtained by sampling a cos carrier wave (= cos2πfo) at a period of lZN′fs. However, α = 2 π ίοΖΝ · ί _δ . The 3 memory 32 stores discrete data (= 3 (0;), k = 0, 1, 2,...) Obtained by sampling 3 carriers (= 3 2 3) with a period of 1 /? ^ 3. Each of the multipliers 33 and 34 demultiplexes the cos carrier wave and sin carrier discrete data COS (Q; -k) and sin (a * k) sequentially output from the memories 31 and 32 with the period lZN 'fs. The in-phase component (Ich signal) and quadrature component (Qch signal) are output by multiplying the output data. Other quadrature demodulation The power cos memory 31 and the sin memory 32 can be configured in the same manner.

[0014] From the above, the quadrature demodulator 13a also starts the address power of k = 0, and thereafter increments k every period lZN'fs to _store discrete data _C0S (Q; 'k), sh a _.k ) in the memory 31, 32 Is read out and input to multipliers 33 and 34. Multipliers 33 and 34 multiply discrete data cos o; -k), sin (a, k) by the first output data of demath unit 12, and in-phase component (Ich signal), quadrature component (Qch signal) Is output.

The quadrature demodulator 13b also starts the addressing power of k = l, then increments k every period lZN'fs and reads the discrete data cos (Q; 'k), sh a' k) from the memory 31, 32 and multiply Input to devices 33 and 34. Multipliers 33 and 34 multiply the second output data of demax section 1 2 by the discrete data COS (Q; -k), sin (a, k), and in-phase component (Ich signal), quadrature component (Qch signal) ) Is output. That is, the quadrature demodulator 13b performs digital quadrature demodulation on the second data output from the demux unit 12 using a carrier whose phase is shifted by 1ZN / fs from the carrier of the quadrature demodulator 13a, and outputs the second data.

Similarly, the quadrature demodulator 13N also starts addressing power of k = N−1, and thereafter increments k every period lZN'fs to store discrete data cos (o; 'k), sin (a.k) in the memory 31. , 32 and input to multipliers 33 and 34. Multipliers 33 and 34 multiply discrete data COS (Q; -k), sin (a -k) by the Nth output data of demux section 12 to in-phase component (Ich signal), quadrature component (Qch signal) ) Is output. That is, the quadrature demodulator 13N is connected to the quadrature demodulator 13N.

Using the carrier wave whose phase is shifted by (N – 1) ZN · fs from the carrier wave a, the Nth data output from the demux unit 12 is subjected to digital quadrature demodulation and output.

[0015] Referring back to FIG. 1, the Ich and Qch interval averaging units 14a and 14b calculate the interval average values of Ich data and Qch data output from the quadrature demodulator 13a-1 3N, respectively, for each undersampling rate fs. The average value of the section is output to. It is also possible to calculate the interval average value by weighting the Ich data and Qch data output from the quadrature demodulator 13a-13N. Next, the Ich and Qch band limiting filters (roll-off filters) 15a and 15b composed of FIR filters limit the band of the output signal of the section average part and input it to the baseband processing part 16 for baseband processing. The processing unit 16 is a base for demodulating and decoding the band-limited signal. Apply band processing.

[0016] (B) Numerical example

The following is a numerical example of each frequency fo, fs, and N in the 2 GHz band receiver of the present invention, fo = 1900 [MHz]

fs = 2 X 3.84 [MHz] = 7.68 [MHz]

N = 78

N-fs = 599. 04 [MHz]

It is. In the above equation, 3.84 [MHz] is the baseband frequency (chip frequency). In the radio receiver of the present invention, the RF frequency f. The wireless input signal is simply undersampled by the sampling rate N'fs. The undersampling ratio at this time is 1 900 / 599.04 ^ 3 times, and the existing equipment has a sufficient track record, and the clock accuracy requirement is a practical value.

Regarding the feasibility of devices with respect to operating frequency, AD converters of 2 GHz class are currently being released. In addition, regarding the digital processing unit, high-speed operation of the 500 MHz class is only possible with flip-flops, and it can be realized because it operates at 600 MHz or higher with LVDS devices, etc. If there is enough, it has a proven track record and can be realized without problems.

[0017] The output data of AD variation ^^ 11 is sequentially delayed by shifting in N flip-flops FF 1 to FF 1 at a clock frequency of N'fs, and each delayed N data is fs The

1 N

It is held in FF2-FF2 at the lock frequency and de-multiplexed into parallel data. Dematsu

1 N

Each of the N data thus obtained is quadrature demodulated with sin and cos, each of which is sequentially applied with a constant phase offset, and the carrier is completely canceled to form a baseband data string for each N′fs. Each data has an influence of N times the jitter to fs. If the jitter is white (Gaussian noise), it is averaged by the following addition and compressed to 1ZN. Jitter other than white is the force generated by fluctuations in the PLL, etc. Since these periods are sufficiently slow, the problem is not compensated for by the phase equalizer or searcher of the baseband processing unit 16 where there is no fluctuation and difference due to fading. Absent. Note that this jitter suppression effect is equivalent to that disclosed in US Pat. No. 6,317,071 B1. [0018] Further, if the configuration is such that the values of the cos memory and sin memory of the quadrature demodulator 13a-13N and the coefficient value of the roll-off filter of the FIR configuration are changed by downloading, respectively, the received frequency, The system can be changed and soft radio can be realized.

[0019] (C) Operational principle based on formula of embodiment

Hereinafter, the operation principle of the first embodiment will be described using mathematical formulas.

The time waveform of the antenna input

[Number 1]

/ (= I (t) cos ω ₀ ί-Q (t) sin ₀ t (1), the output f (t) of the AD converter ll is

AD

[Equation 2]

It becomes. Note that δ is a δ function, and δ () indicates a sampling value.

If this is undersampled into 系列 series in the demux section 12, the time waveform g (t) of the ηth series is

[Equation 3]

! Nk

(Ri = / 2

It becomes.

[0021] The digital quadrature demodulator 13 performs quadrature demodulation on each sequence using a cosine wave and a sine wave table whose phases are shifted by ω 0 ZN'fs. As a result, the orthogonal recovery of sequence n The adjustment output is expressed by the following formulas (4) and (5)

[Equation 4]

Nk + n

, () = g „(i) cosoy

(Four)

[Equation 5]

Nk + n

Given in (5).

In response to this result, the interval averaging units 14a and 14b add all the sequences. In other words, as a result of the interval average for every lZfs time

[Equation 6]

(6)

[Equation 7]

Nk + n Nk + n Nk + n \ Nk-

Q sin 2ω. ∞s2o>, t——

Nf

(7) is output.

[0023] Finally, the root roll-off filters 15a and 15b perform a 2 ω

0

Cut the ingredients, the following formula

[Equation 8]

[Equation 9]

The data shown in is output. However, ΐ (t) and Q '(t) are I (t) and Q (t), respectively, with a roll-off characteristic.

[0024] (D) Digital demodulator

The digital demodulator is composed of a demux unit 12, a digital quadrature demodulation unit 13, and interval averaging units 14a and 14b. The demux unit 12 holds N antenna input signals sampled at a sampling frequency N'fs (N is an integer of 2 or more) lower than the RF frequency and higher than the undersampling rate fs, and outputs them while holding the undersampling rate fs. The quadrature demodulation unit 13 shifts the phase of the carrier wave by lZN'fs, performs digital quadrature demodulation processing on the output data of the N demux units using the carrier wave whose phase is shifted, and the interval averaging units 14a and 14b Each digital quadrature demodulation result is averaged and the interval average value for each undersampling rate fs is output.

From the above, according to the embodiment of FIG. 1, the analog down converter can be omitted and the radio receiver can be downsized. Do not use an analog down converter. Therefore, according to the present invention, the software of the wireless processing unit can be realized. Furthermore, according to the present invention, a highly accurate orthogonal demodulation result can be obtained without requiring a highly accurate clock purity as in the prior art.

(3) Second embodiment

FIG. 3 is a configuration diagram of a radio receiver of the present invention that can be applied when the antenna input signal is a multicarrier signal.

When the antenna input signal is a multi-carrier signal of frequency fo-fc, the radio receiver is equipped with a digital processing unit 21-1-21-N connected to AD conversion 11 for each carrier. Each digital processing unit 21-1-21-N has almost the same configuration: (1) Demax unit 12-1-12-N, (2) Demodulator unit 13-1-13-N, (3) Average section 14a-l— 14a-N, 14b-l— 14b-N, (4) Bandwidth limiting filter (root roll-off filter) 15a- 1— 15a- N, 15b- 1— 15b- N, (5) Baseband processor 16-1-16-N is provided. The digital processor 21-1 has the same configuration as that shown in FIG.

Each digital processing unit 21-1-21-N is different in that the digital quadrature demodulating unit 13-1-11-N generates and demodulates each carrier wave of frequency fo-fc. . In other words, the digital quadrature demodulator 13-1 includes N quadrature demodulators 13-la—13-1N in which the phase of the carrier wave having the frequency fo is shifted by lZN'fs. Using the shifted carrier waves, digital quadrature demodulation is performed on the N pieces of data output from the demux unit 12-1 and output. The digital quadrature demodulator 13-N includes N quadrature demodulators 13-Na— 13-NN whose phase of the carrier wave of frequency fc is shifted by lZN'fs, and each quadrature demodulator is shifted in phase. Each of the received carriers is used for V and the digital quadrature demodulation is performed on the N pieces of data output from the demux unit 12-N.

According to the second embodiment, there is only one analog part up to the AD converter 11, and a plurality of carriers can be received. It is also possible to demodulate and process the signals sent on each multicarrier carrier at once. In FIG. 3, the baseband processing units 16-1-16-N can be configured to be shared.

Claims

The scope of the claims

[1] The digital demodulator of the radio receiver

N antenna input signals sampled at a sampling frequency N'fs (N is an integer of 2 or more) that is lower than the antenna input signal frequency and higher than the specified undersampling rate fs are output at the undersampling rate fs. To demax,

A digital quadrature demodulating unit that shifts the phase of the carrier wave by lZN'fs and performs digital quadrature demodulation processing on each of the N pieces of data using the carrier wave that is shifted in phase,

Interval average unit that averages N digital quadrature demodulation results and outputs an average value for each interval of undersampling rate fs,

A digital demodulator characterized by comprising:

[2] The demax unit shifts the N antenna input signals at a sampling rate N′fs.

A holding unit that holds and outputs the shifted N data at the undersampling rate fs,

The digital demodulator according to claim 1, further comprising:

[3] The digital quadrature demodulation unit includes:

A memory that holds the values when the sin carrier and cos carrier are sampled with a period of 1ZN

For each N pieces of input data, each carrier data is read from the memory by sequentially shifting the read phase by lZN'fs, and each carrier data is multiplied by the input data to output a quadrature demodulated signal. N multipliers ,

The digital demodulator according to claim 1, further comprising:

[4] The digital demodulation method for wireless receivers!

N antenna input signals sampled at a sampling frequency N'fs (N is an integer of 2 or more) lower than the antenna input signal frequency and higher than a predetermined undersampling rate fs are stored at the under sampling rate fs.

The phase of the carrier wave is shifted by lZN'fs, and each of the N pieces of data is subjected to digital quadrature demodulation using the carrier wave whose phase is shifted. Averages the results of digital quadrature demodulation and outputs the average value of the interval for each undersampling rate fs.

And a digital demodulation method.

[5] In a radio receiver that directly AD converts the antenna input signal and performs quadrature demodulation and band limitation using the conversion result.

Samples the antenna input signal at a predetermined sampling rate N'fs and performs AD conversion.

A demux section that outputs N AD ^^ outputs at the undersampling rate fs.

A digital quadrature demodulator that shifts the phase of the carrier wave by lZN'fs and performs digital quadrature demodulation on each of the N pieces of data using a carrier wave that is shifted in phase;

A band limiting filter unit for limiting the band of the output signal of the section average unit,

A wireless receiver comprising: a baseband processing unit that performs baseband processing on a band-limited filter output.

[6] The demax unit shifts the AD converter output at a sampling rate N'fs.

The wireless receiver according to claim 5, further comprising:

[7] The digital quadrature demodulation unit includes:

The wireless receiver according to claim 5, further comprising:

[8] When the antenna input signal is a multicarrier signal, for each carrier of the multicarrier,

6. The radio reception according to claim 5, wherein at least a digital quadrature demodulating unit, an interval averaging unit, and a band limiting filter unit are provided, and signals transmitted on each multicarrier carrier are demodulated and processed collectively. Machine.

[9] In the receiving method of the wireless receiver,

The antenna input signal is sampled at a predetermined sampling rate N'fs and AD converted,

N AD converter outputs are shifted at sampling rate N'fs and saved at undersampling rate fs.

The phase of the carrier wave is shifted by lZN'fs, and each of the N pieces of data is subjected to digital quadrature demodulation using the carrier wave whose phase is shifted.

Each digital quadrature demodulation result is averaged and the average value of the interval at each undersampling rate fs is output.

Limit the band of the output signal of the section average part,

Applying baseband processing to the band-limited signal;

A receiving method for a wireless receiver.