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WO2006065160A8 - Procede de fabrication de couches epitaxiales inx alyga1-x-yn dopees, couche epitaxiale inxalyga1-x-yn dopee et structure multicouche a semi-conducteurs comprenant au moins une couche epitaxiale inxalyga1-x-y - Google Patents

Procede de fabrication de couches epitaxiales inx alyga1-x-yn dopees, couche epitaxiale inxalyga1-x-yn dopee et structure multicouche a semi-conducteurs comprenant au moins une couche epitaxiale inxalyga1-x-y

Info

Publication number
WO2006065160A8
WO2006065160A8 PCT/PL2005/000081 PL2005000081W WO2006065160A8 WO 2006065160 A8 WO2006065160 A8 WO 2006065160A8 PL 2005000081 W PL2005000081 W PL 2005000081W WO 2006065160 A8 WO2006065160 A8 WO 2006065160A8
Authority
WO
WIPO (PCT)
Prior art keywords
doped
inxalyga1
epitaxial
layer
epitaxial layer
Prior art date
Application number
PCT/PL2005/000081
Other languages
English (en)
Other versions
WO2006065160A1 (fr
Inventor
Czeslaw Skierbiszewski
Sylwester Porowski
Izabella Grzegory
Piotr Perlin
Michal Leszczynski
Marcin Siekacz
Anna Feduniewicz
Tadeusz Suski
Przemyslaw Wisniewski
Michal Bockowski
Original Assignee
Inst Wysokich Cisnien Polskiej
Czeslaw Skierbiszewski
Sylwester Porowski
Izabella Grzegory
Piotr Perlin
Michal Leszczynski
Marcin Siekacz
Anna Feduniewicz
Tadeusz Suski
Przemyslaw Wisniewski
Michal Bockowski
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Inst Wysokich Cisnien Polskiej, Czeslaw Skierbiszewski, Sylwester Porowski, Izabella Grzegory, Piotr Perlin, Michal Leszczynski, Marcin Siekacz, Anna Feduniewicz, Tadeusz Suski, Przemyslaw Wisniewski, Michal Bockowski filed Critical Inst Wysokich Cisnien Polskiej
Priority to EP05817699A priority Critical patent/EP1829090A1/fr
Publication of WO2006065160A1 publication Critical patent/WO2006065160A1/fr
Publication of WO2006065160A8 publication Critical patent/WO2006065160A8/fr

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/0254Nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/02433Crystal orientation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02581Transition metal or rare earth elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02631Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02636Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02647Lateral overgrowth
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02658Pretreatments

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

Le procédé de l'invention est basé sur le dépôt épitaxial de couches avec donneur ou/et accepteur ou/et dopants izoélectroniques ou/et magnétiques sur des substrats cristallins avec une densité de dislocations traversantes inférieure à 105cm-2 et un angle de désorientation (α) de phases atomiques (1) par rapport aux plans cristallins compris entre 0,3' et 30°, la température de croissance épitaxiale étant inférieure à la température de métastabilité InN, par épitaxie en faisceau moléculaire avec des atomes et des molécules d'azote chimiquement actifs (épitaxie en faisceau moléculaire avec azote réactif - RN MBE). Selon cette invention, la concentration des dislocations traversantes dans la couche formée est inférieure à 105cm-2 et la concentrations des dopants substitutionnels (Si, Ge, Te, Mn, Mg, Be, Fe, Er, Ca, C, Cr, Zn) est supérieure à 1018cm-3.
PCT/PL2005/000081 2004-12-15 2005-12-14 Procede de fabrication de couches epitaxiales inx alyga1-x-yn dopees, couche epitaxiale inxalyga1-x-yn dopee et structure multicouche a semi-conducteurs comprenant au moins une couche epitaxiale inxalyga1-x-y WO2006065160A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP05817699A EP1829090A1 (fr) 2004-12-15 2005-12-14 Procede de fabrication de couches epitaxiales inx alyga1-x-yn dopees, couche epitaxiale inxalyga1-x-yn dopee et structure multicouche a semi-conducteurs comprenant au moins une couche epitaxiale inxalyga1-x-y

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
PL371753A PL371753A1 (pl) 2004-12-15 2004-12-15 Sposób wytwarzania domieszkowanych warstw epitaksjalnych InxAlyGa1-x-yN, domieszkowana warstwa epitaksjalna InxAlyGa1-x-yN i półprzewodnikowa struktura wielowarstwowa zawierająca warstwę epitaksjalną InxAlyGa1-x-yN, dla której 1 ˛ x > 0.001 a 0.999 ˛ y > 0
PLP371753 2004-12-15

Publications (2)

Publication Number Publication Date
WO2006065160A1 WO2006065160A1 (fr) 2006-06-22
WO2006065160A8 true WO2006065160A8 (fr) 2006-11-02

Family

ID=36051512

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/PL2005/000081 WO2006065160A1 (fr) 2004-12-15 2005-12-14 Procede de fabrication de couches epitaxiales inx alyga1-x-yn dopees, couche epitaxiale inxalyga1-x-yn dopee et structure multicouche a semi-conducteurs comprenant au moins une couche epitaxiale inxalyga1-x-y

Country Status (3)

Country Link
EP (1) EP1829090A1 (fr)
PL (1) PL371753A1 (fr)
WO (1) WO2006065160A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
PL385048A1 (pl) * 2008-04-28 2009-11-09 Topgan Spółka Z Ograniczoną Odpowiedzialnością Sposób wytwarzania domieszkowanej magnezem warstwy epitaksjalnej InxAlyGa1-x-yN o przewodnictwie typu p, dla której )0 x 0,2 a 0 y 0,3 oraz półprzewodnikowych struktur wielowarstwowych zawierających taką warstwę epitaksjalną

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU7346396A (en) * 1995-10-13 1997-04-30 Centrum Badan Wysokocisnieniowych Method of manufacturing epitaxial layers of gan or ga(a1,in)n on single crystal gan and mixed ga(a1,in)n substrates
JP4432180B2 (ja) * 1999-12-24 2010-03-17 豊田合成株式会社 Iii族窒化物系化合物半導体の製造方法、iii族窒化物系化合物半導体素子及びiii族窒化物系化合物半導体
US6447604B1 (en) * 2000-03-13 2002-09-10 Advanced Technology Materials, Inc. Method for achieving improved epitaxy quality (surface texture and defect density) on free-standing (aluminum, indium, gallium) nitride ((al,in,ga)n) substrates for opto-electronic and electronic devices
SG157960A1 (en) * 2001-10-22 2010-01-29 Univ Yale Methods of hyperdoping semiconductor materials and hyperdoped semiconductor materials and devices
KR101017657B1 (ko) * 2002-04-30 2011-02-25 크리 인코포레이티드 고 전압 스위칭 디바이스 및 이의 제조 방법

Also Published As

Publication number Publication date
PL371753A1 (pl) 2006-06-26
EP1829090A1 (fr) 2007-09-05
WO2006065160A1 (fr) 2006-06-22

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