WO2000058999B1

WO2000058999B1 - Semiconductor structures having a strain compensated layer and method of fabrication

Info

Publication number: WO2000058999B1
Application number: PCT/IB2000/000892
Authority: WO
Inventors: Toru Takayama; Takaaki Baba; James S Harris Jr
Original assignee: Matsushita Electric Ind Co Ltd
Priority date: 1999-03-26
Filing date: 2000-03-01
Publication date: 2001-08-02
Also published as: WO2000058999A9; EP1183761A2; CN1347581A; WO2000058999A3; WO2000058999A2; JP2002540618A

Abstract

The present invention provides a semiconductor structure which includes a strain compensated superlattice layer comprising a plurality of pairs of constituent layers, with the first constituent layer comprising a material under tensile stress, and the second constituent layer comprising a material under compressive stress, such that the stresses of the adjacent layer compensate one another and lead to reduced defect generation. Appropriate selection of materials provides increased band gap and optical confinement in at least some implementations. The structure is particularly suited to the construction of laser diodes, photodiodes, phototransistors, and heterojunction field effect and bipolar transistors.

Claims

AMENDED CLAIMS[received by the International Bureau on 29 January 2001 (29.01.01); original claims 1, 2 and 7 amended, remaining claims unchanged (2 pages)]

1. (Amended) A semiconductor structure comprising a substrate of a first conductivity; and a first superlattice layer comprising a plurality of pairs of first and second constitute layers which consist at least four different atoms, the first constitute layer comprising a material under tensile stress and the second constitute layer comprising a material under compressive stress, the compressive and tensile stresses each compensating the other at the interface therebetween.

2. (Amended) The semiconductor structure of claim 1 further comprising an active layer formed above the first superlattice layer, the superlattice layer having a conductivity of a first type, and a second superlattice layer of a conductivity type complementary to the first type comprising a plurality of pairs of third and fourth constitute layers which consist at least four different atoms, the third constituent layer comprising a material under tensile stress and the fourth constituent layer comprising a material under compressive stress, the compressive and tensile stresses each compensating the other at the interface therebetween.

3. The semiconductor structure of claim 1 wherein the substrate is GaN, the semiconductor structure further comprising a first i-GaN cladding layer formed between the substrate and the first superlattice layer, and 25 an n-GaN channel layer formed between the i-GaN cladding layer and the first superlattice layer.

4^. The semiconductor structure of claim 1 further including a base layer and an emitter layer and wherein the first superlattice layer comprises a collector layer_.

30

5. The semiconductor structure of claim 1 further comprising a first cladding layer formed above and having the same conductivity type as the substrate, a second cladding layer of the same conductivity type as the substrate_, 35 an active layer, and wherein the first superlattice layer forms a third cladding layer and is of a conductivity type complementary to the conductivity type of the substrate_, 28

a blocking layer formed above the superlattice third cladding layer and having a window therein which exposes a portion of the superlattice third cladding layer.

6. The semiconductor structure of claiml wherein the substrate is of GaN and the 5 first superlattice layer forms a collector layer, and further including a base layer and a superlattice emitter layer comprised of a plurality of pairs of strain-compensated constituent layers.

7. (Amended) A method of fabricating a semiconductor structure compπsmg providmg a substrate of a first conductivity type, forming a first constituent layer of less than critical thickness, the first layer being under tensile stress of a predetermined magnitude. forming a second constituent layer above the first constituent layer, the second layer being under compressive stress of approximately the same predetermined magnitude as the tensile stress of the first constituent layer, such that the tensile and the compressive stresses in the constituent layers compensate for one another, and the said first and second constituent layers consist at least four different atoms.

8. A transistor device comprising on a semi-insulating layer of ln_1-)(1._y1Ga_x,A!_y,N layer, an n-type In^^Ga^Al^N

20 conductive channel layer, an n-type of a superlattice layer consisting of ln_1→._z. _y2Ga_x2Al_v2N and ln _x3._y3Ga_x3Al_y3N, where the lattice constant of said ln₁._x?._v2Ga_>:2Al_y2N is larger than that of said In^^Ga^Al^N, and the lattice constant of said ln₁._x3. _y3Ga,.₃Al_y3N is smaller than that of In^.^Ga^AI^N, are successively formed one upon each other, whrerein x1 , x2, and x3 define the GaN mole fraction and y1 , y2, and y3

25 define the AIN mole fraction and the effective bandgap of said superlattice layer is larger than that of In^.^Ga^AI^N layer.

9 A transistor device comprising a first conductivity type of superlattice collector layer consisting of

30 ln,._{x 1}Ga_x1Al_y1N and .^Ga^AI^N, an opposite conductivity type of ln,._x3 _γJGa_x3Al_y3N base layer, a first conductivity type of type of superlattice ln,._{x l}._{y t}Ga_xlAl_vlN and In ,._x2.y2Ga_x2Al_γ2N emitter iayer, wherein the lattice constant of said In _{l x}.. _y2Ga_x2Al_v?N is larger than that of said In, _x3._y:iGa_x3Al_y;!N base layer, and the lattice constant of said ⁱⁿι-_X2-_y2Ga_x2Al_y2N is smaller than that of said ln,._J( ._y3Ga₁₍₃Al_y-,N base layer, al!

35 successively formed one upon the other, wherein the bandgap of said li^".,_{.XJ v}.,Ga_)t;jAl_y3N base layer is smaller than the effective bandgap of In , ,, _{v l}Ga_x,A! _:N and l ₁._x2-y2Ga_xVAl_y7N superlattice layers, and x1. x2. and x3 define the GaN mole