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WO1999007518A1 - Systeme de tampons d'aplanissement et de polissage variables en continu - Google Patents

Systeme de tampons d'aplanissement et de polissage variables en continu Download PDF

Info

Publication number
WO1999007518A1
WO1999007518A1 PCT/US1998/016266 US9816266W WO9907518A1 WO 1999007518 A1 WO1999007518 A1 WO 1999007518A1 US 9816266 W US9816266 W US 9816266W WO 9907518 A1 WO9907518 A1 WO 9907518A1
Authority
WO
WIPO (PCT)
Prior art keywords
pad
layers
varying
polishing
polishing process
Prior art date
Application number
PCT/US1998/016266
Other languages
English (en)
Inventor
Raymond P. Suhocki
Heinz Reinhardt
David J. V. Roderick
Original Assignee
Rodel Holdings, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rodel Holdings, Inc. filed Critical Rodel Holdings, Inc.
Priority to JP2000507089A priority Critical patent/JP2001513452A/ja
Publication of WO1999007518A1 publication Critical patent/WO1999007518A1/fr

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/11—Lapping tools
    • B24B37/20—Lapping pads for working plane surfaces
    • B24B37/22—Lapping pads for working plane surfaces characterised by a multi-layered structure
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/11—Lapping tools
    • B24B37/20—Lapping pads for working plane surfaces
    • B24B37/26—Lapping pads for working plane surfaces characterised by the shape of the lapping pad surface, e.g. grooved
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B49/00—Measuring or gauging equipment for controlling the feed movement of the grinding tool or work; Arrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation
    • B24B49/16—Measuring or gauging equipment for controlling the feed movement of the grinding tool or work; Arrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation taking regard of the load
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24D—TOOLS FOR GRINDING, BUFFING OR SHARPENING
    • B24D3/00—Physical features of abrasive bodies, or sheets, e.g. abrasive surfaces of special nature; Abrasive bodies or sheets characterised by their constituents
    • B24D3/02—Physical features of abrasive bodies, or sheets, e.g. abrasive surfaces of special nature; Abrasive bodies or sheets characterised by their constituents the constituent being used as bonding agent
    • B24D3/20—Physical features of abrasive bodies, or sheets, e.g. abrasive surfaces of special nature; Abrasive bodies or sheets characterised by their constituents the constituent being used as bonding agent and being essentially organic
    • B24D3/22—Rubbers synthetic or natural
    • B24D3/26—Rubbers synthetic or natural for porous or cellular structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting

Definitions

  • CMP Chemical-mechanical polishing
  • Prior art CMP processes use single or multi-layered polishing pads.
  • the multi-layered pads have a more rigid top layer than underlying layers as a means of incorporating the benefits of each type of pad.
  • the present invention is directed to a polishing pad system comprising two or more layers and a means of adherence of the layers.
  • the invention further comprises a means to vary the pad morphology during polishing or planarization with minimal process interruption.
  • a preferred means is to have a compressible layer which can be pressurized or depressurized by a fluid to change the pad morphology.
  • the present invention is directed to an improved polishing pad system useful in the polishing and planarization of substrates, particularly substrates for the manufacture of semiconductor devices or the like.
  • the articles and methods of the present invention may also be useful in other industries and can be applied to any one of a number of materials, including, but not limited to, silicon, silicon dioxide, metal, dielectrics, ceramics and glass.
  • Surface planarization in semiconductor device manufacturing requires a polishing pad having the rigidity necessary for effective planarization and the resiliency required for the pad to conform to height variations present on the device surface.
  • different pad textures are necessary for various polishing and planarization steps.
  • Some prior art polishing pads have multi-layers that, to some extent, provide the desirable characteristics of rigid and resilient pads.
  • the top layer is generally firm and provides the pad's planarization ability.
  • the lower layer or layers are generally more resilient or elastic and allow the pad to conform to surface feature height variations. Resiliency and elasticity also reduce the edge effect which is the creation of unusable portions on the edge of a semiconductor wafer by non-uniform surface removal during polishing or planarization.
  • prior art layered pads combine rigid and resilient properties, the overall effect is constant for a specific pad. Likewise, texture and other pad morphology is constant. Morphology as used herein refers to characteristics such as elasticity, resiliency, texture, porosity and any other pad characteristic that affect polishing or planarization performance. An advantage of the present invention is that these characteristics are variable, with little or no interruption to the polishing or planarization process.
  • the planarization or polishing process comprises, 1) attaching a polishing pad to a platen; 2) introducing a polishing fluid onto the platen; 3) bringing a workpiece in close proximity to the pad; and 4) having the pad and workpiece move in relation to one another.
  • the polishing pad may be attached to the platen by a variety of means including, but not limited to, mechanical clamping, adhesive backing or a vacuum drawn through the platen.
  • the present invention eliminates or reduces the duration of this process interruption by providing variable characteristics in a single pad.
  • Polishing pads of the present invention preferably comprise a top layer, capable of being deformed to varying degrees over one or more lower layers. These lower layers may have different characteristics such as textures, porosities, elasticities or resiliencies. Virtually any material having the desired morphology may be used as a layer and be in keeping with the present invention.
  • Examples of materials that can provide texture are replicated-reticulated foams, spun-bonded polyester or mesh material, but a variety of other materials may also be used. Variations in surface texture depths may be achieved by a combination of textured materials or from a single material. Some materials that provide elasticity or resiliency include compressible and resilient composites, replicated foams, poromerics, textured leathers (natural and synthetic), perforated or punctured films, reticulated materials, woven textiles, felts, paper and sponges. Impermeable or semipermeable top layer materials include, but are not limited to, composites, closed cell foams, films (any kind), paper, plastics and metals.
  • the present invention include a means for adhering the layers to one another.
  • the pad layers may be laminated to one another by adhesive or similar means, or may adhere to one another by a vacuum drawn from the bottom layer through the upper layers. It is also possible to use mechanical, electrostatic or magnetic forces for layer adhesion. Layers that are not adhered by adhesives may be removed with little effort and replaced with layers of alternative characteristics. For instance, layers held together by a vacuum may be easily separated upon release of the vacuum. This significantly reduces the interruption of the planarization or polishing process
  • the polishing pad comprises an impermeable or semipermeable top layer, having a polishing surface, and one or more gas permeable layers below, including a cellular layer and a reticulated layer.
  • the pad is adhered to the platen by drawing a vacuum through the lower layer.
  • the vacuum also serves to adhere the pad layers to one another.
  • the vacuum serves to deplete the air in the cellular material, thereby compressing the layer and reducing resiliency and elasticity. Further more the vacuum draws the impervious top layer onto the reticulated layer. As the impervious layer deforms, the texture of the reticulated layer is imparted to the impervious layer.
  • the strength of the vacuum By varying the strength of the vacuum, the degree of resiliency and texture can be varied. Variations may be made during polishing or planarization without removal of the workpiece or the pad. In an alternative embodiment, temperature variations affect the pad's morphology by causing expansion and contraction. The pad's
  • polishing ability is also enhanced by the effect of the temperature increase on the process..
  • Vacuum, temperature, mechanical force, electrostatic force or magnetic force variations may be controlled manually or by a microprocessor programmed to vary the pad characteristics at certain intervals.
  • a microprocessor may also be used in
  • a micro-electro-mechanical system is employed to detect polishing progress and process needs and adjust the pad morphology accordingly.
  • polish or any form thereof, is intended to include “planarize” or any corresponding form thereof.

Landscapes

  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Polishing Bodies And Polishing Tools (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)

Abstract

L'invention concerne un système de tampons de polissage comprenant deux ou plusieurs couches, un dispositif d'adhérence des couches et un dispositif permettant de varier la morphologie du tampon pendant le polissage ou l'aplanissement avec une interruption minimale du procédé. Dans un mode de réalisation préféré, une couche est comprimable et peut être mise sous pression ou être dépressurisée par un fluide pour modifier la morphologie du tampon.
PCT/US1998/016266 1997-08-06 1998-08-05 Systeme de tampons d'aplanissement et de polissage variables en continu WO1999007518A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000507089A JP2001513452A (ja) 1997-08-06 1998-08-05 連続的に変化し得る平坦化及び研磨パッドシステム

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US5490797P 1997-08-06 1997-08-06
US60/054,907 1997-08-06

Publications (1)

Publication Number Publication Date
WO1999007518A1 true WO1999007518A1 (fr) 1999-02-18

Family

ID=21994296

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1998/016266 WO1999007518A1 (fr) 1997-08-06 1998-08-05 Systeme de tampons d'aplanissement et de polissage variables en continu

Country Status (2)

Country Link
JP (1) JP2001513452A (fr)
WO (1) WO1999007518A1 (fr)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000013852A1 (fr) * 1998-09-08 2000-03-16 Advanced Micro Devices, Inc. Dispositifs et procedes de polissage de tranches de semiconducteur
WO2001053042A1 (fr) * 2000-01-24 2001-07-26 3M Innovative Properties Company Tampon de polissage comprenant une couche de separation
WO2002005337A1 (fr) * 2000-07-10 2002-01-17 Shin-Etsu Handotai Co., Ltd. Tranche a chanfreinage en miroir, tissu a polir pour chanfreinage en miroir, machine a polir pour chanfreinage en miroir et procede associe
US6390890B1 (en) 1999-02-06 2002-05-21 Charles J Molnar Finishing semiconductor wafers with a fixed abrasive finishing element
US6641463B1 (en) 1999-02-06 2003-11-04 Beaver Creek Concepts Inc Finishing components and elements
US20220048156A1 (en) * 2020-08-14 2022-02-17 Steven Anneker Polishing pad assembly

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002002274A2 (fr) * 2000-06-30 2002-01-10 Rodel Holdings, Inc. Tampon de base pour tampon de polissage

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4220491A (en) * 1978-10-19 1980-09-02 Ppg Industries, Inc. Method for forming an accurately assembled laminate utilizing a vacuum holding press
US5081421A (en) * 1990-05-01 1992-01-14 At&T Bell Laboratories In situ monitoring technique and apparatus for chemical/mechanical planarization endpoint detection
US5196353A (en) * 1992-01-03 1993-03-23 Micron Technology, Inc. Method for controlling a semiconductor (CMP) process by measuring a surface temperature and developing a thermal image of the wafer
US5310455A (en) * 1992-07-10 1994-05-10 Lsi Logic Corporation Techniques for assembling polishing pads for chemi-mechanical polishing of silicon wafers
US5551986A (en) * 1995-02-15 1996-09-03 Taxas Instruments Incorporated Mechanical scrubbing for particle removal
US5665656A (en) * 1995-05-17 1997-09-09 National Semiconductor Corporation Method and apparatus for polishing a semiconductor substrate wafer

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04201181A (ja) * 1990-11-30 1992-07-22 Ichikawa Woolen Textile Co Ltd 研磨用フェルト
JPH0963995A (ja) * 1995-08-28 1997-03-07 Hitachi Ltd 研磨装置およびそれを用いた研磨方法
JPH09115862A (ja) * 1995-10-20 1997-05-02 Hitachi Ltd 研磨工具と、それを用いた研磨方法および研磨装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4220491A (en) * 1978-10-19 1980-09-02 Ppg Industries, Inc. Method for forming an accurately assembled laminate utilizing a vacuum holding press
US5081421A (en) * 1990-05-01 1992-01-14 At&T Bell Laboratories In situ monitoring technique and apparatus for chemical/mechanical planarization endpoint detection
US5196353A (en) * 1992-01-03 1993-03-23 Micron Technology, Inc. Method for controlling a semiconductor (CMP) process by measuring a surface temperature and developing a thermal image of the wafer
US5310455A (en) * 1992-07-10 1994-05-10 Lsi Logic Corporation Techniques for assembling polishing pads for chemi-mechanical polishing of silicon wafers
US5551986A (en) * 1995-02-15 1996-09-03 Taxas Instruments Incorporated Mechanical scrubbing for particle removal
US5665656A (en) * 1995-05-17 1997-09-09 National Semiconductor Corporation Method and apparatus for polishing a semiconductor substrate wafer

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000013852A1 (fr) * 1998-09-08 2000-03-16 Advanced Micro Devices, Inc. Dispositifs et procedes de polissage de tranches de semiconducteur
US6093085A (en) * 1998-09-08 2000-07-25 Advanced Micro Devices, Inc. Apparatuses and methods for polishing semiconductor wafers
US6390890B1 (en) 1999-02-06 2002-05-21 Charles J Molnar Finishing semiconductor wafers with a fixed abrasive finishing element
US6641463B1 (en) 1999-02-06 2003-11-04 Beaver Creek Concepts Inc Finishing components and elements
WO2001053042A1 (fr) * 2000-01-24 2001-07-26 3M Innovative Properties Company Tampon de polissage comprenant une couche de separation
US6746311B1 (en) 2000-01-24 2004-06-08 3M Innovative Properties Company Polishing pad with release layer
WO2002005337A1 (fr) * 2000-07-10 2002-01-17 Shin-Etsu Handotai Co., Ltd. Tranche a chanfreinage en miroir, tissu a polir pour chanfreinage en miroir, machine a polir pour chanfreinage en miroir et procede associe
US6962521B2 (en) 2000-07-10 2005-11-08 Shin-Etsu Handotai Co., Ltd. Edge polished wafer, polishing cloth for edge polishing, and apparatus and method for edge polishing
US20220048156A1 (en) * 2020-08-14 2022-02-17 Steven Anneker Polishing pad assembly

Also Published As

Publication number Publication date
JP2001513452A (ja) 2001-09-04

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