WO1998014989A1 - Memory cell with a polymer capacitor - Google Patents
Memory cell with a polymer capacitor Download PDFInfo
- Publication number
- WO1998014989A1 WO1998014989A1 PCT/DE1997/001666 DE9701666W WO9814989A1 WO 1998014989 A1 WO1998014989 A1 WO 1998014989A1 DE 9701666 W DE9701666 W DE 9701666W WO 9814989 A1 WO9814989 A1 WO 9814989A1
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- Prior art keywords
- memory cell
- storage
- capacitor
- selection transistor
- polymer
- Prior art date
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- 239000003990 capacitor Substances 0.000 title claims abstract description 38
- 230000015654 memory Effects 0.000 title claims abstract description 31
- 229920000642 polymer Polymers 0.000 title claims abstract description 16
- 238000003860 storage Methods 0.000 claims abstract description 40
- 238000004519 manufacturing process Methods 0.000 claims description 10
- 239000004677 Nylon Substances 0.000 claims description 9
- 229920001778 nylon Polymers 0.000 claims description 9
- 229920001577 copolymer Polymers 0.000 claims description 7
- 238000000151 deposition Methods 0.000 claims description 7
- 230000008021 deposition Effects 0.000 claims description 7
- MIZLGWKEZAPEFJ-UHFFFAOYSA-N 1,1,2-trifluoroethene Chemical group FC=C(F)F MIZLGWKEZAPEFJ-UHFFFAOYSA-N 0.000 claims description 3
- BQCIDUSAKPWEOX-UHFFFAOYSA-N 1,1-Difluoroethene Chemical group FC(F)=C BQCIDUSAKPWEOX-UHFFFAOYSA-N 0.000 claims description 3
- 229920000571 Nylon 11 Polymers 0.000 claims description 3
- 238000000034 method Methods 0.000 claims description 3
- 210000004027 cell Anatomy 0.000 description 13
- 239000000126 substance Substances 0.000 description 7
- 239000003989 dielectric material Substances 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 210000000352 storage cell Anatomy 0.000 description 2
- 238000003491 array Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/60—Capacitors
- H10D1/68—Capacitors having no potential barriers
- H10D1/682—Capacitors having no potential barriers having dielectrics comprising perovskite structures
Definitions
- the invention relates to a memory cell which has the following features:
- a selection transistor a selection transistor; a storage capacitor connected to the selection transistor and containing a storage dielectric,
- Such memory cells have long been known in a wide variety of designs for use in read / write memories.
- a problem with increasing integration density and the associated reduction in size of the memory cells is always the integration of the storage capacitors, the dimensions of which, owing to the capacities to be retained and the dielectric constant of the storage dielectric remaining approximately the same, were not allowed to decrease as much as the dimensions of the selection transistors.
- This problem appears to be solved by the use of paraelectric or ferroelectric substances such as perovskite-like materials as the storage dielectric, which have a very large dielectric constant (up to 400) and therefore allow the dimensions of the storage capacitors to be reduced while maintaining the capacitance.
- a deposition temperature is required for the deposition of the above-mentioned paraelectric or ferroelectric substances, which is above the melting temperature of aluminum, which is used as the preferred metal for metallizing a structure from selection transistors, so that the metallization of the structure from selection transistors takes place only after the storage capacitors have been completed can. Therefore, completely prefabricated structures made of selection transistors cannot be used to apply the storage capacitors.
- the aim of the invention is to develop the memory cell mentioned at the outset in such a way that, despite the use of a paraelectric or ferroelectric substance as the storage dielectric, it is simple to manufacture without the above-mentioned. To have disadvantages and to specify a method for their production.
- the storage dielectric is a polymer
- the deposition temperatures of the polymers which are suitable as storage dielectrics for the storage cell described are considerably lower than the melting temperature of, for example, aluminum. It is therefore in the manufacture of memory arrays that are made up of a number of those described above. benen memory cells exist, possible to apply the storage capacitors on completely prefabricated structures from selection transistors and thus to simplify the manufacturing process or to make it less critical with regard to contamination effects.
- a subset of the polymers which have paraelectric or ferroelectric properties are copolymers which are therefore suitable as a storage dielectric, as proposed in one embodiment of the invention.
- the area of use of the memory cells according to the invention coincides with the area of use of previous memory cells, so that one
- DRAM Dynamic Random Access Memory
- ROM Read Only Memory
- the polymers nylon 11, nylon 9, nylon 7 or nylon 5 can, for example, as provided in one embodiment of the invention, be used as storage dielectrics with ferroelectric properties.
- a further embodiment of the invention provides that the copolymers vinylidene fluoride or trifluoroethylene are used as storage dielectrics with ferroelectric properties.
- the structures of the storage capacitors used are not limited when using polymers or copolymers as storage dielectrics compared to previously known capacitor structures.
- One embodiment of the invention thus provides for the storage capacitors to be designed as stacked capacitors. ren, in this embodiment a plurality of layers of conductive material and storage dielectric are alternately arranged above the selection transistor.
- a further embodiment provides for the capacitors to be designed as trench capacitors, the storage capacitor being arranged in a pot-like manner on one level above the selection transistor.
- a further embodiment provides for the storage capacitor to be designed as a fin capacitor or fin-stacked capacitor.
- the capacitor here has a structure as described, for example, in US Pat. No. 5,290,726.
- Embodiments are the subject of claims 10 or 11.
- the two electrodes and the storage dielectric of the storage capacitor are deposited in several steps over the selection transistor, wherein the structure of the selection transistors is preferably metallized before deposition of the respective storage capacitors.
- FIG. 1 shows an embodiment of a memory cell according to the invention in cross section.
- storage capacitor 4 is arranged as a trench capacitor above a selection transistor 2, a first electrode 8 of the storage capacitor 4 being conductively connected to a first connection 3 of the selection transistor.
- the first electrode 8 covers the entire surface of a pot-like depression 7 in a first main area 5 above the selection transistor 2 and sections of the first main surface 5 adjacent to the pot-like depression 7.
- a storage dielectric 6 is arranged above the first electrode 8 of the storage capacitor 4 and covered by a second electrode 10.
- a polymer e.g. B. used a copolymer. This polymer can have ferroelectric or paraelectric properties.
- a polymer z. B. nylon 11, nylon 9, nylon 7 or nylon 5 or vinylidene fluoride or trifluoroethylene can be used.
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Theoretical Computer Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Semiconductor Memories (AREA)
Abstract
Description
Beschreibungdescription
Speicherzelle mit PolymerkondensatorStorage cell with polymer capacitor
Die Erfindung betrifft eine Speicherzelle, die folgende Merkmale aufweist:The invention relates to a memory cell which has the following features:
einen Auswahltransistor; einen mit dem Auswahltransistor verbundenen Speicherkon- densator, der ein Speicherdielektrikum enthält,a selection transistor; a storage capacitor connected to the selection transistor and containing a storage dielectric,
sowie ein Verfahren zur deren Herstellung.and a process for their production.
Derartige Speicherzellen sind in verschiedensten Ausführungs- formen seit langem zur Verwendung in Schreib-/Lesespeichern bekannt. Ein Problem bei zunehmender Integrationsdichte und der damit verbundenen Verkleinerung der Speicherzellen ist stets die Integration der Speicherkondensatoren, deren Abmessungen sich, aufgrund beizubehaltender Kapazitäten und in etwa gleichbleibender Dielektrizitätskonstanten des Speicher- dielektrikums, nicht in dem Maße verkleinern durften, wie die Abmessungen der Auswahltransistoren. Dieses Problem scheint durch die Verwendung paraelektrischer oder ferroelektrischer Substanzen wie beispielsweise perowskitartige Materialien als Speicherdielektrikum, die eine sehr große Dielektrizitätskonstante (bis zu 400) besitzen und daher eine Verkleinerung der Abmessungen der Speicherkondensatoren bei gleichbleibender Kapazität zulassen, gelöst. Letztere, die ferro- elektrischen Substanzen, erlauben sogar die Herstellung von Schreib-/Lesespeichern auf Halbleiterbasis, die die gespeicherte Information bei Ausfall einer VersorgungsSpannung nicht verlieren und die auch nicht, wie bisher üblich, aufgrund von Leckströmen regelmäßig neu beschrieben werden müssen.Such memory cells have long been known in a wide variety of designs for use in read / write memories. A problem with increasing integration density and the associated reduction in size of the memory cells is always the integration of the storage capacitors, the dimensions of which, owing to the capacities to be retained and the dielectric constant of the storage dielectric remaining approximately the same, were not allowed to decrease as much as the dimensions of the selection transistors. This problem appears to be solved by the use of paraelectric or ferroelectric substances such as perovskite-like materials as the storage dielectric, which have a very large dielectric constant (up to 400) and therefore allow the dimensions of the storage capacitors to be reduced while maintaining the capacitance. The latter, the ferroelectric substances, even allow the production of read / write memories based on semiconductors, which do not lose the stored information in the event of a power supply failure and which, as has been customary up to now, do not have to be regularly rewritten due to leakage currents.
Die Nachteile derartiger paraelektrischer oder ferroelektri- scher Substanzen mit hoher Dielektrizitätskonstante liegen hauptsächlich in deren Verarbeitung. So treten bei der Abscheidung o. g. paraelektrischer oder ferroelektrischer Materialien Substanzen auf, die den Herstellungsprozeß von Strukturen aus Auswahltransistören, beispielsweise in CMOS-Techno- logie, kontaminieren können. Eine räumliche Trennung der Abscheidung der paraelektrischen oder ferroelektrischen Substanzen und der Herstellung der Auswahltransistoren/Logik- Struktur ist daher erforderlich, was einen zusätzlichen Logistik- und damit Kostenaufwand bedeutet. Weiterhin ist zur Ab- Scheidung o. g. paraelektrischer oder ferroelektrischer Substanzen eine Abscheidetemperatur erforderlich, die über der Schmelztemperatur von Aluminium liegt, das als bevorzugtes Metall zur Metallisierung einer Struktur aus Auswahltransistoren verwendet wird, so daß die Metallisierung der Struktur aus Auswahltransistoren erst nach Fertigstellung der Speicherkondensatoren erfolgen kann. Zum Aufbringen der Speicherkondensatoren können daher keine komplett vorgefertigten Strukturen aus Auswahltransistoren verwendet werden.The disadvantages of such paraelectric or ferroelectric substances with a high dielectric constant lie mainly in their processing. For example, during the deposition of the above-mentioned paraelectric or ferroelectric materials, substances occur which can contaminate the manufacturing process of structures from selection transistors, for example in CMOS technology. A spatial separation of the deposition of the paraelectric or ferroelectric substances and the production of the selection transistors / logic structure is therefore necessary, which means an additional logistic and thus cost. Furthermore, a deposition temperature is required for the deposition of the above-mentioned paraelectric or ferroelectric substances, which is above the melting temperature of aluminum, which is used as the preferred metal for metallizing a structure from selection transistors, so that the metallization of the structure from selection transistors takes place only after the storage capacitors have been completed can. Therefore, completely prefabricated structures made of selection transistors cannot be used to apply the storage capacitors.
Die Erfindung hat das Ziel, die eingangs genannte Speicherzelle so weiterzubilden, daß sie trotz Verwendung einer paraelektrischen oder ferroelektrischen Substanz als Speicherdielektrikum einfach herzustellen ist ohne die o. g. Nachteile aufzuweisen, sowie ein Verfahren zu deren Herstellung anzugeben.The aim of the invention is to develop the memory cell mentioned at the outset in such a way that, despite the use of a paraelectric or ferroelectric substance as the storage dielectric, it is simple to manufacture without the above-mentioned. To have disadvantages and to specify a method for their production.
Dieses Ziel wird mit einer Speicherzelle nach der Erfindung erreicht, die neben den eingangs genannten Merkmalen folgendes zusätzliches Merkmal aufweist:This aim is achieved with a memory cell according to the invention which, in addition to the features mentioned at the outset, has the following additional feature:
das Speicherdielektrikum ist ein Polymer,the storage dielectric is a polymer,
Die Abscheidetemperaturen der Polymere, die als Speicherdielektrika für die beschriebene Speicherzelle in Frage kommen, sind wesentlich geringer, als die Schmelztemperatur von beispielsweise Aluminium. Daher ist es bei der Herstellung von Speicheranordnungen, die aus einer Anzahl der oben beschrie- benen Speicherzellen bestehen, möglich, die Speicherkondensatoren auf komplett vorgefertigten Strukturen aus Auswahltransistoren aufzubringen und damit den Herstellungsprozeß zu vereinfachen bzw. unkritischer bezüglich auftretender Kontaminierungseffekte zu gestalten.The deposition temperatures of the polymers which are suitable as storage dielectrics for the storage cell described are considerably lower than the melting temperature of, for example, aluminum. It is therefore in the manufacture of memory arrays that are made up of a number of those described above. benen memory cells exist, possible to apply the storage capacitors on completely prefabricated structures from selection transistors and thus to simplify the manufacturing process or to make it less critical with regard to contamination effects.
Weiterbildungen der Erfindung sind Gegenstand der Unteransprüche .Developments of the invention are the subject of the dependent claims.
Eine Untergruppe der Polymere, die paraelektrische oder fer- roelektrische Eigenschaften besitzen, sind Copolymere, die daher als Speicherdielektrikum in Frage kommen, wie in einer Ausführungsform der Erfindung vorgeschlagen ist. Der Einsatzbereich der Speicherzellen nach der Erfindung deckt sich mit dem Einsatzbereich bisheriger Speicherzellen, so daß eineA subset of the polymers which have paraelectric or ferroelectric properties are copolymers which are therefore suitable as a storage dielectric, as proposed in one embodiment of the invention. The area of use of the memory cells according to the invention coincides with the area of use of previous memory cells, so that one
Verwendung der Speicherzellen nach der Erfindung in DRAM-Bausteinen (DRAM abgek. für Dynamic Random Access Memory) möglich ist. Bei Verwendung eines ferroelektrischen Polymers oder Copolymers geht der Verwendungsbereich der beschriebenen Speicherzellen über den Verwendungsbereich bisheriger Halbleiterspeicher hinaus. So ist beispielsweise auch eine Verwendung in Bereichen denkbar, die bisher, aufgrund nicht dauernd vorhandener Versorgungsspannung, ROM-Speicherbausteinen (ROM abgek. für Read Only Memory) vorbehalten war. Die Poly- mere Nylon 11, Nylon 9, Nylon 7 oder Nylon 5 können beispielsweise, wie in eine Ausführungsform der Erfindung vorgesehen, als Speicherdielektrika mit ferroelektrischen Eigenschaften verwendet werden. Eine weitere Ausführungsform der Erfindung sieht vor, die Copolymere Vinylidenfluorid oder Trifluorathylen als Speicherdielektrika mit ferroelektrischen Eigenschaften zu verwenden.Use of the memory cells according to the invention in DRAM modules (DRAM abbreviated for Dynamic Random Access Memory) is possible. When using a ferroelectric polymer or copolymer, the area of use of the memory cells described extends beyond the area of use of previous semiconductor memories. For example, it is also conceivable to use it in areas that were previously reserved for ROM memory modules (ROM abbreviated to Read Only Memory) due to the non-permanent supply voltage. The polymers nylon 11, nylon 9, nylon 7 or nylon 5 can, for example, as provided in one embodiment of the invention, be used as storage dielectrics with ferroelectric properties. A further embodiment of the invention provides that the copolymers vinylidene fluoride or trifluoroethylene are used as storage dielectrics with ferroelectric properties.
Die Strukturen der verwendeten Speicherkondensatoren sind bei Verwendung von Polymeren oder Copolymeren als Speicherdielek- trika gegenüber bisher bekannten Kondensatorstrukturen nicht beschränkt. So sieht eine Ausführungsform der Erfindung vor, die Speicherkondensatoren als Stacked-Kondensatoren auszufüh- ren, wobei bei dieser Ausführungsform abwechselnd mehrere Schichten aus leitendem Material und Speicherdielektrikum über dem Auswahltransistor angeordnet sind.The structures of the storage capacitors used are not limited when using polymers or copolymers as storage dielectrics compared to previously known capacitor structures. One embodiment of the invention thus provides for the storage capacitors to be designed as stacked capacitors. ren, in this embodiment a plurality of layers of conductive material and storage dielectric are alternately arranged above the selection transistor.
Eine weitere Ausführungsform sieht vor, die Kondensatoren als Trench-Kondensatoren auszuführen, wobei der Speicherkondensator hierbei topfartig in einer Ebene über dem Auswahltransi- stor angeordnet ist.A further embodiment provides for the capacitors to be designed as trench capacitors, the storage capacitor being arranged in a pot-like manner on one level above the selection transistor.
In einer weiteren Ausführungsform ist vorgesehen, den Speicherkondensator als Fin-Kondensator oder Fin-Stacked-Konden- sator auszuführen. Der Kondensator besitzt hierbei eine Struktur, wie sie beispielsweise in US 5,290,726 beschrieben ist .A further embodiment provides for the storage capacitor to be designed as a fin capacitor or fin-stacked capacitor. The capacitor here has a structure as described, for example, in US Pat. No. 5,290,726.
Ein Verfahren zur Herstellung einer Speicherzelle nach einem der o. g. Ausführungen ist Gegenstand der Ansprüche 10 oder 11. Die beiden Elektroden sowie das Speicherdielektrikum des Speicherkondensators werden in mehreren Schritten über dem Auswahltransistor abgeschieden, wobei eine Metallisierung der Struktur aus Auswahltransiεtoren vorzugsweise vor Abscheidung der jeweiligen Speicherkondensatoren erfolgt.A method for producing a memory cell according to one of the above. Embodiments are the subject of claims 10 or 11. The two electrodes and the storage dielectric of the storage capacitor are deposited in several steps over the selection transistor, wherein the structure of the selection transistors is preferably metallized before deposition of the respective storage capacitors.
Die Erfindung wird nachfolgend im Zusammenhang mit einem Aus- führungsbeispiel anhand einer einzigen Figur näher erläutert. Die Figur zeigt ein Ausführungsbeispiel einer Speicherzelle nach der Erfindung im Querschnitt.The invention is explained in more detail below in connection with an exemplary embodiment with reference to a single figure. The figure shows an embodiment of a memory cell according to the invention in cross section.
In dieser Figur ist ein Ausführungsbeispiel einer Speicher- zelle nach der Erfindung im Querschnitt dargestellt. EinIn this figure, an embodiment of a memory cell according to the invention is shown in cross section. On
Speicherkondensator 4 ist in dem dargestellten Ausführungsbeispiel als Trench-Kondensator über einem Auswahltransistor 2 angeordnet, wobei eine erste Elektrode 8 des Speicherkonsa- tors 4 mit einem ersten Anschluß 3 des Auswahltransistors leitend verbunden ist. Die erste Elektrode 8 überdeckt die gesamte Oberfläche einer topfartigen Vertiefung 7 in einer ersten Hauptfläche 5 über dem Auswahltransistor 2 sowie Ab- schnitte der ersten Hauptfläche 5 benachbart zu der topfartigen Vertiefung 7. Ein Speicherdielektrikum 6 ist über der ersten Elektrode 8 des Speicherkondensators 4 angeordnet und von einer zweiten Elektrode 10 bedeckt.In the exemplary embodiment shown, storage capacitor 4 is arranged as a trench capacitor above a selection transistor 2, a first electrode 8 of the storage capacitor 4 being conductively connected to a first connection 3 of the selection transistor. The first electrode 8 covers the entire surface of a pot-like depression 7 in a first main area 5 above the selection transistor 2 and sections of the first main surface 5 adjacent to the pot-like depression 7. A storage dielectric 6 is arranged above the first electrode 8 of the storage capacitor 4 and covered by a second electrode 10.
Als Speicherdielektrikum ist ein Polymer, z. B. ein Copolymer eingesetzt. Dieses Polymer kann ferroelektrische oder paraelektrische Eigenschaften aufweisen. Als Polymer kann z. B. Nylon 11, Nylon 9, Nylon 7 oder Nylon 5 oder Vinylidenfluorid oder Trifluoräthylen eingesetzt werden. A polymer, e.g. B. used a copolymer. This polymer can have ferroelectric or paraelectric properties. As a polymer z. B. nylon 11, nylon 9, nylon 7 or nylon 5 or vinylidene fluoride or trifluoroethylene can be used.
Claims
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19640239A DE19640239A1 (en) | 1996-09-30 | 1996-09-30 | Storage cell with polymer capacitor |
| DE19640239.5 | 1996-09-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO1998014989A1 true WO1998014989A1 (en) | 1998-04-09 |
Family
ID=7807399
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/DE1997/001666 WO1998014989A1 (en) | 1996-09-30 | 1997-08-07 | Memory cell with a polymer capacitor |
Country Status (3)
| Country | Link |
|---|---|
| DE (1) | DE19640239A1 (en) |
| TW (1) | TW365066B (en) |
| WO (1) | WO1998014989A1 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2002043071A1 (en) * | 2000-11-27 | 2002-05-30 | Thin Film Electronics Asa | A ferroelectric memory circuit and method for its fabrication |
| WO2003046922A3 (en) * | 2001-11-16 | 2003-08-14 | Infineon Technologies Ag | Semiconductor arrangement comprising transistors based on organic semiconductors and non-volatile read-write memory cells |
| US6872969B2 (en) | 2002-01-09 | 2005-03-29 | Samsung Sdi Co., Ltd. | Non-volatile memory device and matrix display panel using the same |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| AU2002340795A1 (en) | 2001-05-07 | 2002-11-18 | Advanced Micro Devices, Inc. | Reversible field-programmable electric interconnects |
| CN1276518C (en) | 2001-05-07 | 2006-09-20 | 先进微装置公司 | Floating gate memory device using composite molecular material |
| WO2002091495A2 (en) | 2001-05-07 | 2002-11-14 | Coatue Corporation | Molecular memory device |
| WO2002091494A1 (en) | 2001-05-07 | 2002-11-14 | Advanced Micro Devices, Inc. | Switch element having memeory effect |
| KR100900080B1 (en) * | 2001-05-07 | 2009-06-01 | 어드밴스드 마이크로 디바이시즈, 인코포레이티드 | Memory device having self-assembled polymer film and manufacturing method thereof |
| WO2002091385A1 (en) | 2001-05-07 | 2002-11-14 | Advanced Micro Devices, Inc. | Molecular memory cell |
| US6858481B2 (en) | 2001-08-13 | 2005-02-22 | Advanced Micro Devices, Inc. | Memory device with active and passive layers |
| US6768157B2 (en) | 2001-08-13 | 2004-07-27 | Advanced Micro Devices, Inc. | Memory device |
| KR100860134B1 (en) | 2001-08-13 | 2008-09-25 | 어드밴스드 마이크로 디바이시즈, 인코포레이티드 | Memory cell |
| US6806526B2 (en) | 2001-08-13 | 2004-10-19 | Advanced Micro Devices, Inc. | Memory device |
| US6838720B2 (en) | 2001-08-13 | 2005-01-04 | Advanced Micro Devices, Inc. | Memory device with active passive layers |
| US7012276B2 (en) | 2002-09-17 | 2006-03-14 | Advanced Micro Devices, Inc. | Organic thin film Zener diodes |
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-
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- 1996-09-30 DE DE19640239A patent/DE19640239A1/en not_active Withdrawn
-
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- 1997-08-07 WO PCT/DE1997/001666 patent/WO1998014989A1/en active Application Filing
- 1997-09-09 TW TW086113016A patent/TW365066B/en active
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Cited By (9)
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|---|---|---|---|---|
| WO2002043071A1 (en) * | 2000-11-27 | 2002-05-30 | Thin Film Electronics Asa | A ferroelectric memory circuit and method for its fabrication |
| US6734478B2 (en) | 2000-11-27 | 2004-05-11 | Thin Film Electronics Asa | Ferroelectric memory circuit and method for its fabrication |
| AU2002223165B2 (en) * | 2000-11-27 | 2005-02-17 | Thin Film Electronics Asa | A ferroelectric memory circuit and method for its fabrication |
| RU2259605C2 (en) * | 2000-11-27 | 2005-08-27 | Тин Филм Электроникс Аса | Ferro-electric memory contour and method for manufacturing the latter |
| CN100342453C (en) * | 2000-11-27 | 2007-10-10 | 薄膜电子有限公司 | Ferroelectric memory circuit and method for its fabrication |
| WO2003046922A3 (en) * | 2001-11-16 | 2003-08-14 | Infineon Technologies Ag | Semiconductor arrangement comprising transistors based on organic semiconductors and non-volatile read-write memory cells |
| US7208823B2 (en) | 2001-11-16 | 2007-04-24 | Infineon Technologies Ag | Semiconductor arrangement comprising transistors based on organic semiconductors and non-volatile read-write memory cells |
| US6872969B2 (en) | 2002-01-09 | 2005-03-29 | Samsung Sdi Co., Ltd. | Non-volatile memory device and matrix display panel using the same |
| DE10300746B4 (en) * | 2002-01-09 | 2008-02-07 | Samsung SDI Co., Ltd., Suwon | Non-volatile memory element and display matrix and their application |
Also Published As
| Publication number | Publication date |
|---|---|
| TW365066B (en) | 1999-07-21 |
| DE19640239A1 (en) | 1998-04-02 |
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