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WO1998057353A1 - Electron multiplier and photomultiplier - Google Patents

Electron multiplier and photomultiplier Download PDF

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Publication number
WO1998057353A1
WO1998057353A1 PCT/JP1998/002568 JP9802568W WO9857353A1 WO 1998057353 A1 WO1998057353 A1 WO 1998057353A1 JP 9802568 W JP9802568 W JP 9802568W WO 9857353 A1 WO9857353 A1 WO 9857353A1
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WO
WIPO (PCT)
Prior art keywords
dynode
dynodes
electron
vacuum vessel
wall
Prior art date
Application number
PCT/JP1998/002568
Other languages
French (fr)
Japanese (ja)
Inventor
Yutaka Hasegawa
Hiroyuki Kyushima
Original Assignee
Hamamatsu Photonics K.K.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hamamatsu Photonics K.K. filed Critical Hamamatsu Photonics K.K.
Priority to AU76736/98A priority Critical patent/AU7673698A/en
Publication of WO1998057353A1 publication Critical patent/WO1998057353A1/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J43/00Secondary-emission tubes; Electron-multiplier tubes
    • H01J43/04Electron multipliers
    • H01J43/06Electrode arrangements
    • H01J43/18Electrode arrangements using essentially more than one dynode
    • H01J43/22Dynodes consisting of electron-permeable material, e.g. foil, grid, tube, venetian blind

Definitions

  • the present invention relates to an electron multiplier for cascade multiplying electrons made incident into a vacuum vessel by a multi-layered dynode, and a photomultiplier provided with the electron multiplier.
  • a conventional electron multiplier is disclosed, for example, in Japanese Patent Application Laid-Open No. Hei 6-314145.
  • the electron multiplier described in this publication has an electron multiplier disposed in a vacuum vessel.
  • the electron multiplier has a plate-like dynode having electron multiplier holes arranged in a matrix. Have a multi-layered configuration.
  • the dynodes are integrated by bonding two dynode thin plates and welding the corners (corners) of the dynode thin plates.
  • Each dynode is provided with a notch at the corner of the dynode so as to avoid the welding marks of the adjacent dynode, thereby suppressing the electric field discharge caused at the welding site. Disclosure of the invention
  • the inventors have found the following problems as a result of studying the above-described conventional technology. That is, since the conventional electron multiplier is configured as described above, a notch is provided at a corner of each dyno to suppress electric field discharge at a welding site. However, since the distance between the dynodes is very narrow, 0.16 to 0.17 mm, electric field discharge is likely to occur at the edge of each adjacent dynode, and noise caused by this electric field discharge There was a problem that would occur.
  • the present invention has been made in order to solve the above-mentioned problems, and has an electron multiplier having a structure for effectively suppressing noise generation due to discharge between dynodes, and an electron multiplier having the structure. It is an object of the present invention to provide a photomultiplier tube provided with the same.
  • the electron multiplier has an electron multiplier having a plurality of stages of dynodes stacked through a spacer of an insulating material along a predetermined stacking direction coinciding with the incident direction of incident electrons.
  • An anode for capturing secondary electrons cascade-multiplied by the electron multiplier is provided, and the photomultiplier tube sandwiches the electron multiplier together with the anode together with the electron multiplier and the anode.
  • the electron multiplier according to the present invention further includes a discharge suppressing structure in addition to the electron multiplier and the anode in order to achieve the above object.
  • This discharge suppressing structure is provided for the first and second dynodes of the plurality of dynodes that are adjacent to each other via the spacer and that emit electrons facing the second dynode of the first dynode.
  • the position of the edge of the surface and the position of the edge of the electron incident surface of the second dynode facing the first dynode are determined from the stacking direction of the plurality of dynodes (coincident with the incident direction of incident electrons). It is characterized in that they are shifted along the direction perpendicular to the laminating direction when viewed.
  • the present inventors have found that an electric field discharge is generated between adjacent dynodes between edges located in the peripheral portion of each dynode, and this is greatly involved in generating noise. Therefore, the electron multiplier and the photomultiplier according to the present invention focus on the peripheral portions of the dynodes adjacent to each other, and the positions of the edges directly adjacent via the spacer are viewed from the stacking direction of the dynodes. Thus, the shape of each dynode was changed so as to be shifted along the direction perpendicular to the lamination direction. As a result, while the distance between adjacent edges is increased, it is possible to effectively suppress electric field discharge between the edges without increasing the distance between adjacent dynodes.
  • the discharge suppression structure includes a side surface of the first dynode facing the inner wall of the vacuum vessel and the vacuum container.
  • the distance from the inner wall of the vessel is longer or shorter than the distance between the side of the second dynode facing the inner wall of the vacuum vessel and the inner wall of the vacuum vessel.
  • the discharge suppressing structure may be configured such that, for each of the plurality of stages of dynodes, an area of an electron incident surface located on a side where electrons are incident is set to an electron emitting surface facing the electron incident surface (located on the anode side). Surface) may be larger or smaller.
  • a side surface facing the inner wall of the vacuum vessel is inclined by a predetermined angle with respect to a side wall of the vacuum vessel so that the cross-sectional area changes along the laminating direction.
  • the electron multiplier can increase the interval between adjacent edge portions even if the side surfaces of each dynode are aligned in a straight line.
  • the positions of the side surfaces of each of the dinos in the vacuum vessel can be aligned substantially all around.
  • each of the plurality of stages of dynodes may have a structure including a first dynode plate and a second dynode plate directly contacted with the first dynode plate.
  • the discharge suppressing structure is provided on each of the plurality of dynodes on a side facing the inner wall of the vacuum vessel, from the inner wall of the vacuum vessel to the side of the first dynode plate facing the inner wall. This can be realized by providing a step by changing the distance and the distance from the side wall of the vacuum vessel to the side surface of the second dynode plate facing the side wall.
  • the electron multiplier can have a step at the edge of each of the dies, and the outer peripheral portion of each of the dies can be made to have the same shape.
  • FIG. 1 is a diagram showing a schematic structure of a photomultiplier tube (including an electron multiplier) according to the present invention.
  • FIG. 2 is an enlarged perspective view showing a main part of an electron multiplier applicable to the electron multiplier shown in FIG.
  • FIG. 3 is a cross-sectional view of the electron multiplier shown in FIG. 2, which is taken along the line III-III in FIG.
  • FIG. 4 is a plan view showing the structure of each dynode applicable to the electron multiplier shown in FIG.
  • FIG. 5 is an enlarged perspective view showing a first modification of the electron multiplier applicable to the electron multiplier and the photomultiplier according to the present invention.
  • FIG. 6 is a cross-sectional view of the electron multiplier shown in FIG. 5, which is taken along the line VI-VI in FIG.
  • FIG. 7 is a plan view showing the structure of each of the dynodes applicable to the electron multiplier shown in FIG.
  • FIG. 8 is a plan view showing the back surface (the anode side) of the dynode shown in FIG.
  • FIG. 9 is an enlarged perspective view showing a second modification of the electron multiplier applicable to the electron multiplier and the photomultiplier according to the present invention.
  • FIG. 10 is a cross-sectional view of the electron multiplier shown in FIG. 9, which is taken along the line XX in FIG.
  • FIG. 11 is a plan view showing the structure of each dynode applicable to the electron multiplier shown in FIG.
  • Fig. 12 is a plan view showing the back side (anode side) of the dynode shown in Fig. 11.
  • FIG. 1 is a diagram showing a schematic configuration of a photomultiplier according to the present invention (including the electron multiplier according to the present invention).
  • the photomultiplier tube 1 shown in Fig. 1 converts weak light into electrons (photoelectrons) and cascade multiplies the electrons.
  • This photomultiplier tube 1 includes a cylindrical metal side tube 2 having both ends opened, and a glass light receiving surface plate 3 for receiving incident light is fixed to one open end of the side tube 2. At the other open end, a disc-shaped stem 5 in which a plurality of stem bins 4 are arranged is fixed.
  • the side tube 2, the light receiving face plate 3, and the stem 5 constitute a vacuum vessel 6, and an electron multiplier 7 is disposed inside the vacuum vessel 6.
  • a photoelectric conversion surface (photocathode) 8 made of a GaAs semiconductor crystal is provided on a surface of the light-receiving surface plate 3 located inside the vacuum vessel 6 (the back surface of the light-receiving surface plate 3).
  • a focusing electrode 9 is arranged between the electron multiplier 7 and the electron multiplier 7. Therefore, the trajectory of the photoelectrons emitted from the photoelectric conversion surface 8 is converged by the influence of the focusing electrode 9, and is incident on a predetermined region of the electron multiplier 7.
  • the electron multiplying unit 7 includes a plate-like dynode 11 having electron multiplying holes 10 arranged in parallel through a spacer 110 made of an insulating material such as ceramic, as indicated by lines in the figure. It is configured to be multi-tiered along the indicated direction.
  • the direction indicated by the line L is the incident direction of the weak light incident on the photomultiplier tube 1, the traveling direction of the photoelectrons from the photoelectric conversion surface 8 to the electron multiplier 7 (the incident direction of the photoelectrons). Also, the stacking direction of each dynode 11 is shown.
  • a final dynode 12 that reflects the secondary electrons output from the dynode 11 is disposed, and between the final dynode 12 and the dynode 11 is:
  • An anode 13 for receiving electrons is arranged.
  • the dynode 11, the last dynode 12, and the anode 13 are connected and fixed to the respective stem pins 4.
  • the square dynode 11 has two types of dynodes 11 A and 11 B, and the dynode 11 A is connected to the n (1) stage.
  • dynode 1 1 B becomes the n + 1st dynode (Fig. 2).
  • the n-th dynode 11A has a plurality of electron multiplying holes 1 OA arranged in parallel as shown in FIG. 4, and has a wide periphery so as to surround all the electron multiplying holes 1 OA. Section 12 is provided.
  • the n + 1st dynode 11B also has a plurality of electron multiplier holes 10B arranged in parallel as shown in FIG.
  • the side surface 12a of the dynode 11A (the surface facing the inner wall of the vacuum vessel 6) is connected to the surfaces 12c (electron incident surface) and 12b (electron emitting surface) of the dynode 11A.
  • the dynode 11B is formed at right angles to the side surface 13a (the surface facing the inner wall of the vacuum vessel 6) of the dynode 11B, and at right angles to the surfaces 13c (electron incident surface) and 13b (electron emitting surface) of the dynode 11B. Is formed.
  • the nth dynode 11 When the electron multiplier 7 is assembled so that the electron multiplier hole 1OA of the nth dynode 11A and the electron multiplier hole 10B of the n + 1th dynode 11B face each other, the nth dynode 11
  • the side 12a of the peripheral part 12 of A protrudes outward (to the side of the side tube 2 of the vacuum vessel 6), and the side 13a of the peripheral part 13 of the n + first stage dynode 11B is inside (the tube of the vacuum vessel 6). (Axis L side).
  • the edges 120 and n on the electron emission surface 12b of the n-th dynode 11A are compared.
  • the edge 130 on the electron incident surface 13c of the first-stage dynode 11B faces in an oblique direction, and the facing edges 120 and 130 are perpendicular to the stacking direction when viewed from the stacking direction L. (See Fig. 3).
  • the adjacent edge 120 By alternately stacking the dynode 11A of the same type as the dynode 11A of the nth stage and the dynode 11B of the same type as the n + 1st dynode 11B (see FIGS. 2 and 3), the adjacent edge 120, The distance between 130 and 130 can be increased, and the generation of electric field discharge between these edges 120 and 130 can be effectively suppressed. Therefore, according to the present invention, the distance between the dynodes 11 is maintained as a minute space of about 0.16 to 0.17 mm as in the conventional electron multiplier, The electric field discharge can be further suppressed.
  • the inner wall of the vacuum vessel 6 (side pipe 2) ) Is provided in the outer periphery of the dynodes 11A and 1IB, and a part of the side surfaces 12a and 13a is interrupted by the ears.
  • the electric field discharge between the tip of the ear and the edge of the periphery of the adjacent die is negligibly small.
  • the n-th dynode 11 A is integrated by bonding two dynode thin plates A and B and welding these dynode thin plates A and B.
  • the (n + 1) th dynode 11B is integrated with the dynode thin plates C and D (see FIGS. 2 and 3).
  • the square dynode 21 is provided with two types of dynodes 21A and 2IB, and the dynode 21A is used as the n (1) th dynode.
  • the dynode 21B becomes the (n + 1) th dynode (see FIG. 5).
  • the n-th dynode 21A has a plurality of electron multiplier holes 2OA arranged in parallel as shown in FIGS. 7 and 8, and surrounds all the electron multiplier holes 2OA. Is provided with a peripheral portion 22.
  • the (n + 1) th stage dynode 21B has a plurality of electron multiplier holes 20B arranged in parallel as shown in FIGS.
  • a peripheral portion 23 is provided so as to surround 20B.
  • the side surface 22a of the dynode 21A (the surface facing the side wall of the vacuum vessel 6) is a dyno.
  • the side surface 22 b (surface facing the side wall of the vacuum vessel 6) of the dynode 21 B is It is a taper surface formed at an acute angle to the surface 23 c (electron incident surface) of dynode 21B.
  • the electron multiplying unit 7A is assembled so that the electron multiplying hole 2OA of the nth dynode 21A and the electron multiplying hole 20B of the n + 1th dynode 21B are opposed to each other.
  • the outermost peripheral line 2 2 d of the side surface 2 2 a in the n-th dynode 21 A and the outermost peripheral line 23 d of the side surface 23 a in the n + 1-stage dynode 21 B are Line up along the direction of extension of the tube axis L (see Fig. 1).
  • the periphery 22 of the n-th dynode 21A is compared with the periphery 23 of the n + 1th dynode 21B, the n-th dynode 2
  • the side 2 2 a of 1 A and the side 23 a of the n + 1st dynode 2 1 B face each other in an inclined state, and the pages 22 0 and 230 facing each other are
  • the dynodes can be shifted from each other along a direction perpendicular to the stacking direction. Even with this configuration, the distance between the edges 220 and 230 is increased without changing the distance between the dynodes 21 A and 21 B, so that the generation of electric field discharge at this portion is effectively suppressed. It becomes possible.
  • the adjacent dynodes 21A and 21B can be aligned in parallel and along the pipe axis L direction.
  • the positions of the side surface 22a of the dynode 21A and the side surface 23a of the dynode 21B in the vacuum vessel 6 can be aligned over substantially the entire circumference.
  • the n-th dynode 21 A is integrally formed by bonding two dynode thin plates A 1 and B 1 and welding the dynode thin plates A 1 and B 1.
  • n + 1st stage dynode 2 1 B is integrated by the dynode thin plates C 1 and D 1 (Figs. 5 and 6).
  • a second application example of the electron multiplier applicable to the electron multiplier and the photomultiplier according to the present invention will be described with reference to FIGS.
  • the configuration other than the dynode 31 described later is the same as that of the photomultiplier tube 1 described above, and a duplicate description will be omitted below.
  • the square dynode 31 has two types of dynodes 31 A and 3 IB, and the dynode 31 A is connected to the n-th dynode.
  • dynode 31 B becomes the n + 1st dynode (see Fig. 9).
  • the n-th dynode 31 A has a plurality of electron multiplier holes 3 OA arranged in parallel as shown in FIG. 11 and FIG. A peripheral portion 32 is provided so as to surround it.
  • the n + 1st dynode 31B has a plurality of electron multiplier holes 30B arranged in parallel as shown in FIG. 11 and FIG.
  • a peripheral portion 33 is provided so as to surround the double hole 30B.
  • the n-th dynode 31 A is formed by laminating the first dynode thin plate A 2 and the second dynode thin plate B 2 and forming these dynode thin plates A 2 , B2 are welded together to achieve integration.
  • the side surface 32aA of the first dynode thin plate A2 and the side surface 32aB of the second dynode thin plate B2 are not arranged on the same plane,
  • the side surface 32aA of the first dynode thin plate A2 and the side surface 32aB of the second dynode thin plate B2 are shifted from each other in a direction perpendicular to the laminating direction when viewed from the laminating direction.
  • the side surface 32a of the first dynode thin plate A2 protrudes outward (the side tube 2 of the vacuum vessel 6), and the side surface 32aB of the second dynode thin plate B2.
  • n + 1st dynode 31 B is integrated by the dynode thin plates C2 and D2, and the side surface 33aC of the first dynode thin plate C2 protrudes outward, Dynode thin plate D 2 side 3 3 a D is drawn inward.
  • the electron multiplier 7 B is set so that the electron multiplier hole 3 OA of the n-th side node 31 A and the electron multiplier hole 30 B of the n + 1st dynode 31 B are opposed to each other. Assemble And the side surface 3 2 a of the n-th dynode 31 A and the side surface 33 a of the n + 1-th dynode 31 B in the direction in which the pipe axis L (see FIG. 1) of the side pipe 2 extends. Line up along the line.
  • the distance between the adjacent edges 32b, 33b can be increased.
  • the electric field discharge between these adjacent edges 32b and 33b can be effectively suppressed.
  • the positions of the side surfaces 32a of the dynodes 31A and the side surfaces 33a of the dynodes 31B in the vacuum vessel 6 can be aligned substantially all around.
  • the present invention is not limited to the various embodiments described above.
  • the above-mentioned dynode may be a mesh type dynode.
  • the photoelectric conversion surface (photocathode) 8 does not need to be a GaAs semiconductor crystal, but the GaAs type photoelectric conversion surface 8 has a small effective area and has a wide dynode edge. It is easy to devise the side of the edge.
  • the photomultiplier having the photoelectric conversion surface has been described. However, an electron multiplier having no photoelectric conversion surface may be used. Industrial applicability
  • the electron tube and the photomultiplier according to the present invention are configured as described above, the following effects can be obtained. That is, an electric field discharge is prevented from occurring between edges of dynodes adjacent to each other in a direction perpendicular to the stacking direction of the dynodes when viewed from the stacking direction of the dynodes. Due to This has the effect of effectively suppressing the generation of noise.

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  • Electron Tubes For Measurement (AREA)

Abstract

An electron multiplier which cascade-multiplies incident electrons and a photomultiplier provided with the electron multiplier. The electron multiplier and the photomultiplier are each provided with a discharge suppressing structure which effectively suppresses the occurrence of noise by preventing the discharge between respective dynodes laminated in a plurality of stages. The discharge suppressing structures provides the dynodes with various structures, but, particularly for the first and second dynodes (11A and 11B) which are arranged adjacently to each other with a spacer in between, the positions of the edges (120) of the electron emitting surfaces of the first dynodes (11A) facing the second dynodes (11B) are shifted from the positions of the edges (130) of the electron entering surfaces of the second dynodes (11B) facing the first dynodes (11A) in the direction perpendicular to the direction of laminating the dynodes.

Description

曰月糸田 ¾ 電子増倍器及び光電子増倍管 技術分野  Satsuki Itoda ¾ Technical field of electron multiplier and photomultiplier tube
この発明は、 真空容器内に入射させた電子を、 多段に積層させたダイノードに よってカスケード增倍するための電子増倍管、 及び該電子増倍管を備えた光電子 増倍管に関するものである。 背景技術  BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electron multiplier for cascade multiplying electrons made incident into a vacuum vessel by a multi-layered dynode, and a photomultiplier provided with the electron multiplier. . Background art
従来の電子増倍管としては、 例えば特開平 6— 3 1 4 5 5 1号公報に開示され ている。 この公報に記載された電子増倍管は、 真空容器内に配設された電子増倍 部を有し、 この電子増倍部は、 マトリックス状に配列した電子増倍孔をもつ板状 のダイノードが多段に積層させた構成を備えている。 さらに、 各ダイノードは、 2枚のダイノード薄板を張り合わせて、 ダイノード薄板の隅部 (コ一ナ部) を溶 接することで一体化が図られている。 そして、 各ダイノードには、 隣接するダイ ノードの溶接跡を避けるようにして、 その隅部に切欠きが設けられ、 溶接部位で 引き起こされる電界放電を抑制している。 発明の開示  A conventional electron multiplier is disclosed, for example, in Japanese Patent Application Laid-Open No. Hei 6-314145. The electron multiplier described in this publication has an electron multiplier disposed in a vacuum vessel. The electron multiplier has a plate-like dynode having electron multiplier holes arranged in a matrix. Have a multi-layered configuration. Furthermore, the dynodes are integrated by bonding two dynode thin plates and welding the corners (corners) of the dynode thin plates. Each dynode is provided with a notch at the corner of the dynode so as to avoid the welding marks of the adjacent dynode, thereby suppressing the electric field discharge caused at the welding site. Disclosure of the invention
発明者らは、 上述の従来技術を検討した結果、 以下のような課題を発見した。 すなわち、 従来の電子増倍管は、 上述のように構成されているため、 各ダイノ一 ドの隅部に切欠きを設けることで、 溶接部位での電界放電を抑制している。 とこ ろが、 各ダイノードの間隔が 0 . 1 6〜0 . 1 7 mmと非常に狭く形成されてい るので、 隣接する各ダイノードのエッジで電界放電が発生し易く、 この電界放電 に起因したノィズが発生してしまうという課題があつた。 この発明は上述の課題を解決するためになされたもので、 各ダイノード間の放 電に起因したノイズ発生を効果的に抑制する構造を備えた電子増倍管、 及び該電 子増倍管を備えた光電子増倍管を提供することを目的としている。 The inventors have found the following problems as a result of studying the above-described conventional technology. That is, since the conventional electron multiplier is configured as described above, a notch is provided at a corner of each dyno to suppress electric field discharge at a welding site. However, since the distance between the dynodes is very narrow, 0.16 to 0.17 mm, electric field discharge is likely to occur at the edge of each adjacent dynode, and noise caused by this electric field discharge There was a problem that would occur. The present invention has been made in order to solve the above-mentioned problems, and has an electron multiplier having a structure for effectively suppressing noise generation due to discharge between dynodes, and an electron multiplier having the structure. It is an object of the present invention to provide a photomultiplier tube provided with the same.
一般に、 電子増倍管は、 入射電子の入射方向に一致した所定の積層方向に沿つ て、 絶縁材料のスぺーサを介して積層された複数段のダイノードを有する電子増 倍部と、 該電子増倍部によりカスケ一ド増倍された 2次電子を捕獲するアノード を備えており、 光電子増倍管は、 上記電子増倍部及び上記アノードとともに、 該 電子増倍部をアノードとともに挟むように配置される光電陰極とを備えている。 特に、 この発明に係る電子増倍管は、 上述の目的を達成するため、 上記電子増 倍部及び上記アノードの他、 放電抑制構造をさらに備えている。 この放電抑制構 造は、 複数段のダイノードのうち、 前記スぺ一サを介して互いに隣接している第 1及び第 2のダイノードについて、 該第 1ダイノードの該第 2ダイノードと向い 合う電子出射面のェッジの位置と、 該第 2ダイノードの該第 1ダイノードと向い 合う電子入射面のエッジの位置とを、 上記複数段のダイノードの積層方向 (入射 電子の入射方向と一致している) から見て該積層方向に垂直な方向に沿ってそれ ぞれずらすことを特徴としている。  Generally, the electron multiplier has an electron multiplier having a plurality of stages of dynodes stacked through a spacer of an insulating material along a predetermined stacking direction coinciding with the incident direction of incident electrons. An anode for capturing secondary electrons cascade-multiplied by the electron multiplier is provided, and the photomultiplier tube sandwiches the electron multiplier together with the anode together with the electron multiplier and the anode. And a photocathode arranged at In particular, the electron multiplier according to the present invention further includes a discharge suppressing structure in addition to the electron multiplier and the anode in order to achieve the above object. This discharge suppressing structure is provided for the first and second dynodes of the plurality of dynodes that are adjacent to each other via the spacer and that emit electrons facing the second dynode of the first dynode. The position of the edge of the surface and the position of the edge of the electron incident surface of the second dynode facing the first dynode are determined from the stacking direction of the plurality of dynodes (coincident with the incident direction of incident electrons). It is characterized in that they are shifted along the direction perpendicular to the laminating direction when viewed.
発明者らは、 隣接するダイノード間において、 各ダイノードの周辺部分に位置 するエッジ間で電界放電が発生し、 これがノイズの発生に大きく拘わっているこ とを見出した。 そこで、 この発明に係る電子増倍管及び光電子増倍管は、 互いに 隣接する各ダイノードの周辺部分に着目し、 スぺーサを介して直接隣接するエツ ジの位置が、 ダイノードの積層方向から見て該積層方向に垂直な方向に沿ってず れるよう、 各ダイノードの形状を変えた。 これにより、 隣接するエッジ間の距離 は大きくなる一方、 隣接する各ダイノードの間隔を広げることなく、 各エッジ間 における電界放電を効果的に抑制することが可能になる。  The present inventors have found that an electric field discharge is generated between adjacent dynodes between edges located in the peripheral portion of each dynode, and this is greatly involved in generating noise. Therefore, the electron multiplier and the photomultiplier according to the present invention focus on the peripheral portions of the dynodes adjacent to each other, and the positions of the edges directly adjacent via the spacer are viewed from the stacking direction of the dynodes. Thus, the shape of each dynode was changed so as to be shifted along the direction perpendicular to the lamination direction. As a result, while the distance between adjacent edges is increased, it is possible to effectively suppress electric field discharge between the edges without increasing the distance between adjacent dynodes.
具体的に、 上記放電抑制構造は、 互いに隣接している上記第 1及び第 2ダイノ ードについて、 該第 1ダイノードの、 真空容器の内壁と向い合う側面と該真空容 器の内壁との距離を、 該第 2ダイノードの、 真空容器の内壁と向い合う側面と該 真空容器の内壁との距離よりも長く、 あるいは短くした構造であることが好まし い。 このような構造により、 電子増倍部は、 隣接するダイノードの側面を互い違 いに配列させるだけの簡単な構成となる。 Specifically, for the first and second dynodes that are adjacent to each other, the discharge suppression structure includes a side surface of the first dynode facing the inner wall of the vacuum vessel and the vacuum container. Preferably, the distance from the inner wall of the vessel is longer or shorter than the distance between the side of the second dynode facing the inner wall of the vacuum vessel and the inner wall of the vacuum vessel. With such a structure, the electron multiplier has a simple configuration in which the side surfaces of adjacent dynodes are alternately arranged.
また、 上記放電抑制構造は、 上記複数段のダイノードおのおのについて、 電子 が入射される側に位置する電子入射面の面積を、 該電子入射面と対向する電子出 射面 (上記アノード側に位置する面) よりも大きく、 あるいは小さくした構造で あってもよい。 この構造は、 上記複数段のダイノードおのおのについて、 上記積 層方向に沿ってその断面積が変化するよう、 真空容器の内壁と向い合う側面を、 該真空容器の側壁に対して所定角度だけ傾けることにより実現可能である。 また、 この構造の場合、 電子増倍部は、 各ダイノードの側面を一直線状に整列させても、 隣接するエッジ部の間隔を大きくとることができる。 しかも、 真空容器内で各ダ イノ一ドの側面の位置を略全周で揃えることができる。  Further, the discharge suppressing structure may be configured such that, for each of the plurality of stages of dynodes, an area of an electron incident surface located on a side where electrons are incident is set to an electron emitting surface facing the electron incident surface (located on the anode side). Surface) may be larger or smaller. In this structure, for each of the plurality of dynodes, a side surface facing the inner wall of the vacuum vessel is inclined by a predetermined angle with respect to a side wall of the vacuum vessel so that the cross-sectional area changes along the laminating direction. This can be realized by: In addition, in the case of this structure, the electron multiplier can increase the interval between adjacent edge portions even if the side surfaces of each dynode are aligned in a straight line. In addition, the positions of the side surfaces of each of the dinos in the vacuum vessel can be aligned substantially all around.
さらに、 上記複数段のダイノードおのおのは、 第 1ダイノード ·プレートと該 第 1のダイノード ·プレートと直接接触された第 2ダイノード ·プレートとを備 えた構造であってもよい。 この場合、 上記放電抑制構造は、 上記複数段のダイノ ードおのおのの、 真空容器の内壁に向い合う側面に、 該真空容器の内壁から該内 壁と向い合う第 1ダイノード ·プレートの側面までの距離と、 真空容器の側壁か ら該側壁と向い合う第 2ダイノード ·プレートの側面との距離を変えることによ り段差を設けることにより実現できる。 この構造により、 電子増倍部は、 各ダイ ノ一ドの縁部に段差をもたせ、 各ダイノ一ドの外周部分を同一の形状に揃えるこ とができる。 図面の簡単な説明  Further, each of the plurality of stages of dynodes may have a structure including a first dynode plate and a second dynode plate directly contacted with the first dynode plate. In this case, the discharge suppressing structure is provided on each of the plurality of dynodes on a side facing the inner wall of the vacuum vessel, from the inner wall of the vacuum vessel to the side of the first dynode plate facing the inner wall. This can be realized by providing a step by changing the distance and the distance from the side wall of the vacuum vessel to the side surface of the second dynode plate facing the side wall. With this structure, the electron multiplier can have a step at the edge of each of the dies, and the outer peripheral portion of each of the dies can be made to have the same shape. BRIEF DESCRIPTION OF THE FIGURES
図 1は、 この発明に係る光電子増倍管 (電子増倍管を含む) の概略構造を示す 図である。 図 2は、 図 1に示された電子増倍管に適用可能な電子増倍部の要部を拡大して 示す斜視図である。 FIG. 1 is a diagram showing a schematic structure of a photomultiplier tube (including an electron multiplier) according to the present invention. FIG. 2 is an enlarged perspective view showing a main part of an electron multiplier applicable to the electron multiplier shown in FIG.
図 3は、 図 2に示された電子増倍部であって、 該図 2中の II I— II I線に沿って 示された該電子増倍部の断面図である。  FIG. 3 is a cross-sectional view of the electron multiplier shown in FIG. 2, which is taken along the line III-III in FIG.
図 4は、 図 2に示された電子増倍部に適用可能な各ダイノードの構造を示す平 面図である。  FIG. 4 is a plan view showing the structure of each dynode applicable to the electron multiplier shown in FIG.
図 5は、 この発明に係る電子増倍管及び光電子増倍管に適用可能な電子増倍部 の第 1変形例を拡大して示す斜視図である。  FIG. 5 is an enlarged perspective view showing a first modification of the electron multiplier applicable to the electron multiplier and the photomultiplier according to the present invention.
図 6は、 図 5に示された電子増倍部であって、 該図 5中の V I— V I線に沿つ て示された該電子増倍部の断面図である。  6 is a cross-sectional view of the electron multiplier shown in FIG. 5, which is taken along the line VI-VI in FIG.
図 7は、 図 5に示された電子増倍部に適用可能な各ダイノ一ドの構造を示す平 面図である。  FIG. 7 is a plan view showing the structure of each of the dynodes applicable to the electron multiplier shown in FIG.
図 8は、 図 7に示されたダイノードの裏面 (アノード側) を示す平面図である。 図 9は、 この発明に係る電子増倍管及び光電子増倍管に適用可能な電子増倍部 の第 2変形例を拡大して示す斜視図である。  FIG. 8 is a plan view showing the back surface (the anode side) of the dynode shown in FIG. FIG. 9 is an enlarged perspective view showing a second modification of the electron multiplier applicable to the electron multiplier and the photomultiplier according to the present invention.
図 1 0は、 図 9に示された電子増倍部であって、 該図 9中の X— X線に沿って 示された該電子増倍部の断面図である。  FIG. 10 is a cross-sectional view of the electron multiplier shown in FIG. 9, which is taken along the line XX in FIG.
図 1 1は、 図 9に示された電子増倍部に適用可能な各ダイノードの構造を示す 平面図である。  FIG. 11 is a plan view showing the structure of each dynode applicable to the electron multiplier shown in FIG.
図 1 2は、 図 1 1に示されたダイノードの裏面 (アノード側) を示す平面図で あ o 発明を実施するための最良の形態  Fig. 12 is a plan view showing the back side (anode side) of the dynode shown in Fig. 11.
以下、 この発明に係る電子増倍管及び光電子増倍管を  Hereinafter, the electron multiplier and the photomultiplier according to the present invention will be described.
図 1〜図 1 2を用いて説明する。 なお、 図中の同一部分、 部品については同一符 号を付して重複する説明を省略する。 図 1は、 この発明に係る光電子増倍管 (この発明に係る電子増倍管を含む) の 概略構成を示す図である。 図 1に示された光電子増倍管 1は、 微弱光を電子 (光 電子) に変換して、 その電子をカスケード増倍する。 この光電子増倍管 1は、 両 端が開放された円筒状の金属製側管 2を備え、 この側管 2の一方の開口端には、 入射光を受け入れるガラス製の受光面板 3が固定され、 他方の開口端には、 複数 のステムビン 4が配置させた円板状のステム 5が固定されている。 そして、 これ ら側管 2、 受光面板 3、 及びステム 5により真空容器 6が構成され、 該真空容器 6の内部に電子増倍部 7が配置されている。 This will be described with reference to FIGS. In the drawings, the same parts and components are denoted by the same reference numerals, and redundant description will be omitted. FIG. 1 is a diagram showing a schematic configuration of a photomultiplier according to the present invention (including the electron multiplier according to the present invention). The photomultiplier tube 1 shown in Fig. 1 converts weak light into electrons (photoelectrons) and cascade multiplies the electrons. This photomultiplier tube 1 includes a cylindrical metal side tube 2 having both ends opened, and a glass light receiving surface plate 3 for receiving incident light is fixed to one open end of the side tube 2. At the other open end, a disc-shaped stem 5 in which a plurality of stem bins 4 are arranged is fixed. The side tube 2, the light receiving face plate 3, and the stem 5 constitute a vacuum vessel 6, and an electron multiplier 7 is disposed inside the vacuum vessel 6.
受光面板 3の、 真空容器 6の内側に位置する面 (受光面板 3の裏面) には、 G a A s半導体結晶からなる光電変換面 (光電陰極) 8が設けられ、 この光電変換 面 8と電子増倍部 7との間には、 収束電極 9が配置されている。 したがって、 光 電変換面 8から放出された光電子は、 収束電極 9の影響によりその軌道が収束さ れ、 電子増倍部 7の所定の領域に入射する。  A photoelectric conversion surface (photocathode) 8 made of a GaAs semiconductor crystal is provided on a surface of the light-receiving surface plate 3 located inside the vacuum vessel 6 (the back surface of the light-receiving surface plate 3). A focusing electrode 9 is arranged between the electron multiplier 7 and the electron multiplier 7. Therefore, the trajectory of the photoelectrons emitted from the photoelectric conversion surface 8 is converged by the influence of the focusing electrode 9, and is incident on a predetermined region of the electron multiplier 7.
電子増倍部 7は、 平行に配列された電子増倍孔 1 0をもつ板状のダイノード 1 1が、 セラミック等の絶縁材料からなるスぺーサ 1 1 0を介して、 図中の線 で 示された方向に沿って多段に積層された構成になっている。 なお、 線 Lで示され た方向は、 当該光電子増倍管 1に入射される微弱光の入射方向、 光電変換面 8か ら電子増倍部 7へ向かう光電子の進行方向 (光電子の入射方向) 、 また、 各ダイ ノード 1 1の積層方向を示す。 積層されたダイノード 1 1の下方には、 ダイノ一 ド 1 1から出力された 2次電子を反射させる最終段ダイノード 1 2が配置され、 最終段ダイノード 1 2とダイノード 1 1との間には、 電子を受けるアノード 1 3 が配置されている。 なお、 ダイノード 1 1、 最終段ダイノード 1 2及びアノード 1 3は、 各ステムピン 4にそれぞれ接続固定されている。  The electron multiplying unit 7 includes a plate-like dynode 11 having electron multiplying holes 10 arranged in parallel through a spacer 110 made of an insulating material such as ceramic, as indicated by lines in the figure. It is configured to be multi-tiered along the indicated direction. The direction indicated by the line L is the incident direction of the weak light incident on the photomultiplier tube 1, the traveling direction of the photoelectrons from the photoelectric conversion surface 8 to the electron multiplier 7 (the incident direction of the photoelectrons). Also, the stacking direction of each dynode 11 is shown. Below the stacked dynodes 11, a final dynode 12 that reflects the secondary electrons output from the dynode 11 is disposed, and between the final dynode 12 and the dynode 11 is: An anode 13 for receiving electrons is arranged. The dynode 11, the last dynode 12, and the anode 13 are connected and fixed to the respective stem pins 4.
図 2〜図 4に示されたように、 正方形状のダイノード 1 1には、 2種類のダイ ノード 1 1 A、 1 1 Bが用意されており、 ダイノード 1 1 Aを n ( 1 ) 段目の ダイノードとした場合、 ダイノード 1 1 Bは n + 1段目のダイノードとなる (図 2参照) 。 n段目ダイノード 11Aは、 図 4に示されたように平行に配列された 複数本の電子増倍孔 1 OAを有し、 全ての電子増倍孔 1 OAを包囲するように幅 広の周辺部 12が設けられている。 これに対して、 n+ 1段目ダイノード 11 B も、 図 4に示されたように平行に配列された複数本の電子増倍孔 10Bを有し、 電子増倍孔 10Bを包囲するように幅狭の周辺部部 13が設けられている。 また、 ダイノード 11 A、 11 Bにおいて、 ダイノード 11 Aの側面 12 a (真空容器 6の内壁と向い合う面) は、 ダイノード 11 Aの表面 12 c (電子入射面) 及び 12b (電子出射面) に対して直角に形成されるとともに、 ダイノード 11Bの 側面 13 a (真空容器 6の内壁と向い合う面) も、 ダイノード 11Bの表面 13 c (電子入射面) 及び 13b (電子出射面) に対して直角に形成されている。 そこで、 n段目ダイノード 11 Aの電子増倍孔 1 OAと n + 1段目ダイノード 11Bの電子増倍孔 10Bとを対向させるように、 電子増倍部 7を組み立てると、 n段目ダイノード 11 Aの周辺部 12の側面 12 aが外側 (真空容器 6の側管 2 側) に向けて迫り出し、 n+ 1段目ダイノード 11 Bの周辺部 13の側面 13 a が内側 (真空容器 6の管軸 L側) に引き込むことになる。 その結果、 n段目ダイ ノード 11 Aの周辺部 12と n+1段目ダイノード 11Bの周辺部 13とを比較 した場合、 n段目ダイノード 11 Aの電子出射面 12 b上のエッジ 120と n + 1段目ダイノード 11 Bの電子入射面 13 c上のエッジ 130とが斜め方向で対 向し、 これら対向するエッジ 120、 130とを、 積層方向 Lから見て該積層方 向に垂直な方向にずらすことができる (図 3参照) 。 As shown in FIGS. 2 to 4, the square dynode 11 has two types of dynodes 11 A and 11 B, and the dynode 11 A is connected to the n (1) stage. In this case, dynode 1 1 B becomes the n + 1st dynode (Fig. 2). The n-th dynode 11A has a plurality of electron multiplying holes 1 OA arranged in parallel as shown in FIG. 4, and has a wide periphery so as to surround all the electron multiplying holes 1 OA. Section 12 is provided. On the other hand, the n + 1st dynode 11B also has a plurality of electron multiplier holes 10B arranged in parallel as shown in FIG. 4, and has a width surrounding the electron multiplier holes 10B. A narrow peripheral portion 13 is provided. In the dynodes 11A and 11B, the side surface 12a of the dynode 11A (the surface facing the inner wall of the vacuum vessel 6) is connected to the surfaces 12c (electron incident surface) and 12b (electron emitting surface) of the dynode 11A. The dynode 11B is formed at right angles to the side surface 13a (the surface facing the inner wall of the vacuum vessel 6) of the dynode 11B, and at right angles to the surfaces 13c (electron incident surface) and 13b (electron emitting surface) of the dynode 11B. Is formed. Therefore, when the electron multiplier 7 is assembled so that the electron multiplier hole 1OA of the nth dynode 11A and the electron multiplier hole 10B of the n + 1th dynode 11B face each other, the nth dynode 11 The side 12a of the peripheral part 12 of A protrudes outward (to the side of the side tube 2 of the vacuum vessel 6), and the side 13a of the peripheral part 13 of the n + first stage dynode 11B is inside (the tube of the vacuum vessel 6). (Axis L side). As a result, when comparing the peripheral portion 12 of the n-th dynode 11A with the peripheral portion 13 of the (n + 1) th dynode 11B, the edges 120 and n on the electron emission surface 12b of the n-th dynode 11A are compared. + The edge 130 on the electron incident surface 13c of the first-stage dynode 11B faces in an oblique direction, and the facing edges 120 and 130 are perpendicular to the stacking direction when viewed from the stacking direction L. (See Fig. 3).
このように、 n段目ダイノード 11 Aと同種のダイノード 11 Aと n+ 1段目 ダイノード 11Bと同種のダイノード 11Bとを交互に積層させるだけで (図 2 及び図 3参照) 、 隣接するエッジ 120、 130間の距離を大きくすることがで き、 これらエッジ 120、 130間での電界放電の発生を効果的に抑制すること ができる。 したがって、 この発明によればダイノード 11の間隔を、 従来の電子 増倍部と同様に 0. 16〜0. 17mm程度の微小な空間として維持したまま、 電界放電の更なる抑制を可能になる。 In this way, merely by alternately stacking the dynode 11A of the same type as the dynode 11A of the nth stage and the dynode 11B of the same type as the n + 1st dynode 11B (see FIGS. 2 and 3), the adjacent edge 120, The distance between 130 and 130 can be increased, and the generation of electric field discharge between these edges 120 and 130 can be effectively suppressed. Therefore, according to the present invention, the distance between the dynodes 11 is maintained as a minute space of about 0.16 to 0.17 mm as in the conventional electron multiplier, The electric field discharge can be further suppressed.
なお、 各ダイノード 11A、 1 IBと各ステムピン 4との電気的接続を考慮し て、 ダイノード 11A、 11 Bにおける周辺部 12、 13の側面12&、 13 a に、 真空容器 6の内壁 (側管 2) に向かって突出する耳部 (図示せず) が設けら れている場合、 すなわち、 ダイノード 1 1A、 1 IBの外周において、 側面 12 a、 13 aの一部が耳部によって途切れている場合、 耳部の先端と、 隣接するダ イノ一ドの周辺部のェッジとの電界放電は無視することができる程度に小さい。 この実施例において、 n段目ダイノード 1 1 Aは、 2枚のダイノード薄板 A、 Bを張り合わせて、 これらダイノード薄板 A、 Bとを溶接することで一体化が図 られている。 同様に、 n+1段目ダイノード 11Bもダイノード薄板 C、 Dで一 体化が図られている (図 2及び図 3参照) 。  In consideration of the electrical connection between each dynode 11A, 1 IB and each stem pin 4, the inner wall of the vacuum vessel 6 (side pipe 2) ) Is provided in the outer periphery of the dynodes 11A and 1IB, and a part of the side surfaces 12a and 13a is interrupted by the ears. However, the electric field discharge between the tip of the ear and the edge of the periphery of the adjacent die is negligibly small. In this embodiment, the n-th dynode 11 A is integrated by bonding two dynode thin plates A and B and welding these dynode thin plates A and B. Similarly, the (n + 1) th dynode 11B is integrated with the dynode thin plates C and D (see FIGS. 2 and 3).
次に、 この発明に係る電子増倍管及び光電増倍管に適用可能な電子増倍管の第 1応用例を、 図 5〜図 8を用いて説明する。 なお、 後述するダイノード 21以外 の構成は、 前述された光電子増倍管 1と同様であり、 以下重複する説明は省略す る。  Next, a first application example of the electron multiplier applicable to the electron multiplier and the photoelectric multiplier according to the present invention will be described with reference to FIGS. The configuration other than the dynode 21 described later is the same as that of the photomultiplier tube 1 described above, and the overlapping description will be omitted below.
図 5〜図 8に示されたように、 正方形状のダイノード 21には、 2種類のダイ ノード 21 A、 2 IBが用意されており、 ダイノード 21 Aを n ( 1)段目の ダイノードとした場合、 ダイノード 21Bは n+1段目のダイノードとなる (図 5参照) 。 n段目ダイノード 21 Aは、 図 7及び図 8に示されたように平行に配 列された複数本の電子増倍孔 2 OAを有し、 全ての電子増倍孔 2 OAを包囲する ように周辺部 22が設けられている。 これに対して、 n+1段目ダイノード 21 Bは、 図 7及び図 8に示されたように平行に配列された複数本の電子増倍孔 20 Bを有し、 全ての電子増倍孔 20Bを包囲するように周辺部 23が設けられてい る。  As shown in FIGS. 5 to 8, the square dynode 21 is provided with two types of dynodes 21A and 2IB, and the dynode 21A is used as the n (1) th dynode. In this case, the dynode 21B becomes the (n + 1) th dynode (see FIG. 5). The n-th dynode 21A has a plurality of electron multiplier holes 2OA arranged in parallel as shown in FIGS. 7 and 8, and surrounds all the electron multiplier holes 2OA. Is provided with a peripheral portion 22. On the other hand, the (n + 1) th stage dynode 21B has a plurality of electron multiplier holes 20B arranged in parallel as shown in FIGS. A peripheral portion 23 is provided so as to surround 20B.
また、 図 5及び図 6に示されたように、 ダイノード 21 A、 2 IBにおいて、 ダイノード 21 Aの側面 22 a (真空容器 6の側壁と向い合う面) は、 ダイノ一 ド 2 2 Aの表面 2 2 c (電子入射面) に対して鋭角に形成されたテーパー面であ り、 ダイノード 2 1 Bの側面 2 2 b (真空容器 6の側壁と向い合う面) は、 ダイ ノード 2 1 Bの表面 2 3 c (電子入射面) に対して鋭角に形成されたテーパー面 である。 As shown in FIGS. 5 and 6, in the dynodes 21A and 2IB, the side surface 22a of the dynode 21A (the surface facing the side wall of the vacuum vessel 6) is a dyno. Is a taper surface formed at an acute angle with respect to the surface 22 c (electron incident surface) of the node 22 A, and the side surface 22 b (surface facing the side wall of the vacuum vessel 6) of the dynode 21 B is It is a taper surface formed at an acute angle to the surface 23 c (electron incident surface) of dynode 21B.
そこで、 n段目ダイノード 2 1 Aの電子増倍孔 2 O Aと n + 1段目ダイノード 2 1 Bの電子増倍孔 2 0 Bとを対向させるように、 電子増倍部 7 Aを組み立てる と、 n段目ダイノード 2 1 Aにおける側面 2 2 aの最外周ライン 2 2 dと、 n + 1段側ダイノード 2 1 Bにおける側面 2 3 aの最外周ライン 2 3 dとは、 側管 2 の管軸 L (図 1参照) の伸びる方向に沿って一列に整列する。 その結果、 n段目 ダイノード 2 1 Aの周辺部 2 2と n + 1段目ダイノード 2 1 Bの周辺部 2 3とを 比較した場合、 真空容器 6の側壁に対して、 n段目ダイノード 2 1 Aの側面 2 2 aと n + 1段目ダイノード 2 1 Bの側面 2 3 aとが傾いた状態で向い合うことと なり、 互いに対向しているェヅジ 2 2 0、 2 3 0とを、 各ダイノード 2 1 A、 2 1 Bの積層方向から見て該積層方向に垂直な方向に沿って互いにずらすことが可 能になる。 この構成によっても各エッジ 2 2 0、 2 3 0の間隔は、 各ダイノード 2 1 A、 2 1 Bの間隔を変えることなく大きくなるため、 この部位での電界放電 の発生を効果的に抑制することが可能になる。  Therefore, the electron multiplying unit 7A is assembled so that the electron multiplying hole 2OA of the nth dynode 21A and the electron multiplying hole 20B of the n + 1th dynode 21B are opposed to each other. The outermost peripheral line 2 2 d of the side surface 2 2 a in the n-th dynode 21 A and the outermost peripheral line 23 d of the side surface 23 a in the n + 1-stage dynode 21 B are Line up along the direction of extension of the tube axis L (see Fig. 1). As a result, when the periphery 22 of the n-th dynode 21A is compared with the periphery 23 of the n + 1th dynode 21B, the n-th dynode 2 The side 2 2 a of 1 A and the side 23 a of the n + 1st dynode 2 1 B face each other in an inclined state, and the pages 22 0 and 230 facing each other are When viewed from the stacking direction of the dynodes 21A and 21B, the dynodes can be shifted from each other along a direction perpendicular to the stacking direction. Even with this configuration, the distance between the edges 220 and 230 is increased without changing the distance between the dynodes 21 A and 21 B, so that the generation of electric field discharge at this portion is effectively suppressed. It becomes possible.
このように、 ダイノード 2 1 Aの側面 2 2 a及びダイノード 2 1 Bの側面 2 3 aを平行に、 かつ管軸線 L方向に沿って整列させても、 隣接するダイノード 2 1 A、 2 1 Bの直接対向するエッジ 2 2 0、 2 3 0の間隔を大きくとることができ る。 しかも、 真空容器 6内でダイノード 2 1 Aの側面 2 2 a及びダイノード 2 1 Bの側面 2 3 aの位置を略全周で揃えることができる。 なお、 n段目ダイノード 2 1 Aは、 2枚のダイノード薄板 A 1と B 1を張り合わせて、 ダイノード薄板 A 1と B 1とを溶接することで一体ィ匕が図られている。 同様に、 n + 1段目ダイノ —ド 2 1 Bもダイノード薄板 C 1と D 1で一体化が図られている (図 5及び図 6 さらに、 この発明に係る電子増倍管及び光電子増倍管に適用可能な電子増倍部 の第 2応用例を、 図 9〜図 1 2を用いて説明する。 なお、 後述するダイノード 3 1以外の構成は、 前述した光電子増倍管 1と同様であり、 以下重複する説明は省 略する。 Thus, even if the side surface 22a of the dynode 21A and the side surface 23a of the dynode 21B are aligned in parallel and along the pipe axis L direction, the adjacent dynodes 21A and 21B The distance between the directly opposite edges 220 and 230 can be increased. Moreover, the positions of the side surface 22a of the dynode 21A and the side surface 23a of the dynode 21B in the vacuum vessel 6 can be aligned over substantially the entire circumference. The n-th dynode 21 A is integrally formed by bonding two dynode thin plates A 1 and B 1 and welding the dynode thin plates A 1 and B 1. Similarly, the n + 1st stage dynode 2 1 B is integrated by the dynode thin plates C 1 and D 1 (Figs. 5 and 6). Further, a second application example of the electron multiplier applicable to the electron multiplier and the photomultiplier according to the present invention will be described with reference to FIGS. The configuration other than the dynode 31 described later is the same as that of the photomultiplier tube 1 described above, and a duplicate description will be omitted below.
図 9〜図 1 2に示されたように、 正方形状のダイノード 3 1には、 2種類のダ ィノード 3 1 A、 3 I Bが用意されており、 ダイノード 3 1 Aを n段目のダイノ ードとした場合、 ダイノード 3 1 Bは n + 1段目のダイノードとなる (図 9参照) 。 n段目ダイノード 3 1 Aは、 図 1 1及び図 1 2に示されたように平行に配列さ れた複数本の電子増倍孔 3 O Aを有し、 全ての電子増倍孔 3 O Aを包囲するよう に周辺部部 3 2が設けられている。 同様に、 n + 1段目ダイノード 3 1 Bは、 図 1 1及び図 1 2に示されたように平行に配列された複数本の電子増倍孔 3 0 Bを 有し、 全ての電子増倍孔 3 0 Bを包囲するように周辺部 3 3が設けられている。 また、 図 9及び図 1 0に示されたように、 n段目ダイノード 3 1 Aは、 第 1の ダイノード薄板 A 2と第 2のダイノード薄板 B 2を張り合わせて、 これらダイノ —ド薄板 A 2、 B 2とを溶接することで一体化が図られている。 この場合、 第 1 のダイノ一ド薄板 A 2の側面 3 2 a Aと第 2のダイノード薄板 B 2の側面 3 2 a Bとは、 同一面上に配置させることなく、 具体的には、 第 1のダイノード薄板 A 2の側面 3 2 a Aと第 2のダイノード薄板 B 2の側面 3 2 a Bとを、 積層方向か ら見て該積層方向に垂直な方向に互いにずらされている。 この構成により、 第 1 のダイノ一ド薄板 A 2の側面 3 2 a Aは外側 (真空容器 6の側管 2 ) に向けて迫 り出し、 第 2のダイノード薄板 B 2の側面 3 2 a Bは内側 (真空容器 6の管軸 L ) に引込む。 同様に、 n + 1段目ダイノード 3 1 Bもダイノード薄板 C 2と D 2で 一体化が図られ、 第 1のダイノード薄板 C 2の側面 3 3 a Cは外側に向けて迫り 出し、 第 2のダイノード薄板 D 2の側面 3 3 a Dは内側に引込む。  As shown in FIGS. 9 to 12, the square dynode 31 has two types of dynodes 31 A and 3 IB, and the dynode 31 A is connected to the n-th dynode. In this case, dynode 31 B becomes the n + 1st dynode (see Fig. 9). The n-th dynode 31 A has a plurality of electron multiplier holes 3 OA arranged in parallel as shown in FIG. 11 and FIG. A peripheral portion 32 is provided so as to surround it. Similarly, the n + 1st dynode 31B has a plurality of electron multiplier holes 30B arranged in parallel as shown in FIG. 11 and FIG. A peripheral portion 33 is provided so as to surround the double hole 30B. As shown in FIG. 9 and FIG. 10, the n-th dynode 31 A is formed by laminating the first dynode thin plate A 2 and the second dynode thin plate B 2 and forming these dynode thin plates A 2 , B2 are welded together to achieve integration. In this case, the side surface 32aA of the first dynode thin plate A2 and the side surface 32aB of the second dynode thin plate B2 are not arranged on the same plane, The side surface 32aA of the first dynode thin plate A2 and the side surface 32aB of the second dynode thin plate B2 are shifted from each other in a direction perpendicular to the laminating direction when viewed from the laminating direction. With this configuration, the side surface 32a of the first dynode thin plate A2 protrudes outward (the side tube 2 of the vacuum vessel 6), and the side surface 32aB of the second dynode thin plate B2. Is drawn inside (tube axis L of vacuum vessel 6). Similarly, the n + 1st dynode 31 B is integrated by the dynode thin plates C2 and D2, and the side surface 33aC of the first dynode thin plate C2 protrudes outward, Dynode thin plate D 2 side 3 3 a D is drawn inward.
そこで、 n段側目イノ一ド 3 1 Aの電子増倍孔 3 O Aと n + 1段目ダイノード 3 1 Bの電子増倍孔 3 0 Bとを対向させるように、 電子増倍部 7 Bを組み立てる と、 n段目ダイノード 3 1 Aの側面 3 2 aと、 n + 1段目ダイノード 3 1 Bの側 面 3 3 aとは、 側管 2の管軸 L (図 1参照) の伸びる方向に沿って一列に整列す る。 その結果、 n段目ダイノード 3 1 A周辺部 3 2と n + 1段目ダイノード 3 1 Bの周辺部 3 3とを比較した場合、 n段目ダイノード 3 1 Aのエッジ 3 2 bと縁 n + 1段目ダイノード 3 1 Bのエッジ 3 3 bとが斜め方向で対向し、 これら対向 するエッジ部 3 2 bと 3 3 bとを、 積層方向から見て該積層方向に垂直な方向に 沿って互いにずらすことが可能になる。 Thus, the electron multiplier 7 B is set so that the electron multiplier hole 3 OA of the n-th side node 31 A and the electron multiplier hole 30 B of the n + 1st dynode 31 B are opposed to each other. Assemble And the side surface 3 2 a of the n-th dynode 31 A and the side surface 33 a of the n + 1-th dynode 31 B in the direction in which the pipe axis L (see FIG. 1) of the side pipe 2 extends. Line up along the line. As a result, when comparing the peripheral portion 3 2 of the n-th dynode 3 1 A with the peripheral portion 3 3 of the n + 1-th dynode 3 1 B, the edge 3 2 b and the edge n of the n-th dynode 3 1 A + The edge 3 3b of the first-stage dynode 3 1B faces diagonally, and these facing edge portions 3 2b and 3 3b extend along the direction perpendicular to the laminating direction when viewed from the laminating direction. Can be shifted from each other.
このように、 ダイノード 3 1 Aの側面 3 2 a及びダイノード 3 1 Bの側面 3 3 aを互いに管軸 L方向に沿って整列させても、 隣接するエッジ 3 2 b、 3 3 bの 間隔を大きくとることができ、 これら隣接するエッジ 3 2 b、 3 3 b間での電界 放電を効果的に抑制することができる。 しかも、 真空容器 6内でダイノード 3 1 Aの側面 3 2 a及びダイノード 3 1 Bの側面 3 3 aの位置を略全周で揃えること ができる。  Thus, even if the side surfaces 3 2a of the dynodes 31A and the side surfaces 33a of the dynodes 31B are aligned with each other along the pipe axis L direction, the distance between the adjacent edges 32b, 33b can be increased. The electric field discharge between these adjacent edges 32b and 33b can be effectively suppressed. Moreover, the positions of the side surfaces 32a of the dynodes 31A and the side surfaces 33a of the dynodes 31B in the vacuum vessel 6 can be aligned substantially all around.
なお、 この発明は、 前述した種々の実施例にに限定されるものではない。 例え ば、 前述したダイノードは、 メッシュ型のダイノードであってもよい。 また、 光 電変換面 (光電陰極) 8は G a A s半導体結晶である必要はないが、 この G a A sタイプの光電変換面 8は、 有効面積が小さく、 ダイノードの縁部を幅広く形成 することができ、 縁部の側面に工夫を施し易い。 さらに、 前述の実施例では、 光 電変換面をもった光電子増倍管として説明したが、 光電変換面をもたない電子増 倍管であってもよい。 産業上の利用可能性  Note that the present invention is not limited to the various embodiments described above. For example, the above-mentioned dynode may be a mesh type dynode. The photoelectric conversion surface (photocathode) 8 does not need to be a GaAs semiconductor crystal, but the GaAs type photoelectric conversion surface 8 has a small effective area and has a wide dynode edge. It is easy to devise the side of the edge. Further, in the above-described embodiment, the photomultiplier having the photoelectric conversion surface has been described. However, an electron multiplier having no photoelectric conversion surface may be used. Industrial applicability
この発明に係る電子管及び光電子増倍管は、 以上のように構成されているため、 次のような効果を奏する。 すなわち、 複数のダイノードのうちで隣接するダイノ —ドのエッジを、 該ダイノードの積層方向からみて該積層方向に垂直な方向に隣 接するダイノードのエッジ間で発生する電界放電を防止し、 係る電界放電に起因 するノィズの発生を効果的に抑制できるという効果がある。 Since the electron tube and the photomultiplier according to the present invention are configured as described above, the following effects can be obtained. That is, an electric field discharge is prevented from occurring between edges of dynodes adjacent to each other in a direction perpendicular to the stacking direction of the dynodes when viewed from the stacking direction of the dynodes. Due to This has the effect of effectively suppressing the generation of noise.

Claims

言青求の範囲 Scope of word blue
1 . 入射電子をカスケード増倍するための電子増倍管であって、 1. An electron multiplier for cascade multiplication of incident electrons,
真空容器と、  A vacuum container,
前記真空容器内に収納され、 絶縁材料のスぺ一サを介して前記入射電子の入射 方向に沿って積層された複数段のダイノードを有する電子増倍部と、  An electron multiplying unit housed in the vacuum vessel and having a plurality of stages of dynodes stacked along a direction of incidence of the incident electrons via a spacer of an insulating material;
前記真空容器内に収納され、 前記電子増倍部によって増倍された 2次電子を捕 獲するためのアノードと、  An anode that is housed in the vacuum vessel and captures secondary electrons multiplied by the electron multiplier;
前記複数段のダイノードのうち、 前記スぺ一サを介して互いに隣接している第 1及び第 2のダイノードについて、 該第 1ダイノードの該第 2ダイノードと向い 合う電子出射面のェッジの位置と、 該第 2ダイノ一ドの該第 1ダイノードと向い 合う電子入射面のェッジの位置とを、 前記複数段のダイノ一ドの積層方向から見 て該積層方向に垂直な方向に沿ってそれぞれずらした放電抑制構造と、 を備えた 電子増倍管。  Of the dynodes of the plurality of stages, regarding the first and second dynodes that are adjacent to each other via the spacer, the position of the edge of the electron emission surface of the first dynode that faces the second dynode. The position of the edge of the electron incident surface of the second dynode facing the first dynode is shifted along a direction perpendicular to the stacking direction when viewed from the stacking direction of the plurality of tiers. An electron multiplier comprising: a discharge suppression structure;
2 . 前記放電抑制構造は、 前記第 1及び第 2ダイノードについて、 該第 1ダ ィノードの、 前記真空容器の内壁と向い合う側面と該真空容器の内壁との距離を、 該第 2ダイノードの、 前記真空容器の内壁と向い合う側面と該真空容器の内壁と の距離よりも長く、 あるいは短くした構造を含むことを特徴とする請求項 1記載 の電子増倍管。 2. The discharge suppressing structure is configured such that, for the first and second dynodes, a distance between a side face of the first dynode facing the inner wall of the vacuum vessel and an inner wall of the vacuum vessel is determined. The electron multiplier according to claim 1, further comprising a structure that is longer or shorter than a distance between a side surface facing the inner wall of the vacuum vessel and an inner wall of the vacuum vessel.
3 . 前記放電抑制構造は、 前記複数段のダイノードおのおのについて、 前記 電子入射面の面積を、 該電子入射面と対向する前記電子出射面よりも大きく、 あ るいは小さくした構造を含むことを特徴とする請求項 1記載の電子増倍管。 3. The discharge suppression structure includes a structure in which, for each of the plurality of dynodes, the area of the electron incident surface is larger or smaller than the electron exit surface facing the electron incident surface. 2. The electron multiplier according to claim 1, wherein:
4 . 前記放電抑制構造は、 前記複数段のダイノードおのおのについて、 前記 積層方向に沿ってその断面積が変化するよう、 前記真空容器の内壁と向い合う側 面を該真空容器の側壁に対して所定角度だけ傾けた構造を含むことを特徴とする 請求項 3記載の電子増倍管。 4. The discharge suppressing structure is configured such that, for each of the plurality of dynodes, 4. The vacuum container according to claim 3, wherein a side surface facing the inner wall of the vacuum container is inclined at a predetermined angle with respect to a side wall of the vacuum container so that a cross-sectional area thereof changes along a stacking direction. Electron multiplier.
5 . 前記複数段のダイノードおのおのは、 第 1ダイノード ·プレートと該第 1のダイノード ·プレートと直接接触された第 2ダイノード ·プレートとを備え、 前記放電抑制構造は、 前記複数段のダイノードおのおのの、 前記真空容器の内 壁に向い合う側面に、 前記真空容器の内壁から該内壁と向い合う前記第 1ダイノ ード ·プレートの側面までの距離と、 前記真空容器の側壁から該側壁と向い合う 前記第 2ダイノード ·プレートの側面との距離を変えることにより段差を設けた 構造を含むことを特徴とする請求項 3記載の電子増倍管。 5. Each of the plurality of stages of dynodes includes a first dynode plate and a second dynode plate directly contacted with the first dynode plate, and the discharge suppressing structure includes a plurality of dynodes of each of the plurality of stages. A distance from an inner wall of the vacuum vessel to a side face of the first die plate facing the inner wall, a side face facing the inner wall of the vacuum vessel, and a side face facing the side wall of the vacuum vessel. 4. The electron multiplier according to claim 3, further comprising a structure in which a step is provided by changing a distance from a side surface of the second dynode plate.
6 . 入射電子をカスケ一ド増倍するための電子増倍管であって、 6. An electron multiplier for cascade multiplying incident electrons,
真空容器と、  A vacuum container,
前記真空容器内に収納され、 前記入射電子を受けて光電子を出力する光電陰極 と、  A photocathode housed in the vacuum vessel and receiving the incident electrons and outputting photoelectrons;
前記真空容器内に収納され、 絶縁材料のスぺーサを介して前記光電陰極からの 光電子の入射方向に沿って積層された複数段のダイノードを有する電子増倍部と、 前記真空容器内に収納された状態で前記電子増倍部に対して前記光電陰極の反 対側に設けられた、 前記電子増倍部によって増倍された 2次電子を捕獲するため のアノードと、  An electron multiplier section having a plurality of dynodes which are housed in the vacuum vessel and are stacked along a direction of incidence of photoelectrons from the photocathode via a spacer made of an insulating material; An anode provided on the opposite side of the photocathode with respect to the electron multiplying unit in a state in which the secondary electrons have been multiplied by the electron multiplying unit;
前記複数段のダイノードのうち、 前記スぺ一サを介して互いに隣接している第 1及び第 2のダイノードについて、 該第 1ダイノ一ドの該第 2ダイノードと向い 合う電子出射面のエツジの位置と、 該第 2ダイノードの該第 1ダイノードと向い 合う電子入射面のエッジの位置とを、 前記複数段のダイノードの積層方向から見 て該積層方向に垂直な方向に沿ってそれぞれずらした放電抑制構造と、 を備えた 光電子増倍管。 Of the plurality of dynodes, the first and second dynodes that are adjacent to each other via the spacer are formed on an edge of an electron emission surface of the first dynode that faces the second dynode. A discharge in which the position and the position of the edge of the electron incident surface of the second dynode facing the first dynode are respectively shifted along a direction perpendicular to the stacking direction when viewed from the stacking direction of the plurality of dynodes. With a restraining structure and Photomultiplier tube.
7 . 前記放電抑制構造は、 前記第 1及び第 2ダイノードについて、 該第 1ダ ィノードの、 前記真空容器の内壁と向い合う側面と該真空容器の内壁との距離を、 該第 2ダイノードの、 前記真空容器の内壁と向い合う側面と該真空容器の内壁と の距離よりも長く、 あるいは短くした構造を含むことを特徴とする請求項 6記載 の光電子増倍管。 7. The discharge suppressing structure may be configured such that, for the first and second dynodes, a distance between a side of the first dynode facing the inner wall of the vacuum vessel and an inner wall of the vacuum vessel is determined by: The photomultiplier tube according to claim 6, comprising a structure that is longer or shorter than a distance between a side surface facing the inner wall of the vacuum vessel and an inner wall of the vacuum vessel.
8 . 前記放電抑制構造は、 前記複数段のダイノードおのおのについて、 前記 電子入射面の面積を、 該電子入射面と対向する前記電子出射面よりも大きく、 あ るいは小さくした構造を含むことを特徴とする請求項 6記載の光電子増倍管。 8. The discharge suppressing structure includes a structure in which, for each of the plurality of dynodes, the area of the electron incident surface is larger or smaller than the electron emitting surface facing the electron incident surface. 7. The photomultiplier tube according to claim 6, wherein
9 . 前記放電抑制構造は、 前記複数段のダイノードおのおのについて、 前記 積層方向に沿ってその断面積が変化するよう、 前記真空容器の内壁と向い合う側 面を該真空容器の側壁に対して所定角度だけ傾けた構造を含むことを特徴とする 請求項 8記載の光電子増倍管。 9. The discharge suppressing structure is configured such that, for each of the plurality of dynodes, a side surface facing the inner wall of the vacuum vessel is predetermined with respect to a side wall of the vacuum vessel so that a cross-sectional area changes along the stacking direction. 9. The photomultiplier tube according to claim 8, including a structure inclined by an angle.
1 0 . 前記複数段のダイノードおのおのは、 第 1ダイノード ·プレートと該 第 1のダイノード ·プレートと直接接触された第 2ダイノード ·プレートとを備 え、 10. Each of the plurality of stages of dynodes includes a first dynode plate and a second dynode plate directly contacted with the first dynode plate,
前記放電抑制構造は、 前記複数段のダイノードおのおのの、 前記真空容器の内 壁に向い合う側面に、 前記真空容器の内壁から該内壁と向い合う前記第 1ダイノ ード ·プレートの側面までの距離と、 前記真空容器の側壁から該側壁と向い合う 前記第 2ダイノード ·プレートの側面との距離を変えることにより段差を設けた 構造を含むことを特徴とする請求項 8記載の光電子増倍管。  The discharge suppressing structure may further include, on each of the plurality of stages of dynodes, a side face facing the inner wall of the vacuum vessel, and a distance from the inner wall of the vacuum vessel to a side face of the first dynode plate facing the inner wall. 9. The photomultiplier tube according to claim 8, further comprising: a step provided by changing a distance from a side wall of the vacuum vessel to a side surface of the second dynode plate facing the side wall.
PCT/JP1998/002568 1997-06-11 1998-06-11 Electron multiplier and photomultiplier WO1998057353A1 (en)

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JP5330083B2 (en) * 2009-05-12 2013-10-30 浜松ホトニクス株式会社 Photomultiplier tube
US8587196B2 (en) 2010-10-14 2013-11-19 Hamamatsu Photonics K.K. Photomultiplier tube
JP5581173B2 (en) * 2010-10-25 2014-08-27 株式会社日立製作所 Mass spectrometer
CN102918624B (en) * 2011-06-03 2013-11-06 浜松光子学株式会社 Electron multiplier and photomultiplier tube containing same

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