RU2787550C1 - Method for manufacturing a high-power microwave field-effect transistor based on a semiconductor heterostructure based on gallium nitride - Google Patents

Abstract

FIELD: microwave electronics.

SUBSTANCE: invention relates to microwave electronics. A method for manufacturing a high-power microwave field effect transistor based on a semiconductor heterostructure based on gallium nitride according to the invention includes forming a semiconductor heterostructure based on gallium nitride on the front surface of the substrate in the form of a sequence of layers, forming a given topology of the elements of the active region of the field effect transistor on the layers of the semiconductor heterostructure, providing for the formation of a channel in the form of a two-dimensional electron gas near the heteroboundary of layers of narrow-gap and wide-gap materials of a semiconductor heterostructure, ohmic contacts of the source and drain electrodes, a gap under the gate electrode, the Schottky barrier-type gate electrode itself, the formation of a passivating coating from a dielectric material, while the formation of a semiconductor heterostructure on the substrate and the sequence of technological operations of the manufacturing process as a whole is carried out in two stages, at the first stage, the formation of a direct sequence of layers of a semiconductor heterostructure - a GaN buffer layer with a thickness of (2.0-3.0)×10^-6 m, an AlN layer with a thickness of (0.5-0.7)×10^-9 m, an AlxGa1-xN barrier layer, where х is equal to 0.24-0.26, with a thickness of less than 25.0×10^-9 m, of an additional passivating Si₃N₄ coating on the front surface of the AlxGa1-xN barrier layer with a thickness of (5.0-10.0)×10^-9 m, at In this case, the above layers are formed in a single technological process, the formation of the topology of the elements of the active region of the field-effect transistor on the front surface of the AlxGa1-xN barrier layer, while simultaneously determining the location of the active region of the gap under the gate electrode, by means of the method for reactive ion etching in inductively coupled plasma of a mixture of gases - Cl₂ and BCl₃, at their ratio of 1:9, respectively, at a pressure of 3.1-3.3 Pa, at the second stage, the contact layer of the semiconductor heterostructure is formed, in the form of GaN, in the area of the source and drain electrodes, respectively, at a depth equal to the sum of the thicknesses the mentioned layers of the semiconductor heterostructure formed at the first stage, from the front surface of the AlxGa1-xN barrier layer and up to (1.9-2.9)×10^-6 m from the back surface of the GaN buffer layer, with simultaneous doping of the GaN contact layer with a silicon donor impurity Si with a dopant concentration of 1019-1020 cm^-3, the formation of mesa insulation of the active region of the field-effect transistor by means of reactive ion etching in an inductively coupled plasma of a mixture of gases - Cl₂ and BCl₃, with their ratio 1 :9, respectively, pressure 3.1-3.3 Pa, ohmic contacts of the source and drain electrodes on the front surface of the mentioned contact layer in the form of GaN, a slot for the gate electrode according to a different topology of the elements of the active region of the field-effect transistor and the gate electrode itself, passivating coating at the same time on the entire front surface of the active area of the field-effect transistor with a thickness of (50-100)×10^-9 m, with protection of the source, drain, channel and gate electrodes.

EFFECT: invention provides an increase in output power and gain, a reduction in noise figure, an increase in quality, and a simplification of the manufacturing method.

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Description

The invention relates to microwave electronics, namely, a method for manufacturing high-power field-effect transistors based on a semiconductor heterostructure based on gallium nitride and is intended for the development of amplifying and control monolithic integrated circuits of microwaves based on them and, accordingly, a wide class of devices for microwave electronics and electronics, including radar devices.

Powerful electronic devices and, above all, powerful microwave field effect transistors (hereinafter referred to as a field effect transistor) and, accordingly, amplifying and controlling monolithic microwave integrated circuits based on them, while made on a semiconductor heterostructure based on gallium nitride GaN (hereinafter referred to as a semiconductor heterostructure) differ more:

- a wide range of operating frequencies, while advancing to higher values,

- high output power,

-low noise figure,

- high operating temperatures and so on.

However, due to the fact that this semiconductor material belongs to wide-gap semiconductor materials, this causes certain both structural and technological difficulties in the formation and manufacture of both the semiconductor heterostructure itself and the high-power microwave field effect transistor as a whole.

A known method of manufacturing a high-power microwave field effect transistor based on a semiconductor heterostructure based on gallium nitride GaN, including the creation on the surface of a silicon wafer with an epitaxial heterostructure of the p-GaN/AlGaN/GaN type of a gate p-GaN mesa region, inter-device mesa insulation, the formation of ohmic contacts to to the areas of the drain and source electrodes of the field-effect transistor, the formation of a two-layer resistive mask by lithography methods, surface cleaning with an epitaxial heterostructure, the formation of a gate electrode by vacuum deposition of thin films of gate metallization, the removal of the resist mask.

In which, in order to increase the threshold voltage of unlocking, before deposition of thin films of gate metallization, the epitaxial heterostructure ( plate) is subjected to treatment in an atmosphere of atomic hydrogen for 10-60 s, at a temperature of 20-150 ° C and a flux density of hydrogen atoms on the mentioned surface 10 ¹³ -10 ¹⁶ at. cm ^-2 s ^-1 . [Patent No. 2642495 RU. The method of increasing the threshold voltage for unlocking a GaN transistor / Erofeev E.V.//Bul. - 2018 - No. 3/].

A known method of manufacturing a high-power microwave field effect transistor based on a semiconductor heterostructure based on gallium nitride GaN, including cleaning the surface of a silicon wafer with an epitaxial heterostructure of the p-GaN/AlGaN/GaN type, deposition by electron beam evaporation in vacuum of thin films of gate metallization, formation by plasma-chemical etching methods gate p-GaN mesa region and device-to-device mesa isolation, formation of ohmic contacts to the areas of drain and source electrodes, passivation of the active regions of the field-effect transistor.

In which, in order to increase the control voltage at the gate electrode of the GaN field-effect transistor, before deposition of thin films of gate metallization on the surface of the active region of the field-effect transistor by plasma-chemical methods, a thin film of a dielectric based on silicon nitride with a thickness of 1 to 50 nm is deposited. [Patent No. 2669265 RU. A method for increasing the threshold voltage for opening a GaN transistor / Erofeev E.V. //Bul. - 2018 - No. 28/].

The technical solutions of the first and second analogues provided an increase in approximately - the threshold voltage by 17 percent and the control voltage up to 6 V, respectively.

However, since these powerful microwave field effect transistors are made of p-type conductivity, this significantly limits their application.

A known method of manufacturing a high-power gallium nitride field-effect transistor, including the selection of the active region by chemical etching, carrying out lithography processes and the formation of ohmic contacts of the drain and source electrodes on the contact layer of the active region semiconductor structure, the formation of a gap under the gate electrode or another structural element in dielectric, metal or resistive masks of the first level.

In which, in order to increase the length of the gate electrode (about 150 nm), by providing a smooth edge of the resist masks and a clean working surface (free of resist), a thin layer of metal, polymer or other highly conductive coating or a combination of them, after which from electronic resists second-level resist masks are formed and expanded caps of Schottky-type gate electrodes are formed by the method of electron lithography, then conductive coatings are removed in the open windows of the second-level resist masks, barrier metallization is deposited, finishing treatments are carried out using the method of explosive lithography of resist masks of electronic resists of the second level, caps are formed gate electrodes such as a Schottky barrier or other structural elements, remove conductive coatings from open surface areas, if necessary, form cavities under the hat fieldsgate electrodes the masks of the first level are selectively removed, the channel surface between the drain and source electrodes is passivated with a dielectric layer in such a way that under the hat fieldsgate electrodes such as a Schottky barrier, air cavities are formed, then windows are opened in the dielectric above the drain and source electrodes, the next levels are metallized, the substrate is metallized from the reverse side, and the substrate is separated into crystals. [Patent No. 2668635 RU. A method of manufacturing a powerful gallium nitride field-effect transistor /Torkhov N.A.//Bul. - 2018 - No. 28/] - prototype.

The a method for manufacturing a high-power microwave field-effect transistor based on a semiconductor heterostructure based on gallium nitride is different:

- high resistivity values of the ohmic contacts of the source and drain electrodes and, accordingly,

-- low output power and gain;

-- high noise figure values.

- a rather complicated manufacturing process, including technological operations for the formation of the gate electrode.

The technical result of the claimed method of manufacturing a high-power microwave field effect transistor based on a semiconductor heterostructure based on gallium nitride is to increase the output power and gain, reduce the noise figure, improve the quality and simplify the manufacturing method.

The technical result is achieved by the claimed method of manufacturing a high-power microwave field effect transistor based on a semiconductor heterostructure based on gallium nitride, including

formation on the front surface of a given substrate a given semiconductor heterostructure based on gallium nitride in the form of a sequence of main layers and, accordingly, the material of each of them, while at least one of which is a narrow-gap and one is a wide-gap material, with their specified parameters,

formation of at least one given topology of elements active region of a field-effect transistor on given layers of a semiconductor heterostructure, providing for the formation of:

a channel in the form of a two-dimensional electron gas near the heteroboundary of layers of narrow-gap and wide-gap materials of a semiconductor heterostructure,

ohmic contacts of the source and drain electrodes, through the technological operations of lithography methods and the application of a sequence of metal layers,

slots for the gate electrode, through the technological operations of electron lithography methods and the application of a sequence of dielectric and conductive layers,

the gate electrode itself, such as a Schottky barrier, of a given configuration, by applying a sequence of metal layers,

formation of a passivating coating, from a dielectric material, of a given thickness.

Wherein

the formation of a given semiconductor heterostructure on a given substrate and the sequence of technological operations of the manufacturing process as a whole is carried out in two stages, while:

at the first stage - carry out the formation:

a direct sequence of the following layers of a semiconductor heterostructure - a buffer layer of gallium nitride GaN, with a thickness of (2.0-3.0) × 10 ^-6 m, a layer of aluminum nitride AlN, with a thickness of (0.5-0.7) × 10 ^-9 m, a barrier layer of gallium aluminum nitride Al _x Ga _1-x N, where X is (0.24-0.26), with a thickness of less than 25.0×10 ^-9 m,

additional passivating coating - a layer of silicon nitride Si₃N_four, on the front surface barrier layer of aluminum gallium nitride Al_xGa_1xN, thickness (5.0-10.0)×10^-nine m, while the above layers are formed in a single technological process,

given - a different topology of the elements of the active region of the field-effect transistor, on the front surface barrier layer of gallium aluminum nitride Al_xGa_1xN, while determining the location of the active region of the gap under the gate electrode, using the method of reactive ion etching in an inductively coupled plasma of a mixture of gases - chlorine Cl₂ and boron trichloride BCl₃, at their ratio (1:9), respectively, pressure (3.1-3.3) Pa,

at the second stage - the formation is carried out:

contact layer of gallium nitride GaN semiconductor heterostructure, in the area of the source and drain electrodes, respectively, at a depth equal to the sum of the thicknesses of the mentioned layers of the semiconductor heterostructure formed at the first stage, from the front surface of the barrier layer of aluminum gallium nitride Al _x Ga _1-x N and up to (1.9-2.9)×10 ^-6 m from the reverse surface of the buffer layer of gallium nitride GaN, while doping the contact layer of gallium nitride GaN with a silicon donor impurity Si, with a dopant concentration of (10 ¹⁹ -10 ²⁰ ) cm ^-3 ,

mesa-isolation of the active region of the field-effect transistor, by means of the method of reactive ion etching in inductively coupled plasma of a mixture of gases - chlorine Cl ₂ and boron trichloride BCl ₃ , at their ratio (1:9), respectively, pressure (3.1-3.3) pa,

ohmic contacts of the source and drain electrodes on the front surface of the contact layer of gallium nitride GaN,

slots for the gate electrode according to a different topology and the gate electrode itself,

passivating coating simultaneously on the entire front surface of the active area of the field-effect transistor, with a thickness of (50.0-100.0)×10 ^-9 m, while protecting the source, drain, channel and gate electrodes.

A substrate made of a semiconductor or dielectric material is used that is maximally consistent with the material of the adjacent layer - the buffer layer of gallium nitride GaN in terms of the parameters of the crystal lattice and the temperature coefficient of linear expansion.

The formation of layers of the semiconductor heterostructure in the first and second stages is carried out by the method of deposition of organometallic compounds from the gaseous phase (MOCVD) of the appropriate composition.

The ohmic contacts of the source and drain electrodes are formed by applying a direct sequence of metal layers of titanium Ti-platinum Pt-gold Au materials using the electron beam deposition method or the thermal evaporation method.

The gate electrode of the Schottky barrier type is formed into a T-shaped, or L-shaped, or Δ-shaped configuration by depositing a direct sequence of metallic layers of nickel-Ni-gold-Au materials.

The passivating coating is formed from a dielectric material of silicon nitride Si ₃ N ₄ .

Disclosure of the essence of the invention.

The set of essential features of the claimed method of manufacturing a high-power microwave field effect transistor on a semiconductor heterostructure based on gallium nitride, both the restrictive part and the distinctive part, namely.

The formation of a given semiconductor heterostructure on a given substrate and the sequence of technological operations of the manufacturing process as a whole is carried out in two stages, while:

at the first stage - carry out the formation:

a direct sequence of the following layers of a semiconductor heterostructure - a buffer layer of gallium nitride GaN, with a thickness of (2.0-3.0) × 10 ^-6 m, a layer of aluminum nitride AlN, with a thickness of (0.5-0.7) × 10 ^-9 m, a barrier layer of gallium aluminum nitride Al _x Ga _1-x N, where X is (0.24-0.26), with a thickness of less than 25.0×10 ^-9 m,

additional passivating coating - a layer of silicon nitride Si₃N_four, on the front surface barrier layer of aluminum gallium nitride Al_xGa_1xN, thickness (5.0-10.0)×10^-nine m, while the above layers are formed in a single technological process,

given - a different topology of the elements of the active region of the field-effect transistor, on the front surface barrier layer of gallium aluminum nitride Al_xGa_1xN, while simultaneously determining the location of the active region of the gap under the gate electrode, using the method of reactive ion etching in an inductively coupled plasma of a mixture of gases - chlorine Cl₂ and boron trichloride BCl₃, at their ratio (1:9), respectively, pressure (3.1-3.3) Pa,

at the second stage - the formation is carried out:

contact layer of gallium nitride GaN semiconductor heterostructure, in the area of the source and drain electrodes, respectively, at a depth equal to the sum of the thicknesses of the mentioned layers of the semiconductor heterostructure formed at the first stage, from the front surface of the barrier layer of aluminum gallium nitride Al _x Ga _1-x N and up to (1.9-2.9)×10 ^-6 m from the reverse surface of the buffer layer of gallium nitride GaN, while doping the contact layer of gallium nitride GaN with a silicon donor impurity Si, with a dopant concentration of (10 ¹⁹ -10 ²⁰ ) cm ^-3 ,

mesa-isolation of the active region of the field-effect transistor, by means of the method of reactive ion etching in inductively coupled plasma of a mixture of gases - chlorine Cl ₂ and boron trichloride BCl ₃ , at their ratio (1:9), respectively, pressure (3.1-3.3) pa,

ohmic contacts of the source and drain electrodes on the front surface of the contact layer of gallium nitride GaN,

slots for the gate electrode according to a different topology and the gate electrode itself,

passivating coating simultaneously on the entire front surface of the active area of the field-effect transistor, with a thickness of (50.0-100.0)×10 ^-9 m, while protecting the source, drain, channel and gate electrodes.

Formation of a given semiconductor heterostructure on a given substrate and the sequence of technological operations of the manufacturing process as a whole in two stagesprovidespossibility formation of a contact layer of gallium nitride GaN semiconductor heterostructure, whileheavily alloyedsilicon donor impurity Si, with dopant concentration (10^nineteen-10²⁰) cm^-3,

and thereby reducing the potential barrier between the contact layer of gallium nitride GaN and the ohmic contacts of the source and drain electrodes

and thus - a decrease in the resistivity of the ohmic contacts of the source and drain electrodes and, as a result, -

First, increase the output power and gain,

secondly, noise figure reduction .

The formation of the contact layer of gallium nitride GaN is strictly local , namely directly in the area of the source and drain electrodes, respectively, and at the same time, according to the above, a different topology of the elements of the active region of the field-effect transistor (in contrast to the prototype method, in which the contact layer is formed in the form of a continuous layer) and at the specified depth of the semiconductor heterostructure provides :

direct contact of a two-dimensional electron gas (channel of a field-effect transistor) with a contact layer of gallium nitride GaN, while locally ,

and thus - a decrease in the resistance of the source-drain electrodes during the operation of the field-effect transistor,

and thus - an increase in the saturation current of the field-effect transistor and, as a result, an additional increase in output power.

In this case, in aggregate:

with the specified parameters of the main layers of the semiconductor heterostructure, including their thickness;

- with a different sequence of technological operations of the manufacturing process and with their other technological modes indicated,

at the same time, the values of which (parameters of the semiconductor heterostructure and modes of technological operations) are maximally optimized - this provides a significant increase in the quality of the semiconductor heterostructure, and, as a result - further - a greater achievement of the specified technical result.

Moreover, this combination of features provides a simplification of the manufacturing method, and above all due to the simplification of the technological operations of forming the gate electrode.

Formation at the first stage:

- a buffer layer of gallium nitride GaN, with a thickness of both less than 2.0 × 10 ^-6 m and more than 3.0 × 10 ^-6 m is not desirable, in the first case - due to the presence of an unacceptable number of growth defects, in the second - not expedient from the point of view of reducing the number of defects;

- a layer of aluminum nitride AlN, with a thickness of both less than 0.5 × 10 ^-9 m and more than 0.7 × 10 ^-9 m is not desirable, in the first case - due to the presence of an unacceptable number of growth defects, in the second - due to for the probability of increasing mechanical stresses;

- a barrier layer of gallium aluminum nitride Al _x Ga _1-x N, with a content of these chemical elements both less than 0.24 and more than 0.26 is not desirable, in the first case - due to a decrease in its functionality, in the second - because for the probability of formation of growth defects, as well as a thickness of more than 25.0×10 ^-9 m - due to the complexity of the manufacturing method, and less limited by the thickness of the Al _x Ga _1-x N molecular layer;

- additional passivating coating of silicon nitride Si ₃ N ₄ , on the front surface of the barrier layer of gallium aluminum nitride Al _x Ga _1-x N, with a thickness of less than 5.0 × 10 ^-9 m, and more than 10.0 × 10 ^-9 m not desirable, in the first case - due to a violation of the continuity of the passivating coating, in the second - not advisable;

- topology of the elements of the active region of the field-effect transistor by means of the method of reactive ion etching in inductively coupled plasma of a mixture of gases - chlorine Cl ₂ and boron trichloride BCl ₃

-- in violation of their specified ratio is undesirable due to a decrease in the quality of the formation of the contact layer of gallium nitride GaN and, accordingly, an increase in the specific resistance of the ohmic contacts of the source and drain electrodes;

-- pressure of both less than 3.1 Pa and more than 3.3 Pa is not desirable, in the first case - because of the probability of formation of radiation defects, in the second - because of the probability of underetching under the resist mask, which leads to a violation of the etching profile and a decrease in the quality of formation of the contact layer of the semiconductor heterostructure and, accordingly, an increase in the specific resistance of the ohmic contacts of the drain and source electrodes.

Formation at the second stage:

- the contact layer of gallium nitride GaN at the mentioned depth of both less than 1.9×10 ^-6 m and more than 2.9×10 ^-6 m is not desirable, in the first case due to the lack of contact between the two-dimensional electron gas (field-effect transistor channel ) and a contact layer of gallium nitride GaN, in the second - due to the probability of formation of growth defects,

as well as, with its simultaneous doping with a silicon donor impurity Si, with a dopant concentration of both less than 10 ¹⁹ cm ^-3 and more than 10 ²⁰ cm ^-3 is not desirable, in the first case - due to an increase in the resistivity of the ohmic contacts of the source electrodes and drain, in the second - due to a violation of the crystal structure of the semiconductor layers;

- mesa isolation by reactive ion etching in inductively coupled plasma of gas mixture - chlorine Cl ₂ and boron trichloride BCl ₃ ,

with a violation of their specified ratio (1: 9) is not desirable due to a violation of the etching profile of the contact gallium nitride GaN and the buffer aluminum gallium nitride Al _x Ga _1-x N layers of the semiconductor heterostructure and, accordingly, a decrease in their quality,

as well as a pressure of both less than 3.1 Pa and more than 3.3 Pa is not desirable, in the first case - because of the probability of formation of radiation defects, in the second - because of the probability of formation of underetches under the resist mask and violation of the etching profile of the mentioned layers and, accordingly, a decrease in their quality;

- a passivating coating with a thickness of both less than 50.0×10 ^-9 m and more than 100.0×10 ^-9 m is not desirable, in the first case - due to a violation of its functionality, in the second - not advisable.

So, the claimed method of manufacturing a high-power microwave field effect transistor based on a semiconductor heterostructure based on gallium nitride fully provides the technical result - an increase in output power and gain, a decrease in noise figure, an increase in quality and a simplification of the manufacturing method.

The invention is illustrated in the drawing.

In FIG. 1 shows a general view of a high-power microwave field effect transistor on a semiconductor heterostructure based on gallium nitride, manufactured by the claimed method in the section , where

dielectric substrate - 1,

semiconductor heterostructure in the form of a sequence of basic layers - 2,

- topology of the elements of the active region of the field-effect transistor - 3,

- channel in the form of a two-dimensional electron gas - 4,

- ohmic contacts of the source and drain electrodes - 5, 6, respectively,

- slot for the gate electrode and the gate electrode itself - 7,

- passivating coating - 8,

- buffer layer of gallium nitride GaN - 9,

- a layer of aluminum nitride AlN - 10,

- a barrier layer of gallium aluminum nitride Al _x Ga _1-x N - 11, - an additional passivating coating - a layer of silicon nitride Si ₃ N ₄ - 12,

- contact layer of gallium nitride GaN - 13,

- mesa-isolation of the active region of the field-effect transistor - 14.

Examples of a specific implementation of the claimed method.

The claimed method of manufacturing a high-power microwave field effect transistor on a semiconductor heterostructure based on gallium nitride provides.

1. Formation on the front surface of a given substrate a given semiconductor heterostructure based on gallium nitride in the form of a sequence of main layers and, accordingly, the material of each of them, while at least one of which is a narrow-gap and one is a wide-gap material, with their specified parameters.

2. Formation of at least one given topology of the elements of the active region of the field-effect transistor on the given layers of the semiconductor heterostructure.

3. In the process of implementing the method - the use of traditional (classical) technological operations of technological processes (methods) for the manufacture of thin-film technology.

Example 1

On the front side of the specified substrate 1, made of dielectric material - silicon carbide (SiC), thickness 100.0 × 10^-nine m (Grade 4H), which has sufficient consistency with the material of the adjacent buffer layer of gallium nitride GaN 9 semiconductor heterostructure 2 in terms of the crystal lattice parameters and the temperature coefficient of linear expansion - (5-6) × 10^-6 To^-1 for SiC, 3.3-7.2×10^-6 To^-1 for GaN).

Carry out the formation of a given semiconductor heterostructure 2 and the sequence of technological operations of the manufacturing process of the field-effect transistor, while in two stages.

At the first stage.

A direct sequence of the following main layers of the semiconductor heterostructure is formed:

- a buffer layer of gallium nitride GaN 9, 2.5 × 10 ^-6 m thick - narrow-gap,

- a layer of aluminum nitride AlN 10, 0.6 × 10 ^-9 m thick - wide-zone,

- a barrier layer of gallium aluminum nitride Al _x Ga _1-x N 11, where X is 0.25, with a thickness of less than 10.0×10 ^-9 m - wide-gap.

Each of the above layers of the semiconductor heterostructure is formed by the method of deposition of organometallic compounds from the gaseous phase (MOCVD) of the appropriate composition - trimethylgallium, trimethylaluminum.

Furtherform an additional passivating coating - a layer of silicon nitride Si₃N_four12, thickness 7.5×10^-nine m, front surface barrier layer of aluminum gallium nitride Al_xGa_1xN 11, via PECVD.

In this case, the last layers (9, 10, 11 and 12) are formed in a single technological process.

Next , a given - different topology of the elements of the active region of the field-effect transistor 3 is formed on the front surface of the barrier layer of aluminum gallium nitride Al _x Ga _1-x N 11 of the semiconductor heterostructure while simultaneously determining the location of the active region of the slot under the gate electrode 7, using the method of reactive ion etching in inductive bound plasma of a mixture of gases - chlorine Cl ₂ and boron trichloride BCl ₃ , at their ratio (1:9), respectively, at a pressure of 3.2 Pa.

At the second stage.

A contact layer of gallium nitride GaN 13 of the semiconductor heterostructure 2 is formed, in the area of the source electrodes 5 and drain 6, respectively, at a depth equal to the sum of the thicknesses of the mentioned layers of the semiconductor heterostructure formed at the first stage, from the front the surface of the barrier layer of aluminum gallium nitride Al_xGa_1xN 11 and up to 2.4×10^-6 m from back the surface of the buffer layer of gallium nitride GaN 9, by means of the method of deposition of organometallic compounds from the gaseous phase (MOCVD) of the corresponding composition - trimethylgallium, while doping the contact layer of gallium nitride GaN 13 with a donor impurity of silicon Si, with a dopant concentration of 10^18.5 cm^-3.

Next , a mesa-isolation of the active region of the field-effect transistor 14 is formed, by means of the method of reactive ion etching in an inductively coupled plasma of a mixture of gases - chlorine Cl ₂ and boron trichloride BCl ₃ , at their ratio (1:9), respectively, pressure (3.1-3 ,3) Pa.

Next , ohmic contacts of the source electrodes 5 and drain 6 are formed on the contact layer of gallium nitride GaN 13 from a direct sequence of a system of metal layers of materials titanium Ti-platinum Pt-gold Au, thickness (3×10 ^-9 -10 ^-8 -3×10 ^-7 m.), respectively, through the methods of reverse lithography and thermal evaporation.

Next , they form:

a) a slot for the gate electrode 7, according to a different topology of the elements of the active region of the field-effect transistor 3, by means of technological operations of electron lithography methods and applying a sequence of dielectric (Si ₃ N ₄ ) and conductive layers (Al), and

b) the gate electrode 7 of the Schottky barrier type itself from a direct sequence system of metal layers of nickel Ni-gold Au materials with a total thickness of 0.33×10 ^-6 m, Δ-shaped configuration, through reverse lithography and thermal evaporation methods.

Next , a passivating coating 8 is formed from the dielectric material of silicon nitride Si ₃ N ₄ simultaneously on the entire front surface of the elements of the active region of the field-effect transistor, with a thickness of 75.0 × 10 ^-9 m, while protecting the electrodes of the source 5, drain 6, channel 4, and the electrode shutter 7.

Examples 2-6. Similarly to example 1, samples of high-power microwave field-effect transistors on a semiconductor heterostructure based on gallium nitride were made, but with other design parameters and technological modes specified in the claims (examples 2-3, 6), and beyond (examples 4-5).

Example 7 - prototype.

On the manufactured samples measured:

Resistivity of the ohmic contacts of the source and drain electrodes ( ρ), Ohm×mm using the long line method (TLM method).

Output power (P _out. ), W , by means of a wattmeter (SMZ010);

gain (K _U ) through a network analyzer (Agilent Technologies PNA Network Analyzer);

noise figure (K _sh ), dB by means of the noise figure indicator (X5-2 (IKSH-2), while at a frequency of 10 GHz.

The data are presented in the table.

As can be seen from the table samples of a powerful microwave field effect transistor based on a semiconductor heterostructure based on gallium nitride, manufactured according to the claims of the claimed method (examples 1-3, 6) have:

resistivity of the ohmic contacts of the source and drain electrodes (0.1, 0.15, 0.15, 0.1) Ohm×mm.

output power (5.3, 4.8, 4.85, 6.1) W,

gain (15.0, 12.0, 12.5, 15.0), dB,

noise figure (1.7, 2.0, 2.01, 1.6) dB.

Unlike samples made outside the claims (examples 4-5), which have approximately - the specific resistance of the ohmic contacts of the source and drain electrodes is 0.3 Ohm × mm, the output power is 3.2 W, the gain is 7.0 dB, noise figure 2.2 dB.

Thus, the declaredWitha method for manufacturing a high-power microwave field-effect transistor on a semiconductor heterostructure based on gallium nitride provides sufficiently high values of electrical parameters:

output power, approximately 5.3 W,

gain, approximately 15 dB, and

rather low values:

noise figure, approximately 1.7 dB.

It should be noted that a powerful microwave field-effect transistor, manufactured according to the claimed method with sufficiently high values above the indicated basic electrical parameters, can be used as an object for import substitution of similar products, which is extremely important today.

Claims (25)

1. A method for manufacturing a high-power microwave field effect transistor based on a semiconductor heterostructure based on gallium nitride, including formation on the front surface of a given substrate a given semiconductor heterostructure based on gallium nitride in the form of a sequence of main layers and, accordingly, the material of each of them, at least one of which is a narrow-gap and one is a wide-gap material, with their specified parameters, formation of at least one given topology of elements active region of a field-effect transistor on given layers of a semiconductor heterostructure, providing for the formation of: a channel in the form of a two-dimensional electron gas near the heteroboundary of layers of narrow-gap and wide-gap materials of a semiconductor heterostructure, ohmic contacts of the source and drain electrodes through the technological operations of lithography methods and the application of a sequence of metal layers, slots for the gate electrode through the technological operations of electron lithography methods and the application of a sequence of dielectric and conductive layers, the gate electrode of the Schottky barrier type itself, of a given configuration, by applying a sequence of metal layers, formation of a passivating coating from a dielectric material of a given thickness, characterized in that the formation of a given semiconductor heterostructure on a given substrate and the sequence of technological operations of the manufacturing process as a whole is carried out in two stages, while: at the first stage, the formation is carried out: a direct sequence of the following layers of a semiconductor heterostructure - a buffer layer of gallium nitride GaN with a thickness of (2.0-3.0) × 10 ^-6 m, a layer of aluminum nitride AlN with a thickness of (0.5-0.7) × 10 ^-9 m, a barrier layer gallium aluminum nitride Al _x Ga _1-x N, where X is 0.24-0.26, with a thickness of less than 25.0 × 10 ^-9 m, additional passivating coating - a layer of silicon nitride Si₃N_four, on the front surface barrier layer of aluminum gallium nitride Al_xGa_1xN thickness (5.0-10.0)×10^-nine m, while the above layers are formed in a single technological process, given - a different topology of the elements of the active region of the field-effect transistor, on the front surface barrier layer of gallium aluminum nitride Al_xGa_1xN, while determining the location of the active region of the gap under the gate electrode, using the method of reactive ion etching in an inductively coupled plasma of a mixture of gases - chlorine Cl₂ and boron trichloride BCl₃, with their ratio 1:9, respectively, pressure 3.1-3.3 Pa, at the second stage, the formation is carried out: contact layer of gallium nitride GaN of the semiconductor heterostructure in the region of the source and drain electrodes, respectively, at a depth equal to the sum of the thicknesses of the mentioned layers of the semiconductor heterostructure formed at the first stage, from the front surface of the barrier layer of aluminum gallium nitride Al _x Ga _1-x N and up to ( 1.9-2.9) × 10 ^-6 m from the reverse surface of the buffer layer of gallium nitride GaN, while doping the contact layer of gallium nitride GaN with a silicon donor impurity Si with a dopant concentration of 10 ¹⁹ -10 ²⁰ cm ^-3 , mesa-isolation of the active region of the field-effect transistor by means of the method of reactive ion etching in an inductively coupled plasma of a mixture of gases - chlorine Cl ₂ and boron trichloride BCl ₃ , at a ratio of 1:9, respectively, at a pressure of 3.1-3.3 Pa, ohmic contacts of the source and drain electrodes on the front surface of the contact layer of gallium nitride GaN, slots for the gate electrode according to a different topology of the elements of the active region of the field-effect transistor and the gate electrode itself, passivating coating simultaneously on the entire front surface of the active area of the field-effect transistor with a thickness of (50-100)×10 ^-9 m, while protecting the source, drain, channel and gate electrodes. 2. The method according to claim 1, characterized in that a substrate of a semiconductor or dielectric material is used that is maximally consistent with the material of the adjacent layer - a buffer layer of gallium nitride GaN in terms of the crystal lattice parameters and the temperature coefficient of linear expansion. 3. The method according to claim. 1, characterized in that the formation of layers of the semiconductor heterostructure in the first and second stages is carried out by the method of deposition of organometallic compounds from the gaseous phase (MOCVD) of the appropriate composition. 4. The method according to claim 1, characterized in that the ohmic contacts of the source and drain electrodes are formed by applying a direct sequence of metal layers of titanium Ti-platinum Pt-gold Au materials by electron beam deposition or thermal evaporation. 5. The method according to claim 1, characterized in that the gate electrode is formed in a T-shaped, or L-shaped, or Δ-shaped configuration by applying a direct sequence of metal layers of nickel-Ni-gold-Au materials. 6. The method according to p. 1, characterized in that the passivating coating is formed from a dielectric material of silicon nitride Si ₃ N ₄ .

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