RU2361269C2 - Method of logical differentiation of analogue signals equivalent to binary code and device to this end - Google Patents

Abstract

FIELD: physics; computer engineering.

SUBSTANCE: invention relates to computer engineering and can be used in making arithmetic units and carrying out arithmetic operations, particularly summation and subtraction processes in position-sign codes. The device contains four AND elements, two OR elements, and three NOT elements.

EFFECT: more functional capabilities.

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Description

The invention relates to computer technology and can be used in the construction of arithmetic devices and arithmetic operations, in particular the processes of summation and subtraction, in position-sign codes. The circuit implementation of the device allows minimizing end-to-end transfers by logically differentiating the sequence of arguments of the terms and organizing parallel functional structures of adders with local transfers (to an adjacent digit) regardless of the bit length of the adder itself, which ultimately leads to a significant increase in the speed of the summation process. At the same time, a characteristic feature of parallel adders is the presence of a circuit implementation of the logical differentiation operation, which ultimately eliminates end-to-end transfers, and the higher the adder bit capacity, the greater the speed gain.

A known converter of binary code into position-sign (see AS No. 1438005 dated 01.29.87), containing a group of (n-1) elements HE- (function f (&) - HE) where n is the bit depth of the input code, and a group of (n-1) elements And (function f (&) - And), the outputs of which are the outputs of the least significant bits of the positive group of the converter, the output of the highest bit of which is the input of the highest bit of the converter, i-th (i = 2 , ..., n), the input of which is connected to the input of the (i-1) th element of the NOT group, the output of which is connected to the first input of the (i-1) th element of the group, the second input of which is dined with the input of the (i-1) th digit of the converter, while a group of (n-1) OR-NOT elements is introduced into it, the first inputs of which are connected to the inputs of the corresponding bits of the converter, the second inputs of the OR-NOT elements (function f ₁ (} &) - OR) the groups are connected to the outputs of the corresponding elements of the NOT group, the low-order input of the converter, together with the outputs of the elements of the OR-NOT group, forms the n lower-order bits of the outputs of the negative group of the converter, the output of the (n + 1) -th bit of which connected to the output of the (n-1) th element of the NOT group (prot ).

The known prototype has technological capabilities, which consist in the fact that to solve the problem of increasing the speed of arithmetic operations, namely, localization of end-to-end transfer in the functional structures of the process of summing and subtracting, the logical differentiation operation is introduced, which is essentially the operation of preliminary introduction of end-to-end transfer, which prototype. The disadvantage of the prototype is the lack of functionality to convert the input analog signals ± [n _i ], equivalent to the signed binary code ± f (2 ⁿ ).

The technological and technical result of the proposed invention is the expansion of functionality, for example, the formation of output analog signals taking into account the sign of analog signals that are equivalent to binary code, and the expansion of the scope of the operation of logical differentiation, for example, in the structures of the adder and multiplier.

The specified technological result is achieved in the following way.

The method of logical differentiation of analog signals [n _i ], where i → 1, 2, ... q, are equivalent to the binary code f (2 ⁿ ), including the formation of a conditionally positive + m _i and conditionally negative -m _i analog signals in the "i" category that receive either a conditionally high or active analog signal level, or a conditionally low or inactive analog signal level, while the system of output conditionally positive + m _i and conditionally negative -m _i analog signals in the "i" discharge is formed simultaneously by logical co -substituted derivatives of analog signals ¹ + n _^'i and -n ^2' _i; by means of the function f ₁ (}) - OR and derivatives of analog signals -n ^{1 '} _i and + n ^2' _i by the function f ₂ (}) - OR, while the derivatives are conditionally positive + n ^{1 '} _i and conditionally negative -n ^{1 '} _i analog signals are formed by the logical functions f ₁ (&) - And and f ₃ (&) - And from the system of input analog signals n _i "i" discharge, n _i-1 "i-1" discharge and analog signal n ( ±), which is equivalent to the sign bit of the binary code, and when forming derivative conventionally positive analog signal + n ^{l _'i} function f ₁ (k) - and pre alter the activity Rin dnyh analog signals n _i and n (±) by the function f ₁ (k) - NO _2, and the function f (&) - HE, and the formation of a derivative signal conventionally negative analog -n ^{1 _'i} function f ₃ (k) - and preliminary change the activity of the input analog signal n _i-1 "i-1" discharge and n (±) by means of the function f ₃ (&) - NOT and function f ₂ (&) - HE, while the derivatives are conditionally positive + n ^{2 '} _i and conditionally negative -n ^{2 '} _i analog signals are generated by the logical functions f ₄ (&) - And and f ₂ (&) - And from the system of input analog signals n _i "i" discharge, n _i-1 "i-1" discharge and analog si drove n (±), a previously when generating a derivative of a conditionally positive analog signal + n ^{2 '} _{i by the} function f ₄ (&) - AND change the activity of the input analog signals n _i by means of the function f ₁ (&) - NOT, and when forming the derivative negative analog signal -n ^{2 '} _i function f ₂ (&) - AND change the activity of the input analog signal n _i-1 "i-1" discharge by function f ₃ (&) - NOT, while the mathematical model of the process of logical differentiation of analog signals [n _i ] has the form

и

- функция f₁(&)-И и функция f(})-ИЛИ;Where

and

- the function f ₁ (&) - AND and the function f (}) - OR;

“= & =” Is the function of changing the activity of the input analog signals f (&) - HE.

The specified technical result is achieved by the following device.

The device for the logical differentiation of analog signals equivalent to binary code, the “i” bit of which contains two functions f (&) - HE and function f ₁ (&) - И, the first functional connection of the function f ₁ (&) - И is the output functional connection of the function f ₁ (&) - NOT, the input functional connection of which is the input of the analog signal n _i "i" discharge, while in the "i" category introduced three additional functions f ₂ (&) - And, f ₃ (&) - And , f ₄ (k) - D and two functions f ₁ (}) - OR and f ₂ (}) - OR, the output of which functional relationship is conventionally positive and conditionally from itsatelnym yield «i» discharge, and two input functional communication functions f ₁ (}) - OR and f ₂ (}) - OR are output functional linkages functions f ₁ (k) - and, f ₂ (k) - D and f ₃ (&) - And, f ₄ (&) - And accordingly, while the third input functional relationships of the functions f ₁ (&) - And and f ₃ (&) - And are the output functional relationship of the function f ₂ (&) - HE functional input connection which is the third functional connection functions f ₂ (k) - and ₃ and f {k) - I and is an input device for supplying the analog signal n (±), which is equivalent to the sign bit binary code, wherein n rvaya functional connection functions f ₂ (k) - D and f ₃ (k) - and is the input device for supplying the analog signal n _{i «i»} discharge, and the second functional communication functions f ₂ (k) - D and f ₃ (& ) -And are the output functional links of the function f ₃ (&) - NOT, the functional input link of which is the second functional link of the function f ₄ (&) - AND and is the input of the device for supplying an analog signal n _i-1 "i-1" discharge , the first functional relationship of the function f ₄ (&) - AND is the output functional relationship of the first function f ₁ (&) - NOT.

Figure 1 shows a device that implements the proposed method. Figure 2 shows a mathematical model of the logical differentiation of analog signals equivalent to binary code, and its circuit implementation. Figure 3 shows the timing diagrams of the process of logical differentiation of analog signals.

The circuit implementation of the "i" discharge of the conversion device contains the functions f ₁ (&) - AND -f ₄ (&) - H 1-4, the functions f ₅ (}) - OR 5 and f ₆ (}) - OR 6, and functions f ₇ (&) - HE - f ₉ (&) - HE 7-9.

Logical differentiation device for analog signals equivalent to binary code, the “i” bit of which contains two functions f (&) - HE 8 and 9 and function f ₁ (&) - И 1, the first functional connection of function f ₁ (&) - И 1 is the output functional connection of the function f ₁ (&) - NOT 8, the functional input of which is the input of the analog signal n _i "i" discharge, while in the "i" category introduced three additional functions f ₂ (&) - And 2, f ₃ (&) - And 3, f ₄ (&) - H 4, and two functions

f ₁ (}) - OR 5 and f ₂ (}) - OR 6 the output functional connection of which is a conditionally positive and conditionally negative output “i” of the discharge, and the two input functional connections of the functions f ₁ (}) - OR 5 and f ₂ (}) - OR 6 are the output functional relationships of the functions f ₁ (&) - And 1, f ₂ (&) - And 2 and f ₃ (&) - And 3, f ₄ (&) - And 4, respectively, while third functional input relations of the functions f ₁ (&) - And 1 and

f ₃ (&) - And 3 are the output functional link of the function f ₂ (&) - HE 7, the functional input link of which is the third functional link of the functions f ₂ (&) - And 2 and f ₄ (&) - And 4 and is the input of the device for supplying an analog signal n (±), which is equivalent to the sign of the binary code, while the first functional connection of the functions f ₂ (&) - And 2 and f ₃ (&) - And 3 is the input of the device for supplying an analog signal n _i «i» discharge, and the second functional communication functions f ₂ (k) - and 2 and f ₃ (k) - i 3 are output links functional function f ₃ (k) - NOT 9 funct tional input link which is the second functional connection function f ₄ (k) - and 4 and is an input device for supplying the analog signal n _i-1 «i-1" of the discharge, the first functional relationship function f ₄ (k) - AND 4 is the functional output connection of the first function f ₁ (&) - NOT 8.

We explain the operation of the process of logical differentiation in the synthesis of its mathematical model.

First of all, it should be noted that since the arguments in the binary system f (2 ⁿ ) in reality are electric voltages of a high “1” and low “0” level, and the sequence of electric voltages [n _i ] → “101001011”, which, for example, in a time interval,

then it makes sense to write the arguments of the binary system f (2 ⁿ ) from the generally accepted notation [n _i ] → "101001011" in graph-analytical form

One of the possible methods for increasing the speed of arithmetic devices is the translation of analog signals of the functional structures of the arguments of the terms, which are equivalent to the binary number system f (2 ⁿ ), into a system of positive and conditionally negative analog signals that are equivalent to the position-sign code f (+/-). As a result of such a conversion of the logical arguments of the analogue terms in the addition and subtraction procedure, end-to-end transfers do not occur.

The theoretical basis of the transition f (2 ⁿ ) → f (+/-) is the operation of logical differentiation of the sequence of arguments of the analog signals f (2 ⁿ ), as a result of which information about a specific equivalent number will consist in the transition of the inactive level of the analog signal to the active "1" ← “0” and in the transition of the active level of the analog signal to inactive “0” ← “1”. In this case, at each transition from the least significant to the most significant digit “1” ← “0” in f (2 ⁿ ), a conditionally negative high level analog signal “-1” is generated, and with each transition “0” ← “1”, a conditionally positive analog high level signal "+1" in the next category.

The logical differentiation procedure f (2 ⁿ ) → df (2 ⁿ ) / dn → f (+/-) for positive and conditionally negative argument structures + f (2 ⁿ ) and -f (2 ⁿ )

From an analysis of the graph-analytical structures of the logical differentiation of arguments (1) and (2) it follows that in the binary number system f (2 ⁿ ) the sign digit “zn” essentially corresponds to each argument in the structure of a specific binary code. And in this regard, any binary structure of the code f (2 ⁿ ) can be written in the position-sign form f (+/-)

in which the negative component of the sequence of positive arguments + f (2 ⁿ ) is equal to zero "00 ... 0".

The situation is similar in the argument structure -f (2 ⁿ )

where the positive component in the system of arguments corresponds to the logical zeros “00 ... 0”.

With this interpretation of the sign discharge, we can state that each argument in the system f (+/-) is represented with a sign.

It should be noted that in any electronic system there is always a combination of positive and negative arguments, for example, electric charges. Consequently, the number system should also be represented as a combination of positive "+1" and conditionally negative "-1" arguments, since any signed argument can be written as a system of positive and conditionally negative argument

If we interpret the binary system f (2 ⁿ ) in the form of (3) and (4), then the logical transition f (2 ⁿ ) → f (+/-) from the binary number system to the position-sign or ternary system (+1, 0 , -1) can be represented as transformation axioms (5).

Graph-analytical interpretation of the process of logical differentiation of arguments f (2 ⁿ ) → f (+/-). Using the axioms of logical transformations (5) for positive arguments (3) and conditionally negative arguments (4), we form argument structures f ₁ (+/-) *

and f ₂ (+/-) *

in which, after replacing the active logical zeros “+ 1 / -1” → “0” with equivalent passive “0” → “+ 1 / -1”, we finally get the structure of position-sign arguments f ₁ (+/-) and f ₂ (+ / -).

From the analysis of the conversion results directly follows the concept of active and passive "logical zero", which can be written as

“+ 1 / -1” → “0” → “+ 1 / -1”

Further, if we move from a formalized representation of logical arguments to conditionally low and high level electrical signals, we can form a graphoanalytic structure

Then, if we mean by the function f (U), for example, the electric voltage U (t), which changes in time, and pass it through the differentiating electronic structure f (C, R)

U (t) → df (C, R) / dt → U '(t),

then the resulting signal will be U (t) structure of the pulse sequences U '(t) of Fig.3. Based on the foregoing, it follows that the position-sign code (6) is the result of the logical differentiation of the graph-analytical function f (U). Moreover, the derivative f (U) is not devoid of an information parameter, therefore, the binary code f (2 ⁿ ) is redundant in this plane of analysis. Therefore, the synthesized number system f (+/-) is a derivative of the binary number system f (2 ⁿ ), which is positionally signed or bipolar. And since the system is bipolar, in order to get a negative number in the system f (+/-) from a positive number, it is enough to swap the arguments that correspond to the signs “+” and “-”.

Analyzing the obtained results, we can make an unambiguous conclusion that the positionally located logical arguments “1” carry individual information not only about the numerical value, but also about the sign, and the general sign of the architectural composition f (+/-) is determined by the highest order of the general structure of the arguments.

Next, to form a mathematical model of the process of converting the logical differentiation of analog signals equivalent to binary code, we introduce an analytical notation for logical functions, which are essentially a system of electronic components. Therefore, in an analytical form, logical functions can be written in the form of a mathematical symbol of the system (}) with the qualifying sign of the logical element “1” - the symbol of the logical element “OR” and “&” - the symbol of the logical element “AND”. In this case, the symbol “1” of the logical element “OR” can take various digital values, depending on the number of the logical element in the analytical structure of the process of converting the input arguments “m” and “n”.

- Function (OR → "+") of Fig.2

where (=) is the functional relationship f (=) of the logical function f ₁ (}) - OR.

- Function (And → "•") of Fig.3

- Inverting function (NOT) figure 4

Using the introduced analytical expressions of the logical functions f ₁ (}) - OR (7), f ₁ (&) - AND (8) and f ₁ (&) - HE (9), a vector graphic-analytical structure of the logical differentiation process can be formed

f (2 ⁿ ) → f (+/-), for example, for analog signals n _i and n _i-1 “i” and “i-1” bits in the form

where (→) and (←) are directional vectors that are placed above the arguments and the function f (&) - HE and denote the activated (high level) or not activated (low level) arguments or the function f (&) - HE;

- активизированные функции f₁(&)-И и f₄(&)-H;

- activated functions f ₁ (&) - And and f ₄ (&) - H;

- не активизированные функции f₂(&)-И и f₃(&)-И;

- not activated functions f ₂ (&) - And and f ₃ (&) - And;

From the analysis of the vector graphoanalytic structure of activating the functions of expression (10) it follows that the active input arguments n _i and n _i-1 “i” and “i-1” bits activate only the functions f ₁ (&) - And and f ₄ (&) -H with output arguments + m _{i + 1} and -m _i-1 “i + 1” and “i-1” bits, which adequately corresponds to logical differentiation.

Further, for the formation of the mathematical model “i” of the discharge of the conversion process f (2 ⁿ ) → f (+/-), it is necessary to extract from the analytical expression of the graph-analytical structure (10) the structure of the functions of the “i” discharge, which corresponds to the converted arguments “+ m _i ” and "-m _i ". After performing the indicated action, we form the graphoanalytic structure of the process of converting the arguments f (2 ⁿ ) → f (+/-) “i” of the discharge of the form

Analyzing the result, it can be noted that the functional combination of the mathematical model (10) and (11) of the process of converting the arguments f (2 ⁿ ) → f (+/-) "i" of the discharge, the arguments and the function f (&) - HE in which written with directional vectors, with the input and output structure of the arguments [n] and [m] allows to significantly simplify the description of the functional structure (mathematical model) and to eliminate subjective errors. Moreover, to eliminate the verbal description of possible combinations of input and output arguments, it suffices to give additional vector graphoanalytic structures of the process of logical differentiation f (2 ⁿ ) → f (+/-).

Option 1.

Option 2

From the results obtained it follows that, on the one hand, the mathematical model (11), in comparison with the circuit implementation, more succinctly reflects the electronic process of converting arguments. On the other hand, the analytical record of the transformation process (10) also carries the structure of a circuit implementation, the transformation time of which corresponds to two conditional logical functions f (&) - And

Δt → 2f (&).

The synthesized analytical expression (11) is a mathematical model of the process of converting the structure of analog signals + [n _i ], which is equivalent to the positive binary code + f (2 ⁿ ), into a system of conditionally signed analog signals [+ m _i ] and [-m _i ], which is equivalent to the position-sign code f (+/-) and cannot be directly used to convert analog signals - [n _i ], which are equivalent to the negative binary code -f (2 ⁿ ). In this regard, we synthesize the mathematical model of the converter f (2 ⁿ ) → f (+/-) taking into account the sign of the sequence of arguments f (2 ⁿ ). An analysis of the graphoanalytic structures (1) and (2) of the transformation processes + f (2 ⁿ ) and -f (2 ⁿ ) implies that the architectural compositions of the arguments f ₁ (+/-) and f ₂ (+/-) essentially have mutually inverse configuration, therefore, to take into account the sign of the sequence of arguments ± f (2 ⁿ ), it is necessary to introduce the commuting structure of the functions + f (#) and -f (#) in accordance with the graph-analytical structure of the form

where + m ' _i and -m' _i are the arguments of the preliminary transformation of the sequence of arguments f (2 ⁿ ) unsigned.

It follows from the recommended graphoanalytic structure (12) that before the output function f ₁ (}) - OR and f ₂ (}) - OR, in each channel of preliminary generation of arguments (+ m ' _i ) and (-m' _i ), two switching functions f ₃ (&) - And and f ₄ (&) - H, which feed the derived argument + m ' _i or -m' _i , depending on the signed argument or discharge ± f (2 ⁿ ). An analytical expression of such a situation can be written

- for conditionally positive arguments of analog signals + f (2 ⁿ ), for which the sign bit corresponds to the logical argument “O”, we introduce into one of the functional connections f (=) the switching function + f (#), which is implemented by the logical function f ₄ (&) - And, an additional inverting function f ₃ (&) - NOT to activate the argument + m ' _i at the input of the logical function of the derived argument + m' _i in accordance with the analytical expression (13).

where ± f (2 ⁿ ) is the signed argument for + f (2 ⁿ ) corresponds to the low level analog signal “0”, for -f (2 ⁿ ) - to the high level “1”.

In this case, the derived argument -m ' _i activates the logical functions f ₄ (&) - AND and f ₁ (}) - OR only if the signed argument ± f (2 ⁿ ) corresponds to a conditionally negative sequence of arguments -f (2 ⁿ ), in which the sign discharge corresponds to a high level “1” of the analog signal.

- for conditionally negative arguments of analog signals -f (2 ⁿ ) in accordance with the recommended graphic-analytical structure (12), the analytical expression of the functional switching structure of the functions -f (#) can be written as

Introducing the formed functional structures (13) and (14) into the analytical expression (12), we form a functional structure of the form

where -m ' _{i ↑} and ↓ m' _i are interrelated arguments; = (- m ' _i ) = is the informational state of the functional connection f (=). The generated analytical expression (15), on the one hand, adequately reflects the process of transformation of arguments ± f (2 ⁿ ) → f (+/-). On the other hand, it is essentially a preliminary (redundant) functional structure that needs to be optimized (minimized) or functionally simplified.

From the analysis of the analytical expression (14) it follows that the following actions can be performed

On the one hand, the function f ₁ (&) - And, which forms the derivative of the positive analog signal + m ' _i , can be functionally combined with the functions f ₄ (&) - And and f ₅ (&) - And, since they are of the same name and sequential, i.e. the system of functions f ₁ (&) - And with the corresponding input arguments n _i , & ₁ and n _i-1 can be moved along the corresponding functional relationships f (=) and combined with the corresponding systems of functions f ₄ (&) - And and f ₅ (&)-AND. Similar actions can be performed with respect to the function f ₂ (&) - And and the function f ₃ (&) - And, f ₅ (&) - And. As a result of performing the actions indicated in expression (16), we finally obtain a minimized mathematical model of the form

where the functions f ₁ (&) - And -f ₄ (&) - And in the mathematical model (17) are specified in their membership in the sign argument argument + f (2 ⁿ ) or -f (2 ⁿ ).

The mathematical model (17) corresponds to the circuit implementation of figure 1

An analysis of the obtained result (17) shows that the conversion time Δt of the synthesized functional structure of the conversion process of input conditionally signed analog signals ± [n _i ] equivalent to the signed binary code + f (2 ⁿ ) or -f (2 ⁿ ), followed by the formation of the system analog signals [+ m _i ] and [-m _i ], equivalent to the position-sign code f (+/-), corresponds to three conditional logical functions f (&) - And

Δt → f ₃ (&) → f ₃ (&) → f ₁ (}) → 3 · f (&)

To check the adequacy of the functional structure of the mathematical model (17) to the process of converting the input analog signals ± [n _i ], we will form a vector graphoanalytic structure for activating functions, for example, for a high level of the analog signal n _i , both negative arguments -f (2 ⁿ ) and positive arguments + f (2 ⁿ ).

Option 1. -f (2 ⁿ ) → “1” “010”

Option 2. + f (2 ⁿ ) → “0” “010”

Analysis of vector graphoanalytic structures shows that for negative arguments -f (2 ⁿ ) (option 1), with the active argument n _i , the function f ₁ (&) - И is activated, the output analog signal -m ' _i which activates the function f ₁ (}) -OR, the output analog signal + m _i (±) of which is the result of logical differentiation for the “i” discharge. The situation is similar for positive arguments + f (2 ⁿ ) (option 2), only in this case with the active argument n _{i the} function f ₄ (&) - And and f ₂ (}) - OR is activated, and the result of logical differentiation is the active analog signal -m _i (±). It should be noted that the functions f ₂ (&) - And and f ₃ (&) - And are activated only when the active argument in the structure of analog signals ± f (2 ⁿ ) is the active argument of the analog signal n _i-1

Option 3. -f (2 ⁿ ) → “1” “010”

Option 4. + f (2 ⁿ ) → “0” “010”

Introducing a simplification in writing the signed argument ± f (2 ⁿ ) → n (±) and derived arguments when generating positive input analog signals + m ₁ (±) + m ' _i (+ f (2 ⁿ )) → + n ^1' _i and -m ' _i (-f (2 ⁿ )) → -n ^2' _i and derived arguments when generating conditionally negative input analog signals -m _i (±) + m ' _i (+ f (2 ⁿ )) → + n ^{2 '} _i and

-m ' _i (-f (2 ⁿ )) → -n ^1' _i form the final mathematical model of the form

Scope of the system of analog signals [+ m _i ] and [-m _i ], equivalent to the position-sign code f (+/-).

If we analyze the graph-analytical structure of the process of summing up arguments, for example, positive [n _i ] and [m _i ],

where f ₁ (←) and f ₁ (←) are the local transfer functions of the argument; f (← set) is the function of end-to-end transfers of the argument, it can be noted that the speed of the summation process will be determined by the length of the end-to-end transfer function f (←

Further, if we logically differentiate the arguments of each of the terms, for example, [n _i ] → “10101011” and [m _i ] → “10110101”, and perform the summation operation, then the graph-analytical structure of such a process can be represented as

The analysis of the given graphoanalytic structure shows that, on the one hand, as a result of the logical summation of the analog signals [± n _i ] and [± m _i ] of the position-sign code f (+/-), a logical sum ± [S _i ] is formed in the form of a system that does not interfere with the execution of the next summation cycle. On the other hand, the process of summing in the system of analog signals [± m _i ] and [± m _i ], equivalent to the position-sign code f (+/-), allows you to increase the speed of the adder at least twice. Since, through the logical differentiation of the analog signals [± m _i ] and [± m _i ] of the terms, the potential pass-through transfer of each of the terms is essentially introduced into the logical system, which eliminates the occurrence of pass-through transfer in the process of summing the arguments.

The use of the invention allows to expand the functionality of the converter of binary code into position-sign code, which ultimately will improve the performance of arithmetic devices at least twice.

Claims (1)

Functional structure of logical differentiation of arguments of analog signals equivalent to binary code, conditionally “i” bit of which contains two logical functions

and the function f ₁ (&) - And, the first functional relationship of the function f ₁ (&) - And is the output functional relationship of the logical function

a functional input connection of which is an input for receiving an analog signal of the ni “i” discharge, characterized in that three additional logical functions f ₂ (&) - And, f ₃ (&) - And, f ₄ (& ) -And and two logical functions f ₁ (}) - OR and f ₂ (}) - OR, while the functional relationships in the functional structure of logical differentiation are made in accordance with a mathematical model of the form

Where

and

- the function f ₁ (&) - AND and the function f ₁ (}) - OR;
"=

= "- function for changing the activity of input analog signals

.

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