RU2361269C9 - Method of logical differentiation of analogue signals equivalent to binary code and device to this end - Google Patents
Method of logical differentiation of analogue signals equivalent to binary code and device to this end Download PDFInfo
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- RU2361269C9 RU2361269C9 RU2006144611/09A RU2006144611A RU2361269C9 RU 2361269 C9 RU2361269 C9 RU 2361269C9 RU 2006144611/09 A RU2006144611/09 A RU 2006144611/09A RU 2006144611 A RU2006144611 A RU 2006144611A RU 2361269 C9 RU2361269 C9 RU 2361269C9
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- logical
- binary code
- functional
- signals equivalent
- analogue signals
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Abstract
FIELD: physics; computer engineering.
SUBSTANCE: invention relates to computer engineering and can be used in making arithmetic units and carrying out arithmetic operations, particularly summation and subtraction processes in position-sign codes. The device contains four AND elements, two OR elements, and three NOT elements.
EFFECT: more functional capabilities.
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Description
Claims (1)
Functional structure of logical differentiation of arguments of analog signals equivalent to binary code, conditionally “i” bit of which contains two logical functions and the function f 1 (&) - And, the first functional relationship of the function f 1 (&) - And is the output functional relationship of the logical function a functional input connection of which is an input for receiving an analog signal of the ni “i” discharge, characterized in that three additional logical functions f 2 (&) - And, f 3 (&) - And, f 4 (& ) -And and two logical functions f 1 (}) - OR and f 2 (}) - OR, while the functional relationships in the functional structure of logical differentiation are made in accordance with a mathematical model of the form
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| RU2006144611/09A RU2361269C9 (en) | 2006-12-15 | 2006-12-15 | Method of logical differentiation of analogue signals equivalent to binary code and device to this end |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| RU2006144611/09A RU2361269C9 (en) | 2006-12-15 | 2006-12-15 | Method of logical differentiation of analogue signals equivalent to binary code and device to this end |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| RU2006144611A RU2006144611A (en) | 2008-06-20 |
| RU2361269C2 RU2361269C2 (en) | 2009-07-10 |
| RU2361269C9 true RU2361269C9 (en) | 2010-03-10 |
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| Application Number | Title | Priority Date | Filing Date |
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| RU2006144611/09A RU2361269C9 (en) | 2006-12-15 | 2006-12-15 | Method of logical differentiation of analogue signals equivalent to binary code and device to this end |
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Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| RU2417430C1 (en) * | 2009-08-03 | 2011-04-27 | Лев Петрович Петренко | METHOD FOR LOGIC DIFFERENTIATION d/dn OF POSITIONAL ANALOGUE SIGNALS ±[ni]f(2n) TAKING INTO ACCOUNT LOGICAL SIGN n(±) THEREOF (RUSSIAN LOGIC VERSIONS) |
| RU2417431C1 (en) * | 2009-08-03 | 2011-04-27 | Лев Петрович Петренко | METHOD FOR SELECTIVE LOGIC DIFFERENTIATION d*/dn OF POSITIONAL ANALOGUE SIGNALS ±[mj]f(2n) TAKING INTO ACCOUNT LOGICAL SIGN m(±) THEREOF AND FUNCTIONAL STRUCTURE FOR IMPLEMENTATION THEREOF (RUSSIAN LOGIC VERSIONS) |
| RU2413988C1 (en) * | 2009-08-03 | 2011-03-10 | Лев Петрович Петренко | FUNCTIONAL STRUCTURE FOR LOGIC DIFFERENTIATION d/dn OF ANALOGUE SIGNALS ±[ni]f(2n) TAKING INTO ACCOUNT LOGIC SIGN n(±) THEREOF (VERSIONS) |
| RU2417432C1 (en) * | 2009-08-24 | 2011-04-27 | Лев Петрович Петренко | METHOD OF TRANSFORMING POSITION-SIGN ARGUMENTS ±[nj]f(+/-) INTO STRUCTURE OF ARGUMENTS ±[nj]f(+/-)min WITH MINIMISED NUMBER OF ACTIVE ARGUMENTS AND FUNCTIONAL STRUCTURE FOR IMPLEMENTING SAID METHOD (RUSSIAN LOGIC VERSIONS) |
| RU2428738C2 (en) * | 2009-10-05 | 2011-09-10 | Лев Петрович Петренко | FUNCTIONAL STRUCTURE OF PROCEDURE OF LOGICAL DIFFERENTIATION OF d/dn POSITIONAL ARGUMENTS [mj]f(2n) WITH ACCOUNT OF THEIR SIGN m(±) TO FORM POSITIONAL-SIGN STRUCTURE ±[mj]f(+/-)min WITH MINIMISED NUMBER OF ACTIVE ARGUMENTS (VERSIONS) |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| SU1169172A1 (en) * | 1983-06-01 | 1985-07-23 | Киевский институт автоматики им.ХХУ съезда КПСС | Binary code-to-ternary code translator |
| EP0180100A2 (en) * | 1984-10-29 | 1986-05-07 | International Business Machines Corporation | Apparatus and method for recording and recovering a binary symbol sequence using an intermediate step of converting the binary sequence into a ternary sequence |
| SU1438005A1 (en) * | 1987-01-29 | 1988-11-15 | Предприятие П/Я В-2201 | Binary code to position-sign code converter |
| SU1656686A1 (en) * | 1989-05-31 | 1991-06-15 | Винницкий политехнический институт | Binary-to-position-sign code converter |
| GB2237482B (en) * | 1989-10-19 | 1993-11-17 | Stc Plc | Digital binary to ternary converter circuit |
| RU2022337C1 (en) * | 1990-01-30 | 1994-10-30 | Научно-исследовательский институт специальных информационно-измерительных систем | Parallel sign-digit code/additional binary code converter |
-
2006
- 2006-12-15 RU RU2006144611/09A patent/RU2361269C9/en active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| SU1169172A1 (en) * | 1983-06-01 | 1985-07-23 | Киевский институт автоматики им.ХХУ съезда КПСС | Binary code-to-ternary code translator |
| EP0180100A2 (en) * | 1984-10-29 | 1986-05-07 | International Business Machines Corporation | Apparatus and method for recording and recovering a binary symbol sequence using an intermediate step of converting the binary sequence into a ternary sequence |
| SU1438005A1 (en) * | 1987-01-29 | 1988-11-15 | Предприятие П/Я В-2201 | Binary code to position-sign code converter |
| SU1656686A1 (en) * | 1989-05-31 | 1991-06-15 | Винницкий политехнический институт | Binary-to-position-sign code converter |
| GB2237482B (en) * | 1989-10-19 | 1993-11-17 | Stc Plc | Digital binary to ternary converter circuit |
| RU2022337C1 (en) * | 1990-01-30 | 1994-10-30 | Научно-исследовательский институт специальных информационно-измерительных систем | Parallel sign-digit code/additional binary code converter |
Also Published As
| Publication number | Publication date |
|---|---|
| RU2006144611A (en) | 2008-06-20 |
| RU2361269C2 (en) | 2009-07-10 |
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