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Starred repositories

5 results for source starred repositories written in Verilog
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opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

Verilog 2,376 315 Updated Jul 16, 2025

A small, light weight, RISC CPU soft core

Verilog 1,437 170 Updated Feb 6, 2025

RISC-V Linux SoC, marchID: 0x2b

Verilog 925 66 Updated Jul 28, 2025

Small-scale Tensor Processing Unit built on an FPGA

Verilog 192 27 Updated Aug 4, 2019

A simple 8-bit computer build in Verilog.

Verilog 64 29 Updated Jun 2, 2025