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BibTeX records: Mahmut Yilmaz
@inproceedings{DBLP:conf/itc/MangilalYASN24,
author = {Kunal Jain Mangilal and
Mahmut Yilmaz and
Vishal Agarwal and
Shantanu Sarangi and
Kaushik Narayanun},
title = {A Scalable {\&} Cost Efficient Next-Gen Scan Architecture: Streaming
Scan Test via {NVIDIA} {MATHS}},
booktitle = {{ITC}},
pages = {400--406},
publisher = {{IEEE}},
year = {2024}
}
@article{DBLP:journals/dt/YilmazJNSSS23,
author = {Mahmut Yilmaz and
Pavan Kumar Datla Jagannadha and
Kaushik Narayanun and
Shantanu Sarangi and
Francisco Da Silva and
Joe Sarmiento},
title = {{NVIDIA} {MATHS:} Mechanism to Access Test-Data Over High-Speed Links},
journal = {{IEEE} Des. Test},
volume = {40},
number = {4},
pages = {25--33},
year = {2023}
}
@inproceedings{DBLP:conf/vts/MozaffariBSSFVM22,
author = {Seyed Nima Mozaffari and
Bonita Bhaskaran and
Shantanu Sarangi and
Suhas M. Satheesh and
Kuo Lin Fu and
Nithin Valentine and
P. Manikandan and
Mahmut Yilmaz},
title = {On-Die Noise Measurement During Automatic Test Equipment {(ATE)} Testing
and In-System-Test {(IST)}},
booktitle = {{VTS}},
pages = {1--6},
publisher = {{IEEE}},
year = {2022}
}
@inproceedings{DBLP:conf/vts/YilmazJNSSSTCKS22,
author = {Mahmut Yilmaz and
Pavan Kumar Datla Jagannadha and
Kaushik Narayanun and
Shantanu Sarangi and
Francisco Da Silva and
Joe Sarmiento and
Smbat Tonoyan and
Ashwin Chintaluri and
Animesh Khare and
Milind Sonawane and
Ashish Kumar and
Anitha Kalva and
Alex Hsu and
Jayesh Pandey},
title = {{NVIDIA} {MATHS:} Mechanism to Access Test-Data over High-Speed Links},
booktitle = {{VTS}},
pages = {1--7},
publisher = {{IEEE}},
year = {2022}
}
@inproceedings{DBLP:conf/vts/JagannadhaYSCSB19,
author = {Pavan Kumar Datla Jagannadha and
Mahmut Yilmaz and
Milind Sonawane and
Sailendra Chadalavada and
Shantanu Sarangi and
Bonita Bhaskaran and
Shashank Bajpai and
Venkat Abilash Reddy Nerallapally and
Jayesh Pandey and
Sam Jiang},
title = {Special Session: In-System-Test {(IST)} Architecture for {NVIDIA}
Drive-AGX Platforms},
booktitle = {{VTS}},
pages = {1--8},
publisher = {{IEEE}},
year = {2019}
}
@inproceedings{DBLP:conf/itc/JagannadhaYSCSB16,
author = {Pavan Kumar Datla Jagannadha and
Mahmut Yilmaz and
Milind Sonawane and
Sailendra Chadalavada and
Shantanu Sarangi and
Bonita Bhaskaran and
Ayub Abdollahian},
title = {Advanced test methodology for complex SoCs},
booktitle = {{ITC}},
pages = {1--10},
publisher = {{IEEE}},
year = {2016}
}
@inproceedings{DBLP:conf/vts/SonawaneCSSYJC16,
author = {Milind Sonawane and
Sailendra Chadalavada and
Shantanu Sarangi and
Amit Sanghani and
Mahmut Yilmaz and
Pavan Kumar Datla Jagannadha and
Jonathon E. Colburn},
title = {Flexible scan interface architecture for complex SoCs},
booktitle = {{VTS}},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2016}
}
@inproceedings{DBLP:conf/vts/SonawaneJCSYSNC16,
author = {Milind Sonawane and
Pavan Kumar Datla Jagannadha and
Sailendra Chadalavada and
Shantanu Sarangi and
Mahmut Yilmaz and
Amit Sanghani and
Karthikeyan Natarajan and
Jonathon E. Colburn and
Anubhav Sinha},
title = {Dynamic docking architecture for concurrent testing and peak power
reduction},
booktitle = {{VTS}},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2016}
}
@incollection{DBLP:books/crc/14/PengYT14,
author = {Ke Peng and
Mahmut Yilmaz and
Mohammad Tehranipoor},
title = {Circuit Path Grading Considering Layout, Process Variations, and Cross
Talk},
booktitle = {Testing for Small-Delay Defects in Nanoscale {CMOS} Integrated Circuits},
pages = {95--118},
publisher = {{CRC} Press},
year = {2014}
}
@incollection{DBLP:books/crc/14/Yilmaz14,
author = {Mahmut Yilmaz},
title = {Output Deviations-Based {SDD} Testing},
booktitle = {Testing for Small-Delay Defects in Nanoscale {CMOS} Integrated Circuits},
pages = {119--146},
publisher = {{CRC} Press},
year = {2014}
}
@article{DBLP:journals/et/BaoPYCWT13,
author = {Fang Bao and
Ke Peng and
Mahmut Yilmaz and
Krishnendu Chakrabarty and
LeRoy Winemberg and
Mohammad Tehranipoor},
title = {Efficient Pattern Generation for Small-Delay Defects Using Selection
of Critical Faults},
journal = {J. Electron. Test.},
volume = {29},
number = {1},
pages = {35--48},
year = {2013}
}
@article{DBLP:journals/tvlsi/PengYCT13,
author = {Ke Peng and
Mahmut Yilmaz and
Krishnendu Chakrabarty and
Mohammad Tehranipoor},
title = {Crosstalk- and Process Variations-Aware High-Quality Tests for Small-Delay
Defects},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {21},
number = {6},
pages = {1129--1142},
year = {2013}
}
@inproceedings{DBLP:conf/ats/EggersglussYC12,
author = {Stephan Eggersgl{\"{u}}{\ss} and
Mahmut Yilmaz and
Krishnendu Chakrabarty},
title = {Robust Timing-Aware Test Generation Using Pseudo-Boolean Optimization},
booktitle = {Asian Test Symposium},
pages = {290--295},
publisher = {{IEEE} Computer Society},
year = {2012}
}
@article{DBLP:journals/dt/YilmazTC11,
author = {Mahmut Yilmaz and
Mohammad Tehranipoor and
Krishnendu Chakrabarty},
title = {A Metric to Target Small-Delay Defects in Industrial Circuits},
journal = {{IEEE} Des. Test Comput.},
volume = {28},
number = {2},
pages = {52--61},
year = {2011}
}
@inproceedings{DBLP:conf/ets/BaoPYCWT11,
author = {Fang Bao and
Ke Peng and
Mahmut Yilmaz and
Krishnendu Chakrabarty and
LeRoy Winemberg and
Mohammad Tehranipoor},
title = {Critical Fault-Based Pattern Generation for Screening SDDs},
booktitle = {{ETS}},
pages = {177--182},
publisher = {{IEEE} Computer Society},
year = {2011}
}
@article{DBLP:journals/tcad/YilmazCT10,
author = {Mahmut Yilmaz and
Krishnendu Chakrabarty and
Mohammad Tehranipoor},
title = {Test-Pattern Selection for Screening Small-Delay Defects in Very-Deep
Submicrometer Integrated Circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {29},
number = {5},
pages = {760--773},
year = {2010}
}
@inproceedings{DBLP:conf/ats/GoelCYPT10,
author = {Sandeep Kumar Goel and
Krishnendu Chakrabarty and
Mahmut Yilmaz and
Ke Peng and
Mohammad Tehranipoor},
title = {Circuit Topology-Based Test Pattern Generation for Small-Delay Defects},
booktitle = {Asian Test Symposium},
pages = {307--312},
publisher = {{IEEE} Computer Society},
year = {2010}
}
@inproceedings{DBLP:conf/ats/PengYCT10,
author = {Ke Peng and
Mahmut Yilmaz and
Krishnendu Chakrabarty and
Mohammad Tehranipoor},
title = {A Noise-Aware Hybrid Method for {SDD} Pattern Grading and Selection},
booktitle = {Asian Test Symposium},
pages = {331--336},
publisher = {{IEEE} Computer Society},
year = {2010}
}
@inproceedings{DBLP:conf/date/PengYTC10,
author = {Ke Peng and
Mahmut Yilmaz and
Mohammad Tehranipoor and
Krishnendu Chakrabarty},
title = {High-quality pattern selection for screening small-delay defects considering
process variations and crosstalk},
booktitle = {{DATE}},
pages = {1426--1431},
publisher = {{IEEE} Computer Society},
year = {2010}
}
@inproceedings{DBLP:conf/itc/YilmazWROSEFGC10,
author = {Mahmut Yilmaz and
Baosheng Wang and
Jayalakshmi Rajaraman and
Tom Olsen and
Kanwaldeep Sobti and
Dwight Elvey and
Jeff Fitzgerald and
Grady Giles and
Wei{-}Yu Chen},
title = {The scan-DFT features of AMD's next-generation microprocessor core},
booktitle = {{ITC}},
pages = {39--48},
publisher = {{IEEE} Computer Society},
year = {2010}
}
@inproceedings{DBLP:conf/itc/SanyalCYF10,
author = {Alodeep Sanyal and
Krishnendu Chakrabarty and
Mahmut Yilmaz and
Hideo Fujiwara},
title = {RT-level design-for-testability and expansion of functional test sequences
for enhanced defect coverage},
booktitle = {{ITC}},
pages = {625--634},
publisher = {{IEEE} Computer Society},
year = {2010}
}
@inproceedings{DBLP:conf/vts/PengTYCT10,
author = {Ke Peng and
Jason Thibodeau and
Mahmut Yilmaz and
Krishnendu Chakrabarty and
Mohammad Tehranipoor},
title = {A novel hybrid method for {SDD} pattern grading and selection},
booktitle = {{VTS}},
pages = {45--50},
publisher = {{IEEE} Computer Society},
year = {2010}
}
@phdthesis{DBLP:phd/basesearch/Yilmaz09,
author = {Mahmut Yilmaz},
title = {Automated Test Grading and Pattern Selection for Small-Delay Defects},
school = {Duke University, Durham, NC, {USA}},
year = {2009}
}
@inproceedings{DBLP:conf/date/YilmazC09,
author = {Mahmut Yilmaz and
Krishnendu Chakrabarty},
title = {Seed selection in LFSR-reseeding-based test compression for the detection
of small-delay defects},
booktitle = {{DATE}},
pages = {1488--1493},
publisher = {{IEEE}},
year = {2009}
}
@inproceedings{DBLP:conf/itc/YilmazCT08,
author = {Mahmut Yilmaz and
Krishnendu Chakrabarty and
Mohammad Tehranipoor},
title = {Interconnect-Aware and Layout-Oriented Test-Pattern Selection for
Small-Delay Defects},
booktitle = {{ITC}},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2008}
}
@inproceedings{DBLP:conf/vts/YilmazCT08,
author = {Mahmut Yilmaz and
Krishnendu Chakrabarty and
Mohammad Tehranipoor},
title = {Test-Pattern Grading and Pattern Selection for Small-Delay Defects},
booktitle = {{VTS}},
pages = {233--239},
publisher = {{IEEE} Computer Society},
year = {2008}
}
@inproceedings{DBLP:conf/dft/YilmazMOS07,
author = {Mahmut Yilmaz and
Albert Meixner and
Sule Ozev and
Daniel J. Sorin},
title = {Lazy Error Detection for Microprocessor Functional Units},
booktitle = {{DFT}},
pages = {361--369},
publisher = {{IEEE} Computer Society},
year = {2007}
}
@inproceedings{DBLP:conf/iccd/OzevSY07,
author = {Sule Ozev and
Daniel J. Sorin and
Mahmut Yilmaz},
title = {Low-cost run-time diagnosis of hard delay faults in the functional
units of a microprocessor},
booktitle = {{ICCD}},
pages = {317--324},
publisher = {{IEEE}},
year = {2007}
}
@inproceedings{DBLP:conf/itc/YilmazHOS06,
author = {Mahmut Yilmaz and
Derek Hower and
Sule Ozev and
Daniel J. Sorin},
title = {Self-Checking and Self-Diagnosing 32-bit Microprocessor Multiplier},
booktitle = {{ITC}},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2006}
}
@inproceedings{DBLP:conf/sigmetrics/BowerHYSO06,
author = {Fred A. Bower and
Derek Hower and
Mahmut Yilmaz and
Daniel J. Sorin and
Sule Ozev},
title = {Applying architectural vulnerability Analysis to hard faults in the
microprocessor},
booktitle = {SIGMETRICS/Performance},
pages = {375--376},
publisher = {{ACM}},
year = {2006}
}
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