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BibTeX records: Mahmut Yilmaz
@inproceedings{DBLP:conf/itc/MangilalYASN24,
author = {Kunal Jain Mangilal and
Mahmut Yilmaz and
Vishal Agarwal and
Shantanu Sarangi and
Kaushik Narayanun},
title = {A Scalable {\&} Cost Efficient Next-Gen Scan Architecture: Streaming
Scan Test via {NVIDIA} {MATHS}},
booktitle = {{IEEE} International Test Conference, {ITC} 2024, San Diego, CA, USA,
November 3-8, 2024},
pages = {400--406},
publisher = {{IEEE}},
year = {2024},
url = {https://doi.org/10.1109/ITC51657.2024.00062},
doi = {10.1109/ITC51657.2024.00062},
timestamp = {Tue, 10 Dec 2024 14:23:44 +0100},
biburl = {https://dblp.org/rec/conf/itc/MangilalYASN24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/YilmazJNSSS23,
author = {Mahmut Yilmaz and
Pavan Kumar Datla Jagannadha and
Kaushik Narayanun and
Shantanu Sarangi and
Francisco Da Silva and
Joe Sarmiento},
title = {{NVIDIA} {MATHS:} Mechanism to Access Test-Data Over High-Speed Links},
journal = {{IEEE} Des. Test},
volume = {40},
number = {4},
pages = {25--33},
year = {2023},
url = {https://doi.org/10.1109/MDAT.2023.3269391},
doi = {10.1109/MDAT.2023.3269391},
timestamp = {Fri, 07 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/YilmazJNSSS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MozaffariBSSFVM22,
author = {Seyed Nima Mozaffari and
Bonita Bhaskaran and
Shantanu Sarangi and
Suhas M. Satheesh and
Kuo Lin Fu and
Nithin Valentine and
P. Manikandan and
Mahmut Yilmaz},
title = {On-Die Noise Measurement During Automatic Test Equipment {(ATE)} Testing
and In-System-Test {(IST)}},
booktitle = {40th {IEEE} {VLSI} Test Symposium, {VTS} 2022, San Diego, CA, USA,
April 25-27, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VTS52500.2021.9794251},
doi = {10.1109/VTS52500.2021.9794251},
timestamp = {Thu, 12 Jun 2025 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/MozaffariBSSFVM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/YilmazJNSSSTCKS22,
author = {Mahmut Yilmaz and
Pavan Kumar Datla Jagannadha and
Kaushik Narayanun and
Shantanu Sarangi and
Francisco Da Silva and
Joe Sarmiento and
Smbat Tonoyan and
Ashwin Chintaluri and
Animesh Khare and
Milind Sonawane and
Ashish Kumar and
Anitha Kalva and
Alex Hsu and
Jayesh Pandey},
title = {{NVIDIA} {MATHS:} Mechanism to Access Test-Data over High-Speed Links},
booktitle = {40th {IEEE} {VLSI} Test Symposium, {VTS} 2022, San Diego, CA, USA,
April 25-27, 2022},
pages = {1--7},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VTS52500.2021.9794146},
doi = {10.1109/VTS52500.2021.9794146},
timestamp = {Thu, 12 Jun 2025 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/YilmazJNSSSTCKS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/JagannadhaYSCSB19,
author = {Pavan Kumar Datla Jagannadha and
Mahmut Yilmaz and
Milind Sonawane and
Sailendra Chadalavada and
Shantanu Sarangi and
Bonita Bhaskaran and
Shashank Bajpai and
Venkat Abilash Reddy Nerallapally and
Jayesh Pandey and
Sam Jiang},
title = {Special Session: In-System-Test {(IST)} Architecture for {NVIDIA}
Drive-AGX Platforms},
booktitle = {37th {IEEE} {VLSI} Test Symposium, {VTS} 2019, Monterey, CA, USA,
April 23-25, 2019},
pages = {1--8},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VTS.2019.8758636},
doi = {10.1109/VTS.2019.8758636},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/vts/JagannadhaYSCSB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/JagannadhaYSCSB16,
author = {Pavan Kumar Datla Jagannadha and
Mahmut Yilmaz and
Milind Sonawane and
Sailendra Chadalavada and
Shantanu Sarangi and
Bonita Bhaskaran and
Ayub Abdollahian},
title = {Advanced test methodology for complex SoCs},
booktitle = {2016 {IEEE} International Test Conference, {ITC} 2016, Fort Worth,
TX, USA, November 15-17, 2016},
pages = {1--10},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/TEST.2016.7805857},
doi = {10.1109/TEST.2016.7805857},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/itc/JagannadhaYSCSB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SonawaneCSSYJC16,
author = {Milind Sonawane and
Sailendra Chadalavada and
Shantanu Sarangi and
Amit Sanghani and
Mahmut Yilmaz and
Pavan Kumar Datla Jagannadha and
Jonathon E. Colburn},
title = {Flexible scan interface architecture for complex SoCs},
booktitle = {34th {IEEE} {VLSI} Test Symposium, {VTS} 2016, Las Vegas, NV, USA,
April 25-27, 2016},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/VTS.2016.7477308},
doi = {10.1109/VTS.2016.7477308},
timestamp = {Sun, 06 Oct 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/SonawaneCSSYJC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SonawaneJCSYSNC16,
author = {Milind Sonawane and
Pavan Kumar Datla Jagannadha and
Sailendra Chadalavada and
Shantanu Sarangi and
Mahmut Yilmaz and
Amit Sanghani and
Karthikeyan Natarajan and
Jonathon E. Colburn and
Anubhav Sinha},
title = {Dynamic docking architecture for concurrent testing and peak power
reduction},
booktitle = {34th {IEEE} {VLSI} Test Symposium, {VTS} 2016, Las Vegas, NV, USA,
April 25-27, 2016},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/VTS.2016.7477290},
doi = {10.1109/VTS.2016.7477290},
timestamp = {Sun, 06 Oct 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/SonawaneJCSYSNC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:books/crc/14/PengYT14,
author = {Ke Peng and
Mahmut Yilmaz and
Mohammad Tehranipoor},
editor = {Sandeep Kumar Goel and
Krishnendu Chakrabarty},
title = {Circuit Path Grading Considering Layout, Process Variations, and Cross
Talk},
booktitle = {Testing for Small-Delay Defects in Nanoscale {CMOS} Integrated Circuits},
pages = {95--118},
publisher = {{CRC} Press},
year = {2014},
timestamp = {Fri, 05 Jun 2020 14:24:01 +0200},
biburl = {https://dblp.org/rec/books/crc/14/PengYT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:books/crc/14/Yilmaz14,
author = {Mahmut Yilmaz},
editor = {Sandeep Kumar Goel and
Krishnendu Chakrabarty},
title = {Output Deviations-Based {SDD} Testing},
booktitle = {Testing for Small-Delay Defects in Nanoscale {CMOS} Integrated Circuits},
pages = {119--146},
publisher = {{CRC} Press},
year = {2014},
timestamp = {Fri, 05 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/books/crc/14/Yilmaz14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/BaoPYCWT13,
author = {Fang Bao and
Ke Peng and
Mahmut Yilmaz and
Krishnendu Chakrabarty and
LeRoy Winemberg and
Mohammad Tehranipoor},
title = {Efficient Pattern Generation for Small-Delay Defects Using Selection
of Critical Faults},
journal = {J. Electron. Test.},
volume = {29},
number = {1},
pages = {35--48},
year = {2013},
url = {https://doi.org/10.1007/s10836-012-5345-9},
doi = {10.1007/S10836-012-5345-9},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/et/BaoPYCWT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/PengYCT13,
author = {Ke Peng and
Mahmut Yilmaz and
Krishnendu Chakrabarty and
Mohammad Tehranipoor},
title = {Crosstalk- and Process Variations-Aware High-Quality Tests for Small-Delay
Defects},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {21},
number = {6},
pages = {1129--1142},
year = {2013},
url = {https://doi.org/10.1109/TVLSI.2012.2205026},
doi = {10.1109/TVLSI.2012.2205026},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/PengYCT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/EggersglussYC12,
author = {Stephan Eggersgl{\"{u}}{\ss} and
Mahmut Yilmaz and
Krishnendu Chakrabarty},
title = {Robust Timing-Aware Test Generation Using Pseudo-Boolean Optimization},
booktitle = {21st {IEEE} Asian Test Symposium, {ATS} 2012, Niigata, Japan, November
19-22, 2012},
pages = {290--295},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ATS.2012.35},
doi = {10.1109/ATS.2012.35},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/EggersglussYC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/YilmazTC11,
author = {Mahmut Yilmaz and
Mohammad Tehranipoor and
Krishnendu Chakrabarty},
title = {A Metric to Target Small-Delay Defects in Industrial Circuits},
journal = {{IEEE} Des. Test Comput.},
volume = {28},
number = {2},
pages = {52--61},
year = {2011},
url = {https://doi.org/10.1109/MDT.2011.26},
doi = {10.1109/MDT.2011.26},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/YilmazTC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/BaoPYCWT11,
author = {Fang Bao and
Ke Peng and
Mahmut Yilmaz and
Krishnendu Chakrabarty and
LeRoy Winemberg and
Mohammad Tehranipoor},
title = {Critical Fault-Based Pattern Generation for Screening SDDs},
booktitle = {16th European Test Symposium, {ETS} 2011, Trondheim, Norway, May 23-27,
2011},
pages = {177--182},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ETS.2011.26},
doi = {10.1109/ETS.2011.26},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/BaoPYCWT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YilmazCT10,
author = {Mahmut Yilmaz and
Krishnendu Chakrabarty and
Mohammad Tehranipoor},
title = {Test-Pattern Selection for Screening Small-Delay Defects in Very-Deep
Submicrometer Integrated Circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {29},
number = {5},
pages = {760--773},
year = {2010},
url = {https://doi.org/10.1109/TCAD.2010.2043591},
doi = {10.1109/TCAD.2010.2043591},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/YilmazCT10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/GoelCYPT10,
author = {Sandeep Kumar Goel and
Krishnendu Chakrabarty and
Mahmut Yilmaz and
Ke Peng and
Mohammad Tehranipoor},
title = {Circuit Topology-Based Test Pattern Generation for Small-Delay Defects},
booktitle = {Proceedings of the 19th {IEEE} Asian Test Symposium, {ATS} 2010, 1-4
December 2010, Shanghai, China},
pages = {307--312},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ATS.2010.59},
doi = {10.1109/ATS.2010.59},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/GoelCYPT10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/PengYCT10,
author = {Ke Peng and
Mahmut Yilmaz and
Krishnendu Chakrabarty and
Mohammad Tehranipoor},
title = {A Noise-Aware Hybrid Method for {SDD} Pattern Grading and Selection},
booktitle = {Proceedings of the 19th {IEEE} Asian Test Symposium, {ATS} 2010, 1-4
December 2010, Shanghai, China},
pages = {331--336},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ATS.2010.63},
doi = {10.1109/ATS.2010.63},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/PengYCT10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/PengYTC10,
author = {Ke Peng and
Mahmut Yilmaz and
Mohammad Tehranipoor and
Krishnendu Chakrabarty},
editor = {Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller and
Enrico Macii},
title = {High-quality pattern selection for screening small-delay defects considering
process variations and crosstalk},
booktitle = {Design, Automation and Test in Europe, {DATE} 2010, Dresden, Germany,
March 8-12, 2010},
pages = {1426--1431},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/DATE.2010.5457036},
doi = {10.1109/DATE.2010.5457036},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/PengYTC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/YilmazWROSEFGC10,
author = {Mahmut Yilmaz and
Baosheng Wang and
Jayalakshmi Rajaraman and
Tom Olsen and
Kanwaldeep Sobti and
Dwight Elvey and
Jeff Fitzgerald and
Grady Giles and
Wei{-}Yu Chen},
editor = {Ron Press and
Erik H. Volkerink},
title = {The scan-DFT features of AMD's next-generation microprocessor core},
booktitle = {2011 {IEEE} International Test Conference, {ITC} 2010, Austin, TX,
USA, November 2-4, 2010},
pages = {39--48},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/TEST.2010.5699203},
doi = {10.1109/TEST.2010.5699203},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/YilmazWROSEFGC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/SanyalCYF10,
author = {Alodeep Sanyal and
Krishnendu Chakrabarty and
Mahmut Yilmaz and
Hideo Fujiwara},
editor = {Ron Press and
Erik H. Volkerink},
title = {RT-level design-for-testability and expansion of functional test sequences
for enhanced defect coverage},
booktitle = {2011 {IEEE} International Test Conference, {ITC} 2010, Austin, TX,
USA, November 2-4, 2010},
pages = {625--634},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/TEST.2010.5699266},
doi = {10.1109/TEST.2010.5699266},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/SanyalCYF10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/PengTYCT10,
author = {Ke Peng and
Jason Thibodeau and
Mahmut Yilmaz and
Krishnendu Chakrabarty and
Mohammad Tehranipoor},
title = {A novel hybrid method for {SDD} pattern grading and selection},
booktitle = {28th {IEEE} {VLSI} Test Symposium, {VTS} 2010, April 19-22, 2010,
Santa Cruz, California, {USA}},
pages = {45--50},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/VTS.2010.5469619},
doi = {10.1109/VTS.2010.5469619},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/PengTYCT10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/basesearch/Yilmaz09,
author = {Mahmut Yilmaz},
title = {Automated Test Grading and Pattern Selection for Small-Delay Defects},
school = {Duke University, Durham, NC, {USA}},
year = {2009},
url = {https://www.base-search.net/Record/889c5803c765d5de1af29d28b90969c3748c67e559f73fd44599d294b2e49861},
timestamp = {Wed, 04 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/basesearch/Yilmaz09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/YilmazC09,
author = {Mahmut Yilmaz and
Krishnendu Chakrabarty},
editor = {Luca Benini and
Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller},
title = {Seed selection in LFSR-reseeding-based test compression for the detection
of small-delay defects},
booktitle = {Design, Automation and Test in Europe, {DATE} 2009, Nice, France,
April 20-24, 2009},
pages = {1488--1493},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/DATE.2009.5090898},
doi = {10.1109/DATE.2009.5090898},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/YilmazC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/YilmazCT08,
author = {Mahmut Yilmaz and
Krishnendu Chakrabarty and
Mohammad Tehranipoor},
editor = {Douglas Young and
Nur A. Touba},
title = {Interconnect-Aware and Layout-Oriented Test-Pattern Selection for
Small-Delay Defects},
booktitle = {2008 {IEEE} International Test Conference, {ITC} 2008, Santa Clara,
California, USA, October 26-31, 2008},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/TEST.2008.4700627},
doi = {10.1109/TEST.2008.4700627},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/YilmazCT08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/YilmazCT08,
author = {Mahmut Yilmaz and
Krishnendu Chakrabarty and
Mohammad Tehranipoor},
title = {Test-Pattern Grading and Pattern Selection for Small-Delay Defects},
booktitle = {26th {IEEE} {VLSI} Test Symposium {(VTS} 2008), April 27 - May 1,
2008, San Diego, California, {USA}},
pages = {233--239},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/VTS.2008.32},
doi = {10.1109/VTS.2008.32},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/YilmazCT08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/YilmazMOS07,
author = {Mahmut Yilmaz and
Albert Meixner and
Sule Ozev and
Daniel J. Sorin},
editor = {Cristiana Bolchini and
Yong{-}Bin Kim and
Adelio Salsano and
Nur A. Touba},
title = {Lazy Error Detection for Microprocessor Functional Units},
booktitle = {22nd {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2007), 26-28 September 2007, Rome, Italy},
pages = {361--369},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/DFT.2007.16},
doi = {10.1109/DFT.2007.16},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/YilmazMOS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/OzevSY07,
author = {Sule Ozev and
Daniel J. Sorin and
Mahmut Yilmaz},
title = {Low-cost run-time diagnosis of hard delay faults in the functional
units of a microprocessor},
booktitle = {25th International Conference on Computer Design, {ICCD} 2007, 7-10
October 2007, Lake Tahoe, CA, USA, Proceedings},
pages = {317--324},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ICCD.2007.4601919},
doi = {10.1109/ICCD.2007.4601919},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/OzevSY07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/YilmazHOS06,
author = {Mahmut Yilmaz and
Derek Hower and
Sule Ozev and
Daniel J. Sorin},
editor = {Scott Davidson and
Anne Gattiker},
title = {Self-Checking and Self-Diagnosing 32-bit Microprocessor Multiplier},
booktitle = {2006 {IEEE} International Test Conference, {ITC} 2006, Santa Clara,
CA, USA, October 22-27, 2006},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/TEST.2006.297634},
doi = {10.1109/TEST.2006.297634},
timestamp = {Tue, 12 Dec 2023 09:46:27 +0100},
biburl = {https://dblp.org/rec/conf/itc/YilmazHOS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sigmetrics/BowerHYSO06,
author = {Fred A. Bower and
Derek Hower and
Mahmut Yilmaz and
Daniel J. Sorin and
Sule Ozev},
editor = {Raymond A. Marie and
Peter B. Key and
Evgenia Smirni},
title = {Applying architectural vulnerability Analysis to hard faults in the
microprocessor},
booktitle = {Proceedings of the Joint International Conference on Measurement and
Modeling of Computer Systems, SIGMETRICS/Performance 2006, Saint Malo,
France, June 26-30, 2006},
pages = {375--376},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1140277.1140327},
doi = {10.1145/1140277.1140327},
timestamp = {Sun, 19 Jan 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sigmetrics/BowerHYSO06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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