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WO2024198739A1 - Pixel driving circuit and driving method therefor, display substrate, and display apparatus - Google Patents

Pixel driving circuit and driving method therefor, display substrate, and display apparatus Download PDF

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Publication number
WO2024198739A1
WO2024198739A1 PCT/CN2024/076339 CN2024076339W WO2024198739A1 WO 2024198739 A1 WO2024198739 A1 WO 2024198739A1 CN 2024076339 W CN2024076339 W CN 2024076339W WO 2024198739 A1 WO2024198739 A1 WO 2024198739A1
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WO
WIPO (PCT)
Prior art keywords
transistor
control
voltage
electrode
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/CN2024/076339
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French (fr)
Chinese (zh)
Inventor
付建国
杨盛际
杨俊彦
吴斌
朱胜迪
丁雁强
朱云
蔡戚斌
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Yunnan Invensight Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Yunnan Invensight Optoelectronics Technology Co Ltd
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Filing date
Publication date
Application filed by BOE Technology Group Co Ltd, Yunnan Invensight Optoelectronics Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Publication of WO2024198739A1 publication Critical patent/WO2024198739A1/en
Anticipated expiration legal-status Critical
Pending legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element

Definitions

  • the present disclosure relates to the field of display technology, and in particular to a pixel driving circuit and a driving method thereof, a display substrate, and a display device.
  • AMOLED Active Matrix Organic Light Emitting Diode
  • OLED organic light-emitting diode
  • AMOLED can emit light by driving the thin film transistor to generate a driving current in a saturated state, and the driving current drives the light-emitting device to emit light.
  • the present disclosure provides a pixel driving circuit and a driving method thereof, a display substrate, and a display device.
  • the present disclosure provides a pixel driving circuit, comprising: a current control subcircuit, the current control subcircuit comprising: a driving transistor, the driving transistor being configured to provide a driving current to a light emitting device according to a voltage between a gate and a first electrode thereof; wherein the pixel driving circuit further comprises: a voltage control subcircuit and a time control subcircuit;
  • the voltage control subcircuit is configured to transmit the time data signal to the time control subcircuit in response to the time modulation signal;
  • the time control subcircuit is configured to control the gate voltage of the driving transistor according to the voltage difference between the modulation voltage signal and the reference signal, and the voltage difference between the time data signal and the reference signal, so as to control the light emission time of the light emitting device.
  • the time control subcircuit includes: a first control transistor, the first control transistor is a dual-gate transistor, a first gate of which is connected to the voltage control subcircuit, a second gate of the first control transistor is connected to the modulation voltage line, and the first control transistor A first electrode of the first control transistor is connected to a reference signal line, and a second electrode of the first control transistor is connected to a gate of the driving transistor;
  • the modulation voltage line is used to provide the modulation voltage signal
  • the reference signal line is used to provide the reference signal
  • the voltage control subcircuit includes: a second control transistor, a gate of the second control transistor is connected to the time modulation line, a first electrode of the second control transistor is connected to the time data line, and a second electrode of the second control transistor is connected to the time control subcircuit;
  • the time modulation line is used to provide the time modulation signal
  • the time data line is used to provide the time data signal
  • the voltage control subcircuit further includes: a first capacitor, wherein two ends of the first capacitor are respectively connected to a first voltage end and a second electrode of the second control transistor.
  • the modulation voltage signal is a slope voltage signal.
  • the current control subcircuit further includes: a data writing unit, a light emitting control unit, a discharge unit, a first storage unit and a second storage unit;
  • the data writing unit is configured to write a grayscale data signal into the gate of the driving transistor in response to a scan signal
  • the light emitting control unit is configured to transmit the signal of the second voltage terminal to the first electrode of the driving transistor in response to the light emitting control signal;
  • the discharge unit is configured to discharge the second electrode of the driving transistor in response to a discharge control signal
  • the first storage unit is configured to store a voltage between the gate and the first electrode of the driving transistor
  • the second storage unit is configured to store a voltage between the first electrode of the driving transistor and the second power supply terminal.
  • the data writing unit comprises: a data writing transistor, the data The gate of the data writing transistor is connected to the scan line, the first electrode of the data writing transistor is connected to the grayscale data line, and the second electrode of the data writing transistor is connected to the gate of the driving transistor;
  • the scan line is used to provide the scan signal
  • the grayscale data line is used to provide the grayscale data signal
  • the light emitting control unit includes: a light emitting control transistor, a gate of the light emitting control transistor is connected to a light emitting control line for providing the light emitting control signal, a first electrode of the light emitting control transistor is connected to the second voltage terminal, and a second electrode of the light emitting control transistor is connected to the first electrode of the driving transistor.
  • the discharge unit includes: a discharge transistor, a gate of the discharge transistor is connected to a discharge control line, a first electrode of the discharge transistor is connected to a second electrode of the driving transistor, and a second electrode of the discharge transistor is connected to the first voltage terminal; the discharge control line is used to provide the discharge control signal.
  • the first storage unit includes: a second capacitor, wherein two ends of the second capacitor are respectively connected to the gate and the first electrode of the driving transistor.
  • the second storage unit includes: a third capacitor, wherein two ends of the third capacitor are respectively connected to the first electrode of the driving transistor and the second power supply end.
  • the voltage control subcircuit includes: a second control transistor and a first capacitor, wherein two ends of the first capacitor are respectively connected to a first voltage terminal and a second electrode of the second control transistor;
  • the first storage unit comprises: a second capacitor, two ends of the second capacitor are respectively connected to the gate and the first electrode of the driving transistor;
  • the capacitance of the first capacitor is smaller than the capacitance of the second capacitor, and smaller than the capacitance of the third capacitor.
  • the second capacitor and the third capacitor have the same capacitance.
  • the present disclosure further provides a driving method of the above pixel driving circuit, comprising:
  • the driving transistor of the current control subcircuit provides a current to the generator according to the voltage between its gate and the first electrode.
  • the optical device provides a driving current
  • the voltage control subcircuit provides the time data signal to the time control subcircuit in response to the time modulation signal
  • the time control subcircuit controls the gate voltage of the driving transistor according to the voltage difference between the modulation voltage signal and the reference signal, and the voltage difference between the time data signal and the reference signal, so as to control the light emitting time of the light emitting device.
  • the present disclosure further provides a display substrate, comprising a plurality of pixel areas, wherein the pixel areas are provided with: a light-emitting device and a pixel driving circuit electrically connected to the light-emitting device, and the pixel driving circuit is the above-mentioned pixel driving circuit.
  • the present disclosure further provides a display device, which includes the above-mentioned display substrate.
  • FIG. 1 is a graph showing the relationship between the current and the peak wavelength of an OLED device.
  • FIG. 2 is a schematic diagram of a curve showing the relationship between the current density and the wavelength of an OLED device.
  • FIG. 3 is a schematic diagram of a pixel driving circuit provided in some embodiments of the present disclosure.
  • FIG. 4 is a schematic diagram of a pixel driving circuit provided in some other embodiments of the present disclosure.
  • FIG5 is a graph showing the relationship between the positive gate-source voltage difference and the leakage current of a dual-gate transistor.
  • FIG. 6 is a graph showing the relationship between the threshold voltage of a dual-gate transistor and the back-gate-source voltage difference.
  • FIG. 7 is a timing diagram of a pixel driving circuit provided in some embodiments of the present disclosure.
  • FIG. 8 is a schematic diagram of a driving method of a pixel driving circuit provided in some embodiments of the present disclosure.
  • Each transistor involved in the embodiments of the present disclosure can be independently selected from one of a polysilicon thin film transistor, an amorphous silicon thin film transistor, an oxide thin film transistor and an organic thin film transistor.
  • the "first electrode” involved in the present disclosure specifically refers to the source electrode of the transistor, and the corresponding “second electrode” specifically refers to the drain electrode of the transistor.
  • first electrode and the “second electrode” can be interchanged.
  • the working level state refers to a level state that can turn on the first and second electrodes of the transistor
  • the non-working level state refers to a level state that can turn off the first and second electrodes of the transistor.
  • Transistors can be divided into N-type transistors and P-type transistors, and each transistor in the present disclosure can be independently selected from an N-type transistor or a P-type transistor; for an N-type transistor, the working level state is a high level state, and the non-working level state is a low level state; for a P-type transistor, the working level state is a low level state, and the non-working level state is a high level state.
  • an exemplary description will be given by taking all transistors in the pixel unit as N-type transistors as an example, At this time, the transistors in the pixel driving circuit can be manufactured simultaneously using the same manufacturing process.
  • the display substrate includes a display area and a peripheral area located around the display area, and the display area includes a plurality of pixel areas, each of which is provided with a light-emitting device and a pixel driving circuit for providing a driving signal to the light-emitting device.
  • the light-emitting device can be an OLED device.
  • FIG. 1 is a curve diagram showing the relationship between the current and the peak wavelength of the OLED device. It can be seen from FIG. 1 that under different currents, the peak wavelength of the light emission of the OLED device shows a U-shaped growth.
  • FIG. 2 is a schematic diagram of the relationship between the current density and the wavelength of the OLED device. It can be seen from FIG.
  • FIG3 is a schematic diagram of a pixel driving circuit provided in some embodiments of the present disclosure.
  • the pixel driving circuit includes: a current control subcircuit 10 , a voltage control subcircuit 20 , and a time control subcircuit 30 .
  • the current control subcircuit 10 is connected to the first electrode of the light emitting device 40, and the second electrode of the light emitting device 40 is connected to the common voltage terminal COM.
  • the first electrode of the light emitting device 40 may be an anode, and the second electrode may be a cathode.
  • the current control subcircuit 10 includes: a driving transistor M3, which is configured to provide a driving current to the light emitting device 40 according to the voltage between its gate and the first electrode.
  • the voltage control subcircuit 20 is configured to transmit the time data signal to the time control subcircuit 30 in response to the time modulation signal.
  • the time control subcircuit 30 is configured to control the gate voltage of the driving transistor M3 according to the voltage difference between the modulation voltage signal and the reference signal, and the voltage difference between the time data signal and the reference signal, so as to control the on-off of the driving transistor M3, thereby controlling the light-emitting time of the light-emitting device 40.
  • the reference signal may be a signal with a fixed voltage; and the modulation voltage signal may be a signal with an adjustable voltage.
  • the current control sub-circuit in the light emitting stage, the current control sub-circuit The circuit 10 provides a driving current to the light emitting device 40 according to the voltage between the gate and the first electrode thereof; and the time control subcircuit 30 can control the gate voltage of the driving transistor M3 by controlling the voltage difference between the modulated voltage signal and the reference signal, thereby controlling the on-off of the driving transistor M3, and further controlling the light emitting time of the light emitting device 40 to realize various grayscale displays.
  • the light emitting time can be controlled to be longer; when realizing low grayscale display, the light emitting time can be controlled to be shorter, thereby solving the color deviation problem caused by too low current density under low grayscale.
  • FIG4 is a schematic diagram of a pixel driving circuit provided in some other embodiments of the present disclosure, and FIG4 is a specific implementation scheme of FIG3.
  • the time control subcircuit 30 includes: a first control transistor T, the first control transistor T is a dual-gate transistor, the first gate of which is connected to the voltage control subcircuit 20, the second gate of the first control transistor T is connected to the modulation voltage line SWEEP, the first electrode of the first control transistor T is connected to the reference signal line VREF for providing a reference signal, and the second electrode of the first control transistor T is connected to the gate of the driving transistor M3.
  • the modulation voltage line SWEEP is used to provide the above-mentioned modulation voltage signal
  • the reference signal line VREF is used to provide the above-mentioned reference signal.
  • the first gate of the dual-gate transistor is a positive gate
  • the second gate is a back gate.
  • FIG5 is a graph showing the relationship between the positive gate-source voltage difference and the leakage current of the dual-gate transistor
  • FIG6 is a graph showing the relationship between the threshold voltage and the back gate-source voltage difference of the dual-gate transistor, wherein the positive gate-source voltage difference is the voltage difference Vgs between the first gate and the source of the dual-gate transistor, and the back gate-source voltage difference is the voltage difference Vbs between the second gate and the source of the dual-gate transistor. It can be seen from FIG5 and FIG6 that as the back gate-source voltage difference increases, the threshold voltage Vth of the dual-gate transistor gradually decreases.
  • the voltage of the reference signal satisfies: when the gate of the driving transistor M3 receives the reference signal and the first electrode receives the voltage signal of the second voltage terminal ELVDD, the driving transistor M3 is turned off.
  • the driving transistor M3 as a P-type transistor as an example, the voltage of the reference signal and the second voltage terminal ELVDD is The difference of the signals is greater than the threshold voltage of the driving transistor M3.
  • the second gate of the first control transistor T (double-gate transistor) is connected to the slope voltage signal. Therefore, in the light-emitting stage, when the driving transistor T3 needs to be turned off, the voltage on the slope voltage line SWEEP can be reduced, thereby increasing the threshold voltage of the double-gate transistor, thereby turning on the double-gate transistor, so that the reference signal is transmitted to the gate of the driving transistor M3, thereby controlling the driving transistor M3 to be turned off. In other words, by controlling the slope of the slope voltage signal, the light-emitting time of the light-emitting device 40 can be controlled.
  • the voltage control subcircuit 20 may further include: a first capacitor C1, wherein two ends of the first capacitor C1 are respectively connected to the first voltage terminal V1 and the second electrode of the second control transistor M2.
  • the first voltage terminal V1 may be a ground terminal.
  • the first capacitor C1 may store the voltage of the time data signal, thereby eliminating the need to provide the time data signal to the pixel driving circuit for a long time, thereby reducing driving power consumption.
  • the current control subcircuit 10 includes, in addition to the driving transistor M3 , a data writing unit 11 , a light emitting control unit 12 , a discharging unit 13 , a first storage unit 14 and a second storage unit 15 .
  • the data writing unit 11 may include: a data writing transistor M1, a gate of the data writing transistor M1 is connected to the scanning line PAM_SCAN, a first electrode of the data writing transistor M1 is connected to the grayscale data line PAM_DATA, and a second electrode of the data writing transistor M1 is connected to the gate of the driving transistor M3.
  • a data writing transistor M1 When the scanning signal on the scanning line PAM_SCAN is in an effective level state, the first electrode and the second electrode of the data writing transistor M1 are turned on.
  • the discharge unit 13 is connected to the discharge control line AZ and the second electrode of the driving transistor M3.
  • the discharge control line AZ is used to provide a discharge control signal.
  • the discharge unit 13 is configured to discharge the second electrode of the driving transistor M3 in response to the discharge control signal.
  • Figure 7 is a timing diagram of the pixel driving circuit provided in some embodiments of the present disclosure, wherein the voltage of the reference signal on the reference signal line VREF is Vref, and the voltage of the time data signal on the time data line PWM_DATA is Vpwm_data.
  • the voltage of the second voltage terminal ELVDD is recorded as Vdd.
  • "ON" in Figure 7 indicates that the signal is in a working level state, and "OFF” indicates that the signal is in a non-working level state.
  • the working process of the pixel driving circuit includes: an initialization phase t1 , a self-discharge phase t2 , a data writing phase t3 , and a light emitting phase t4 .
  • the light control signal on the light control line DS, the scanning signal on the scanning line PAM_SCAN, the time modulation signal on the time modulation line PWM_SCAN, and the discharge control signal on the discharge control line AZ are all in the working level state; the voltage value of the grayscale data signal on the grayscale data line PAM_DATA is Vini, where Vini-Vdd is less than the threshold voltage of the driving transistor M3.
  • the light control transistor M4, the data writing transistor M1, the second control transistor M2, and the discharge transistor M5 are all turned on, the potential of the P1 node (i.e., the connection node between the driving transistor M3 and the data writing transistor M1 and the first control transistor T) is Vini, and the potential of the P4 node (i.e., the connection node between the driving transistor M3, the light control transistor M4, the second capacitor C2 and the third capacitor C3) is Vdd.
  • the potential of the P2 node i.e., the connection node between the first capacitor C1, the first control transistor T and the second control transistor M2) is Vpwm_data, and the potential of the P2 node is maintained by the first capacitor C1.
  • the threshold voltage of the first control transistor T is represented by VTH, the potential of the second gate of the first control transistor T is Vback, and the specific value of the corresponding threshold voltage is recorded as Vth1.
  • the potential of the first electrode of the first control transistor T is Vref, and by setting the value of Vpwm_data, Vpwm_data-Vref>Vth1, the first control transistor T is in the off state.
  • the gate-source voltage difference Vini-Vdd of the driving transistor M3 is less than the threshold voltage of the driving transistor M3, so that the driving transistor M3 is in the on state.
  • the light control signal on the light control line DS, the scanning signal on the scanning line PAM_SCAN, and the time modulation signal on the time modulation line PWM_SCAN are all in a non-working level state, and the discharge control signal on the discharge control line AZ is in a working level state.
  • the light control transistor M4, the data writing transistor M1, and the second control transistor M2 are all turned off.
  • the potentials of the first gate, the second gate, and the first electrode of the first control transistor T are all kept the same as in the previous stage, so the first control transistor T remains in the off state.
  • the discharge transistor M5 and the driving transistor M3 maintain the on state of the previous stage, so that the potential of the P4 node is pulled down until the voltage difference between the P3 node and the P4 node reaches the threshold voltage Vth3 of the driving transistor M3, and the driving transistor M3 is turned from the on state to the off state.
  • the potential of the P4 node is Vini-Vth3; at this time, the threshold voltage Vth3 of the driving transistor M3 is stored in the second capacitor C2.
  • the light control signal on the light control line DS and the time modulation signal on the time modulation line PWM_SCAN are both in a non-working level state, so that the light control transistor M4 and the second control transistor M2 are turned off.
  • the voltage of the data signal on the grayscale data line PAM_DATA is Vpam_data
  • the discharge control signal on the discharge control line AZ and the scan signal on the scan line PAM_SCAN are both in a working level state, so that the discharge transistor M5 and the data writing transistor M1 are both turned on, and the potential of the P1 node changes from Vini to Vpam_data.
  • the potential V4 of the P4 node is as follows:
  • the light-emitting control signal on the light-emitting control line DS is in the working level state, and the scanning signal on the scanning line PAM_SCAN and the discharge signal on the discharge control line AZ are both in the non-working level state.
  • the light-emitting control transistor M4 is turned on, the data writing transistor M1, the discharge transistor M5 and the second control transistor M2 are all turned off, and the gate-source voltage difference of the driving transistor M3 is less than the threshold voltage of the driving transistor M3, so that the driving transistor M3 is turned on, thereby providing a driving current for the light-emitting device 40.
  • the driving current Ioled is shown in the following formula:
  • ⁇ n is the electron mobility of the driving transistor M3
  • Cox is the insulation capacitance per unit area, is the width-to-length ratio of the driving transistor M3.
  • the above-mentioned driving current Ioled is the current corresponding to the voltage value of the modulation voltage signal when it is Vback.
  • the back gate-source voltage difference VBS of the first control transistor T gradually decreases, so that the threshold voltage VTH of the first control transistor T gradually increases until the positive gate-source voltage difference VGS of the first control transistor T is less than the threshold voltage VTH of the first control transistor T.
  • the first control transistor T is turned from the off state to the on state, so that the potential of the P1 node reaches Vref.
  • the gate-source voltage of the driving transistor M3 is greater than the threshold voltage of the driving transistor M3, so that the driving transistor M3 is turned off, and the light-emitting device 40 stops emitting light.
  • the light-emitting time of the light-emitting device 40 can be indirectly controlled, thereby the brightness of the light-emitting device 40 can be controlled, and the magnitude of the driving current is independent of the threshold voltage of the driving transistor M3. Therefore, when performing high grayscale display, the light-emitting brightness of the light-emitting device 40 can be controlled by adjusting the voltage of the grayscale data signal in the data writing stage; when performing low grayscale display, the brightness of the light-emitting device 40 can be controlled by controlling the light-emitting time of the light-emitting device 40, thereby solving the color deviation problem caused by too low current density at low grayscale.
  • the structure of the pixel driving circuit in the embodiment of the present disclosure is relatively simple. Simple and easy to implement.
  • the capacitance values of the second capacitor C2 and the third capacitor C3 may be equal, thereby improving the threshold compensation effect.
  • FIG8 is a schematic diagram of a driving method of a pixel driving circuit provided in some embodiments of the present disclosure. As shown in FIG8 , the driving method of the pixel driving circuit includes:
  • the driving transistor of the current control subcircuit provides a driving current to the light emitting device according to the voltage between the gate and the first electrode.
  • the voltage control subcircuit provides a time data signal to the time control subcircuit in response to the time modulation signal.
  • the time control subcircuit controls the gate voltage of the driving transistor according to the voltage difference between the modulation voltage signal and the reference signal, and the voltage difference between the time data signal and the reference signal, so as to control the light-emitting time of the light-emitting device.
  • the embodiment of the present disclosure further provides a display substrate, including a display area.
  • the display area is provided with a plurality of gate lines and a plurality of data lines, and the plurality of gate lines and the plurality of data lines are arranged crosswise, so as to divide the display area into a plurality of pixel areas, each pixel area is provided with a light emitting device and a pixel driving circuit connected to the light emitting device, and the pixel driving circuit is the pixel driving circuit provided in the above embodiment.
  • the present disclosure also provides a display device, including the above-mentioned display substrate.
  • the display device may include any device or product having a display function.
  • the display device may be a smart phone, a mobile phone, an e-book reader, a desktop computer (PC), a laptop PC, a netbook PC, a personal digital assistant (PDA), a portable multimedia player (PMP), a digital audio player, a mobile medical device, a camera, a wearable device (such as a head-mounted device, an electronic clothing, an electronic bracelet, an electronic accessory, an electronic tattoo, or a smart watch), a television, etc.

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  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
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  • Electroluminescent Light Sources (AREA)

Abstract

A pixel driving circuit and a driving method therefor, a display substrate, and a display apparatus. The pixel driving circuit comprises: a current control sub-circuit (10), wherein the current control sub-circuit (10) comprises a driving transistor (M3), and the driving transistor (M3) is configured to provide a driving current to a light-emitting device (40) according to a voltage between a gate electrode and a first electrode. The pixel driving circuit further comprises: a voltage control sub-circuit (20) and a time control sub-circuit (30), wherein the voltage control sub-circuit (20) is configured to transmit a time data signal (Vpwm-data) to the time control sub-circuit (30) in response to a time modulation signal; and the time control sub-circuit (30) is configured to control a gate voltage of the driving transistor (M3) according to a voltage difference between a modulation voltage signal (Vback) and a reference signal (Vref) and a voltage difference between the time data signal (Vpwm-data) and the reference signal (Vref), so as to control the light emission time of the light-emitting device (40).

Description

像素驱动电路及其驱动方法、显示基板、显示装置Pixel driving circuit and driving method thereof, display substrate, and display device 技术领域Technical Field

本公开涉及显示技术领域，具体涉及一种像素驱动电路及其驱动方法、显示基板、显示装置。The present disclosure relates to the field of display technology, and in particular to a pixel driving circuit and a driving method thereof, a display substrate, and a display device.

背景技术Background Art

有源矩阵有机发光二极体面板(Active Matrix Organic Light EmittingDiode，简称：AMOLED)的应用越来越广泛。AMOLED的像素显示器件为有机发光二极管(Organic Light-Emitting Diode,简称OLED)，AMOLED能够发光是通过驱动薄膜晶体管在饱和状态下产生驱动电流，该驱动电流驱动发光器件发光。Active Matrix Organic Light Emitting Diode (AMOLED) is increasingly being used. The pixel display device of AMOLED is an organic light-emitting diode (OLED). AMOLED can emit light by driving the thin film transistor to generate a driving current in a saturated state, and the driving current drives the light-emitting device to emit light.

发明内容Summary of the invention

本公开提供了一种像素驱动电路及其驱动方法、显示基板、显示装置。The present disclosure provides a pixel driving circuit and a driving method thereof, a display substrate, and a display device.

第一方面，本公开提供一种像素驱动电路，包括：电流控制子电路，所述电流控制子电路包括：驱动晶体管，所述驱动晶体管被配置为，根据其栅极与第一极之间的电压，向发光器件提供驱动电流；其中，所述像素驱动电路还包括：电压控制子电路和时间控制子电路；In a first aspect, the present disclosure provides a pixel driving circuit, comprising: a current control subcircuit, the current control subcircuit comprising: a driving transistor, the driving transistor being configured to provide a driving current to a light emitting device according to a voltage between a gate and a first electrode thereof; wherein the pixel driving circuit further comprises: a voltage control subcircuit and a time control subcircuit;

所述电压控制子电路被配置为，响应于时间调制信号，将时间数据信号传输至时间控制子电路；The voltage control subcircuit is configured to transmit the time data signal to the time control subcircuit in response to the time modulation signal;

所述时间控制子电路被配置为，根据调制电压信号与参考信号之间的电压差，以及所述时间数据信号与所述参考信号之间的电压差，控制所述驱动晶体管的栅极电压，以控制所述发光器件的发光时间。The time control subcircuit is configured to control the gate voltage of the driving transistor according to the voltage difference between the modulation voltage signal and the reference signal, and the voltage difference between the time data signal and the reference signal, so as to control the light emission time of the light emitting device.

在一些实施例中，所述时间控制子电路包括：第一控制晶体管，所述第一控制晶体管为双栅晶体管，其第一栅极与所述电压控制子电路连接，所述第一控制晶体管的第二栅极与调制电压线连接，所述第一控制晶体管 的第一极与参考信号线连接，所述第一控制晶体管的第二极与所述驱动晶体管的栅极连接；In some embodiments, the time control subcircuit includes: a first control transistor, the first control transistor is a dual-gate transistor, a first gate of which is connected to the voltage control subcircuit, a second gate of the first control transistor is connected to the modulation voltage line, and the first control transistor A first electrode of the first control transistor is connected to a reference signal line, and a second electrode of the first control transistor is connected to a gate of the driving transistor;

其中，所述调制电压线用于提供所述调制电压信号，所述参考信号线用于提供所述参考信号。The modulation voltage line is used to provide the modulation voltage signal, and the reference signal line is used to provide the reference signal.

在一些实施例中，所述电压控制子电路包括：第二控制晶体管，所述第二控制晶体管的栅极与时间调制线连接，所述第二控制晶体管的第一极与时间数据线连接，所述第二控制晶体管的第二极与所述时间控制子电路连接；In some embodiments, the voltage control subcircuit includes: a second control transistor, a gate of the second control transistor is connected to the time modulation line, a first electrode of the second control transistor is connected to the time data line, and a second electrode of the second control transistor is connected to the time control subcircuit;

其中，所述时间调制线用于提供所述时间调制信号，所述时间数据线用于提供所述时间数据信号。The time modulation line is used to provide the time modulation signal, and the time data line is used to provide the time data signal.

在一些实施例中，所述电压控制子电路还包括：第一电容，所述第一电容的两端分别连接第一电压端和所述第二控制晶体管的第二极。In some embodiments, the voltage control subcircuit further includes: a first capacitor, wherein two ends of the first capacitor are respectively connected to a first voltage end and a second electrode of the second control transistor.

在一些实施例中，所述调制电压信号为斜率电压信号。In some embodiments, the modulation voltage signal is a slope voltage signal.

在一些实施例中，所述电流控制子电路还包括：数据写入单元、发光控制单元、放电单元、第一存储单元和第二存储单元；In some embodiments, the current control subcircuit further includes: a data writing unit, a light emitting control unit, a discharge unit, a first storage unit and a second storage unit;

所述数据写入单元被配置为，响应于扫描信号，将灰阶数据信号写入所述驱动晶体管的栅极；The data writing unit is configured to write a grayscale data signal into the gate of the driving transistor in response to a scan signal;

所述发光控制单元被配置为，响应于发光控制信号，将第二电压端的信号传输至所述驱动晶体管的第一极；The light emitting control unit is configured to transmit the signal of the second voltage terminal to the first electrode of the driving transistor in response to the light emitting control signal;

所述放电单元被配置为，响应于放电控制信号，对所述驱动晶体管的第二极进行放电；The discharge unit is configured to discharge the second electrode of the driving transistor in response to a discharge control signal;

所述第一存储单元被配置为，存储所述驱动晶体管的栅极与第一极之间的电压；The first storage unit is configured to store a voltage between the gate and the first electrode of the driving transistor;

所述第二存储单元被配置为，存储所述驱动晶体管的第一极与所述第二电源端之间的电压。The second storage unit is configured to store a voltage between the first electrode of the driving transistor and the second power supply terminal.

在一些实施例中，所述数据写入单元包括：数据写入晶体管，所述数 据写入晶体管的栅极与扫描线连接，所述数据写入晶体管的第一极与灰阶数据线连接，所述数据写入晶体管的第二极与所述驱动晶体管的栅极连接；In some embodiments, the data writing unit comprises: a data writing transistor, the data The gate of the data writing transistor is connected to the scan line, the first electrode of the data writing transistor is connected to the grayscale data line, and the second electrode of the data writing transistor is connected to the gate of the driving transistor;

其中，所述扫描线用于提供所述扫描信号，所述灰阶数据线用于提供所述灰阶数据信号。The scan line is used to provide the scan signal, and the grayscale data line is used to provide the grayscale data signal.

在一些实施例中，所述发光控制单元包括：发光控制晶体管，所述发光控制晶体管的栅极与用于提供所述发光控制信号的发光控制线连接，所述发光控制晶体管的第一极与所述第二电压端连接，所述发光控制晶体管的第二极与所述驱动晶体管的第一极连接。In some embodiments, the light emitting control unit includes: a light emitting control transistor, a gate of the light emitting control transistor is connected to a light emitting control line for providing the light emitting control signal, a first electrode of the light emitting control transistor is connected to the second voltage terminal, and a second electrode of the light emitting control transistor is connected to the first electrode of the driving transistor.

在一些实施例中，所述放电单元包括：放电晶体管，所述放电晶体管的栅极与放电控制线连接，所述放电晶体管的第一极与所述驱动晶体管的第二极连接，所述放电晶体管的第二极与所述第一电压端连接；所述放电控制线用于提供所述放电控制信号。In some embodiments, the discharge unit includes: a discharge transistor, a gate of the discharge transistor is connected to a discharge control line, a first electrode of the discharge transistor is connected to a second electrode of the driving transistor, and a second electrode of the discharge transistor is connected to the first voltage terminal; the discharge control line is used to provide the discharge control signal.

在一些实施例中，所述第一存储单元包括：第二电容，所述第二电容的两端分别连接所述驱动晶体管的栅极和第一极。In some embodiments, the first storage unit includes: a second capacitor, wherein two ends of the second capacitor are respectively connected to the gate and the first electrode of the driving transistor.

在一些实施例中，所述第二存储单元包括：第三电容，所述第三电容的两端分别连接所述驱动晶体管的第一极与所述第二电源端。In some embodiments, the second storage unit includes: a third capacitor, wherein two ends of the third capacitor are respectively connected to the first electrode of the driving transistor and the second power supply end.

在一些实施例中，所述电压控制子电路包括：第二控制晶体管和第一电容，所述第一电容的两端分别连接第一电压端和所述第二控制晶体管的第二极；In some embodiments, the voltage control subcircuit includes: a second control transistor and a first capacitor, wherein two ends of the first capacitor are respectively connected to a first voltage terminal and a second electrode of the second control transistor;

所述第一存储单元包括：第二电容，所述第二电容的两端分别连接所述驱动晶体管的栅极和第一极；The first storage unit comprises: a second capacitor, two ends of the second capacitor are respectively connected to the gate and the first electrode of the driving transistor;

其中，所述第一电容的容值小于所述第二电容的容值，且小于所述第三电容的容值。The capacitance of the first capacitor is smaller than the capacitance of the second capacitor, and smaller than the capacitance of the third capacitor.

在一些实施例中，所述第二电容与所述第三电容的容值相等。In some embodiments, the second capacitor and the third capacitor have the same capacitance.

第二方面，本公开还提供一种上述像素驱动电路的驱动方法，包括：In a second aspect, the present disclosure further provides a driving method of the above pixel driving circuit, comprising:

电流控制子电路的驱动晶体管根据其栅极与第一极之间的电压，向发 光器件提供驱动电流；The driving transistor of the current control subcircuit provides a current to the generator according to the voltage between its gate and the first electrode. The optical device provides a driving current;

电压控制子电路响应于时间调制信号，将时间数据信号提供给时间控制子电路；The voltage control subcircuit provides the time data signal to the time control subcircuit in response to the time modulation signal;

时间控制子电路根据调制电压信号与参考信号之间的电压差，以及所述时间数据信号与所述参考信号之间的电压差，控制所述驱动晶体管的栅极电压，以控制所述发光器件的发光时间。The time control subcircuit controls the gate voltage of the driving transistor according to the voltage difference between the modulation voltage signal and the reference signal, and the voltage difference between the time data signal and the reference signal, so as to control the light emitting time of the light emitting device.

第三方面，本公开还提供一种显示基板，包括多个像素区，其中，所述像素区中设置有：发光器件以及与所述发光器件电连接的像素驱动电路，所述像素驱动电路为上述的像素驱动电路。In a third aspect, the present disclosure further provides a display substrate, comprising a plurality of pixel areas, wherein the pixel areas are provided with: a light-emitting device and a pixel driving circuit electrically connected to the light-emitting device, and the pixel driving circuit is the above-mentioned pixel driving circuit.

第四方面，本公开还提供一种显示装置，其中，包括上述的显示基板。In a fourth aspect, the present disclosure further provides a display device, which includes the above-mentioned display substrate.

附图说明BRIEF DESCRIPTION OF THE DRAWINGS

附图是用来提供对本公开的进一步理解，并且构成说明书的一部分，与下面的具体实施方式一起用于解释本公开，但并不构成对本公开的限制。在附图中：The accompanying drawings are used to provide a further understanding of the present disclosure and constitute a part of the specification. Together with the following specific embodiments, they are used to explain the present disclosure but do not constitute a limitation of the present disclosure. In the accompanying drawings:

图1为OLED器件的电流与峰值波长的关系曲线图。FIG. 1 is a graph showing the relationship between the current and the peak wavelength of an OLED device.

图2为OLED器件的电流密度与波长的关系曲线示意图。FIG. 2 is a schematic diagram of a curve showing the relationship between the current density and the wavelength of an OLED device.

图3为本公开的一些实施例中提供的像素驱动电路的示意图。FIG. 3 is a schematic diagram of a pixel driving circuit provided in some embodiments of the present disclosure.

图4为本公开的另一些实施例中提供的像素驱动电路的示意图。FIG. 4 is a schematic diagram of a pixel driving circuit provided in some other embodiments of the present disclosure.

图5为双栅晶体管的正栅源压差与漏电流的关系曲线图。FIG5 is a graph showing the relationship between the positive gate-source voltage difference and the leakage current of a dual-gate transistor.

图6为双栅晶体管的阈值电压与背栅源压差的关系曲线图。FIG. 6 is a graph showing the relationship between the threshold voltage of a dual-gate transistor and the back-gate-source voltage difference.

图7为本公开的一些实施例中提供的像素驱动电路的时序图。FIG. 7 is a timing diagram of a pixel driving circuit provided in some embodiments of the present disclosure.

图8为本公开的一些实施例中提供的像素驱动电路的驱动方法示意图。FIG. 8 is a schematic diagram of a driving method of a pixel driving circuit provided in some embodiments of the present disclosure.

具体实施方式DETAILED DESCRIPTION

以下结合附图对本公开的具体实施方式进行详细说明。应当理解的是，此处所描述的具体实施方式仅用于说明和解释本公开，并不用于限制本公 开。The specific implementation of the present disclosure is described in detail below in conjunction with the accompanying drawings. It should be understood that the specific implementation described herein is only used to illustrate and explain the present disclosure, and is not intended to limit the present disclosure. open.

为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本公开保护的范围。In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

除非另作定义，本公开实施例使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。同样，“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。Unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. "First", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, "include" or "comprise" and other similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and other similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

在本公开实施例中所涉及的各个晶体管可分别独立选自多晶硅薄膜晶体管、非晶硅薄膜晶体管、氧化物薄膜晶体管以及有机薄膜晶体管中的一种。在本公开中涉及到的“第一极”具体是指晶体管的源极，相应的“第二极”具体是指晶体管的漏极。当然，本领域的技术人员应该知晓的是，该“第一极”与“第二极”可进行互换。Each transistor involved in the embodiments of the present disclosure can be independently selected from one of a polysilicon thin film transistor, an amorphous silicon thin film transistor, an oxide thin film transistor and an organic thin film transistor. The "first electrode" involved in the present disclosure specifically refers to the source electrode of the transistor, and the corresponding "second electrode" specifically refers to the drain electrode of the transistor. Of course, those skilled in the art should know that the "first electrode" and the "second electrode" can be interchanged.

另外，工作电平状态是指能够使晶体管的第一极和第二极导通的电平状态，非工作电平状态是指能够使晶体管的第一极和第二极断开的电平状态。晶体管可以划分为N型晶体管和P型晶体管，本公开中的各晶体管可分别独立选自N型晶体管或P型晶体管；对于N型晶体管而言，工作电平状态为高电平状态，非工作电平状态为低电平状态；对于P型晶体管而言，工作电平状态为低电平状态，非工作电平状态为高电平状态。在下述实施例中将以像素单元中的全部晶体管均为N型晶体管为例进行示例性描述， 此时像素驱动电路中的晶体管可采用相同的制备工艺得以同时制备。In addition, the working level state refers to a level state that can turn on the first and second electrodes of the transistor, and the non-working level state refers to a level state that can turn off the first and second electrodes of the transistor. Transistors can be divided into N-type transistors and P-type transistors, and each transistor in the present disclosure can be independently selected from an N-type transistor or a P-type transistor; for an N-type transistor, the working level state is a high level state, and the non-working level state is a low level state; for a P-type transistor, the working level state is a low level state, and the non-working level state is a high level state. In the following embodiments, an exemplary description will be given by taking all transistors in the pixel unit as N-type transistors as an example, At this time, the transistors in the pixel driving circuit can be manufactured simultaneously using the same manufacturing process.

显示基板包括显示区以及位于显示区周边的周边区，显示区包括多个像素区，每个像素区中设置有发光器件以及用于为该发光器件提供驱动信号的像素驱动电路。其中，发光器件可以为OLED器件。图1为OLED器件的电流与峰值波长的关系曲线图，从图1可以看出，在不同的电流下，OLED器件的发光峰值波长呈现U型增长。图2为OLED器件的电流密度与波长的关系曲线示意图，从图2可以看出，在同等条件下，通过OLED器件的电流密度越小，其光谱波长的偏移就越大，导致的色偏问题就越严重。因此，对于显示基板而言，当显示基板显示低灰阶的图像时，容易出现色偏问题。The display substrate includes a display area and a peripheral area located around the display area, and the display area includes a plurality of pixel areas, each of which is provided with a light-emitting device and a pixel driving circuit for providing a driving signal to the light-emitting device. Among them, the light-emitting device can be an OLED device. FIG. 1 is a curve diagram showing the relationship between the current and the peak wavelength of the OLED device. It can be seen from FIG. 1 that under different currents, the peak wavelength of the light emission of the OLED device shows a U-shaped growth. FIG. 2 is a schematic diagram of the relationship between the current density and the wavelength of the OLED device. It can be seen from FIG. 2 that under the same conditions, the smaller the current density passing through the OLED device, the greater the deviation of its spectral wavelength, and the more serious the color deviation problem caused. Therefore, for the display substrate, when the display substrate displays a low grayscale image, color deviation problems are prone to occur.

图3为本公开的一些实施例中提供的像素驱动电路的示意图，如图3所示，像素驱动电路包括：电流控制子电路10、电压控制子电路20和时间控制子电路30。FIG3 is a schematic diagram of a pixel driving circuit provided in some embodiments of the present disclosure. As shown in FIG3 , the pixel driving circuit includes: a current control subcircuit 10 , a voltage control subcircuit 20 , and a time control subcircuit 30 .

其中，电流控制子电路10与发光器件40的第一极连接，发光器件40的第二极连接公共电压端COM。发光器件40的第一极可以为阳极，第二极可以为阴极。电流控制子电路10包括：驱动晶体管M3，该驱动晶体管M3被配置为，根据其栅极与第一极之间的电压，向发光器件40提供驱动电流。The current control subcircuit 10 is connected to the first electrode of the light emitting device 40, and the second electrode of the light emitting device 40 is connected to the common voltage terminal COM. The first electrode of the light emitting device 40 may be an anode, and the second electrode may be a cathode. The current control subcircuit 10 includes: a driving transistor M3, which is configured to provide a driving current to the light emitting device 40 according to the voltage between its gate and the first electrode.

电压控制子电路20被配置为，响应于时间调制信号，将时间数据信号传输至时间控制子电路30。The voltage control subcircuit 20 is configured to transmit the time data signal to the time control subcircuit 30 in response to the time modulation signal.

时间控制子电路30被配置为，根据调制电压信号与参考信号之间的电压差，以及时间数据信号与参考信号之间的电压差，控制驱动晶体管M3的栅极电压，以控制驱动晶体管M3的通断，从而控制发光器件40的发光时间。其中，参考信号可以为电压固定的信号；调制电压信号为电压可调的信号。The time control subcircuit 30 is configured to control the gate voltage of the driving transistor M3 according to the voltage difference between the modulation voltage signal and the reference signal, and the voltage difference between the time data signal and the reference signal, so as to control the on-off of the driving transistor M3, thereby controlling the light-emitting time of the light-emitting device 40. The reference signal may be a signal with a fixed voltage; and the modulation voltage signal may be a signal with an adjustable voltage.

在本公开实施例提供的像素驱动电路中，在发光阶段，电流控制子电 路10根据其栅极与第一极之间的电压，向发光器件40提供驱动电流；并且可以通过控制调制电压信号与参考信号之间的电压差，使得时间控制子电路30对驱动晶体管M3的栅极电压进行控制，从而控制驱动晶体管M3的通断，进而控制发光器件40的发光时间，来实现各灰阶显示。其中，在实现高灰阶显示时，可以将发光时间控制得较长；在实现低灰阶显示时，可以将发光时间控制得较短，从而解决低灰阶下电流密度过低而导致的色偏问题。In the pixel driving circuit provided by the embodiment of the present disclosure, in the light emitting stage, the current control sub-circuit The circuit 10 provides a driving current to the light emitting device 40 according to the voltage between the gate and the first electrode thereof; and the time control subcircuit 30 can control the gate voltage of the driving transistor M3 by controlling the voltage difference between the modulated voltage signal and the reference signal, thereby controlling the on-off of the driving transistor M3, and further controlling the light emitting time of the light emitting device 40 to realize various grayscale displays. When realizing high grayscale display, the light emitting time can be controlled to be longer; when realizing low grayscale display, the light emitting time can be controlled to be shorter, thereby solving the color deviation problem caused by too low current density under low grayscale.

图4为本公开的另一些实施例中提供的像素驱动电路的示意图，图4为图3的一种具体化实现方案。如图4所示，时间控制子电路30包括：第一控制晶体管T，第一控制晶体管T为双栅晶体管，其第一栅极与电压控制子电路20连接，第一控制晶体管T的第二栅极与调制电压线SWEEP连接，第一控制晶体管T的第一极与用于提供参考信号的参考信号线VREF连接，第一控制晶体管T的第二极与驱动晶体管M3的栅极连接。其中，调制电压线SWEEP用于提供上述调制电压信号，参考信号线VREF用于提供上述参考信号。FIG4 is a schematic diagram of a pixel driving circuit provided in some other embodiments of the present disclosure, and FIG4 is a specific implementation scheme of FIG3. As shown in FIG4, the time control subcircuit 30 includes: a first control transistor T, the first control transistor T is a dual-gate transistor, the first gate of which is connected to the voltage control subcircuit 20, the second gate of the first control transistor T is connected to the modulation voltage line SWEEP, the first electrode of the first control transistor T is connected to the reference signal line VREF for providing a reference signal, and the second electrode of the first control transistor T is connected to the gate of the driving transistor M3. Among them, the modulation voltage line SWEEP is used to provide the above-mentioned modulation voltage signal, and the reference signal line VREF is used to provide the above-mentioned reference signal.

其中，双栅晶体管的第一栅极为正栅极，第二栅极为背栅极。图5为双栅晶体管的正栅源压差与漏电流的关系曲线图，图6为双栅晶体管的阈值电压与背栅源压差的关系曲线图，其中，正栅源压差为双栅晶体管的第一栅极与源极之间的压差Vgs，背栅源压差为双栅晶体管的第二栅极与源极之间的压差Vbs。从图5和图6可以看出，随着背栅源压差的增大，双栅晶体管的阈值电压Vth逐渐减小。Wherein, the first gate of the dual-gate transistor is a positive gate, and the second gate is a back gate. FIG5 is a graph showing the relationship between the positive gate-source voltage difference and the leakage current of the dual-gate transistor, and FIG6 is a graph showing the relationship between the threshold voltage and the back gate-source voltage difference of the dual-gate transistor, wherein the positive gate-source voltage difference is the voltage difference Vgs between the first gate and the source of the dual-gate transistor, and the back gate-source voltage difference is the voltage difference Vbs between the second gate and the source of the dual-gate transistor. It can be seen from FIG5 and FIG6 that as the back gate-source voltage difference increases, the threshold voltage Vth of the dual-gate transistor gradually decreases.

其中，调制电压信号可以为斜率电压信号。斜率电压信号是指，在某一时间段，电压值可以按照所需的斜率进行递增或递减的信号。The modulated voltage signal may be a slope voltage signal, which is a signal whose voltage value may be increased or decreased according to a desired slope in a certain period of time.

其中，参考信号的电压满足：当驱动晶体管M3的栅极接收到参考信号，第一极接收到第二电压端ELVDD的电压信号时，驱动晶体管M3关断。以驱动晶体管M3为P型晶体管为例，参考信号与第二电压端ELVDD的电压 信号的差值大于驱动晶体管M3的阈值电压。The voltage of the reference signal satisfies: when the gate of the driving transistor M3 receives the reference signal and the first electrode receives the voltage signal of the second voltage terminal ELVDD, the driving transistor M3 is turned off. Taking the driving transistor M3 as a P-type transistor as an example, the voltage of the reference signal and the second voltage terminal ELVDD is The difference of the signals is greater than the threshold voltage of the driving transistor M3.

在本公开实施例中，第一控制晶体管T(双栅晶体管)的第二栅极连接斜率电压信号，因此，在发光阶段，当需要将驱动晶体管T3关断时，可以减小斜率电压线SWEEP上的电压，从而增大双栅晶体管的阈值电压，进而使得双栅晶体管导通，以使参考信号传输至驱动晶体管M3的栅极，从而控制驱动晶体管M3关断。也就是说，通过控制斜率电压信号的斜率，可以控制发光器件40的发光时间。In the embodiment of the present disclosure, the second gate of the first control transistor T (double-gate transistor) is connected to the slope voltage signal. Therefore, in the light-emitting stage, when the driving transistor T3 needs to be turned off, the voltage on the slope voltage line SWEEP can be reduced, thereby increasing the threshold voltage of the double-gate transistor, thereby turning on the double-gate transistor, so that the reference signal is transmitted to the gate of the driving transistor M3, thereby controlling the driving transistor M3 to be turned off. In other words, by controlling the slope of the slope voltage signal, the light-emitting time of the light-emitting device 40 can be controlled.

如图4所示，电压控制子电路20可以包括：第二控制晶体管M2，第二控制晶体管M2的栅极与时间调制线PWM_SCAN连接，第一极与用于提供时间数据信号的时间数据线PWM_DATA连接，第二极与时间控制子电路30连接。其中，时间调制线PWM_SCAN用于提供时间调制信号，时间数据线PWM_DATA用于提供时间数据信号。当时间调制信号处于有效电平状态时，第二控制晶体管M2开启，从而将时间数据信号传输至第一控制晶体管T的第一栅极。As shown in FIG4 , the voltage control subcircuit 20 may include: a second control transistor M2, the gate of the second control transistor M2 is connected to the time modulation line PWM_SCAN, the first electrode is connected to the time data line PWM_DATA for providing the time data signal, and the second electrode is connected to the time control subcircuit 30. The time modulation line PWM_SCAN is used to provide the time modulation signal, and the time data line PWM_DATA is used to provide the time data signal. When the time modulation signal is in an effective level state, the second control transistor M2 is turned on, thereby transmitting the time data signal to the first gate of the first control transistor T.

进一步地，电压控制子电路20还可以包括：第一电容C1，第一电容C1的两端分别连接第一电压端V1和第二控制晶体管M2的第二极。其中，第一电压端V1可以为接地端。第一电容C1可以对时间数据信号的电压进行存储，从而不需要长时间向像素驱动电路提供时间数据信号，进而减少驱动功耗。Furthermore, the voltage control subcircuit 20 may further include: a first capacitor C1, wherein two ends of the first capacitor C1 are respectively connected to the first voltage terminal V1 and the second electrode of the second control transistor M2. The first voltage terminal V1 may be a ground terminal. The first capacitor C1 may store the voltage of the time data signal, thereby eliminating the need to provide the time data signal to the pixel driving circuit for a long time, thereby reducing driving power consumption.

如图4所示，电流控制子电路10除了包括驱动晶体管M3之外，还包括：数据写入单元11、发光控制单元12、放电单元13、第一存储单元14和第二存储单元15。As shown in FIG. 4 , the current control subcircuit 10 includes, in addition to the driving transistor M3 , a data writing unit 11 , a light emitting control unit 12 , a discharging unit 13 , a first storage unit 14 and a second storage unit 15 .

数据写入单元11与扫描线PAM_SCAN、灰阶数据线PAM_DATA、驱动晶体管M3的栅极连接，扫描线PAM_SCAN用于提供扫描信号，灰阶数据线PAM_DATA用于提供灰阶数据信号，数据写入单元11被配置为，响应于扫描信号，将灰阶数据信号写入驱动晶体管M3的栅极。 The data writing unit 11 is connected to the scan line PAM_SCAN, the grayscale data line PAM_DATA, and the gate of the driving transistor M3. The scan line PAM_SCAN is used to provide a scan signal, and the grayscale data line PAM_DATA is used to provide a grayscale data signal. The data writing unit 11 is configured to write the grayscale data signal into the gate of the driving transistor M3 in response to the scan signal.

其中，数据写入单元11可以包括：数据写入晶体管M1，数据写入晶体管M1的栅极与扫描线PAM_SCAN连接，数据写入晶体管M1的第一极与灰阶数据线PAM_DATA连接，数据写入晶体管M1的第二极与驱动晶体管M3的栅极连接。当扫描线PAM_SCAN上的扫描信号处于有效电平状态时，数据写入晶体管M1的第一极和第二极导通。The data writing unit 11 may include: a data writing transistor M1, a gate of the data writing transistor M1 is connected to the scanning line PAM_SCAN, a first electrode of the data writing transistor M1 is connected to the grayscale data line PAM_DATA, and a second electrode of the data writing transistor M1 is connected to the gate of the driving transistor M3. When the scanning signal on the scanning line PAM_SCAN is in an effective level state, the first electrode and the second electrode of the data writing transistor M1 are turned on.

发光控制单元12与第二电压端ELVDD、发光控制线DS、驱动晶体管M3的第一极连接，发光控制线DS用于提供发光控制信号。发光控制单元12被配置为，响应于发光控制信号，将第二电压端ELVDD的信号传输至驱动晶体管M3的第一极。The light emitting control unit 12 is connected to the second voltage terminal ELVDD, the light emitting control line DS, and the first electrode of the driving transistor M3. The light emitting control line DS is used to provide a light emitting control signal. The light emitting control unit 12 is configured to transmit the signal of the second voltage terminal ELVDD to the first electrode of the driving transistor M3 in response to the light emitting control signal.

其中，发光控制单元12可以包括：发光控制晶体管M4，发光控制晶体管M4的栅极与发光控制线DS连接，发光控制晶体管M4的第一极与第二电压端ELVDD连接，发光控制晶体管M4的第二极与驱动晶体管M3的第一极连接。当发光控制信号处于工作电平状态时，发光控制晶体管M4的第一极和第二极导通，从而将第二电压端ELVDD的信号传输至驱动晶体管M3的第一极。The light emitting control unit 12 may include: a light emitting control transistor M4, a gate of the light emitting control transistor M4 is connected to the light emitting control line DS, a first electrode of the light emitting control transistor M4 is connected to the second voltage terminal ELVDD, and a second electrode of the light emitting control transistor M4 is connected to the first electrode of the driving transistor M3. When the light emitting control signal is in the working level state, the first electrode and the second electrode of the light emitting control transistor M4 are turned on, so as to transmit the signal of the second voltage terminal ELVDD to the first electrode of the driving transistor M3.

放电单元13与放电控制线AZ、驱动晶体管M3的第二极连接，放电控制线AZ用于提供放电控制信号。放电单元13被配置为，响应于放电控制信号，对驱动晶体管M3的第二极进行放电。The discharge unit 13 is connected to the discharge control line AZ and the second electrode of the driving transistor M3. The discharge control line AZ is used to provide a discharge control signal. The discharge unit 13 is configured to discharge the second electrode of the driving transistor M3 in response to the discharge control signal.

其中，放电单元13包括放电晶体管M5，放电晶体管M5的栅极与放电控制线AZ连接，放电晶体管M5的第一极与驱动晶体管M3的第二极连接，放电晶体管M5的第二极与第一电压端V1连接。The discharge unit 13 includes a discharge transistor M5 , a gate of the discharge transistor M5 is connected to the discharge control line AZ, a first electrode of the discharge transistor M5 is connected to the second electrode of the driving transistor M3 , and a second electrode of the discharge transistor M5 is connected to the first voltage terminal V1 .

第一存储单元14连接在驱动晶体管M3的栅极与第一级之间，用于存储驱动晶体管M3的栅极与第一极之间的电压。第二存储单元15连接在驱动晶体管M3的第一极与第二电压端ELVDD，用于存储驱动晶体管M3的第一极与第二电压端ELVDD之间的电压。The first storage unit 14 is connected between the gate of the driving transistor M3 and the first stage, and is used to store the voltage between the gate and the first electrode of the driving transistor M3. The second storage unit 15 is connected between the first electrode of the driving transistor M3 and the second voltage terminal ELVDD, and is used to store the voltage between the first electrode of the driving transistor M3 and the second voltage terminal ELVDD.

其中，第一存储单元14包括第二电容C2，第二电容C2的两端分别连 接驱动晶体管M3的栅极和第一极。第二存储单元15包括第三电容C3，第三电容C3的两端分别连接驱动晶体管M3的第一极与第二电压端ELVDD。The first storage unit 14 includes a second capacitor C2, and the two ends of the second capacitor C2 are respectively connected to The second storage unit 15 includes a third capacitor C3, and two ends of the third capacitor C3 are respectively connected to the first electrode of the driving transistor M3 and the second voltage terminal ELVDD.

在一些实施例中，第一电容C1的电容值小于第二电容C2的电容值，且第一电容C1的电容值小于第三电容C3的电容值。将第一电容C1的电容值设置得较小，有利于减小第一控制晶体管T的漏电流。In some embodiments, the capacitance of the first capacitor C1 is smaller than that of the second capacitor C2, and the capacitance of the first capacitor C1 is smaller than that of the third capacitor C3. Setting the capacitance of the first capacitor C1 to be smaller is beneficial to reducing the leakage current of the first control transistor T.

下面以第一控制晶体管T、第二控制晶体管M2、数据写入晶体管M1、驱动晶体管M3、发光控制晶体管M4均为P型晶体管，放电晶体管M5为N型晶体管为例，对像素驱动电路的工作过程进行介绍。其中，图7为本公开的一些实施例中提供的像素驱动电路的时序图，其中，参考信号线VREF上的参考信号的电压为Vref，时间数据线PWM_DATA上的时间数据信号的电压为Vpwm_data。第二电压端ELVDD的电压记作Vdd。图7中的“ON”表示信号处于工作电平状态，“OFF”表示信号处于非工作电平状态。The following introduces the working process of the pixel driving circuit by taking the first control transistor T, the second control transistor M2, the data writing transistor M1, the driving transistor M3, and the light emitting control transistor M4 as P-type transistors, and the discharge transistor M5 as an N-type transistor as an example. Among them, Figure 7 is a timing diagram of the pixel driving circuit provided in some embodiments of the present disclosure, wherein the voltage of the reference signal on the reference signal line VREF is Vref, and the voltage of the time data signal on the time data line PWM_DATA is Vpwm_data. The voltage of the second voltage terminal ELVDD is recorded as Vdd. "ON" in Figure 7 indicates that the signal is in a working level state, and "OFF" indicates that the signal is in a non-working level state.

如图7所示，像素驱动电路的工作过程包括：初始化阶段t1、自放电阶段t2、数据写入阶段t3、发光阶段t4。As shown in FIG. 7 , the working process of the pixel driving circuit includes: an initialization phase t1 , a self-discharge phase t2 , a data writing phase t3 , and a light emitting phase t4 .

在初始化阶段t1，发光控制线DS上的发光控制信号、扫描线PAM_SCAN上的扫描信号、时间调制线PWM_SCAN上的时间调制信号、放电控制线AZ上的放电控制信号均处于工作电平状态；灰阶数据线PAM_DATA上的灰阶数据信号的电压值为Vini，其中，Vini-Vdd小于驱动晶体管M3的阈值电压。此时，发光控制晶体管M4、数据写入晶体管M1、第二控制晶体管M2、放电晶体管M5均导通，P1节点(即驱动晶体管M3与数据写入晶体管M1、第一控制晶体管T之间的连接节点)的电位为Vini，P4节点(即驱动晶体管M3、发光控制晶体管M4、第二电容C2和第三电容C3之间的连接节点)的电位为Vdd。P2节点(即第一电容C1、第一控制晶体管T和第二控制晶体管M2的连接节点)的电位为Vpwm_data，P2节点的电位由第一电容C1保持。 In the initialization stage t1, the light control signal on the light control line DS, the scanning signal on the scanning line PAM_SCAN, the time modulation signal on the time modulation line PWM_SCAN, and the discharge control signal on the discharge control line AZ are all in the working level state; the voltage value of the grayscale data signal on the grayscale data line PAM_DATA is Vini, where Vini-Vdd is less than the threshold voltage of the driving transistor M3. At this time, the light control transistor M4, the data writing transistor M1, the second control transistor M2, and the discharge transistor M5 are all turned on, the potential of the P1 node (i.e., the connection node between the driving transistor M3 and the data writing transistor M1 and the first control transistor T) is Vini, and the potential of the P4 node (i.e., the connection node between the driving transistor M3, the light control transistor M4, the second capacitor C2 and the third capacitor C3) is Vdd. The potential of the P2 node (i.e., the connection node between the first capacitor C1, the first control transistor T and the second control transistor M2) is Vpwm_data, and the potential of the P2 node is maintained by the first capacitor C1.

其中，第一控制晶体管T的阈值电压用VTH表示，第一控制晶体管T的第二栅极的电位为Vback，此时对应的阈值电压的具体数值记作Vth1。第一控制晶体管T的第一极的电位为Vref，通过设置Vpwm_data的值，使Vpwm_data-Vref＞Vth1，使第一控制晶体管T处于关断状态。驱动晶体管M3的栅源压差Vini-Vdd小于驱动晶体管M3的阈值电压，从而使驱动晶体管M3处于导通状态。The threshold voltage of the first control transistor T is represented by VTH, the potential of the second gate of the first control transistor T is Vback, and the specific value of the corresponding threshold voltage is recorded as Vth1. The potential of the first electrode of the first control transistor T is Vref, and by setting the value of Vpwm_data, Vpwm_data-Vref＞Vth1, the first control transistor T is in the off state. The gate-source voltage difference Vini-Vdd of the driving transistor M3 is less than the threshold voltage of the driving transistor M3, so that the driving transistor M3 is in the on state.

在自放电阶段t2，发光控制线DS上的发光控制信号、扫描线PAM_SCAN上的扫描信号、时间调制线PWM_SCAN上的时间调制信号均处于非工作电平状态，放电控制线AZ上的放电控制信号处于工作电平状态。此时，发光控制晶体管M4、数据写入晶体管M1、第二控制晶体管M2均关断。第一控制晶体管T的第一栅极、第二栅极和第一极的电位均保持与上一阶段相同，因此，第一控制晶体管T保持关断状态。另外，放电晶体管M5和驱动晶体管M3保持上一阶段的导通状态，从而使P4节点的电位被拉低，直至P3节点与P4节点的电压差达到驱动晶体管M3的阈值电压Vth3时，驱动晶体管M3由导通状态转为关断状态。此时，P4节点的电位为Vini-Vth3；此时，驱动晶体管M3的阈值电压Vth3被存储在第二电容C2中。In the self-discharge stage t2, the light control signal on the light control line DS, the scanning signal on the scanning line PAM_SCAN, and the time modulation signal on the time modulation line PWM_SCAN are all in a non-working level state, and the discharge control signal on the discharge control line AZ is in a working level state. At this time, the light control transistor M4, the data writing transistor M1, and the second control transistor M2 are all turned off. The potentials of the first gate, the second gate, and the first electrode of the first control transistor T are all kept the same as in the previous stage, so the first control transistor T remains in the off state. In addition, the discharge transistor M5 and the driving transistor M3 maintain the on state of the previous stage, so that the potential of the P4 node is pulled down until the voltage difference between the P3 node and the P4 node reaches the threshold voltage Vth3 of the driving transistor M3, and the driving transistor M3 is turned from the on state to the off state. At this time, the potential of the P4 node is Vini-Vth3; at this time, the threshold voltage Vth3 of the driving transistor M3 is stored in the second capacitor C2.

在数据写入阶段t3，发光控制线DS上的发光控制信号、时间调制线PWM_SCAN上的时间调制信号均处于非工作电平状态，从而使发光控制晶体管M4、第二控制晶体管M2关断。灰阶数据线PAM_DATA上的数据信号的电压为Vpam_data，放电控制线AZ上的放电控制信号、扫描线PAM_SCAN上的扫描信号均处于工作电平状态，从而使放电晶体管M5和数据写入晶体管M1均导通，P1节点的电位从Vini变为Vpam_data。在第二电容C2和第三电容C3的自举作用下，P4节点的电位V4如下式所示：
In the data writing stage t3, the light control signal on the light control line DS and the time modulation signal on the time modulation line PWM_SCAN are both in a non-working level state, so that the light control transistor M4 and the second control transistor M2 are turned off. The voltage of the data signal on the grayscale data line PAM_DATA is Vpam_data, the discharge control signal on the discharge control line AZ and the scan signal on the scan line PAM_SCAN are both in a working level state, so that the discharge transistor M5 and the data writing transistor M1 are both turned on, and the potential of the P1 node changes from Vini to Vpam_data. Under the bootstrap effect of the second capacitor C2 and the third capacitor C3, the potential V4 of the P4 node is as follows:

在发光阶段t4，发光控制线DS上的发光控制信号处于工作电平状态，扫描线PAM_SCAN上的扫描信号、放电控制线AZ上的放电信号均处于非工作电平状态。此时，发光控制晶体管M4导通，数据写入晶体管M1、放电晶体管M5和第二控制晶体管M2均关断，驱动晶体管M3的栅源压差小于驱动晶体管M3的阈值电压，使驱动晶体管M3导通，从而为发光器件40提供驱动电流。其中，驱动电流Ioled如下式所示：
In the light-emitting stage t4, the light-emitting control signal on the light-emitting control line DS is in the working level state, and the scanning signal on the scanning line PAM_SCAN and the discharge signal on the discharge control line AZ are both in the non-working level state. At this time, the light-emitting control transistor M4 is turned on, the data writing transistor M1, the discharge transistor M5 and the second control transistor M2 are all turned off, and the gate-source voltage difference of the driving transistor M3 is less than the threshold voltage of the driving transistor M3, so that the driving transistor M3 is turned on, thereby providing a driving current for the light-emitting device 40. Among them, the driving current Ioled is shown in the following formula:

其中，μn是驱动晶体管M3的电子迁移率，Cox是单位面积的绝缘电容，是驱动晶体管M3的宽长比。in, μ n is the electron mobility of the driving transistor M3, Cox is the insulation capacitance per unit area, is the width-to-length ratio of the driving transistor M3.

其中，上述驱动电流Ioled是调制电压信号的电压值为Vback时所对应的电流。当调制电压信号的电压逐渐降低时，第一控制晶体管T的背栅源压差VBS逐渐降低，从而使第一控制晶体管T的阈值电压VTH逐渐升高，直至第一控制晶体管T的正栅源压差VGS小于第一控制晶体管T的阈值电压VTH。此时，第一控制晶体管T由关断状态转为导通状态，从而使P1节点的电位达到Vref。此时驱动晶体管M3的栅源电压大于驱动晶体管M3的阈值电压，使得驱动晶体管M3关断，发光器件40停止发光。Among them, the above-mentioned driving current Ioled is the current corresponding to the voltage value of the modulation voltage signal when it is Vback. When the voltage of the modulation voltage signal gradually decreases, the back gate-source voltage difference VBS of the first control transistor T gradually decreases, so that the threshold voltage VTH of the first control transistor T gradually increases until the positive gate-source voltage difference VGS of the first control transistor T is less than the threshold voltage VTH of the first control transistor T. At this time, the first control transistor T is turned from the off state to the on state, so that the potential of the P1 node reaches Vref. At this time, the gate-source voltage of the driving transistor M3 is greater than the threshold voltage of the driving transistor M3, so that the driving transistor M3 is turned off, and the light-emitting device 40 stops emitting light.

通过上述过程可知，在发光阶段，通过调节调制电压信号的电压，可以间接控制发光器件40的发光时间，从而可以通过发光器件40的亮度，且驱动电流的大小与驱动晶体管M3的阈值电压无关。因此，在进行高灰阶显示时，可以通过调节数据写入阶段的灰阶数据信号的电压，来控制发光器件40的发光亮度；在进行低灰阶显示时，通过控制发光器件40的发光时间，来控制发光器件40的亮度，从而可以解决低灰阶下因电流密度过低而引发的色偏问题。并且，本公开实施例中的像素驱动电路的结构较为简 单，易于实现。Through the above process, it can be known that in the light-emitting stage, by adjusting the voltage of the modulated voltage signal, the light-emitting time of the light-emitting device 40 can be indirectly controlled, thereby the brightness of the light-emitting device 40 can be controlled, and the magnitude of the driving current is independent of the threshold voltage of the driving transistor M3. Therefore, when performing high grayscale display, the light-emitting brightness of the light-emitting device 40 can be controlled by adjusting the voltage of the grayscale data signal in the data writing stage; when performing low grayscale display, the brightness of the light-emitting device 40 can be controlled by controlling the light-emitting time of the light-emitting device 40, thereby solving the color deviation problem caused by too low current density at low grayscale. In addition, the structure of the pixel driving circuit in the embodiment of the present disclosure is relatively simple. Simple and easy to implement.

在一些实施例中，第二电容C2和第三电容C3的电容值可以相等，从而可以提高阈值补偿效果。In some embodiments, the capacitance values of the second capacitor C2 and the third capacitor C3 may be equal, thereby improving the threshold compensation effect.

图8为本公开的一些实施例中提供的像素驱动电路的驱动方法示意图，如图8所示，像素驱动电路的驱动方法包括：FIG8 is a schematic diagram of a driving method of a pixel driving circuit provided in some embodiments of the present disclosure. As shown in FIG8 , the driving method of the pixel driving circuit includes:

S1、电流控制子电路的驱动晶体管根据其栅极与第一极之间的电压，向发光器件提供驱动电流。S1. The driving transistor of the current control subcircuit provides a driving current to the light emitting device according to the voltage between the gate and the first electrode.

S2、电压控制子电路响应于时间调制信号，将时间数据信号提供给时间控制子电路。S2. The voltage control subcircuit provides a time data signal to the time control subcircuit in response to the time modulation signal.

S3、时间控制子电路根据调制电压信号与参考信号之间的电压差，以及所述时间数据信号与所述参考信号之间的电压差，控制所述驱动晶体管的栅极电压，以控制所述发光器件的发光时间。S3. The time control subcircuit controls the gate voltage of the driving transistor according to the voltage difference between the modulation voltage signal and the reference signal, and the voltage difference between the time data signal and the reference signal, so as to control the light-emitting time of the light-emitting device.

其中，像素驱动电路的具体工作过程已在上文说明，这里不再赘述。The specific working process of the pixel driving circuit has been described above and will not be repeated here.

本公开实施例还提供一种显示基板，包括显示区。显示区设置有多条栅线和多条数据线，多条栅线和多条数据线交叉设置，从而将显示区划分为多个像素区，每个像素区中设置有发光器件以及与发光器件连接的像素驱动电路，该像素驱动电路为上述实施例中所提供的像素驱动电路。The embodiment of the present disclosure further provides a display substrate, including a display area. The display area is provided with a plurality of gate lines and a plurality of data lines, and the plurality of gate lines and the plurality of data lines are arranged crosswise, so as to divide the display area into a plurality of pixel areas, each pixel area is provided with a light emitting device and a pixel driving circuit connected to the light emitting device, and the pixel driving circuit is the pixel driving circuit provided in the above embodiment.

本公开实施例还提供一种显示装置，包括上述显示基板。显示装置可以包括任何具有显示功能的设备或产品。例如，显示装置可以是智能电话、移动电话、电子书阅读器、台式电脑(PC)、膝上型PC、上网本PC、个人数字助理(PDA)、便携式多媒体播放器(PMP)、数字音频播放器、移动医疗设备、相机、可穿戴设备(例如头戴式设备、电子服饰、电子手环、电子配饰、电子纹身、或智能手表)、电视机等。The present disclosure also provides a display device, including the above-mentioned display substrate. The display device may include any device or product having a display function. For example, the display device may be a smart phone, a mobile phone, an e-book reader, a desktop computer (PC), a laptop PC, a netbook PC, a personal digital assistant (PDA), a portable multimedia player (PMP), a digital audio player, a mobile medical device, a camera, a wearable device (such as a head-mounted device, an electronic clothing, an electronic bracelet, an electronic accessory, an electronic tattoo, or a smart watch), a television, etc.

可以理解的是，以上实施方式仅仅是为了说明本公开的原理而采用的示例性实施方式，然而本公开并不局限于此。对于本领域内的普通技术人员而言，在不脱离本公开的精神和实质的情况下，可以做出各种变型和改 进，这些变型和改进也视为本公开的保护范围。 It is understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of the present disclosure, but the present disclosure is not limited thereto. It is obvious to those skilled in the art that various modifications and alterations may be made without departing from the spirit and substance of the present disclosure. Furthermore, these variations and improvements are also considered to be within the protection scope of the present disclosure.

Claims (16)

一种像素驱动电路，包括：电流控制子电路，所述电流控制子电路包括：驱动晶体管，所述驱动晶体管被配置为，根据其栅极与第一极之间的电压，向发光器件提供驱动电流；其中，所述像素驱动电路还包括：电压控制子电路和时间控制子电路；A pixel driving circuit, comprising: a current control subcircuit, the current control subcircuit comprising: a driving transistor, the driving transistor being configured to provide a driving current to a light emitting device according to a voltage between a gate and a first electrode thereof; wherein the pixel driving circuit further comprises: a voltage control subcircuit and a time control subcircuit; 所述电压控制子电路被配置为，响应于时间调制信号，将时间数据信号传输至时间控制子电路；The voltage control subcircuit is configured to transmit the time data signal to the time control subcircuit in response to the time modulation signal; 所述时间控制子电路被配置为，根据调制电压信号与参考信号之间的电压差，以及所述时间数据信号与所述参考信号之间的电压差，控制所述驱动晶体管的栅极电压，以控制所述发光器件的发光时间。The time control subcircuit is configured to control the gate voltage of the driving transistor according to the voltage difference between the modulation voltage signal and the reference signal, and the voltage difference between the time data signal and the reference signal, so as to control the light emission time of the light emitting device. 根据权利要求1所述的像素驱动电路，其中，所述时间控制子电路包括：第一控制晶体管，所述第一控制晶体管为双栅晶体管，其第一栅极与所述电压控制子电路连接，所述第一控制晶体管的第二栅极与调制电压线连接，所述第一控制晶体管的第一极与参考信号线连接，所述第一控制晶体管的第二极与所述驱动晶体管的栅极连接；The pixel driving circuit according to claim 1, wherein the time control subcircuit comprises: a first control transistor, the first control transistor is a dual-gate transistor, a first gate of the first control transistor is connected to the voltage control subcircuit, a second gate of the first control transistor is connected to a modulation voltage line, a first electrode of the first control transistor is connected to a reference signal line, and a second electrode of the first control transistor is connected to the gate of the driving transistor; 其中，所述调制电压线用于提供所述调制电压信号，所述参考信号线用于提供所述参考信号。The modulation voltage line is used to provide the modulation voltage signal, and the reference signal line is used to provide the reference signal. 根据权利要求1所述的像素驱动电路，其中，所述电压控制子电路包括：第二控制晶体管，所述第二控制晶体管的栅极与时间调制线连接，所述第二控制晶体管的第一极与时间数据线连接，所述第二控制晶体管的第二极与所述时间控制子电路连接；The pixel driving circuit according to claim 1, wherein the voltage control subcircuit comprises: a second control transistor, a gate of the second control transistor is connected to the time modulation line, a first electrode of the second control transistor is connected to the time data line, and a second electrode of the second control transistor is connected to the time control subcircuit; 其中，所述时间调制线用于提供所述时间调制信号，所述时间数据线用于提供所述时间数据信号。 The time modulation line is used to provide the time modulation signal, and the time data line is used to provide the time data signal. 根据权利要求3所述的像素驱动电路，其中，所述电压控制子电路还包括：第一电容，所述第一电容的两端分别连接第一电压端和所述第二控制晶体管的第二极。The pixel driving circuit according to claim 3, wherein the voltage control subcircuit further comprises: a first capacitor, wherein two ends of the first capacitor are respectively connected to the first voltage terminal and the second electrode of the second control transistor. 根据权利要求1至4中任一项所述的像素驱动电路，其中，所述调制电压信号为斜率电压信号。The pixel driving circuit according to any one of claims 1 to 4, wherein the modulated voltage signal is a slope voltage signal. 根据权利要求1至4中任一项所述的像素驱动电路，其中，所述电流控制子电路还包括：数据写入单元、发光控制单元、放电单元、第一存储单元和第二存储单元；The pixel driving circuit according to any one of claims 1 to 4, wherein the current control subcircuit further comprises: a data writing unit, a light emitting control unit, a discharge unit, a first storage unit and a second storage unit; 所述数据写入单元被配置为，响应于扫描信号，将灰阶数据信号写入所述驱动晶体管的栅极；The data writing unit is configured to write a grayscale data signal into the gate of the driving transistor in response to a scan signal; 所述发光控制单元被配置为，响应于发光控制信号，将第二电压端的信号传输至所述驱动晶体管的第一极；The light emitting control unit is configured to transmit the signal of the second voltage terminal to the first electrode of the driving transistor in response to the light emitting control signal; 所述放电单元被配置为，响应于放电控制信号，对所述驱动晶体管的第二极进行放电；The discharge unit is configured to discharge the second electrode of the driving transistor in response to a discharge control signal; 所述第一存储单元被配置为，存储所述驱动晶体管的栅极与第一极之间的电压；The first storage unit is configured to store a voltage between the gate and the first electrode of the driving transistor; 所述第二存储单元被配置为，存储所述驱动晶体管的第一极与所述第二电源端之间的电压。The second storage unit is configured to store a voltage between the first electrode of the driving transistor and the second power supply terminal. 根据权利要求6所述的像素驱动电路，其中，所述数据写入单元包括：数据写入晶体管，所述数据写入晶体管的栅极与扫描线连接，所述数据写入晶体管的第一极与灰阶数据线连接，所述数据写入晶体管的第二极与所述驱动晶体管的栅极连接；The pixel driving circuit according to claim 6, wherein the data writing unit comprises: a data writing transistor, a gate of the data writing transistor is connected to the scanning line, a first electrode of the data writing transistor is connected to the grayscale data line, and a second electrode of the data writing transistor is connected to the gate of the driving transistor; 其中，所述扫描线用于提供所述扫描信号，所述灰阶数据线用于提供 所述灰阶数据信号。The scanning line is used to provide the scanning signal, and the grayscale data line is used to provide The grayscale data signal. 根据权利要求6所述的像素驱动电路，其中，所述发光控制单元包括：发光控制晶体管，所述发光控制晶体管的栅极与用于提供所述发光控制信号的发光控制线连接，所述发光控制晶体管的第一极与所述第二电压端连接，所述发光控制晶体管的第二极与所述驱动晶体管的第一极连接。The pixel driving circuit according to claim 6, wherein the light emitting control unit comprises: a light emitting control transistor, a gate of the light emitting control transistor is connected to a light emitting control line for providing the light emitting control signal, a first electrode of the light emitting control transistor is connected to the second voltage terminal, and a second electrode of the light emitting control transistor is connected to the first electrode of the driving transistor. 根据权利要求6所述的像素驱动电路，其中，所述放电单元包括：放电晶体管，所述放电晶体管的栅极与放电控制线连接，所述放电晶体管的第一极与所述驱动晶体管的第二极连接，所述放电晶体管的第二极与所述第一电压端连接；所述放电控制线用于提供所述放电控制信号。The pixel driving circuit according to claim 6, wherein the discharge unit comprises: a discharge transistor, a gate of the discharge transistor is connected to a discharge control line, a first electrode of the discharge transistor is connected to a second electrode of the driving transistor, and a second electrode of the discharge transistor is connected to the first voltage terminal; and the discharge control line is used to provide the discharge control signal. 根据权利要求6所述的像素驱动电路，其中，所述第一存储单元包括：第二电容，所述第二电容的两端分别连接所述驱动晶体管的栅极和第一极。The pixel driving circuit according to claim 6, wherein the first storage unit comprises: a second capacitor, and two ends of the second capacitor are respectively connected to the gate and the first electrode of the driving transistor. 根据权利要求6所述的像素驱动电路，其中，所述第二存储单元包括：第三电容，所述第三电容的两端分别连接所述驱动晶体管的第一极与所述第二电源端。The pixel driving circuit according to claim 6, wherein the second storage unit comprises: a third capacitor, and two ends of the third capacitor are respectively connected to the first electrode of the driving transistor and the second power supply end. 根据权利要求11所述的像素驱动电路，其中，所述电压控制子电路包括：第二控制晶体管和第一电容，所述第一电容的两端分别连接第一电压端和所述第二控制晶体管的第二极；The pixel driving circuit according to claim 11, wherein the voltage control subcircuit comprises: a second control transistor and a first capacitor, wherein two ends of the first capacitor are respectively connected to a first voltage terminal and a second electrode of the second control transistor; 所述第一存储单元包括：第二电容，所述第二电容的两端分别连接所述驱动晶体管的栅极和第一极；The first storage unit comprises: a second capacitor, two ends of the second capacitor are respectively connected to the gate and the first electrode of the driving transistor; 其中，所述第一电容的容值小于所述第二电容的容值，且小于所述第 三电容的容值。The capacitance of the first capacitor is smaller than the capacitance of the second capacitor, and smaller than the capacitance of the first The capacitance of three capacitors. 根据权利要求12所述的像素驱动电路，其中，所述第二电容与所述第三电容的容值相等。The pixel driving circuit according to claim 12, wherein the capacitance of the second capacitor is equal to that of the third capacitor. 一种如权利要求1至13中任一项所述的像素驱动电路的驱动方法，包括：A driving method for a pixel driving circuit according to any one of claims 1 to 13, comprising: 电流控制子电路的驱动晶体管根据其栅极与第一极之间的电压，向发光器件提供驱动电流；The driving transistor of the current control subcircuit provides a driving current to the light emitting device according to the voltage between the gate and the first electrode; 电压控制子电路响应于时间调制信号，将时间数据信号提供给时间控制子电路；The voltage control subcircuit provides the time data signal to the time control subcircuit in response to the time modulation signal; 时间控制子电路根据调制电压信号与参考信号之间的电压差，以及所述时间数据信号与所述参考信号之间的电压差，控制所述驱动晶体管的栅极电压，以控制所述发光器件的发光时间。The time control subcircuit controls the gate voltage of the driving transistor according to the voltage difference between the modulation voltage signal and the reference signal, and the voltage difference between the time data signal and the reference signal, so as to control the light emitting time of the light emitting device. 一种显示基板，包括多个像素区，其中，所述像素区中设置有：发光器件以及与所述发光器件电连接的像素驱动电路，所述像素驱动电路为权利要求1至13中任一项所述的像素驱动电路。A display substrate comprises a plurality of pixel areas, wherein the pixel areas are provided with: a light emitting device and a pixel driving circuit electrically connected to the light emitting device, and the pixel driving circuit is the pixel driving circuit according to any one of claims 1 to 13. 一种显示装置，其中，包括权利要求15所述的显示基板。 A display device, comprising the display substrate according to claim 15.
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