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WO2023167810A1 - Couches contenant du silicium présentant une teneur réduite en hydrogène et leurs procédés de fabrication - Google Patents

Couches contenant du silicium présentant une teneur réduite en hydrogène et leurs procédés de fabrication Download PDF

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Publication number
WO2023167810A1
WO2023167810A1 PCT/US2023/013865 US2023013865W WO2023167810A1 WO 2023167810 A1 WO2023167810 A1 WO 2023167810A1 US 2023013865 W US2023013865 W US 2023013865W WO 2023167810 A1 WO2023167810 A1 WO 2023167810A1
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WO
WIPO (PCT)
Prior art keywords
silicon
layer
less
containing layer
deposition
Prior art date
Application number
PCT/US2023/013865
Other languages
English (en)
Inventor
Cheng-Hang Hsu
Sophia S. CHANG
Lai ZHAO
Hsiao-Ling Yang
Original Assignee
Applied Materials, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Applied Materials, Inc. filed Critical Applied Materials, Inc.
Priority to KR1020247033178A priority Critical patent/KR20240160176A/ko
Priority to CN202380037143.7A priority patent/CN119234291A/zh
Publication of WO2023167810A1 publication Critical patent/WO2023167810A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/32055—Deposition of semiconductive layers, e.g. poly - or amorphous silicon layers
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02—Pretreatment of the material to be coated
    • C23C16/0272—Deposition of sub-layers, e.g. to promote the adhesion of the main coating
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/24—Deposition of silicon only
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/4401—Means for minimising impurities, e.g. dust, moisture or residual gas, in the reaction chamber
    • C23C16/4405—Cleaning of reactor or parts inside the reactor by using reactive gases
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C23C16/505—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges
    • C23C16/509—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges using internal electrodes
    • C23C16/5096—Flat-bed apparatus
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/56—After-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02422—Non-crystalline insulating materials, e.g. glass, polymers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/0245—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02488—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02513—Microstructure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02592—Microstructure amorphous
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD

Definitions

  • the deposition gases include a silicon- containing gas and a hydrogen gas.
  • a deposition plasma is generated from the deposition gases in the substrate processing region.
  • the methods further include depositing a silicon-containing layer on a substrate form the deposition plasma, where the silicon-containing layer is characterized by a hydrogen content of less than or about 6 at.% hydrogen.
  • the methods also include forming an
  • Embodiments of the present technology still further include silicon-containing structures.
  • the structures include a substrate and a silicon-containing layer positioned on the substrate, where
  • the present technology uses faster deposition rates and higher hydrogen gas to silicon-containing gas flow rate ratios to form an as-deposited silicon- containing layer with a lower hydrogen content.
  • the faster deposition rates permit the formation of the silicon-containing layers in shorter deposition times.
  • the substrate processing chambers 108a-f may include one or more system components for depositing, treating, annealing, curing and/or etching barrier layer materials on the substrate.
  • two pairs of the processing chambers e.g., 108c-d and 108e-f, may be used to deposit and treat barrier layer materials on the substrate, and the third pair of processing
  • the edge to center spacing may be controlled so that the film property distribution uniformity may be 15 controlled between the edge and center of the substrate.
  • a concave curved edge of the gas distribution plate 115 may be used so the center portion of the edge of the gas distribution plate 115 is spaced farther from the upper surface 118 of the substrate 102 than the corners of the gas distribution plate 115.
  • a convex curved edge of the gas distribution plate 115 may be used so that the corners of the gas distribution plate 115 are 20 spaced farther than the edges of the gas distribution plate 115 from the upper surface 118 of the substrate 102.
  • Method 200 may also include forming an amorphous silicon layer on the silicon- containing layer at operation 220.
  • the amorphous silicon layer may function as a cap on the previously formed silicon-containing layer to reduce or prevent the absorption of
  • the dehydrogenation operation may include quenching the deposition
  • the silicon-containing layer 304 may be characterized as including greater than or about 20 vo.% microcrystalline silicon.
  • the amorphous silicon layer may be characterized as having less than or about 5 vol.% microcrystalline silicon.
  • the silicon layers 304 and 306 may be characterized as having less than or about 6 at.% hydrogen, less than or about 5.5 at.% hydrogen, less than or about 5 at.% hydrogen, or less.

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Materials Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Mechanical Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Photovoltaic Devices (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

L'invention décrit des procédés donnés à titre d'exemple permettant de fabriquer une couche contenant du silicium présentant une faible teneur en hydrogène. Les procédés consistent à faire circuler des gaz de dépôt dans une région de traitement de substrat d'une chambre de traitement, les gaz de dépôt comprenant un gaz contenant du silicium ainsi que de l'hydrogène gazeux. Un plasma de dépôt est généré à partir des gaz de dépôt dans la région de traitement de substrat. Les procédés consistent en outre à déposer une couche contenant du silicium sur un substrat à partir du plasma de dépôt, la couche contenant du silicium étant caractérisée par une teneur en hydrogène inférieure ou égale à environ 6 % molaire d'hydrogène. Les procédés consistent également à former une couche de silicium amorphe sur la couche contenant du silicium, la couche de silicium amorphe comprenant moins de, ou environ, 1 % en poids de silicium microcristallin.
PCT/US2023/013865 2022-03-04 2023-02-24 Couches contenant du silicium présentant une teneur réduite en hydrogène et leurs procédés de fabrication WO2023167810A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR1020247033178A KR20240160176A (ko) 2022-03-04 2023-02-24 수소 함량이 감소된 규소 함유 층들 및 이들을 제조하는 프로세스들
CN202380037143.7A CN119234291A (zh) 2022-03-04 2023-02-24 氢含量减少的含硅层及其制造处理

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US202263316479P 2022-03-04 2022-03-04
US63/316,479 2022-03-04

Publications (1)

Publication Number Publication Date
WO2023167810A1 true WO2023167810A1 (fr) 2023-09-07

Family

ID=87884188

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2023/013865 WO2023167810A1 (fr) 2022-03-04 2023-02-24 Couches contenant du silicium présentant une teneur réduite en hydrogène et leurs procédés de fabrication

Country Status (4)

Country Link
KR (1) KR20240160176A (fr)
CN (1) CN119234291A (fr)
TW (1) TWI856541B (fr)
WO (1) WO2023167810A1 (fr)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120003787A1 (en) * 2010-07-02 2012-01-05 Semiconductor Energy Laboratory Co., Ltd. Manufacturing Method of Semiconductor Film, Manufacturing Method of Semiconductor Device, and Manufacturing Method of Photoelectric Conversion Device
US20120193632A1 (en) * 2011-01-28 2012-08-02 Semiconductor Energy Laboratory Co., Ltd. Silicon structure and manufacturing methods thereof and of capacitor including silicon structure
US20160268319A1 (en) * 2014-06-30 2016-09-15 Boe Technology Group Co., Ltd. Low temperature polycrystalline silicon tft array substrate and method of producing the same, display apparatus
US20190096673A1 (en) * 2017-09-25 2019-03-28 Samsung Electronics Co., Ltd. Apparatus for forming a layer on a substrate and method of forming an amorphous silicon layer on a substrate using the same
US20220020583A1 (en) * 2020-07-19 2022-01-20 Applied Materials, Inc. Hydrogen management in plasma deposited films

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7594587B2 (ja) * 2019-11-01 2024-12-04 アプライド マテリアルズ インコーポレイテッド 表面を包む材料層

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120003787A1 (en) * 2010-07-02 2012-01-05 Semiconductor Energy Laboratory Co., Ltd. Manufacturing Method of Semiconductor Film, Manufacturing Method of Semiconductor Device, and Manufacturing Method of Photoelectric Conversion Device
US20120193632A1 (en) * 2011-01-28 2012-08-02 Semiconductor Energy Laboratory Co., Ltd. Silicon structure and manufacturing methods thereof and of capacitor including silicon structure
US20160268319A1 (en) * 2014-06-30 2016-09-15 Boe Technology Group Co., Ltd. Low temperature polycrystalline silicon tft array substrate and method of producing the same, display apparatus
US20190096673A1 (en) * 2017-09-25 2019-03-28 Samsung Electronics Co., Ltd. Apparatus for forming a layer on a substrate and method of forming an amorphous silicon layer on a substrate using the same
US20220020583A1 (en) * 2020-07-19 2022-01-20 Applied Materials, Inc. Hydrogen management in plasma deposited films

Also Published As

Publication number Publication date
CN119234291A (zh) 2024-12-31
TW202400831A (zh) 2024-01-01
KR20240160176A (ko) 2024-11-08
TWI856541B (zh) 2024-09-21

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