WO2022116067A1

WO2022116067A1 - Data processing method and data processing apparatus for flash memory

Info

Publication number: WO2022116067A1
Application number: PCT/CN2020/133497
Authority: WO
Inventors: 丁强; 姚琮; 冯刚; 尹飞飞; 马崇良
Original assignee: 华为技术有限公司
Priority date: 2020-12-03
Filing date: 2020-12-03
Publication date: 2022-06-09
Also published as: CN116547652A

Abstract

Proposed are a data updating method and data processing apparatus for a flash memory. In a page of the flash memory, in addition to an initial data region for storing initial data, the page is also divided into a remapped data region for storing updated data and an address remapping region for storing a mapping relationship between a storage address of the updated data and an original address. Moreover, when data in the original address in the initial data region is updated, the updated data is stored in the remapped data region, and the mapping relationship between the original address and the address where the updated data is stored is recorded. By using the method, it is not necessary to erase data of an entire page every time the data is updated and reprogram all the data comprising the updated data, so that the data updating efficiency of the flash memory may be increased, and the aging speed of the flash memory may be reduced so as to improve the service life of the flash memory.

Description

Data processing method and data processing device of flash memory

technical field

The present application relates to the field of storage, and, more particularly, to a data processing method and data processing apparatus of flash memory.

Background technique

Flash is a type of memory chip, and data stored in flash can be modified or updated through specific programs. Flash can be used to store a bootloader, operating system or program code, or used directly as a hard disk.

In the existing flash data update method, when updating the data stored in the page, even if the page only needs to update 1 bit of data, it is necessary to first read the data of the entire page and cache it in the memory, and then erase it. The entire page; after erasing is completed, write the data stored in the memory into the page again, and at the same time write the updated data in the address as the latest value; after writing, read the data of the entire page, and follow the memory Compare the data stored in it to determine whether the written data is correct.

With the wide application of flash, there are more and more large-capacity flashes, and the capacity of a page in the design of large-capacity flash is also relatively large. According to the existing page update process, every time the data in some addresses in the page needs to be updated , it is necessary to complete a complete page update, which not only takes a long time, affecting the update efficiency, but also causes unnecessary erasure of other addresses and accelerates the aging of the flash.

SUMMARY OF THE INVENTION

The present application provides a new data processing method and data processing device for flash, which can improve the efficiency of data update, thereby improving the service interaction performance of flash; and can also delay the aging speed of flash and improve the service life of flash.

In a first aspect, the present application provides a data processing method for flash memory. The pages in the flash memory are divided into multiple storage areas, and the multiple storage areas include an initial data area, a remapping data area, and an address remapping area. The method includes: receiving a data update request message, the data update request message being used to request to update data in a specified address of a specified page in the flash memory to specified data, where the specified address is a specified address in the initial data area. address; write the specified data into the currently available address in the remapping data area; write the address remapping from the address mapping relationship between the specified address and the currently available address in the remapping data area area.

The flash memory in this method, in addition to the initial data area for storing the initial data, also divides the remapping data area for storing the updated data and the address remapping area for storing the mapping relationship between the storage address of the updated data and the original address. and, when updating the data in the original address in the initial data area, the method stores the updated data in the remapped data area, and records the mapping relationship between the original address and the address where the updated data is stored. Therefore, when using this method to update the data in the flash, it is not necessary to erase the data of the entire page every time the data is updated, and reprogram all the data including the updated data, so that the data update efficiency of the flash memory can be improved, and the speed of the flash memory can be reduced. aging speed to increase the lifespan of flash memory

With reference to the first aspect, in a first possible implementation manner, the designated page further includes a marked area. Correspondingly, the method further includes: judging whether there is an available marker bit in the marker area, where the marker bit is used to indicate whether an address map is stored in the address corresponding to the marker bit in the address remapping area relationship; in the case of whether there are still available marker bits in the marker area, the currently available address in the address remapping area is determined according to the available marker bits in the marker area.

In this implementation, the flash is additionally divided into a flag area, and the flag area uses a flag bit to indicate whether the corresponding address in the addr remap area has stored the address mapping relationship. In this way, according to the flag bit in the flag area, it can be judged whether there is any storage space that can store the address mapping relationship in the addr remap area, and if there is still storage space that can store the address mapping relationship in the addr remap area, based on The position of the flag bit calculates the currently available address in the addr remap, instead of reading the contents of each address in the addr remap area one by one to determine whether the addr remap area can still store the memory space of the address mapping relationship and find the addr remap The currently available address in the addr remap area can save the time to find the currently available address in the addr remap area, thereby improving the data update efficiency of the flash.

With reference to the first possible implementation manner, in the second possible implementation manner, the method further includes: receiving a data read request message, where the data read request message is used to request to read the data in the specified page. The data in the specified address; determine whether the marked area is empty; if the marked area is not empty, the address mapping is stored in the corresponding address in the address remapping area according to the marked area The number of marker bits of the relationship determines the end storage address in the address remapping area, and the end storage address is the last address in the address remapping area that has stored the address mapping relationship; in the address remapping area Query the target address mapping relationship including the specified address in the storage space between the starting storage address and the ending storage address, and the starting storage address is the first storage address mapping relationship in the address remapping area. address; read the data in the target address in the remapped data area according to the target address mapping relationship, and the target address is the target address that is included in the target address mapping relationship and has a mapping relationship with the specified address address; if the marked area is not empty, read the data in the specified address.

With reference to the first aspect, in a third possible implementation manner, the method further includes: judging whether there is an available address in the address remapping area. Correspondingly, the writing the specified data to the currently available address in the remapping data area includes: in the case that there is still an available address in the address remapping area, writing the specified data to the Remap the currently available address in the data area.

In this implementation, the specified data is written into the remap data area, and the corresponding address mapping relationship is written into the addr remap area only when there is an available address in the addr remap area, so as to avoid data overflow, and thus can Avoid data loss.

With reference to the third possible implementation manner, in a fourth possible implementation manner, the method further includes: receiving a data read request message, where the data read request message is used to request to read the data in the specified page. The data in the specified address; query the target address mapping relationship including the specified address in the storage space between the starting storage address and the ending storage address of the address remapping area, and the starting storage address is the address of the first storage address mapping relationship in the address remapping area, and the end storage address is the last address in the address remapping area that has stored the address mapping relationship; read according to the target address mapping relationship The data in the target address in the remapping data area, where the target address is an address that is included in the target address mapping relationship and has a mapping relationship with the specified address.

In combination with the second or fourth possible implementation manner, in a fifth possible implementation manner, the query is performed in the storage space between the start storage address and the end storage address of the address remapping area. The target address mapping relationship including the specified address includes: sequentially reading the storage space corresponding to each address in the address remapping area in the order from the ending storage address to the starting storage address. address mapping relationship, and determine whether the address mapping relationship in each address is an address mapping relationship including the specified address, until the read address mapping relationship is an address mapping relationship including the specified address, and The address mapping relationship read last time is used as the target address mapping relationship.

In a second aspect, the present application provides a data processing device for flash memory, wherein a page in the flash memory is divided into multiple storage areas, and the multiple storage areas include an initial data area, a remapping data area, and an address remapping area, The apparatus may include one or more functional modules for implementing the method in the first aspect or any one of the implementation manners, and each functional module may be implemented by means of software and/or hardware.

For example, the apparatus includes a receiving module and a writing module. The receiving module is used to receive a data update request message, the data update request message is used to request to update the data in the specified address of the specified page in the flash memory to specified data, and the specified address is the address in the initial data area; write The input module is used to write the specified data into the currently available address in the remapped data area; the write module is also used to write the specified address with the address of the currently available address in the remapped data area The mapping relationship is written into the address remapping area.

In a first possible implementation manner, the designated page further includes a marked area. Correspondingly, the apparatus further includes a judgment module and a determination module. The judging module is used to judge whether there is an available marker bit in the marker area, and the marker bit is used to indicate whether an address mapping relationship is stored in the address corresponding to the marker bit in the address remapping area; The determining module is configured to determine the currently available address in the address remapping area according to the available marker bits in the marker area under the condition of whether there are available marker bits in the marker area.

In combination with the first possible implementation manner, in the second possible implementation manner, the receiving module is further configured to receive a data read request message, where the data read request message is used to request to read the specified page. data in the specified address.

Correspondingly, the apparatus further includes a judgment module, a determination module, a query module and a reading module. The judging module is used for judging whether the marked area is empty; the determining module is used for indicating the corresponding address in the address remapping area according to the marked area when the marked area is not empty The number of marked bits of the stored address mapping relationship in the , determines the end storage address in the address remapping area, and the ending storage address is the last address in the address remapping area that has stored the address mapping relationship; the The query module is configured to query the target address mapping relationship including the specified address in the storage space between the starting storage address and the ending storage address of the address remapping area, and the starting storage address is the address The address of the first storage address mapping relationship in the remapping area; the read module is used to read the data in the target address in the remapping data area according to the target address mapping relationship, and the target address is The target address mapping relationship includes an address that has a mapping relationship with the specified address; the reading module is further configured to read data in the specified address when the marked area is not empty.

In another possible implementation manner, the apparatus further includes a judgment module and a determination module, where the judgment module is used for judging whether there is an available address in the address remapping area, and the determination module is used for determining a currently available address.

Correspondingly, the writing module is specifically configured to: write the specified data to the currently available address in the remapping data region in the case that there is still an available address in the address remapping region.

In this implementation manner, optionally, the receiving module is further configured to receive a data read request message, where the data read request message is used to request to read the data in the designated address in the designated page.

Correspondingly, the apparatus further includes a query module and a reading module. The query module is configured to query the target address mapping relationship including the specified address in the storage space between the starting storage address and the ending storage address of the address remapping area, where the starting storage address is the specified address. The address of the first storage address mapping relationship in the described address remapping area, and the end storage address is the address of the last stored address mapping relationship in the address remapping area; the read module is used for according to the target The address mapping relationship reads the data in the target address in the remapped data area, where the target address is an address included in the target address mapping relationship that has a mapping relationship with the specified address.

In some possible implementations, further, the query module may be specifically configured to: sequentially read each of the address remapping areas in the sequence from the end storage address to the start storage address address mapping relationship stored in the storage space corresponding to the address, and determine whether the address mapping relationship in each address is an address mapping relationship including the specified address, until the read address mapping relationship is the specified address address mapping relationship, and use the address mapping relationship read for the first time as the target address mapping relationship.

In a third aspect, the present application provides a flash data processing apparatus, which may include a processor coupled with a memory. Wherein, the memory is used for storing program codes, and the processor is used for executing the program codes in the memory, so as to implement the method in the first aspect or any one of the implementation manners.

Optionally, the apparatus may also include the memory.

When the apparatus is an electronic device, in some implementations, the apparatus may further include a transceiver for communicating with other devices; or may further include an input/output device for interacting with a user.

When the apparatus is a chip for an electronic device, in some implementations, the apparatus may further include a communication interface for communicating with other apparatuses in the electronic apparatus, for example, for communicating with a transceiver of the electronic apparatus.

In a fourth aspect, the present application provides a computer-readable storage medium, where the computer-readable medium stores a program code for execution by a processor, the program code including a method for implementing the first aspect or any one of the possible implementation manners. method in the directive.

In a fifth aspect, the present application provides a computer program product comprising instructions, which, when the computer program product runs on a processor, causes the processor to implement the method of the first aspect or any one of the implementation manners.

In a sixth aspect, the present application provides a chip, the chip includes a logic circuit and a flash, and the logic circuit and the flash are used to implement the method in the first aspect or any of the possible implementation manners.

Description of drawings

FIG. 1 is a schematic diagram of an application scenario of the technical solution of the embodiment of the application;

2 is a schematic diagram of a data storage structure of a flash according to an embodiment of the application;

3 is a schematic flowchart of a data update method according to an embodiment of the present application;

4 is a schematic flowchart of a data reading method according to an embodiment of the present application;

5 is a schematic flowchart of a data update method according to an embodiment of the present application;

6 is a schematic flowchart of a data reading method according to another embodiment of the present application;

7 is a schematic flowchart of a data update method according to another embodiment of the present application;

8 is a schematic diagram of a data storage structure of a flash according to another embodiment of the application;

FIG. 9 is a schematic structural diagram of a data processing apparatus according to an embodiment of the present application;

FIG. 10 is a schematic structural diagram of a data processing apparatus according to another embodiment of the present application.

Detailed ways

In order to better understand the technical solutions of the embodiments of the present application, some concepts used in the embodiments of the present application are first introduced below.

The driver (device driver), the full name of "device driver", is a special program that enables the computer to communicate with the device, which can be said to be equivalent to the hardware interface.

In some application scenarios, the driver is independent of the operating system; in other scenarios, the driver is included in the operating system. But no matter what kind of scenario, the operating system can only control the work of the hardware device through this interface.

The driver program for the flash in the embodiment of the present application is a program that enables the computer to communicate with the flash, and the operating system of the computer controls the flash to work through the driver program of the flash.

For example, as shown in the figure on the left in Figure 1, the application program running on the processor of the electronic device can call the driver of the flash to write data to the flash, update the data in the flash or read the data in the flash through the operating system .

As another possible implementation, as shown in the figure on the right side of Figure 1, the application program running on the processor of the electronic device can write data to the chip, update the data in the chip or read the data in the chip through the operating system . Among them, the chip may include a communication interface, a logic circuit and a flash. After the communication interface receives a data write request, a data update request or a data read request, the logic circuit can respectively write data to the flash and update the data in the flash according to the request. data or read data in flash.

FIG. 2 is a schematic diagram of a data storage structure of a page of flash according to an embodiment of the present application. As shown in FIG. 2 , in this embodiment, a page of the flash is divided into five areas, which are: a header area, an initial data area, an address remapping (addr remap) area, and a remapping data ( remap data) area, flag (flag) area.

The head area is used to store the header information of the page, and the head information can be customized.

The initial data area can also be called the initial data space, which is used to store the code (code) and data (data) initially written to the page. The code and data are collectively called data information, abbreviated as data.

The remap data area is reserved space. When updating the data in the specified address in the initial data area, the address in the remap data area can be used to store the data expected to be updated in the specified address in the initial data area.

When updating the data in the specified address in the initial data area, each address in the addr remap area is used for the mapping relationship between the specified address in the initial data area and the new address of the updated data in the remap data area.

The flag area includes multiple flag bits, which correspond one-to-one with multiple addresses in the addr remap area. Each flag bit in the flag area is used to indicate whether the corresponding address in the addr remap area stores an address mapping relationship.

In this embodiment, when the marker bit indicates that the address mapping relationship is stored in the corresponding address in the addr remap area, it may be said that the marker bit has been set as valid, or the marker bit is valid; the marker bit represents the corresponding address in the addr remap area. When the address does not store the address mapping relationship, it can be said that the flag bit is invalid;

For example, if the value of a flag bit is "1", it indicates that the flag bit is valid, that is, the address mapping relationship is stored in the corresponding address in the addr remap area; the value of a flag bit is "0", indicating that the flag bit is invalid. , which means that the corresponding address in the addr remap area has not yet stored the address mapping relationship.

It can be understood that whether the value of each marker bit in the above-mentioned flag area and the marker bit are valid, that is, whether the corresponding relationship with the address in the addr remap area stores the address mapping relationship is only an example, and this embodiment is only an example. Not limited.

FIG. 3 is an exemplary flowchart of the data update method of the flash shown in FIG. 2 . As shown in FIG. 3 , the method may include step 301 , step 302 , step 303 , step 304 , step 305 , step 306 , step 307 and step 308 .

The method of this embodiment is executed by a data processing device of flash. As an example, the data processing apparatus is a flash driver running on the processor, or in other words, the data processing apparatus is a processor running the flash driver. As another example, the data processing device is a logic circuit on a chip including flash.

In this embodiment, the data processing device can record the address range of each area of the flash, for example, record the start address, end address of each area, and the size of each storage space in each area, or record each area. The starting address of each region, the total storage size of each region, and the size of each storage space in each region.

301. Receive a data update request message, where the data update request message is used to request to update data in a specified address of a specified page in the flash to specified data.

For example, the data processing apparatus may receive a data update request message from the operating system, or may receive a data update request message sent by the application program through the operating system. This message requests to update the data in the specified address in the specified page in the flash to the specified data.

When the data processing apparatus is a driver, as an example, the data update request message may carry the indication information of the specified page, the specified address and the specified data.

When the data processing device is a logic circuit in a chip, the message may only carry the specified data.

302. Read the information stored in the flag area of the specified page.

For example, the data processing apparatus may read all flag bits in the storage space corresponding to the address range according to the pre-recorded address range of the flag area of the specified page.

Step 303: Determine whether there are any available flag bits in the flag area, if yes, go to step 304, otherwise go to step 308.

In other words, it is judged whether there are invalid flag bits in the flag area. It can also be said that it is judged whether all the flag bits in the flag area are valid.

For example, according to the order of use of all the flag bits read in step 302, starting from the first flag bit, determine whether each flag bit is valid in turn, that is, determine whether each flag bit has indicated the specified page. The address mapping relationship is stored in the corresponding address in the addr remap area. If an invalid flag bit is found, that is, a flag bit indicating that the address mapping relationship is not stored in the corresponding address in the addr remap area is found, then it is determined that there is an available flag bit in the flag area, and the flag bit is marked as the currently available flag bit; if The last flag bit is valid, that is, the last flag bit has indicated that the address mapping relationship is stored in the corresponding address in the addr remap area, then it is determined that there is no available flag bit in the flag area.

304. Determine the currently available address in the addr remap area according to the available flag bits in the flag area.

For example, the mapping relationship between the position of the flag bit in the flag region in the flag region and the address corresponding to the flag bit in the addr remap region can be pre-recorded in the data processing device. In this way, the driver can find out the corresponding address in the addr remap area according to the position of the currently available flag bit in the flag area and the mapping relationship. For the convenience of description, this embodiment refers to this address as the currently available address in the addr remap area. .

305. Store the mapping relationship between the specified address and the currently available address in the remap data area of the specified page to the currently available address in the addr remap area.

As an example, the data processing apparatus may write or store or program data into the remap data area in the order of addresses from small to large or from large to small, and each time after writing data to the remap data area, Both record the address where the data is stored. In this case, the data processing apparatus may determine the currently available address in the remap data area based on the address.

306. Store the specified data to the currently available address in the remap data area.

As an example, after the data processing apparatus stores the specified data to the currently available address in the remap data area, the current available address is recorded, so that when the data is updated next time, the next currently available address is determined based on the currently available address .

307: Write a value representing the stored address mapping relationship of the currently available address in the addr remap area to the currently available flag bit in the flag area.

That is, programming the currently available flag bits in the flag area as valid.

308, enter the page change process.

For example, write all the content in the specified page into another page, and then erase the content in the specified page. After erasing the content in the designated page, the content in the other page and the updated data may be written into the designated page.

The above page changing process is only an example, which is not limited in this embodiment. For other implementation manners of the page changing process, reference may be made to the prior art, which will not be repeated here.

In the data update method of the present embodiment, in the flash, in addition to the initial data area of the initial storage space for storing the initial data, the remap data area for storing the updated data and the storage address for storing the updated data are also divided into the original data area and the original data area. The addr remap area of the address mapping relationship, and when updating the data in the original address in the initial data area, store the updated data in the remap data area, and record the original address and remap data after the update is stored The mapping relationship between the addresses of the data enables the data processing device to read the updated data according to the original address and the address mapping relationship.

The data update method does not need to erase the data of the entire page every time the data is updated, and reprogram all the data including the updated data, so that the data update efficiency of the flash can be improved, and the aging speed of the flash can be reduced to improve the flash performance. service life.

In addition, in this embodiment, the flag area is additionally divided, and the flag area uses a flag bit to indicate whether the corresponding address in the addr remap area has stored the address mapping relationship. This enables the data processing device to determine whether there is a storage space capable of storing address mapping relationships in the addr remap region according to the flag bits in the flag region, and whether there is a storage space capable of storing address mapping relationships in the addr remap region Next, calculate the currently available address in the addr remap based on the position of the marker bit, instead of reading the contents of each address in the addr remap area one by one to determine whether the addr remap area can still store the memory space of the address mapping relationship and Find the currently available address in the addr remap, which can save the time of finding the currently available address in the addr remap area, thereby improving the data update efficiency of the flash.

It can be understood that, the execution sequence of steps 305 to 307 in this embodiment is only an example, and this embodiment does not limit the execution sequence of the three steps.

For reading the data updated by the above data updating method, the present application further proposes a new data reading method. FIG. 4 is a schematic flowchart of a data reading method according to an embodiment of the present application.

As shown in FIG. 4 , the data reading method of this embodiment may include step 401 , step 402 , step 403 , step 404 , step 405 , step 406 and step 407 .

The method shown in FIG. 4 is performed by a data processing apparatus. As an example, the data processing apparatus is a flash driver running on the processor, or in other words, the data processing apparatus is a processor running the flash driver. As another example, the data processing device is a logic circuit on a chip including flash.

401. Receive a data read request message, where the data read request message is used to request to read data in a specified address in a specified page of the flash.

For example, the data read request message may include page indication information in the flash to indicate the page to which the read data belongs; the data read request message may also include address information in the specified page to indicate that the data should be read The address space for fetching data.

402. Read the information stored in the flag area of the specified page. For this step, reference may be made to step 302, which will not be repeated here.

Step 403 , determine whether the flag area is empty, if so, go to step 407 , otherwise go to step 404 .

As an example, read the content of all flag bits in the flag area, if any flag bit indicates that the address mapping relationship has not been stored in the address corresponding to the addr remap area of the specified page, it can be determined that the flag area is Empty, otherwise it can be determined that the flag area is not empty.

404, according to the number of marked bits of the stored address mapping relationship in the address corresponding to the address in the addr remap area representing the specified page in the flag area, determine the end storage address in the addr remap area, the end storage address is the last address in the addr remap area where the address mapping relationship has been stored.

For example, the data processing device can calculate the last address in the addr remap area that has stored the address mapping relationship according to the above-mentioned number, the starting address of the addr remap area, and the unit address size in the addr remap area, and use this address as the end storage address.

It can be understood that the starting storage address of the addr remap area refers to the address in which the first address mapping relationship is stored in the addr remap area, and generally speaking, the data processing device is based on the address from large to small or from small to large. The address mapping relationship is sequentially stored in the addr remap area.

405, query the target address mapping relationship including the specified address in the storage space between the starting storage address of the addr remap area to the ending storage address, and the starting storage address is in the addr remap area. The address of the first storage address mapping relationship.

As an example, the data processing apparatus may sequentially read the address mapping relationship stored in the storage space corresponding to each address in the addr remap area in the order from the starting storage address to the ending storage address, and determine the address mapping relationship is the address mapping relationship including the specified address. If the address mapping relationship is an address mapping relationship including the specified address, the address mapping relationship is determined as a target address mapping relationship.

As another example, the data processing apparatus may sequentially read the address mapping relationship stored in the storage space corresponding to each address in the addr remap area in the order from the ending storage address to the starting storage address, and determine the address mapping Whether the relationship is an address mapping relationship including the specified address. If the address mapping relationship is an address mapping relationship including the specified address, the address mapping relationship is determined as a target address mapping relationship.

If the data in the specified address is updated twice or more times before the data in the specified address is read, the latter example, compared with the former example, can query to obtain the latest target of the specified address The address mapping relationship, so that the storage address of the latest data can be queried, and the latest data can be read.

406, read the data in the target address in the remap data area of the specified page according to the target address mapping relationship, and the target address is the target address that is included in the target address mapping relationship and has a mapping relationship with the specified address. address.

407: Read the data in the specified address in the initial data area.

In this embodiment, in step 405, if no address mapping relationship including the specified address is found until the storage space between the start storage address and the end storage address is queried, step 407 may be executed.

In another embodiment of the present application, the flag area may not be divided in the flash. As shown in FIG. 8 , the flash in this embodiment can be divided into a head area, an addr remap area, a remap data area, and an initial data area.

Correspondingly, step 302 , step 303 , step 304 and step 307 may not be included in the flash data update method of this embodiment. In this embodiment, after step 301 and before step 305, the following steps may be included: judging whether there is an available address in the addr remap area, if so, execute step 305, otherwise execute 308.

The following describes the implementation of judging whether there are any available addresses in the addr remap area through several examples. It can be understood that the embodiments of the present application do not limit the implementation of judging whether there is any available address in the addr remap area.

As an example, the data processing apparatus writes the address mapping relational expression into the addr remap area, and writes the addresses in ascending order. In this example, when the data processing device determines whether there are any available addresses in the addr remap area, it can read the contents in the storage space corresponding to each address in the addr remap area in order of the addresses from small to large, and according to the storage space Whether the address mapping relationship has been stored in the storage space is used to determine whether the storage space is available. If an address mapping relationship has been stored in the storage space, determine that the address corresponding to the storage space is an unavailable address, continue to read the content in the storage space corresponding to the next address, and repeat the foregoing operations; otherwise, the storage space can be determined The corresponding address is an available address, that is, it is determined that there is an available address in the addr remap area, and the available address is determined as the currently available address in the addr remap area.

If the address mapping relationship is stored in all storage spaces in the addr remap area, it can be determined that there are no available addresses in the addr remap area.

As another example, when the data processing device writes the address mapping relationship into the addr remap area, the addresses are written in ascending order, and after each time the data processing device writes the address mapping relationship into the addr remap area, it can Record the address of the current write address mapping relationship. In this way, when the data processing device needs to determine that there is an available address in the addr remap area, it can determine whether the recorded address is the largest address in the addr remap area, and if so, it can be determined that there is no available address in the addr remap area, otherwise it can be determined There are also available addresses in the addr remap area, and the current available address in the addr remap area can be obtained by adding the recorded address to the unit storage space size.

As can be seen from the above-mentioned embodiments, in the technical scheme of the present application, when the data processing device receives a message requesting to update the data in the specified address of the specified page in the flash to the specified data, it only needs to store the specified data in the remap data area. In the storage space of the storage space, and record the mapping relationship between the new address corresponding to the storage space and the specified address in the addr remap area.

That is to say, in the data update method proposed in the present application, as shown in FIG. 5 , as long as at least steps 501 , 502 , 503 , 504 and 505 are included, the specified page can be updated without erasing the content of the entire page. The purpose of the data in the address is to save the data update time and improve the service life of the flash.

501. Receive a data update request message, where the data update request message is used to request to update data in a specified address of a specified page in the flash to specified data.

For this step, reference may be made to step 301, which will not be repeated here.

502, judging whether there is an available address in the addr remap area of the specified page, if so, go to step 503, otherwise go to step 505.

For the method of judging whether there is still an available address in the addr remap area of the specified page, please refer to the aforementioned related content, which will not be repeated here.

In the case of whether there is any available address in the addr remap area, the specified data is written into the remap data area, and the corresponding address mapping relationship is written into the addr remap area, which can avoid data overflow and thus avoid data loss.

503, write the address mapping relationship between the specified address and the currently available address in the remap data area of the specified page into the currently available address in the addr remap area of the specified page.

As an example, after the address mapping relationship is written into the currently available address in the addr remap area, the currently available address may be recorded as the end storage address.

504. Write the specified data to the currently available address in the remap data area of the specified page.

505, enter the page change process. For this step, reference may be made to step 308, which will not be repeated here.

A schematic flowchart of a data reading method corresponding to the data updating method shown in FIG. 5 is shown in FIG. 6 . The method may include step 601 , step 602 and step 603 .

601. Receive a data read request message, where the data read request message is used to request to read data in a specified address in a specified page of the flash.

602, query the target address mapping relationship containing the specified address in the storage space between the starting storage address of the addr remap area of the specified page to the ending storage address, and the starting storage address is the addr remap area In the address of the first storage address mapping relationship, the end storage address is the address of the last stored address mapping relationship in the addr remap area.

603, read the data in the target address in the remap data area of the specified page according to the target address mapping relationship, and the target address is the target address that is included in the target address mapping relationship and has a mapping relationship with the specified address. address.

In this embodiment, step 601, step 602, and step 603 may refer to step 401, step 405, and step 406, respectively, and details are not repeated here.

In still other embodiments of the present application, optionally, the storage space of each page in the flash may be designed to be larger, and further the addr remap area and the remap data area may be designed to be larger, for example, so large that In the life cycle of the page, the storage space of all data to be updated will not exceed the storage space of the remap data area. Accordingly, the storage space required for the address mapping relationship generated by the update will not exceed the storage space of the addr remap area. .

A schematic flowchart of the data updating method in this embodiment is shown in FIG. 7 . The method may include step 701 , step 702 and step 703 .

701. Receive a data update request message, where the data update request message is used to request to update data in a specified address of a specified page in the flash to specified data.

702, write the address mapping relationship between the specified address and the currently available address in the remap data area of the specified page into the currently available address in the addr remap area of the specified page.

703. Write the specified data to the currently available address in the remap data area of the specified page.

Step 701, step 702, and step 703 in this embodiment may refer to step 501, step 503, and step 504, respectively, and details are not repeated here.

For the data reading method corresponding to the data updating method in this embodiment, reference may be made to the method shown in FIG. 6 , which will not be repeated here.

It can be understood that, the data updating method and the data reading method in this application may be collectively referred to as a data processing method of flash. In addition, the flash in each embodiment of the present application may not include a header area. In addition, the names of the header area, the addr remap area, the flag area, the remap data area, and the initial area in the various embodiments of this application are only examples, and the application does not limit the names of these areas, as long as the functions are the same as those in the foregoing embodiments. The functions of the respective regions are consistent with each other, that is, they belong to the protection scope of the present application.

FIG. 9 is a schematic structural diagram of a data processing apparatus provided by an embodiment of the present application. The apparatus shown in FIG. 9 can be used to execute the method described in any one of the foregoing embodiments. As shown in FIG. 9 , the apparatus 900 in this embodiment may include: a receiving module 901 and a writing module 902 . Optionally, the apparatus 900 may further include a query module 903 and a reading module 904 . Further, the apparatus 900 may further include a judgment module 905 and a determination module 906 .

In one example, the apparatus 900 may be used to perform the method described in FIG. 3 . For example, the receiving module 901 can be used to perform step 301, the reading module 906 can be used to perform step 302, the judging module 905 can be used to perform step 303, the determining module 906 can be used to perform step 304, and the writing module 902 can be used to perform step 304. Steps 305 to 308 are performed.

In one example, the apparatus 900 may be used to perform the method described in FIG. 4 . For example, the receiving module 901 can be used to execute step 401, the reading module 906 can be used to execute step 402, the judgment module 905 can be used to execute step 403, the determination module 906 can be used to execute step 404, and the query module 903 can be used to execute step 404. In step 405 , the reading module 906 can also be used to perform steps 406 and 407 .

In one example, the apparatus 900 may be used to perform the method described in FIG. 5 . For example, the receiving module 901 may be used to perform step 501 , the judging module 905 may be used to perform step 502 , and the writing module 902 may be used to perform steps 503 to 505 .

In one example, the apparatus 900 may be used to perform the method described in FIG. 6 . For example, the receiving module 901 can be used to perform step 601 , the query module 903 can be used to perform step 602 , and the reading module 906 can also be used to perform step 603 .

In one example, the apparatus 900 may be used to perform the method described in FIG. 7 . For example, the receiving module 901 can be used to perform step 701 , and the writing module 902 can be used to perform steps 702 and 703 .

FIG. 10 is a schematic structural diagram of a data processing apparatus provided by another embodiment of the present application. The apparatus shown in FIG. 10 can be used to perform the method described in any one of the foregoing embodiments.

As shown in FIG. 10 , the apparatus 1000 in this embodiment includes: a memory 1001 , a processor 1002 , a communication interface 1003 , and a bus 1004 . The memory 1001 , the processor 1002 , and the communication interface 1003 are connected to each other through the bus 1004 for communication.

The memory 1001 may be a read only memory (ROM), a static storage device, a dynamic storage device, or a random access memory (RAM). The memory 1001 may store a program, and when the program stored in the memory 1001 is executed by the processor 602, the processor 602 is configured to execute each step of the method shown in any of FIG. 3 to FIG. 7 .

The processor 1002 can use a general-purpose central processing unit (CPU), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits for executing related programs to The methods in the various embodiments of the present application are implemented.

The processor 1002 may also be an integrated circuit chip with signal processing capability. In the implementation process, each step of the method in the various embodiments of the present application may be completed by an integrated logic circuit of hardware in the processor 1002 or an instruction in the form of software.

The above-mentioned processor 1002 can also be a general-purpose processor, a digital signal processor (digital signal processing, DSP), an application-specific integrated circuit (ASIC), an off-the-shelf programmable gate array (field programmable gate array, FPGA) or other programmable logic devices, Discrete gate or transistor logic devices, discrete hardware components. The methods, steps, and logic block diagrams disclosed in the embodiments of this application can be implemented or executed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.

The steps of the method disclosed in conjunction with the embodiments of the present application may be directly embodied as executed by a hardware decoding processor, or executed by a combination of hardware and software modules in the decoding processor. The software modules may be located in random access memory, flash memory, read-only memory, programmable read-only memory or electrically erasable programmable memory, registers and other storage media mature in the art. The storage medium is located in the memory 1001, and the processor 1002 reads the information in the memory 1001, and performs the functions required to be performed by the units included in the device of the present application in combination with its hardware. For example, the embodiment shown in any of FIG. 3 to FIG. 7 can be performed. the individual steps/functions.

The communication interface 1003 can use, but is not limited to, a transceiver such as a transceiver to implement communication between the device 1000 and other devices or a communication network.

The bus 1004 may include a pathway for communicating information between the various components of the apparatus 1000 (eg, the memory 1001, the processor 1002, the communication interface 1003).

It should be understood that the apparatus 1000 shown in this embodiment of the present application may be an electronic device, or may also be a chip configured in the electronic device.

It should be understood that the processor in the embodiment of the present application may be a central processing unit (central processing unit, CPU), and the processor may also be other general-purpose processors, digital signal processors (digital signal processors, DSP), application-specific integrated circuits (application specific integrated circuit, ASIC), off-the-shelf programmable gate array (field programmable gate array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.

It should also be understood that the memory in the embodiments of the present application may be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. Among them, the non-volatile memory can be read-only memory (read-only memory, ROM), programmable read-only memory (programmable ROM, PROM), erasable programmable read-only memory (erasable PROM, EPROM), electrically programmable Erase programmable read-only memory (electrically EPROM, EEPROM) or flash memory. Volatile memory may be random access memory (RAM), which acts as an external cache. By way of example and not limitation, many forms of random access memory (RAM) are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (DRAM) Access memory (synchronous DRAM, SDRAM), double data rate synchronous dynamic random access memory (double data rate SDRAM, DDR SDRAM), enhanced synchronous dynamic random access memory (enhanced SDRAM, ESDRAM), synchronous connection dynamic random access memory Fetch memory (synchlink DRAM, SLDRAM) and direct memory bus random access memory (direct rambus RAM, DR RAM).

The above embodiments may be implemented in whole or in part by software, hardware, firmware or any other combination. When implemented in software, the above-described embodiments may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer programs are loaded or executed on a computer, all or part of the processes or functions described in the embodiments of the present application are generated. The computer may be a general purpose computer, special purpose computer, computer network, or other programmable device. The computer instructions may be stored in or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be downloaded from a website site, computer, server, or data center Transmission to another website site, computer, server or data center by wire (eg, infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server, a data center, or the like that contains one or more sets of available media. The usable media may be magnetic media (eg, floppy disks, hard disks, magnetic tapes), optical media (eg, DVDs), or semiconductor media. The semiconductor medium may be a solid state drive.

It should be understood that the term "and/or" in this document is only an association relationship to describe associated objects, indicating that there can be three kinds of relationships, for example, A and/or B, which can mean that A exists alone, and A and B exist at the same time , there are three cases of B alone, where A and B can be singular or plural. In addition, the character "/" in this document generally indicates that the related objects before and after are an "or" relationship, but may also indicate an "and/or" relationship, which can be understood with reference to the context.

In this application, "at least one" means one or more, and "plurality" means two or more. "At least one item(s) below" or similar expressions thereof refer to any combination of these items, including any combination of single item(s) or plural items(s). For example, at least one item (a) of a, b, or c can represent: a, b, c, a-b, a-c, b-c, or a-b-c, where a, b, c may be single or multiple .

It should be understood that, in various embodiments of the present application, the size of the sequence numbers of the above-mentioned processes does not mean the sequence of execution, and the execution sequence of each process should be determined by its functions and internal logic, and should not be dealt with in the embodiments of the present application. implementation constitutes any limitation.

Those of ordinary skill in the art can realize that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Skilled artisans may implement the described functionality using different methods for each particular application, but such implementations should not be considered beyond the scope of this application.

Those skilled in the art can clearly understand that, for the convenience and brevity of description, for the specific working process of the above-described systems, devices and units, reference may be made to the corresponding processes in the foregoing method embodiments, and details are not repeated here.

In the several embodiments provided in this application, it should be understood that the disclosed system, apparatus and method may be implemented in other manners. For example, the apparatus embodiments described above are only illustrative. For example, the division of the units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored, or not implemented. On the other hand, the shown or discussed mutual coupling or direct coupling or communication connection may be through some interfaces, indirect coupling or communication connection of devices or units, and may be in electrical, mechanical or other forms.

The units described as separate components may or may not be physically separated, and components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution in this embodiment.

In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit.

The functions, if implemented in the form of software functional units and sold or used as independent products, may be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be embodied in the form of a software product in essence, or the part that contributes to the prior art or the part of the technical solution, and the computer software product is stored in a storage medium, including Several instructions are used to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage medium includes: a U disk, a removable hard disk, a read-only memory, a random access memory, a magnetic disk or an optical disk and other media that can store program codes.

The above are only specific embodiments of the present application, but the protection scope of the present application is not limited to this. should be covered within the scope of protection of this application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

A data processing method of flash memory, characterized in that a page in the flash memory is divided into multiple storage areas, the multiple storage areas include an initial data area, a remapping data area, and an address remapping area, the method includes :

receiving a data update request message, where the data update request message is used to request to update data in a specified address of a specified page in the flash memory to specified data, where the specified address is an address in the initial data area;

writing the specified data to a currently available address in the remapped data area;

The address mapping relationship between the specified address and the currently available address in the remapping data area is written into the address remapping area.
The method according to claim 1, wherein the designated page further comprises a marked area, and correspondingly, the method further comprises:

Judging whether there is an available marker bit in the marker area, the marker bit is used to indicate whether an address mapping relationship is stored in the address corresponding to the marker bit in the address remapping area;

In the case of whether there are any available marker bits in the marker area, the currently available address in the address remapping area is determined according to the available marker bits in the marker area.
The method according to claim 2, wherein the method further comprises:

receiving a data read request message, where the data read request message is used to request to read the data in the specified address in the specified page;

Determine whether the marked area is empty;

In the case that the marker area is not empty, the end of the address remapping area is determined according to the number of marker bits in the marker area indicating that the address mapping relationship has been stored in the address corresponding to the address remapping area. storage address, the end storage address is the address of the last stored address mapping relationship in the address remapping area;

The target address mapping relationship including the specified address is queried in the storage space between the starting storage address and the ending storage address of the address remapping area, and the starting storage address is the address remapping area in the address remapping area. The address of the first storage address mapping relationship;

Read the data in the target address in the remapped data area according to the target address mapping relationship, where the target address is an address that is included in the target address mapping relationship and has a mapping relationship with the specified address;

When the marked area is not empty, the data in the specified address is read.
The method according to claim 1, wherein the method further comprises: judging whether there is an available address in the address remapping area;

Correspondingly, the writing of the specified data to the currently available address in the remapped data area includes:

When there is still an available address in the address remapping area, the specified data is written into the currently available address in the remapping data area.
The method according to claim 4, wherein the method further comprises:

receiving a data read request message, where the data read request message is used to request to read the data in the specified address in the specified page;

The target address mapping relationship including the specified address is queried in the storage space between the starting storage address and the ending storage address of the address remapping area, and the starting storage address is the address remapping area in the address remapping area. The address of the first storage address mapping relationship, and the end storage address is the address of the last stored address mapping relationship in the address remapping area;

The data in the target address in the remapped data area is read according to the target address mapping relationship, where the target address is an address included in the target address mapping relationship that has a mapping relationship with the specified address.
The method according to claim 3 or 5, characterized in that, in the storage space between the starting storage address and the ending storage address of the address remapping area, the target address including the specified address is searched for Mapping relationships, including:

According to the sequence from the end storage address to the start storage address, sequentially read the address mapping relationship stored in the storage space corresponding to each address in the address remapping area, and determine the address mapping relationship in each address. Whether the address mapping relationship is an address mapping relationship that includes the specified address, until the address mapping relationship that is read is an address mapping relationship that includes the specified address, and the last read address mapping relationship is used as the address mapping relationship. Destination address mapping relationship.
A data processing device for flash memory, characterized in that a page in the flash memory is divided into multiple storage areas, and the multiple storage areas include an initial data area, a remapping data area, and an address remapping area, and the device includes :

a receiving module, configured to receive a data update request message, the data update request message being used to request to update the data in the specified address of the specified page in the flash memory to specified data, and the specified address is the address in the initial data area;

a writing module for writing the specified data to a currently available address in the remapped data area;

The writing module is further configured to write the address mapping relationship between the specified address and the currently available address in the remapping data region into the address remapping region.
The device according to claim 7, wherein the designated page further comprises a marked area, and correspondingly, the device further comprises a judgment module and a determination module;

The judging module is used to judge whether there is an available marker bit in the marker area, and the marker bit is used to indicate whether an address mapping relationship is stored in the address corresponding to the marker bit in the address remapping area;

The determining module is configured to determine a currently available address in the address remapping area according to the available marker bits in the marker area under the condition of whether there are available marker bits in the marker area.
The device according to claim 8, wherein the receiving module is further configured to receive a data read request message, wherein the data read request message is used to request to read the specified address in the specified page The data;

Correspondingly, the device further includes a judgment module, a determination module, a query module and a reading module;

The judging module is used to judge whether the marked area is empty;

The determining module is configured to, in the case that the marker area is not empty, determine the marker bit according to the number of marker bits in the marker area indicating that the address mapping relationship has been stored in the address corresponding to the address remapping area. The ending storage address in the address remapping area, the ending storage address is the last address in the address remapping area that has stored the address mapping relationship;

The query module is configured to query the target address mapping relationship including the specified address in the storage space between the starting storage address and the ending storage address of the address remapping area, where the starting storage address is the specified address. Describe the address of the first storage address mapping relationship in the address remapping area;

The read module is configured to read the data in the target address in the remapped data area according to the target address mapping relationship, where the target address is the same as the specified address included in the target address mapping relationship. An address with a mapping relationship;

The reading module is further configured to read the data in the specified address when the marked area is not empty.
The device according to claim 7, wherein the device further comprises a judgment module for judging whether there is an available address in the address remapping area;

Correspondingly, the writing module is specifically used for:

In the case where there are still available addresses in the address remapping area, the specified data is written to the currently available address in the remapping data area.
The device according to claim 10, wherein the receiving module is further configured to receive a data read request message, wherein the data read request message is used to request to read the specified address in the specified page The data;

Correspondingly, the device further includes a query module and a reading module;

The query module is configured to query the target address mapping relationship including the specified address in the storage space between the starting storage address and the ending storage address of the address remapping area, where the starting storage address is the specified address. Describe the address of the first storage address mapping relationship in the address remapping area, and the end storage address is the last address in the address remapping area that has stored the address mapping relationship;

The read module is configured to read the data in the target address in the remapped data area according to the target address mapping relationship, where the target address is the same as the specified address included in the target address mapping relationship. Addresses with mappings.
The device according to claim 9 or 11, wherein the query module is specifically configured to:

According to the sequence from the end storage address to the start storage address, sequentially read the address mapping relationship stored in the storage space corresponding to each address in the address remapping area, and determine the address mapping relationship in each address. Whether the address mapping relationship contains the address mapping relationship of the specified address, until the address mapping relationship read is the address mapping relationship of the specified address, and the address mapping relationship read for the first time is used as the address mapping relationship. Destination address mapping relationship.
A data processing device for flash memory, characterized in that the device comprises a processor coupled with a memory, and the processor is configured to execute program codes in the memory, so as to realize the invention as claimed in any one of claims 1 to 6 method described.
A computer-readable medium, characterized in that, a computer program or instruction is stored in the storage medium, and when the computer program or instruction is executed by a processor, the computer program or instruction according to any one of claims 1 to 6 is implemented. method.
A chip, characterized in that it includes a logic circuit and a flash memory, a page in the flash memory is divided into multiple storage areas, the multiple storage areas include an initial data area, a remapping data area and an address remapping area, the A logic circuit is used to implement the method as claimed in any one of claims 1 to 6 .
A computer program product capable of being run on a processor, characterized in that the computer program product contains instructions for implementing the method of any one of claims 1 to 6.