WO2019034379A1

WO2019034379A1 - Electrical circuit for a common-mode feedback system

Info

Publication number: WO2019034379A1
Application number: PCT/EP2018/070044
Authority: WO
Inventors: Alexander Richter
Original assignee: Robert Bosch Gmbh
Priority date: 2017-08-14
Filing date: 2018-07-24
Publication date: 2019-02-21
Also published as: DE102017214144B4; DE102017214144A1

Abstract

An electrical circuit for a common-mode feedback system for reducing the influence of common-mode interference is proposed, which circuit comprises a power driver having at least two current sources (I1, l2), two measurement resistors (R1, R2) and an error amplifier (A1) and is characterized in that the power driver furthermore comprises at least four further current sources (I3, I4, I5, I6).

Description

Description title

Electrical circuit for a common mode feedback system

The present invention relates to an electrical circuit for a common mode feedback system for reducing the influence of common-mode interference, comprising a line driver having at least two current sources, two measuring resistors and an error amplifier.

State of the art

So-called common mode feedback systems come as part of a

Data transmission by means of so-called differential signals of low voltage, also known as LVDS (Low Voltage Differential Signaling), for example in the field of automotive used. Such systems include according to the prior art, a line driver with two current sources and four transistors and are further constructed of two measuring resistors and an error amplifier.

A line driver is understood to be an amplifier which feeds signals with an amplified signal level into transmission lines. The gain of the gain enhances the signal-to-noise ratio and transmission quality on the transmission line. With line amplifiers, the losses are compensated, especially on longer transmission lines due to the increase in level and thus provided on the receiving side for a higher reception level.

The purpose of a conventional common mode feedback system is to adjust the current applied to a first current source to correspond to the current applied to a second current source, and thereby achieving a defined output of a common mode voltage corresponding to a reference voltage applied to the error amplifier.

In the normal mode of operation, to generate a logical "1" for the output of a differential LVDS, one transistor pair is switched while the other transistor pair is switched to produce a logical "0". The problem here is that the two current sources define not only the output common-mode voltage, but also a

Generate signal stream. For this reason, it is not possible to perform the output of the common-mode voltage independently of a signal swing.

In the case of a common-mode feedback system that is given out too low, in the case of a common-mode feedback system known from the prior art, the current output from a pull-up current source is increased until the

output common-mode voltage has reached the value of the reference voltage. However, such an increase in the current strength also results in a higher signal current. In the opposite case, if the common-mode voltage is too high, the common-mode feedback system known from the prior art will deliver the output from a pull-up current source

Current reduced until the output common-mode voltage has reached the value of the reference voltage. However, such a reduction in the current also results in a lower amplitude of the signal current.

Known common mode feedback systems are only robust compared to common-mode interference, which are significantly smaller than the signal current of the line driver. This is due to the fact that the receiver of information transmitted by means of LVDS must be able to clearly distinguish between a logical "1" and a logical "0" for the received information. If common-mode interferences occur whose strength comes close to the strength of the level of the signal current, the receiver is no longer able to perform such a distinction due to the resulting poor signal quality, which is recognizable, for example, in a so-called eye diagram based on a small opening of the eye. Therefore, the presence of common mode interference can significantly affect signal transmission via LVDS, and this problem is common to all common mode feedback systems where the common mode output voltage depends on the same current source that also defines the signal current. For this purpose, the Chinese patent application CN

Referenced 200510001736.

Especially in the automotive industry, every pin has to be an electrical

Circuit electromagnetic interference tests exist. One of these tests, the so-called "Direct Power Injection" (DPI) test, becomes a

Power level of at least 10 dBm evenly applied to the two differential driver output pins. Common-mode feedback systems known from the prior art are not able to compensate for the common-mode interferences that occur in the context of such electromagnetic interference tests due to the structure described at the outset.

In the publication "An Integrated LVDS Transmitters in 0.18-μm CMOS Technology With High Immunity to EMI (IEEE Transactions on Electromagnetic Compatibility)", an attempt was made to solve this problem by producing a LVDS driver that is more robust than electromagnetic interference, but which has a The drawbacks of the known architecture should, according to the publication, be provided by a plurality of additional circuits

Amplifiers and bias circuits are compensated, the

consume extra energy and chip area and are also error prone.

DISCLOSURE OF THE INVENTION According to the invention, an electrical circuit for a common mode

A feedback system for reducing the influence of common-mode interference, comprising a line driver having at least two current sources, two measuring resistors and one

Error amplifier. The electrical circuit is characterized in that the line driver further comprises at least four further current sources. As a result, it can be achieved according to the invention that an output common-mode voltage is controlled not only according to the prior art via a single current source, but four further current sources are used for this purpose, whereby all current sources are preferably operated in the class AB operating mode. This results in currents close to zero unless common mode interference occurs, thereby

Energy can be saved according to the invention.

Advantages of the invention

If an output common-mode voltage detected by the measurement resistors, for example caused by a common-mode interference, is too low with respect to a reference voltage, the current amplifier at the corresponding current sources is increased by the error amplifier provided in the inventive electrical circuit, so that the drivers do not - Inverting and inverting outputs the same amount of current is supplied to compensate for the negative common mode deviation.

However, if the detected output common mode voltage is relative to one

Reference voltage too high, the error amplifier increases the amount of current to be output from the corresponding power sources, so that an equal amount of power from the drivers of the non-inverting and the

Inverting output is dissipated to compensate in this way the positive common mode deviation.

The inventive circuit for a common mode feedback system, the common mode output can therefore be adjusted independently of the signal current, resulting in a higher robustness in existing common mode interference results

According to the invention it is provided that the at least four further

Power sources of the line driver are adjustable. As a result, it is possible to adapt the current intensities respectively to be output by the current sources adaptively to the measurement result obtained by means of the measuring resistors. In a further embodiment of the invention it is provided that the

Error amplifier is designed such that the current intensity is increased at the power sources by the error amplifier when one of the

Measuring reference voltage detected output common mode voltage is lower than a reference voltage. Thereby, an existing common-mode interference can be compensated.

In another preferred embodiment, the error amplifier is designed such that the current intensity through the error amplifier to the

Power sources is increased when one of the measuring resistors detected

Output common mode voltage is higher than a reference voltage. This allows the compensation of a common-mode interference with reverse polarity. Furthermore, it is preferably provided that the electrical circuit further comprises a class AB output stage. Such output stages offer the advantage that in the event that there is no common-mode interference, currents are almost zero and thus energy savings are possible. Preferably, the error amplifier has two in-phase outputs through which the class AB output stage can be controlled.

According to the invention, it can further be provided that the class AB final stage has a series connection of a first transistor, a Wderstandes and a second transistor. As a result, a bias voltage for the class AB output stage can be generated.

Advantageously, the class AB output stage comprises four transistors. According to a preferred embodiment, in each case two of the transistors of the class AB output stage PMOS transistors and NMOS transistors.

In a preferred variant of the electrical circuit, the transistors are provided as protective devices against electrostatic discharge ("ESD") .This ensures that no additional space for ESD protection devices is required, resulting in a small space requirement for the electrical circuit. More preferably, it is provided that the class AB output stage has a control loop which is miller-compensated by means of capacitors. This results in a good control of the output common mode voltage even under the influence of high frequency noise.

Preferably, a capacitor is also connected in parallel to each of the measuring resistors. This results in an increase of the phase edge and thus a higher stability of the control circuit of the electrical circuit.

Advantageous developments of the invention are specified in the subclaims and described in the description.

drawings

Embodiments of the invention will be explained in more detail with reference to the drawings and the description below. Show it:

FIG. 1 shows a line driver known from the prior art with a conventional common mode feedback system,

FIG. 2 shows a prior art line driver connected to a 100 ohm resistor;

FIG. 3 shows an eye diagram for a line driver transmitting at a data rate of 100 Mb / s with a conventional common mode feedback system without common-mode interference;

FIG. 4 shows an eye diagram for a line driver transmitting at a data rate of 100 Mb / s with a conventional common mode feedback system with common-mode interference.

Figure 5 shows an inventive common mode feedback system with

Line Driver, 6 shows an eye diagram for a line driver transmitting at a data rate of 100 Mb / s with a common-mode feedback system according to the invention with common-mode interference, and FIG. 7 shows a circuit of the inventive common mode feedback

Systems without line driver.

Embodiments of the invention

FIG. 1 shows a line driver known from the prior art with a conventional common-mode feedback system. The

Line driver is thereby from the two power sources, l ₂ and the

Transistors Mi to M formed. The common mode feedback system is formed by the measuring resistors Ri, R ₂ and the error amplifier Ai, which controls the current source of the line driver controlled by the voltage VDD. The purpose of the conventional common mode feedback system is to tune the current to the current delivered by the ideal current source I ₂ such that a defined output common mode voltage is obtained at the output LVDSout, which corresponds to the reference voltage Vb _g . The

Line driver is in normal operation when h = l ₂ = 3.5 mA and the output common-mode voltage is 1, 2V. Then, the signal current of 3.5 mA is switched to the differential LVDS output via the transistors M ₂ and M3 to produce a logic "1." To produce a logic "0", the current is passed through the transistors Mi and M reversed to the LVDS output.

The problem with this prior art approach is that the current sources and I ₂ define not only the output common mode voltage but also the signal current. Thus, the output common-mode voltage can not be adjusted independently of the signal swing. Assuming that the common mode voltage at

Differential _output LVDS _0U t pulled down, the common mode feedback system would increase the current until the output common-mode voltage again corresponds to Vb _g . However, the current is then significantly greater than the setpoint of 3.5 mA, resulting in a larger signal current. Assuming that the common mode voltage at the differential output LVDSout is pulled up, the common mode feedback system would reduce the current until the output common mode voltage is again Vbg. In this case, however, the current is much smaller than the nominal value of 3.5 mA, which leads to a smaller amplitude of the signal current and thus to a lower signal-to-noise ratio, ie to a poorer signal quality, and to a higher bit error rate. The conventional common mode feedback systems are only able to provide common mode interference

compensate, which are significantly smaller than the signal current l _{2 of} the

Line driver.

FIG. 2 shows how a differential line terminated with a 100 ohm resistor is connected to the differential LVDS output LVDS _0U t, for example in a target application. Data is transferred with the current being switched either non-inverted or inverted to the line connecting the 100 ohm resistor which is connected to the LVDSout outputs. At the 100 ohm termination resistor, a voltage Vout of 350 mV (corresponding to a logical "1") or of -350 mV is achieved

The 100 Ohm resistor is part of a receiver, and a so-called eye diagram can be generated from the received signal voltage V _ou t on the 100 Ohm resistor, the opening of the so-called eye being a measure of When the eye is clearly open, a receiver can easily detect the received data and decide whether a logical "1" or a logical "0" has been received. When the eye is closed, the receiver can no longer distinguish between a logical one "0" and a logical "1" differ.

FIG. 3 shows the eye diagram of a line driver transmitting at a data rate of 100 Mb / s with a conventional common mode feedback system and without any common-mode interference. The eye opening in the present case is 700 mV (2 * 350 mV), so that the detection of a logical "1" at 350 mV and a logical "0" at -350 mV is easily feasible.

FIG. 4 shows the eye diagram of a line driver transmitting at a data rate of 100 Mb / s with a conventional common mode feedback system, which, however, is subject to common mode interference 110 MHz and a power level of 10 dBm is disturbed. This corresponds to an interference power of 10 mW, which is therefore ten times greater than the signal power of 1 mW itself. It can be seen that the eye shown in the eye diagram of Figure 4 is closed to about 80 mV. Compared to the eye diagram without interference shown in FIG. 3, the opening of the

Eye almost a factor of ten smaller. The signal quality is thus significantly reduced by the common mode interference. This problem is common to all common mode feedback systems where the output common mode voltage is set by the same current source (in Figure 2) which also defines the signal current.

FIG. 5 shows a common-mode feedback system according to the invention, in which the output common-mode voltage is not only controlled by the current source, but four further current sources are used until this point for this purpose. All power sources are classified in Class AB

Operating mode operated. This results in currents close to zero, if no common-mode interference occurs, whereby energy is saved according to the invention. If the output common-mode voltage detected by the resistors Ri and R2 is too low due to common-mode interference, the error amplifier A1 increases the current at the current sources and U until the common-mode voltage at the driver output LVDSout returns to the target value Vbg. the current sources I5 and \ e remain at zero due to the class AB mode of operation. In the opposite case, in which the detected by the resistance R1 and R2

Output common-mode voltage is too high, the error amplifier A1 increases the amount of current output from the current sources I5 and \ e until the common mode voltage at the driver output LVDSout again corresponds to the setpoint value V _Dg . The current sources and U remain at zero due to the class AB operating mode. By the use of the invention

Common Mode Feedback Systems, the common mode output can thus be set independently of the signal current, resulting in a higher robustness given common mode interference. FIG. 6 shows an eye diagram for a line driver transmitting at a data rate of 100 Mb / s with a common mode according to the invention Feedback system shown in which - according to Figure 4 - a

Common-mode interference is present at 1 10 MHz at a power level of 10 dBm. By means of the common mode feedback system according to the invention, an eye opening of approximately 640 mV can be achieved.

Figure 7 shows a circuit of the common mode feedback system according to the invention, in which the line driver is not shown. The resistors Ri and R2 detect the common mode output voltage of the LVDS driver. The capacitor C1, which is connected in parallel with the resistor R1, and the capacitor C2, which is connected in parallel with the resistor R2, form a zero point in the transfer function, resulting in an increase of the phase margin and thus a higher stability of the control loop. The transistors Mi, M2, M3, _M4, M5, Με, M _7, Ms, Mg, M10 and Mn form a differential error amplifier A1, which is the difference between the common mode voltage and the reference voltage Vb _g detected and amplified. The error amplifier A1 has two in-phase outputs, of which one is arranged between the transistors M5 and M10, and the other between the transistors M ₄ and Mg. The two-phase outputs a control formed by the transistors M12 to ₇ Mi class AB output stage. This class AB power amplifier feeds a current back into the output of the LVDS driver to control its output common mode voltage. The control loop is miller-compensated by the capacitors C3 to G5. The dominant pole of the control loop is therefore located at the output of the

Error amplifier. At high frequencies, the feedback capacitors C3, C ₄ and close

C5, C6 respectively short the drain and the gate of M12, M13, M15 and M16. Thus, the common mode output resistance of the power amplifier remains at high levels

Frequencies low impedance. For the common-mode output resistance at high frequencies approximate 1 / (gmi2 + gmi3 + gmi5 + gmi6), where gm represents the transconductance of the respective transistor M12, M13, M15 and M16.

This results in a good control of the output common-mode voltage LVDS ₀ ut +, LVDSout- also under the influence of high frequency noise.

The series connection of M14, R3 and Mi ₇ serves to generate the class AB bias voltage for the output stage formed by the transistors M12 (U), M13 (I3), M15 (I5) and M16 (ΙΘ). The bias voltage at the gate of the PMOS transistors M12 and M13 is applied across R, while the bias is applied to the gate of NMOS transistors M15 and M16 via R5.

In the steady state, when the difference between the output LVDS common-mode voltage and the reference voltage Vb _g is zero, the

Current of Mn equally divided between Mi and M2. As a result, the current in the transistor M corresponds to the current in the transistor Mg and the current in the transistor M5 to the current in the transistor M10. Therefore, neither current flows in nor out of the outputs of the error amplifier, resulting in a zero voltage drop across resistors R and R5. Therefore, the cross currents at the operating point flowing from M13 O3) to M15 (I5) and from M12 (U) to M16 (ΙΘ) correspond to the current flowing through the resistance R3. If the output common mode voltage is due to a

Common mode interference is higher than Vb _g , the drain currents of M and M5 are larger than drain currents of Mg and M10, of which one out of both

Outgoing current results from amplifier outputs. The additional current emanating from the transistor M flows through the resistor R5 to the transistor M17 and thereby generates a high gate-source voltage for the transistors

M15 and M16. The transistors M16 and M15 thus take a large

Common mode interference current and thus prevent drifting of the output common mode voltage in the positive direction. The additional current emanating from transistor M5 flows through resistor R to transistor M17, thereby reducing the gate-to-source voltage for transistors M12 and M13 to zero, thus providing the class AB operating point current which is provided by M12 and M13 to the common mode output will be completely shut off. As a result, cross currents are avoided. If the output common mode voltage is due to a common mode

Interference is lower than Vb _g , then the drain currents of M and M5 are smaller than the drain currents of Mg and M10, resulting in a current flow in both

Amplifier outputs into it results. The additional current received by the transistor M10 flows through the resistor R and the transistor Mi and generates a high gate-to-source voltage across the transistors M12 and M13.

Transistors M12 and M13 thus provide a large common mode Interference and thus prevent drifting of the output common mode voltage in the negative direction. The additional of Mg

absorbed current flows through the resistor R5 and thereby reduces the gate-source voltage from the transistors M15 and M16 to zero, so that the class AB operating point current, which is supplied through the transistors M15 and M16 to the common mode output, is completely turned off.

In addition to the possibility of compensating for large common-mode interferences with the circuit according to the invention, the proposed solution offers further advantages. Thus, the inventive common mode feedback system consumes only a small power due to the presented class AB bias scheme. With correct circuit design, the cross currents at the operating point in the final stage are at most about 100 μA. In comparison, the typical power consumption of a LVDS line driver is 5 mA. The AB output stage provides a large compensation current only when there is common mode interference. In addition, in the invention

proposed approach consumes only a small chip area. The

Transistors M12, M13, M15 and M16 of the power amplifier can also be used as

Electrostatic discharge protection devices, also known as electrostatic discharge (ESD) devices, are used because they are connected directly to the pads, so they must be designed to ESD specifications anyway, so there are no additional space-consuming ESD protection devices Furthermore, the circuit according to the invention is simply designed and consists of only a few components in comparison to those known from the prior art

Proposals. For this reason, the circuit has a higher robustness.

Claims

claims

Electrical circuit for a common mode feedback system for

Reducing the influence of common-mode interference, comprising a line driver having at least two current sources (12, 14), two measuring resistors (R1, R2) and an error amplifier (Ai), characterized in that the line driver further comprises at least four further current sources (11, 15, 15). \ e).

Electrical circuit according to claim 1, wherein the at least four further current sources (, U, I5, \ e) of the line driver are controllable.

An electrical circuit according to claim 1 or claim 2, wherein the

Error amplifier (Ai) is designed such that by the error amplifier (Ai), the current at the current sources (, U) is increased when an output common mode voltage detected by the resistors R1 and R2 is lower than a reference voltage (Vb _g ).

Electrical circuit according to one of claims 1 to 3, wherein the

Error amplifier (Ai) is designed such that by the error amplifier (Ai), the current at the current sources (I5, ΙΘ) is increased when a detected by the resistors R1 and R2 output common mode voltage is higher than a reference voltage (Vb _g ).

The electrical circuit of any one of claims 1 to 4, wherein the electrical circuit further comprises a class AB power amplifier.

6. An electrical circuit according to claim 5, wherein the error amplifier (Ai) has two in-phase outputs, through which the class AB output stage is controllable.

7. An electrical circuit according to claim 5 or claim 6, wherein the class AB output stage comprises a series circuit of a first transistor (Mi), a resistor (R3) and a second transistor (M17).

8. Electrical circuit according to one of claims 5 to 7, wherein the class AB output stage comprises four transistors (M12, M13, M15, Μιε).

9. An electrical circuit according to claim 8, wherein each two of the transistors (M12, M13, M15, Mi ₆ ) of the class AB output stage PMOS transistors (M12, M13) and NMOS transistors (M15, Mi ₆ ) are.

10. An electrical circuit according to claim 8 or claim 9, wherein the

Transistors (M12, M13, M15, Μιε) as protective devices before

Electrostatic discharge are provided.

1 1. An electrical circuit according to any one of claims claim 5 to 9, wherein the class AB output stage comprises a control loop, which by means of

Capacitors (C3, C, C5, Ce) is miller-compensated.

12. Electrical circuit according to one of claims 1 to 10, wherein a capacitor (C1, C2) is connected in parallel to each of the measuring resistors (R1, R2).