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WO2019099997A1 - Croissance auto-limitative - Google Patents

Croissance auto-limitative Download PDF

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Publication number
WO2019099997A1
WO2019099997A1 PCT/US2018/061803 US2018061803W WO2019099997A1 WO 2019099997 A1 WO2019099997 A1 WO 2019099997A1 US 2018061803 W US2018061803 W US 2018061803W WO 2019099997 A1 WO2019099997 A1 WO 2019099997A1
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WO
WIPO (PCT)
Prior art keywords
reducing agent
agent layer
substrate
tungsten
layer
Prior art date
Application number
PCT/US2018/061803
Other languages
English (en)
Inventor
Joshua Collins
Griffin KENNEDY
Hanna Bamnolker
Michal Danek
Shruti Vivek Thombare
Patrick A. Van Cleemput
Gorun Butail
Original Assignee
Lam Research Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lam Research Corporation filed Critical Lam Research Corporation
Priority to US16/764,812 priority Critical patent/US20200402846A1/en
Priority to CN201880074995.2A priority patent/CN111357083A/zh
Priority to KR1020207017697A priority patent/KR20200079339A/ko
Publication of WO2019099997A1 publication Critical patent/WO2019099997A1/fr
Priority to US18/310,523 priority patent/US20230290680A1/en

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    • H—ELECTRICITY
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
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    • C—CHEMISTRY; METALLURGY
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    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/04—Coating on selected surface areas, e.g. using masks
    • C23C16/045—Coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/06—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
    • C23C16/08—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material from metal halides
    • C23C16/14—Deposition of only one other metal element
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    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28088—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a composite, e.g. TiN
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    • H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • H01L21/28562—Selective deposition
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material

Definitions

  • conductive materials such as tungsten films
  • These materials may be used for horizontal interconnects, vias between adjacent metal layers, contacts between metal layers and devices on the silicon substrate, and high aspect ratio features.
  • deposition of thin tungsten films becomes a challenge. These challenges include fluorine migration, which can cause device failure, as well as difficulty in depositing low resistivity films having good step coverage.
  • the methods involve forming a reducing agent layer, then exposing the reducing agent layer to a metal precursor to convert the reducing agent layer to a layer of the metal.
  • the reducing agent layer is a silicon- (Si-) and boron- (B-) containing layer.
  • the methods may involve forming the reducing agent layer at a first substrate temperature, raising the substrate temperature to a second substrate temperature, and then exposing the reducing agent layer to the metal precursor at the second substrate temperature.
  • the methods may be used to form fluorine-free tungsten or molybdenum films in certain embodiments. Apparatuses to perform the methods are also provided.
  • One aspect of the disclosure may be implemented in a method including providing a substrate including a structure; exposing the substrate to a reducing agent gas at a first substrate temperature of no more than 400°C to form a conformal reducing agent layer on the structure; raising the temperature of the substrate to a second substrate temperature of at least 500°C; and at the second substrate temperature, exposing the conformal reducing agent layer to a metal precursor to convert the conformal reducing agent layer to the metal.
  • the first substrate temperature is no more than 350°C. In some embodiments, the first substrate temperature is no more than 300°C.
  • the reducing agent gas is a silicon-containing gas. In some embodiments, the reducing agent gas is a boron-containing gas. In some embodiments, the reducing agent gas is a mixture of a silicon-containing gas and a boron-containing gas. In some such embodiments, the reducing agent gas is a mixture of silane (SiH 4 ) and diborane (B 2 H 6 ). In some embodiments, exposing the conformal reducing agent layer to a metal precursor comprises exposing the conformal reducing agent layer to hydrogen (H 2 ) gas. In some embodiments, the metal precursor is provided with H 2.
  • exposing the conformal reducing agent layer to a metal precursor to convert the reducing agent layer to metal includes exposing the conformal reducing agent layer to alternating pulses of H 2 and the metal precursor.
  • the metal precursor is a tungsten chloride compound and the metal is tungsten.
  • the metal precursor is a molybdenum-containing compound and the metal is molybdenum.
  • the conformal reducing agent layer is formed directly on an oxide surface.
  • the conformal reducing agent layer is formed directly on a nitride surface.
  • the conformal reducing agent layer is between about 10 and 50 Angstroms thick.
  • the concentration of boron in the reducing agent layer decreases with increasing thickness.
  • the silicon: boron ratio in the mixture is at least 10: 1.
  • Another aspect of the disclosure may be implemented in a method including providing a substrate including a structure; exposing the substrate to a mixture of a silicon- containing gas and a boron-containing gas at a first substrate temperature of no more than 400°C to form a conformal reducing agent layer on the structure; raising the temperature of the substrate to a second substrate temperature of at least 500°C; and at the second substrate temperature, exposing the conformal reducing agent layer to a tungsten-containing or molybdenum-containing precursor to convert the reducing agent layer to tungsten or molybdenum.
  • the silicon: boron ratio in the mixture is at least 10: 1.
  • Another aspect of the disclosure may be implemented in a method including providing a substrate including a structure; exposing the substrate to a mixture of a silicon- containing gas and a boron-containing gas to form a conformal reducing agent layer on the structure; and exposing the conformal reducing agent layer to a molybdenum-containing precursor to convert the reducing agent layer to molybdenum.
  • Another aspect of the disclosure may be implemented in an apparatus including one or more chambers each configured to house a substrate; a support substrate in each of the one or more chambers; gas inlets configured to direct gas into each of the one or more chambers; a heater configured to heat the substrate support in each chamber; and a controller comprising program instructions for: heating the substrate support in one of the one more chambers to a first temperature of no more than 400°C and directing a mixture of a silicon-containing gas and a boron-containing gas into said chamber; heating the substrate support in one of the one more chambers to a first temperature of at least 500°C and, after the mixture is directed, directing a tungsten-containing or molybdenum-containing precursor into said chamber.
  • Figure 1 A shows an example metal stack that includes tungsten.
  • Figures 1B-1I are schematic examples of various structures in which tungsten or molybdenum may be deposited in accordance with disclosed embodiments.
  • Figure 1 J shows an example metal stack that includes molybdenum.
  • Figures 2A-2C provide process flow diagrams for methods performed in accordance with disclosed embodiments.
  • Figure 2A provides a process flow diagram for a method of depositing an elemental metal layer in a feature.
  • Figures 2B and 2C provide examples of the method of Figure 2A to deposit elemental tungsten and molybdenum, respectively
  • Figure 3A shows tungsten conversion for various reducing agent gas mixtures and tungsten chloride exposures at 300°C substrate temperature during conversion.
  • Figure 3B shows molybdenum growth obtained using a silicon-boron reducing agent layer on both a thermal oxide (lower line) and TiN (upper line) substrate.
  • Figure 3C shows resistivity of the films.
  • Figure 3D shows molybdenum growth for silicon-boron reducing agent layers of IqA, 2qA, 3qA, and 50A.
  • Figure 3E shows resistivity of the molybdenum layers as a function of reducing agent layer thickness.
  • Figure 4 is a diagram of a processing system suitable for conducting deposition processes in accordance with disclosed embodiments.
  • Figure 5 is a schematic illustration of a deposition chamber for conducting deposition processes in accordance with disclosed embodiments.
  • the methods involve forming a reducing agent layer, then exposing the reducing agent layer to a metal precursor to convert the reducing agent layer to a layer of the metal.
  • the reducing agent layer is a silicon- (Si-) and boron- (B-) containing layer.
  • the methods may involve forming the reducing agent layer at a first substrate temperature, raising the substrate temperature to a second substrate temperature, and then exposing the reducing agent layer to the metal precursor at the second temperature.
  • the methods may be used to form fluorine-free tungsten or molybdenum films in certain embodiments. Apparatuses to perform the methods are also provided.
  • Forming electrical contacts or lines in semiconductor device fabrication can involve filling features with tungsten or other electrically conductive materials.
  • a nucleation tungsten layer can first be deposited into a via or contact.
  • a nucleation layer is a thin conformal layer that serves to facilitate the subsequent formation of a bulk material thereon.
  • the tungsten nucleation layer may be deposited to conformally coat the sidewalls and bottom of the feature. Conforming to the underlying feature bottom and sidewalls can be critical to support high quality deposition.
  • bulk tungsten may be deposited by a CVD process by reducing tungsten hexafluoride (WF 6 ) or other tungsten-containing precursor using a reducing agent such as hydrogen (H 2 ).
  • WF 6 tungsten hexafluoride
  • H 2 hydrogen
  • Bulk tungsten is different from a tungsten nucleation layer.
  • Bulk tungsten as used herein refers to tungsten used to fill most or all of a feature, such as at least about 50% of the feature.
  • bulk tungsten is used to carry current.
  • Bulk tungsten is tungsten deposited to a thickness of at least 50A.
  • Distribution of a material within a feature may be characterized by its step coverage.
  • “step coverage” is defined as a ratio of two thicknesses, i.e., the thickness of the material inside the feature divided by the thickness of the material near the opening.
  • the term“inside the feature” represents a middle portion of the feature located about the middle point of the feature along the feature’s axis, e.g., an area between about 25% and 75% of the distance or, in certain embodiments, between about 40% and 60% of the distance along the feature’s depth measured from the feature’s opening, or an end portion of the feature located between about 75% and 95% of the distance along the feature’s axis as measured from the opening.
  • Step coverage of over 100% can be achieved, for example, by filling a feature wider in the middle or near the bottom of the feature than at the feature opening.
  • tungsten fill can involve the use of the fluorine-containing precursor tungsten hexafluoride (WF 6 ).
  • WF 6 tungsten hexafluoride
  • the use of WF 6 results in some incorporation of fluorine into the deposited tungsten film.
  • the presence of fluorine can cause electromigration and/or fluorine diffusion into adjacent components and damages contacts, thereby reducing the performance of the device.
  • One challenge is reducing the fluorine concentration or content in the deposited tungsten film.
  • a smaller feature having the same fluorine concentration in the tungsten film as a larger feature affects the performance of the device more substantially. For example, the smaller the feature, the thinner the films are deposited. As a result, fluorine in the deposited tungsten film is more likely to diffuse through the thinner films, thereby potentially causing device failure.
  • One method of preventing fluorine diffusion includes depositing one or more barrier layers prior to depositing tungsten to prevent fluorine from diffusing from tungsten to other layers of the substrate such as an oxide layer.
  • Figure 1A shows an example stack of layers deposited on a substrate.
  • Substrate 190 includes a silicon layer 192, an oxide layer 194 (e.g., titanium oxide (TiOx), tetraethyl orthosilicate (TEOS) oxide, etc.), a barrier layer 196 (e.g., titanium nitride (TiN)), a tungsten nucleation layer 198, and a bulk tungsten layer 199.
  • oxide layer 194 e.g., titanium oxide (TiOx), tetraethyl orthosilicate (TEOS) oxide, etc.
  • a barrier layer 196 e.g., titanium nitride (TiN)
  • TiN titanium nitride
  • Barrier layer 196 is deposited to prevent fluorine diffusion from the bulk tungsten layer 199 and the tungsten nucleation layer 198 to the oxide layer.
  • barrier layers become thinner, and fluorine may still diffuse from the deposited tungsten layers.
  • chemical vapor deposition of bulk tungsten performed at a higher temperature results in lower fluorine content, such films have poor step coverage.
  • Tungsten nucleation layers typically have higher electrical resistivities than the overlying bulk layers. Barrier layers deposited in contacts, vias, and other features, may also have high resistivities. Further, thin barrier and tungsten nucleation films occupy a larger percentage of smaller features, increasing the overall resistance in the feature. Resistivity of a tungsten film depends on the thickness of the film deposited, such that resistivity increases as thickness decreases due to boundary effects.
  • tungsten does not have the surface mobility to allow grains to be moved or altered once it is deposited due to its high melting point.
  • Fluorine-free tungsten (FFW) precursors are useful to prevent such reliability and integration issues or device performance issues.
  • FFW precursors include metal organic precursors, but undesirable traces of elements from the metal organic precursors may be incorporated in the tungsten film as well, such as carbon, hydrogen, nitrogen, and oxygen. Some metal organic fluorine-free precursors are also not easily implemented or integrated in tungsten deposition processes.
  • Tungsten chloride includes tungsten pentachloride (WCI5), tungsten hexachloride (WCl 6 ), tungsten tetrachloride (WCl 4 ), tungsten dichloride (WCl 2 ), tungsten oxychlorides (WO x Cl y ) and mixtures thereof.
  • WCI5 tungsten pentachloride
  • Wl 6 tungsten hexachloride
  • WCl 4 tungsten tetrachloride
  • WCl 2 tungsten dichloride
  • WO x Cl y tungsten oxychlorides
  • the methods involve depositing a conformal reducing agent layer on a substrate.
  • the substrate generally includes a feature to be filled with tungsten as described above, with the reducing agent layer is conformal to the topography of the substrate including the feature.
  • the reducing agent layer is then exposed to a WCl x precursor, which is reduced by the reducing agent layer.
  • the conformal reducing agent layer is converted to a conformal tungsten layer.
  • the WCl x precursor may or may not be provided in the presence of hydrogen (H 2 ) gas.
  • the conformal reducing agent layer is the only available reducing agent for WCl x , excess WCl x may be used to ensure complete conversion to tungsten (W).
  • the conversion is self-limiting, with its step coverage defined by the step coverage of the reducing agent layer.
  • the reducing agent layer and the subsequent tungsten layer is formed directly on an oxide surface, such as a silicon oxide (e.g., Si0 2 ) or aluminum oxide (e.g., A1 2 0 3 ) surface.
  • an adhesion/barrier layer such as a titanium nitride (TiN) layer or titanium/ titanium nitride (Ti/TiN) bilayer.
  • TiN titanium nitride
  • Ti/TiN titanium/ titanium nitride
  • the reducing agent layer formation and subsequent conversion to tungsten is performed without a tungsten nucleation layer. This also may reduce resistance.
  • formation of the reducing agent layer and subsequent tungsten conversion are performed at different temperatures.
  • excellent step coverage can be achieved during reducing agent layer deposition.
  • the W conversion is self- limiting, preserving the step coverage.
  • a dense, conformal, and fluorine-free tungsten layer eliminations fluorine damage associated with WF 6 -based tungsten nucleation and bulk deposition.
  • a high conversion temperature may be employed to increase the density of the tungsten layer, which can help reduce fluorine diffusion if a fluorine-containing precursor is used in subsequent tungsten deposition operations.
  • Molybdenum may be used to form low resistance metallization stack structures and may take the place of tungsten in the structures described above.
  • Figure 1J shows another example of a material stack.
  • the stack includes a substrate 102, a dielectric layer 104, with a Mo layer 108 deposited on the dielectric layer 104, without an intervening diffusion barrier layer.
  • the Mo layer 108 may be deposited on a TiN or other diffusion barrier layer.
  • the Mo layer 108 may or may not include a Mo nucleation layer and a bulk Mo layer, and, in some embodiments, the Mo layer 108 may be deposited on a tungsten (W) or W-containing growth initiation layer.
  • W tungsten
  • W-containing growth initiation layer By using Mo, which has a lower electron mean free path than W, as the main conductor, lower resistivity thin films can be obtained.
  • the substrate may be a silicon wafer, e.g., a 200-mm wafer, a 300-mm wafer, or a 450-mm wafer, including wafers having one or more layers of material, such as dielectric, conducting, or semi-conducting material deposited thereon.
  • Substrates may have features such as via or contact holes, which may be characterized by one or more of narrow and/or re entrant openings, constrictions within the feature, and high aspect ratios.
  • a feature may be formed in one or more of the above described layers. For example, the feature may be formed at least partially in a dielectric layer.
  • a feature may have an aspect ratio of at least about 2: 1, at least about 4: 1, at least about 6: 1, at least about 10: 1, at least about 25: 1, or higher.
  • One example of a feature is a hole or via in a semiconductor substrate or a layer on the substrate
  • Figures 1B-1I are schematic examples of various structures in which tungsten may be deposited in accordance with disclosed embodiments. As described further below, molybdenum may be deposited in these structures as an alternative to or in addition to tungsten.
  • Figure 1B shows an example of a cross-sectional depiction of a vertical feature 101 to be filled with tungsten.
  • the feature can include a feature hole 105 in a substrate 103.
  • the hole 105 or other feature may have a dimension near the opening, e.g., an opening diameter or line width of between about 10 nm to 500 nm, for example between about 25 nm and about 300 nm.
  • the feature hole 105 can be referred to as an unfilled feature or simply a feature.
  • the feature 101, and any feature may be characterized in part by an axis 118 that extends through the length of the feature, with vertically-oriented features having vertical axes and horizontally-oriented features having horizontal axes.
  • features are trenches in a 3D NAND structure.
  • a substrate may include a wordline structure having at least 60 lines, with between 18 to 48 layers, with trenches at least 200A deep.
  • Another example is a trench in a substrate or layer.
  • the feature may have an under-layer, such as a barrier layer or adhesion layer.
  • under-layers include dielectric layers and conducting layers, e.g., silicon oxides, silicon nitrides, silicon carbides, metal oxides, metal nitrides, metal carbides, and metal layers.
  • Figure 1C shows an example of a feature 101 that has a re-entrant profile.
  • a re entrant profile is a profile that narrows from a bottom, closed end, or interior of the feature to the feature opening. According to various implementations, the profile may narrow gradually and/or include an overhang at the feature opening.
  • Figure 1C shows an example of the latter, with an under-layer 113 lining the sidewall or interior surfaces of the feature hole 105.
  • the under-layer 113 can be for example, a diffusion barrier layer, an adhesion layer, a nucleation layer, a combination of thereof, or any other applicable material.
  • Non-limiting examples of under-layers can include dielectric layers and conducting layers, e.g., silicon oxides, silicon nitrides, silicon carbides, metal oxides, metal nitrides, metal carbides, and metal layers.
  • an under-layer can be one or more of titanium, titanium nitride, tungsten nitride, titanium aluminide, and tungsten.
  • the under-layer is tungsten-free.
  • the under-layer 113 forms an overhang 115 such that the under-layer 113 is thicker near the opening of the feature 101 than inside the feature 101.
  • FIG. 1D shows examples of views of various filled features having constrictions.
  • Each of the examples (a), (b) and (c) in Figure 1D includes a constriction 109 at a midpoint within the feature.
  • the constriction 109 can be, for example, between about 15 nm-20 nm wide.
  • Constrictions can cause pinch off during deposition of tungsten in the feature, with deposited tungsten blocking further deposition past the constriction before that portion of the feature is filled, resulting in voids in the feature.
  • Example (b) further includes a liner/barrier overhang 115 at the feature opening. Such an overhang could also be a potential pinch-off point.
  • Example (c) includes a constriction 112 further away from the field region than the overhang 115 in example (b).
  • Horizontal features such as in 3-D memory structures, can also be filled.
  • Figure 1E shows an example of a horizontal feature 150 that includes a constriction 151.
  • horizontal feature 150 may be a word line in a VNAND structure.
  • the constrictions can be due to the presence of pillars in a VNAND or other structure.
  • Figure 1F shows a plan view of pillars 125 in a VNAND or vertically integrated memory (VIM) structure 148, with Figure 1G showing a simplified schematic of a cross-sectional depiction of the pillars 125.
  • Arrows in Figure 1F represent deposition material; as pillars 125 are disposed between an area 127 and a gas inlet or other deposition source, adjacent pillars can result in constrictions 151 that present challenges in void free fill of an area 127.
  • the structure 148 can be formed, for example, by depositing a stack of alternating interlayer dielectric layers 129 and sacrificial layers (not shown) on a substrate 100 and selectively etching the sacrificial layers.
  • the interlayer dielectric layers may be, for example, silicon oxide and/or silicon nitride layers, with the sacrificial layers a material selectively etchable with an etchant. This may be followed by etching and deposition processes to form pillars 125, which can include channel regions of the completed memory device.
  • the main surface of substrate 100 can extend in the x and y directions, with pillars 125 oriented in the z-direction.
  • pillars 125 are arranged in an offset fashion, such that pillars 125 that are immediately adjacent in the x-direction are offset with each other in the y-direction and vice versa.
  • the pillars (and corresponding constrictions formed by adjacent pillars) may be arranged in any number of manners.
  • the pillars 125 may be any shape including circular, square, etc. Pillars 125 can include an annular semi-conducting material, or circular (or square) semi-conducting material.
  • a gate dielectric may surround the semi conducting material.
  • the area between each interlayer dielectric layer 129 can be filled with tungsten; thus structure 148 has a plurality of stacked horizontally-oriented features that extend in the x and/or y directions to be filled.
  • Figure 1H provides another example of a view of a horizontal feature, for example, of a VNAND or other structure including pillar constrictions 151.
  • the example in Figure 1H is open-ended, with material to be deposited able to enter horizontally from two sides as indicated by the arrows.
  • example in Figure 1H can be seen as a 2-D rendering 3-D features of the structure, with the Figure 1H being a cross-sectional depiction of an area to be filled and pillar constrictions shown in the figure representing constrictions that would be seen in a plan rather than cross-sectional view.
  • 3-D structures can be characterized with the area to be filled extending along two or three dimensions (e.g., in the x and y or x, y and z-directions in the example of Figure 1G), and can present more challenges for fill than filling holes or trenches that extend along one or two dimensions.
  • controlling fill of a 3-D structure can be challenging as deposition gasses may enter a feature from multiple dimensions.
  • Figure II depicts another example of a feature that may be filled with tungsten according to embodiments disclosed herein.
  • Figure II depicts a schematic example of a DRAM architecture including a tungsten buried wordline (bWL) 11 in a silicon substrate 9.
  • the tungsten bWL is formed in a trench etched in the silicon substrate 9.
  • Lining the trench is a conformal barrier layer 12 and an insulating layer 13 that is disposed between the conformal barrier layer 12 and the silicon substrate 9.
  • the insulating layer 13 may be a gate oxide layer, formed from a high-k dielectric material such as a silicon oxide or silicon nitride material.
  • Titanium nitride is used as a barrier in tungsten (W) wordline architectures.
  • TiN/W wordline fill is limited by the resistivity scaling; because TiN has relatively high resistivity, as dimensions decrease and TiN conformal layers occupy a greater volume fraction of the trench, the resistance increases.
  • the tungsten bWLs disclosed herein are free of TiN and other non-W barrier layers.
  • tungsten may be formed directly on oxide surfaces without a barrier layer present.
  • the TiN layer may not be present.
  • the tungsten bWL 11 may be formed directly on the insulating layer 13.
  • Figures 2A-2C provide process flow diagrams for methods performed in accordance with disclosed embodiments.
  • Figure 2A provides a process flow diagram for a method of depositing an elemental metal layer in a feature.
  • Figures 2B and 2C provide examples of the method of Figure 2A to deposit elemental tungsten and molybdenum, respectively.
  • operations 202-208 may be performed to form a conformal layer directly on at least a dielectric surface of a feature. In some embodiments, these operations are formed without prior deposition of a nucleation layer. In such operations, prior to operation 202, a substrate having no nucleation layer deposited thereon is provided.
  • substrate temperature refers to a temperature to which the pedestal holding the substrate is set.
  • Certain disclosed embodiments may be performed at a chamber pressure between about 3 Torr and about 60 Torr. In some embodiments, chamber pressure is less than about 10 Torr. For example, in some embodiments chamber pressure is about 5 Torr.
  • the substrate is exposed to a reducing agent gas to form a reducing agent layer.
  • the reducing agent gas may be a silane, a borane, or a mixture of a silane and diborane.
  • silanes including SiH 4 and Si 2 H 6 and examples of boranes include diborane (B 2 H 6 ), as well as B threadH n+ 4, B threadH n+6 , B threadH h+8 , B shadowH m , where n is an integer from 1 to 10, and m is a different integer than m.
  • the reducing agent layer may include silicon or silicon-containing material, phosphorous or a phosphorous- containing material, germanium or a germanium-containing material, boron or boron- containing material that is capable of reducing a tungsten precursor and combinations thereof.
  • reducing agent gases that can be used to form such layers include PH 3 , SiH 2 Cl 2 , and GeH 4.
  • hydrogen may or may not be run in the background. (although hydrogen can reduce tungsten precursors, it does not function as a reducing agent in a gas mixture with a sufficient amount of stronger reducing agents such as silane and diborane.)
  • the reducing agent gas is a mixture including a small amount of a boron-containing gas, such as diborane, with another reducing agent.
  • a boron-containing gas such as diborane
  • the addition of a small amount of a boron-containing gas can greatly affect the decomposition and sticking coefficient of the other reducing agent.
  • exposing the substrate sequentially to two reducing agents, e.g., silane and diborane may be performed.
  • flowing a mixture of gases can facilitate the addition of very small amounts of a minority gas, e.g., at least a 100: 1 ratio of silane to diborane.
  • a carrier gas may be flowed.
  • a carrier gas such as nitrogen (N 2 ), argon (Ar), helium (He), or other inert gases, may be flowed during operation 202.
  • a reducing agent layer may include elemental silicon (Si), elemental boron (B), elemental germanium (Ge), or mixtures thereof.
  • a reducing agent layer may include Si and B.
  • the amount of B may be tailored to achieve high deposition rate of the reducing agent layer but with low resistivity.
  • a reducing agent layer may have between 5% and 80% B for example, or between 5% and 50% B, between 5% and 30%, or between 5% and 20% B, with the balance consisting essentially of Si and in some cases, H.
  • Hydrogen atoms be present, e.g., SiH x , BH y , GeH z , or mixtures thereof where x, y, and z may independently be between 0 and a number that is less than the stoichiometric equivalent of the corresponding reducing agent compound.
  • the composition may be varied through the thickness of the reducing agent layer.
  • a reducing agent layer may be 20% B at the bottom of the reducing agent layer and 0% B the top of the layer.
  • the total thickness of the reducing agent layer may be between IqA and 5qA, and is some embodiments, between 15A and 4qA, or 2qA and 30A.
  • the reducing agent layer conformally lines the feature.
  • Substrate temperature during operation 202 may be maintained at a temperature Tl for the film to be conformal. If temperature is too high, the film may not conform to the topography of the underlying structure. In some embodiments, step coverage of greater than 90% or 95% is achieved. For silane, diborane, and silane/diborane mixtures, conformality is excellent at 300°C and may be degraded at temperatures of 400°C or higher. Thus, in some embodiments, temperature during operation 202 is at most 350°C, or even at most 325°C, at most 3l5°C, or at most 300°C. In some embodiments, temperatures of less than 300°C are used.
  • Operation 202 may be performed for any suitable duration.
  • Example durations include between about 0.25 seconds and about 30 seconds, about 0.25 seconds and about 20 seconds, about 0.25 seconds and about 5 seconds, or about 0.5 seconds and about 3 seconds.
  • the chamber is optionally purged to remove excess hydrogen that did not adsorb to the surface of the substrate.
  • a purge may be conducted by flowing an inert gas at a fixed pressure thereby reducing the pressure of the chamber and re-pressurizing the chamber before initiating another gas exposure.
  • Example inert gases include nitrogen (N 2 ), argon (Ar), helium (He), and mixtures thereof.
  • the purge may be performed for a duration between about 0.25 seconds and about 30 seconds, about 0.25 seconds and about 20 seconds, about 0.25 seconds and about 5 seconds, or about 0.5 seconds and about 3 seconds.
  • the substrate is exposed to a metal precursor at a substrate temperature T2.
  • a metal precursor examples include tungsten-containing and molybdenum-containing precursors, though the method may also be extended to precursors of other metals.
  • the metal precursor is a precursor that can be reduced to form an elemental metal, e.g., W or Mo.
  • a carrier gas such as nitrogen (N 2 ), argon (Ar), helium (He), or other inert gases, may be flowed during operation 206.
  • the amount of precursor by volume may be between about 0.1% and about 1.5%.
  • Operation 206 may be performed for any suitable duration. In some embodiments, it may involve a soak of the metal precursor and in some embodiments, a sequence of metal precursor pulses. According to various embodiments, operation 206 may or may not be performed in the presence of H 2. If H 2 is used, in some embodiments, it and the metal precursor may be applied in an ALD-type mode. For example:
  • the H 2 may be used to remove byproducts off the surface, for example. However, if H 2 is used in CVD type mode (e.g., H 2 and the metal precursor are provided without pulsing), the step coverage may be compromised.
  • the substrate temperature T2 is high enough that the metal precursor reacts with the reducing agent layer to form a metallic layer.
  • the entire reducing agent layer may be converted to the metal.
  • most of the reducing agent layer is converted to the metal.
  • the temperature is at least 450°C, and may be at least 500°C to obtain conversion of at or near 100%. The dependence on temperature is described in more detail below.
  • the resulting feature is now lined with a conformal film of the metal. It may be between IqA and 5qA, and is some embodiments, between 15A and 4qA, or 2qA and 30A. In general, it will be about the same thickness as the reducing agent layer. In some embodiments, it may be may be up to 5% thicker than the reducing agent layer due to volumetric expansion during the conversion.
  • operation 208 there may be an optional purge operation to purge excess metal precursor still in gas phase that did not react the reducing agent layer.
  • a purge may be conducted by flowing an inert gas at a fixed pressure thereby reducing the pressure of the chamber and re-pressurizing the chamber before initiating another gas exposure.
  • the chamber may be purged for any suitable duration.
  • the chamber may be purged for a duration between about 0.25 seconds and about 30 seconds, about 0.25 seconds and about 20 seconds, about 0.25 seconds and about 5 seconds, or about 0.5 seconds and about 3 seconds.
  • the purge gas may be any of the gases described above with respect to operation 204.
  • the feature is optionally filled with metal.
  • Figure 2B provides a process flow diagram for a method performed in accordance with disclosed embodiments.
  • Operations 212-218 of Figure 2B may be performed to form a conformal tungsten layer directly at least a dielectric surface of a feature. In some embodiments, these operations are formed without prior deposition of a tungsten nucleation layer. In such operations, prior to operation 212, a substrate having no tungsten nucleation layer deposited thereon is provided.
  • the substrate is exposed to a reducing agent gas to form a reducing agent layer. Exposure to the reducing agent gas is described above with respect to operation 202 in Figure 2A.
  • the reducing agent layer is tuned to obtain a particular tungsten microstructure.
  • beta-tungsten has a metastable A15 cubic crystalline structure and exhibits higher resistivity than the stable body-centered cubic crystalline structure of alpha-tungsten.
  • Boron-based reducing agent layers may lead to the presence of higher resistivity beta-tungsten in tungsten films at certain thicknesses.
  • Silane or germane reducing agent layers may promote growth of alpha-tungsten.
  • the chamber is optionally purged to remove excess hydrogen that did not adsorb to the surface of the substrate, as described above with respect to operation 204 of Figure 2A.
  • Example chlorine-containing tungsten precursors have a chemical formula of WCl x , where x is an integer between and including 2 and 6, such as 2, 3, 4, 5, or 6. Examples include WCI5 and WCl 6.
  • the chlorine-containing tungsten precursor may include a mixture of WCl x compounds.
  • a carrier gas such as nitrogen (N 2 ), argon (Ar), helium (He), or other inert gases, may be flowed during operation 216.
  • the amount of chlorine- containing tungsten precursor by volume may be between about 0.1% and about 1.5%.
  • Operation 216 may be performed for any suitable duration. In some embodiments, it may involve a soak of WCl x and in some embodiments, a sequence of WCl x pulses. According to various embodiments, operation 206 may or may not be performed in the presence of H 2. If H 2 is used, in some embodiments, it and the WCl x may be applied in an ALD-type mode. If H 2 is used, in some embodiments, it and the WCl x may be applied in an ALD-type mode as described above with respect to Figure 2A.
  • WF 6 tungsten hexafluoride
  • the substrate temperature T2 is high enough that the WCl x precursor reacts with the reducing agent layer to form metallic tungsten (W). All or most of the reducing agent layer may be converted to tungsten. In some embodiments, the temperature is at least 450°C, and may be at least 500°C to obtain conversion of at or near 100%. The dependence on temperature is described in more detail below.
  • the resulting feature is now lined with a conformal film of tungsten. It may be between IqA and 5qA, and is some embodiments, between 15A and 4qA, or 2qA and 30A. In general, it will be about the same thickness as the reducing agent layer. In some embodiments, it may be may be up to 5% thicker than the reducing agent layer due to volumetric expansion during the conversion.
  • operation 2128 there may be an optional purge operation to purge excess chlorine-containing tungsten precursor still in gas phase that did not react the reducing agent layer as described with respect to Figure 2 A.
  • the feature is optionally filled with tungsten.
  • Bulk tungsten deposition may be deposited using any of the disclosed embodiments described in U.S. Patent Application Serial No. 15/398,462 filed on January 4, 2017, or in U.S. Patent Application US 14/502,817, filed on September 30, 2014, which are herein incorporated by reference for the purpose of described feature fill and bulk tungsten deposition.
  • Bulk tungsten deposition may be performed with or without depositing a tungsten nucleation layer and may use a fluorine- containing or fluorine-free tungsten precursor.
  • Figure 2C provides a process flow diagram for a method performed in accordance with disclosed embodiments.
  • Operations 222-228 of Figure 2C may be performed to form a conformal molybdenum layer directly at least a dielectric surface of a feature. In some embodiments, these operations are formed without prior deposition of a nucleation layer. In such operations, prior to operation 222, a substrate having no nucleation layer deposited thereon is provided.
  • Operations 222 and 224 may be carried out as described above with respect to operations 202 and 204 of Figure 2A.
  • the substrate is exposed to a molybdenum precursor at a substrate temperature T2.
  • Mo-containing precursors include molybdenum hexafluoride (MoF 6 ), molybdenum pentachloride (M0CI5), molybdenum dichloride dioxide (M0O2CI2), molybdenum tetrachloride oxide (M0OCI4), and molybdenum hexacarbonyl (Mo(CO) 6 ).
  • the molybdenum precursor may include a mixture of Mo compounds.
  • a carrier gas such as nitrogen (N2), argon (Ar), helium (He), or other inert gases, may be flowed during operation 226.
  • Operation 226 may be performed for any suitable duration and may involve a soak of the precursor or a sequence of pulses. According to various embodiments, operation 226 may or may not be performed in the presence of H 2 as described above.
  • the substrate temperature T2 is high enough that the molybdenum precursor reacts with the reducing agent layer to form metallic molybdenum (Mo).
  • Mo metallic molybdenum
  • the entire reducing agent layer is converted to molybdenum.
  • the temperature is at least 450°C, and may be at least 500°C to obtain conversion of at or near 100%.
  • the resulting feature is now lined with a conformal film of tungsten. It may be between IqA and 5qA, and is some embodiments, between 15A and 4qA, or 2qA and 30A. In general, it will be about the same thickness as the reducing agent layer. In some embodiments, it may be may be up to 5% thicker than the reducing agent layer due to volumetric expansion during the conversion.
  • Results in the below table show the effect of diborane on the decomposition of silane in reducing agent layer formation on an oxide.
  • Formation of the reducing agent layer was performed at 300°C and 10 Torr using various mixtures of SiH 4 and B 2 H 6 on blanket S1O2.
  • the balance of the reducing agent gas is H 2 and N2 carrier gases in each case.
  • Figure 3A shows W conversion for various reducing agent gas mixtures and WCl x exposures at 300°C substrate temperature during conversion. Almost none of the reducing agent layer was converted at this temperature regardless of the WCl x exposure. A slight increase in W conversion was observed at 350°C. An increase of lOx the W exposure (as measured in Torr-s) had no impact at 350°C. Nor did testing on Al 2 0 3 instead of Si0 2. This indicates that temperatures significantly higher than 350°C may be employed, e.g., at least 500°C.
  • Figure 3B shows CVD Mo growth (thickness vs time) obtained using a Si-B reducing agent layer using a M0CI 5 precursor on both a thermal oxide (lower line) and TiN (upper line) substrate. The results show an identical growth rate on different substrates when growth is initiated on the Si-B sacrificial layer.
  • Figure 3C shows resistivity of the CVD Mo films; the two resistivities are comparable. The results in Figures 3B and 3C indicate that a Si-B reducing agent layer is an effective way to initiate growth on a variety of substrates. Similar results were obtained for MoCl 4.
  • Figure 3D shows CVD Mo growth for Si-B reducing agent layers of IqA, 2qA, 30A, and 5qA. There is a negligible Mo deposition on the IqA layer, and stable thickness on 20A-50A layers.
  • Figure 3E shows resistivity as a function of reducing agent layer thickness, and indicates that the Mo resistivity increases slightly with increasing Si-B layer thickness. This is likely due to residual reducing agent layer left after deposition, indicating that the temperature and/or reducing agent layer composition may be adjusted to minimize or eliminate the residual layer.
  • Example deposition apparatuses include various systems, e.g., ALTUS ® and ALTETS ® Max, available from Lam Research Corp., of Fremont, California, or any of a variety of other commercially available processing systems.
  • sequential chemical vapor deposition (CVD) may be performed at a first station that is one of two, five, or even more deposition stations positioned within a single deposition chamber.
  • silane (SiH 4 ) and diborane (B 2 H 6 ) may be introduced to the surface of the semiconductor substrate, at the first station, using an individual gas supply system that creates a localized atmosphere at the substrate surface to form a reducing agent layer.
  • Another station may be used for fluorine-free tungsten conversion of the reducing agent layer. Two or more stations may be used to fill the features with bulk tungsten in parallel processing.
  • FIG. 4 is a block diagram of a processing system suitable for conducting deposition processes in accordance with embodiments.
  • the system 400 includes a transfer module 403.
  • the transfer module 403 provides a clean, pressurized environment to minimize risk of contamination of substrates being processed as they are moved between various reactor modules.
  • Mounted on the transfer module 403 is a multi-station reactor 409.
  • Multi station reactor 409 may also be used to perform reducing agent layer deposition, fluorine-free tungsten conversion, and subsequent CVD in some embodiments.
  • Reactor 409 may include multiple stations 411, 413, 415, and 417 that may sequentially perform operations in accordance with disclosed embodiments.
  • reactor 409 could be configured such that station 411 performs a first operation using a reducing agent, station 413 performs a second sequential operation using a WCl x precursor, and stations 415 and 417 perform CVD.
  • Each stations may include a heated pedestal or substrate support for independent temperature control, one or more gas inlets or showerhead or dispersion plate.
  • An example of a deposition station 500 is depicted in Figure 5, including substrate support 502 and showerhead 503.
  • a heater may be provided in pedestal portion 501.
  • the transfer module 403 may be one or more single or multi station modules 407 capable of performing plasma or chemical (non-plasma) pre-cleans.
  • the module may also be used for various treatments to, for example, prepare a substrate for a deposition process.
  • the system 400 also includes one or more wafer source modules 401, where wafers are stored before and after processing.
  • An atmospheric robot (not shown) in the atmospheric transfer chamber 419 may first remove wafers from the source modules 401 to loadlocks 421.
  • a wafer transfer device (generally a robot arm unit) in the transfer module 403 moves the wafers from loadlocks 421 to and among the modules mounted on the transfer module 403.
  • a system controller 429 is employed to control process conditions during deposition.
  • the controller 429 will typically include one or more memory devices and one or more processors.
  • a processor may include a CPU or computer, analog and/or digital input/output connections, stepper motor controller boards, etc.
  • the controller 429 may control all of the activities of the deposition apparatus.
  • the system controller 429 executes system control software, including sets of instructions for controlling the timing, mixture of gases, chamber pressure, chamber temperature, wafer temperature, radio frequency (RF) power levels, wafer chuck or pedestal position, and other parameters of a particular process.
  • RF radio frequency
  • Other computer programs stored on memory devices associated with the controller 429 may be employed in some embodiments.
  • the user interface may include a display screen, graphical software displays of the apparatus and/or process conditions, and user input devices such as pointing devices, keyboards, touch screens, microphones, etc.
  • System control logic may be configured in any suitable way.
  • the logic can be designed or configured in hardware and/or software.
  • the instructions for controlling the drive circuitry may be hard coded or provided as software.
  • the instructions may be provided by“programming.” Such programming is understood to include logic of any form, including hard coded logic in digital signal processors, application-specific integrated circuits, and other devices which have specific algorithms implemented as hardware. Programming is also understood to include software or firmware instructions that may be executed on a general purpose processor.
  • System control software may be coded in any suitable computer readable programming language.
  • the computer program code for controlling the germanium-containing reducing agent pulses, hydrogen flow, and tungsten-containing precursor pulses, and other processes in a process sequence can be written in any computer readable programming language: for example, assembly language, C, C++, Pascal, Fortran, or others. Compiled object code or script is executed by the processor to perform the tasks identified in the program. Also as indicated, the program code may be hard coded.
  • the controller parameters relate to process conditions, such as, for example, process gas composition and flow rates, temperature, pressure, cooling gas pressure, substrate temperature, and chamber wall temperature. These parameters are provided to the user in the form of a recipe, and may be entered utilizing the user interface.
  • Signals for monitoring the process may be provided by analog and/or digital input connections of the system controller 429
  • the signals for controlling the process are output on the analog and digital output connections of the deposition apparatus 400
  • the system software may be designed or configured in many different ways. For example, various chamber component subroutines or control objects may be written to control operation of the chamber components necessary to carry out the deposition processes in accordance with the disclosed embodiments. Examples of programs or sections of programs for this purpose include substrate positioning code, process gas control code, pressure control code, and heater control code.
  • a controller 429 is part of a system, which may be part of the above-described examples. Such systems can include semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform or platforms for processing, and/or specific processing components (a wafer pedestal, a gas flow system, etc.).
  • the electronics may be referred to as the“controller,” which may control various components or subparts of the system or systems.
  • the controller 429 may be programmed to control any of the processes disclosed herein, including the delivery of processing gases, temperature settings (e.g., heating and/or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings in some systems, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, positional and operation settings, wafer transfers into and out of a tool and other transfer tools and/or load locks connected to or interfaced with a specific system.
  • the controller may be defined as electronics having various integrated circuits, logic, memory, and/or software that receive instructions, issue instructions, control operation, enable cleaning operations, enable endpoint measurements, and the like.
  • the integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and/or one or more microprocessors, or microcontrollers that execute program instructions (e.g., software).
  • Program instructions may be instructions communicated to the controller in the form of various individual settings (or program files), defining operational parameters for carrying out a particular process on or for a semiconductor wafer or to a system.
  • the operational parameters may, in some embodiments, be part of a recipe defined by process engineers to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and/or dies of a wafer.
  • the controller 429 may be a part of or coupled to a computer that is integrated with, coupled to the system, otherwise networked to the system, or a combination thereof.
  • the controller 429 may be in the“cloud” or all or a part of a fab host computer system, which can allow for remote access of the wafer processing.
  • the computer may enable remote access to the system to monitor current progress of fabrication operations, examine a history of past fabrication operations, examine trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing steps to follow a current processing, or to start a new process.
  • a remote computer e.g.
  • a server can provide process recipes to a system over a network, which may include a local network or the Internet.
  • the remote computer may include a user interface that enables entry or programming of parameters and/or settings, which are then communicated to the system from the remote computer.
  • the controller receives instructions in the form of data, which specify parameters for each of the processing steps to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type of tool that the controller is configured to interface with or control.
  • the controller may be distributed, such as by including one or more discrete controllers that are networked together and working towards a common purpose, such as the processes and controls described herein.
  • An example of a distributed controller for such purposes would be one or more integrated circuits on a chamber in communication with one or more integrated circuits located remotely (such as at the platform level or as part of a remote computer) that combine to control a process on the chamber.
  • example systems may include a plasma etch chamber or module, a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a clean chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a CVD chamber or module, an ALD chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing systems that may be associated or used in the fabrication and/or manufacturing of semiconductor wafers.
  • PVD physical vapor deposition
  • CVD chemical vapor deposition
  • ALD atomic layer etch
  • ALE atomic layer etch
  • the controller might communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout a factory, a main computer, another controller, or tools used in material transport that bring containers of wafers to and from tool locations and/or load ports in a semiconductor manufacturing factory.
  • the controller 429 may include various programs.
  • a substrate positioning program may include program code for controlling chamber components that are used to load the substrate onto a pedestal or chuck and to control the spacing between the substrate and other parts of the chamber such as a gas inlet and/or target.
  • a process gas control program may include code for controlling gas composition, flow rates, pulse times, and optionally for flowing gas into the chamber prior to deposition in order to stabilize the pressure in the chamber.
  • a pressure control program may include code for controlling the pressure in the chamber by regulating, e.g., a throttle valve in the exhaust system of the chamber.
  • a heater control program may include code for controlling the current to a heating unit that is used to heat the substrate. Alternatively, the heater control program may control delivery of a heat transfer gas such as helium to the wafer chuck.
  • Lithographic patterning of a film typically includes some or all of the following steps, each step provided with a number of possible tools: (1) application of photoresist on a workpiece, i.e., substrate, using a spin-on or spray-on tool; (2) curing of photoresist using a hot plate or furnace or UV curing tool; (3) exposing the photoresist to visible or UV or x-ray light with a tool such as a wafer stepper; (4) developing the resist so as to selectively remove resist and thereby pattern it using a tool such as a wet bench; (5) transferring the resist pattern into an underlying film or workpiece by using a dry or plasma-assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper.
  • a tool such as an RF or microwave plasma resist stripper.

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Abstract

L'invention concerne des procédés et des appareils servant à former des films métalliques tels que des films de tungstène (W) et de molybdène (Mo) sur des substrats semi-conducteurs. Les procédés consistent à former une couche d'agent réducteur, puis à exposer la couche d'agent réducteur à un précurseur métallique pour convertir la couche d'agent réducteur en une couche du métal. Selon certains modes de réalisation, la couche d'agent réducteur est une couche contenant du silicium (Si-) et du bore (B-). Les procédés peuvent consister à former la couche d'agent réducteur à une première température de substrat, à élever la température du substrat à une seconde température de substrat, puis à exposer la couche d'agent réducteur au précurseur métallique à la seconde température de substrat. Selon certains modes de réalisation, les procédés peuvent servir à former des films de tungstène ou de molybdène exempts de fluor. L'invention concerne également des appareils permettant de mettre en œuvre les procédés.
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