WO2018198603A1

WO2018198603A1 - Laminated balun

Info

Publication number: WO2018198603A1
Application number: PCT/JP2018/010976
Authority: WO
Inventors: 谷口　哲夫; 清弘樫内; 増田　豊
Original assignee: 株式会社村田製作所
Priority date: 2017-04-26
Filing date: 2018-03-20
Publication date: 2018-11-01
Also published as: TWI654838B; TW201843930A

Abstract

A plurality of inductor electrodes formed between layers of a laminate include inductor electrodes (4n to 4p) that are electrically connected between an unbalanced terminal (UB) and a second ground terminal (G2), an inductor electrode (4l) electrically connected between a first terminal and a second terminal (Tx2) of a first balanced terminal, and an inductor electrode (4q) electrically connected between a first terminal and a second terminal (Rx2) of a second balanced terminal. The region surrounded by the inductor electrodes (4n to 4p) overlaps the region surrounded by the inductor electrode (4l) and the region surrounded by the inductor electrode (4q) when viewed from the direction of lamination of a dielectric layer. The inductor electrodes (4n to 4p) are disposed between the inductor electrode (4l) and the inductor electrode (4q).

Description

Laminated balun

The present invention relates to a laminated balun that performs signal conversion between an unbalanced signal and a balanced signal.

In the RF (Radio Frequency) circuit of communication equipment and its peripheral circuits, a balanced line may be used as a signal line in order to reduce the influence of external noise. For example, the Rx signal may be input from the antenna to the RF circuit and the Tx signal may be output from the RF circuit to the antenna through a balanced line.

Conventionally, in this case, when it is desired to share the transmission of the Tx signal and the reception of the Rx signal with one antenna, it is necessary to branch the unbalanced line from the antenna into two unbalanced lines by a divider. Then, a multilayer balance filter as disclosed in, for example, Japanese Patent Laid-Open No. 2013-138410 (Patent Document 1) is connected to each unbalanced line, and further, each multilayer balance filter is connected to an RF circuit via a balanced line. To do.

FIG. 10 is an equivalent circuit diagram of the laminated balance filter 200 disclosed in Japanese Patent Laid-Open No. 2013-138410. The laminated balance filter 200 has one unbalanced terminal UB and a balanced terminal B composed of a first terminal B1 and a second terminal B2. The laminated balance filter 200 outputs the unbalanced signal input to the unbalanced terminal UB as a balanced signal from the balanced terminal B (first terminal B1 and second terminal B2), and the balanced terminal B (first terminal B1 and second terminal). The balanced signal input to the terminal B2) is output as an unbalanced signal from the unbalanced terminal UB. The laminated balance filter 200 is manufactured by forming an inductor conductor pattern, a capacitor conductor pattern, a ground conductor pattern, a via conductor pattern, and the like inside a laminate in which a plurality of dielectric layers are laminated. Between the unbalanced terminal UB and the balanced terminal B, band-pass filters LC1 and LC2 configured by LC parallel resonators are inserted. A mutual inductance M10 is generated between the inductor L10 of the bandpass filter LC1 and the inductor L20 of the bandpass filter LC2, and a mutual inductance M20 is generated between the inductor L20 and the balanced inductor L30.

FIG. 11 is a diagram illustrating an example of a balanced / unbalanced conversion circuit configured by connecting one divider 300 and two stacked balanced filters 200.

The divider 300 includes a first terminal 101, a second terminal 102, and a third terminal 103, distributes a signal input to the first terminal 101, outputs the signal from the second terminal 102 and the third terminal 103, and outputs a second terminal. The signals input to 102 and the third terminal 103 are combined and output from the first terminal 101.

In this balanced / unbalanced conversion circuit, the antenna Ant and the first terminal 101 of the divider 300 are connected by an unbalanced line. In addition, the second terminal 102 of the divider 300 and the unbalanced terminal UB of one laminated balance filter 200 are connected by an unbalanced line, and the third terminal 103 of the divider 300 and the unbalanced terminal of the other laminated balance filter 200 are connected. UB is connected by an unbalanced line. Further, a balanced line on the Tx side is connected to the balanced terminal B (first terminal B1 and second terminal B2) of one multilayer balanced filter 200, and the balanced terminal B (first terminal B1 and first terminal B1) of the other multilayer balanced filter 200 is connected. A balanced line on the Rx side is connected to the two terminals B2).

JP 2013-138410 A

As in the balanced / unbalanced conversion circuit shown in FIG. 11, the Tx signal is output from the RF circuit and the Rx signal is input to the RF circuit through a balanced line, and the Tx signal is transmitted and the Rx signal is received. In the conventional method using one divider 300 and two laminated balance filters 200 in order to share one antenna Ant, there are the following problems.

First, since the signal line connected to the antenna Ant is branched by the divider 300, there is a problem that insertion loss occurs in the signal. For example, the Rx signal sent from the antenna Ant to the RF circuit has been attenuated by about 3 dB by passing through the divider. Furthermore, since each insertion balance filter 200 also has an insertion loss, there is a problem that the total insertion loss becomes large.

In addition, since one divider 300 and two laminated balance filters 200 must be used and the number of parts is large, there is a problem that a large mounting space is required in the communication device and the communication device becomes large. . Furthermore, since there are many parts, there existed a problem that manufacture became complicated.

The present disclosure has been made to solve the above-described problem, and an object thereof is to provide a small-sized laminated balun including an unbalanced terminal and two pairs of balanced terminals and having a small signal insertion loss. To do.

A laminated balun according to an aspect of the present disclosure includes a laminated body in which a plurality of dielectric layers are laminated, a plurality of inductor conductor patterns formed between the layers of the laminated body, and a plurality of terminals formed on the surface of the laminated body. Is provided. The plurality of terminals include an unbalanced terminal, a first balanced terminal, a second balanced terminal, and a ground terminal. Each of the first balanced terminal and the second balanced terminal has a first terminal and a second terminal. The plurality of inductor conductor patterns include an unbalanced inductor conductor pattern electrically connected between the unbalanced terminal and the ground terminal, a first terminal of the first balanced terminal, and a second terminal of the first balanced terminal. A first balanced-side inductor conductor pattern electrically connected in between, and a second balanced-side inductor conductor electrically connected between the first terminal of the second balanced terminal and the second terminal of the second balanced terminal Pattern. When viewed from the stacking direction of the plurality of dielectric layers, at least a part of the region surrounded by the first balanced-side inductor conductor pattern overlaps with the region surrounded by the unbalanced-side inductor conductive pattern, and the second balanced-side inductor. At least a part of the region surrounded by the conductor pattern overlaps the region surrounded by the unbalanced inductor conductor pattern. In the stacking direction, the unbalanced inductor conductor pattern is disposed between the first balanced side inductor conductor pattern and the second balanced side inductor conductor pattern.

Preferably, the plurality of dielectric layers include first to fourth dielectric layers that are sequentially stacked. The first balanced-side inductor conductor pattern is formed between the first dielectric layer and the second dielectric layer. The unbalanced inductor conductor pattern is formed between the second dielectric layer and the third dielectric layer. The second balanced-side inductor conductor pattern is formed between the third dielectric layer and the fourth dielectric layer.

Although the multilayer balun of the present disclosure includes an unbalanced terminal and two pairs of balanced terminals, since no divider is used, there is no signal insertion loss due to passing through the divider, and overall insertion loss is reduced. small.

In addition, the laminated balun of the present disclosure is configured such that the function conventionally performed by using one divider and two baluns is performed by one balun, and is downsized. Therefore, in a communication device in which the multilayer balun of the present disclosure is mounted, the space required for mounting can be reduced.

1 is an equivalent circuit diagram of a laminated balun according to an embodiment of the present invention. It is an external appearance perspective view of a laminated balun. It is a disassembled perspective view of the whole laminated balun. It is a disassembled perspective view which shows the dielectric material layer for eight layers from the bottom among several dielectric material layers which comprise a lamination | stacking balun. FIG. 5 is an exploded perspective view showing eight dielectric layers stacked on the dielectric layer shown in FIG. 4. FIG. 6 is an exploded perspective view showing five dielectric layers stacked on the dielectric layer shown in FIG. 5. It is a figure which shows the frequency characteristic between the unbalanced terminal UB and 1st balanced terminal Tx (Tx1, Tx2). It is a figure which shows the frequency characteristic between the unbalanced terminal UB and 2nd balanced terminal Rx (Rx1, Rx2). It is a disassembled perspective view which shows the modification of the lamination | stacking balun of this Embodiment. 6 is an equivalent circuit diagram of a multilayer balance filter described in Patent Document 1. FIG. It is an equivalent circuit diagram showing an example of a balun circuit configured by connecting one divider and two laminated balance filters.

Embodiments of the present invention will be described in detail with reference to the drawings. Note that the same or corresponding parts in the drawings are denoted by the same reference numerals and description thereof will not be repeated. Each embodiment shows an example of the embodiment of the present invention, and the present invention is not limited to the content of the embodiment. Moreover, it is also possible to implement the content described in different embodiments in combination, and the implementation content in that case is also included in the present invention. Further, the drawings are for helping understanding of the embodiments and may not necessarily be drawn strictly. For example, a drawn component or a dimensional ratio between the components may not match the dimensional ratio described in the specification. In addition, the constituent elements described in the specification may be omitted in the drawings or may be drawn with the number omitted.

1 to 6 show a laminated balun 100 according to an embodiment of the present invention. However, FIG. 1 is an equivalent circuit diagram of the laminated balun 100 according to the embodiment of the present invention. FIG. 2 is an external perspective view of the laminated balun 100. FIG. 3 is an exploded perspective view of the entire laminated balun 100. FIG. 4 is an exploded perspective view showing dielectric layers corresponding to eight layers from the bottom among the plurality of dielectric layers constituting the laminated balun 100. FIG. 5 is an exploded perspective view showing eight dielectric layers stacked on the dielectric layer shown in FIG. FIG. 6 is an exploded perspective view showing five dielectric layers stacked on the dielectric layer shown in FIG.

First, an equivalent circuit of the laminated balun 100 will be described with reference to FIG. The laminated balun 100 includes one unbalanced terminal UB. The laminated balun 100 includes a first balanced terminal Tx having a first terminal Tx1 and a second terminal Tx2, and a second balanced terminal Rx having a first terminal Rx1 and a second terminal Rx2. In the present embodiment, two pairs of balanced terminals are shown as a first balanced terminal Tx and a second balanced terminal Rx for convenience, but the usage of each balanced terminal is arbitrary, and the first balanced terminal is The Tx terminal is not limited to using the second balanced terminal as the Rx terminal.

The laminated balun 100 includes a low-pass filter. The low-pass filter includes a first inductor L11 having one end connected to the unbalanced terminal UB, a second inductor L12 having one end connected to the first inductor L11, and a connection point between the first inductor L11 and the second inductor L12. The first capacitor C1 is inserted between the first capacitor C1 and the ground. With this low-pass filter, the laminated balun 100 can pass only signals in an arbitrarily selected frequency band.

In this embodiment, a T-type low-pass filter is used. However, the type of the low-pass filter is not limited to the T-type, and other types may be used.

The multilayer balun 100 includes an unbalanced inductor L2. The unbalanced inductor L2 is connected in parallel with the second capacitor C2. The unbalanced inductor L2 and the second capacitor C2 connected in parallel constitute an LC parallel resonator.

The multilayer balun 100 includes a first balanced-side inductor in which a first inductor portion L31, a second inductor portion L32, and a third inductor portion L33 are connected in series. The first balanced-side inductor is connected between the first terminal Tx1 and the second terminal Tx2 of the first balanced terminal Tx. In the present embodiment, a DC feed terminal DCfeed is connected to an intermediate portion of the second inductor portion L32.

Furthermore, the multilayer balun 100 includes a second balanced-side inductor in which a first inductor portion L41, a second inductor portion L42, and a third inductor portion L43 are connected in series. The second balanced-side inductor is connected between the first terminal Rx1 and the second terminal Rx2 of the second balanced terminal Rx.

The unbalanced inductor L2 is electromagnetically coupled to the first balanced inductor. The unbalanced inductor L2 is mainly electromagnetically coupled to the second inductor portion L32 of the first balanced inductor. That is, a mutual inductance M1 is generated between the unbalanced inductor L2 and the second inductor portion L32 of the first balanced inductor.

Furthermore, the unbalanced inductor L2 is electromagnetically coupled to the second balanced inductor. The unbalanced inductor L2 is mainly electromagnetically coupled to the second inductor portion L42 of the second balanced inductor. That is, a mutual inductance M2 is generated between the unbalanced inductor L2 and the second inductor portion L42 of the second balanced inductor.

The multilayer balun 100 further includes a third capacitor C3 inserted between the first terminal Tx1 and the second terminal Tx2 of the first balanced terminal Tx.

The third capacitor C3 forms an LC parallel resonator with the first balanced inductors (L31, L32, L33), and the LC parallel resonator formed with the unbalanced inductor L2 and the second capacitor C2 described above. Together, they constitute a first band pass filter. The first band pass filter passes only a signal in an arbitrarily selected frequency band between the unbalanced terminal UB and the first balanced terminal Tx.

In the multilayer balun 100, the impedance on the first balanced terminal Tx (Tx1, Tx2) side is adjusted by selecting the constants of the first balanced inductors (L31, L32, L33) and the third capacitor C3. Can do.

The multilayer balun 100 further includes a fourth capacitor C4 inserted between the first terminal Rx1 and the second terminal Rx2 of the second balanced terminal Rx.

The fourth capacitor C4 forms an LC parallel resonator with the second balanced-side inductors (L41, L42, L43), and the LC parallel resonator formed with the unbalanced-side inductor L2 and the second capacitor C2 described above. Together, they constitute a second bandpass filter. The second band pass filter passes only a signal in an arbitrarily selected frequency band between the unbalanced terminal UB and the second balanced terminal Rx.

In the multilayer balun 100, the impedance on the second balanced terminal Rx (Rx1, Rx2) side is adjusted by selecting the constants of the second balanced inductors (L41, L42, L43) and the fourth capacitor C4. Can do.

The laminated balun 100 composed of the above equivalent circuits can output the balanced signal input to the first balanced terminal Tx as an unbalanced signal from the unbalanced terminal UB. Note that if DC power is supplied to the DC feed terminal DCfeed, the strength of the unbalanced signal output from the unbalanced terminal UB can be increased. Furthermore, the unbalanced signal input to the unbalanced terminal UB can be output as a balanced signal from the second balanced terminal Rx.

Note that balanced signals having substantially the same amplitude and different phases are input to the first terminal Tx1 and the second terminal Tx2 of the first balanced terminal Tx. Furthermore, balanced signals having substantially the same amplitude and different phases are output from the first terminal Rx1 and the second terminal Rx2 of the second balanced terminal Rx.

A laminated balun 100 composed of the above equivalent circuits can be constituted by, for example, a laminated body 1 shown in FIG. As shown in FIG. 2, the laminated balun 100 includes a laminated body 1 in which a plurality of dielectric layers are laminated, and a plurality of terminals formed on the surface of the laminated body 1. The plurality of terminals are formed on the side surfaces when the pair of main surfaces having the largest area of the rectangular parallelepiped laminated body 1 are the upper surface and the bottom surface.

The ten terminals are an unbalanced terminal UB, a first terminal Tx1 and a second terminal Tx2 that the first balanced terminal Tx has, a first terminal Rx1 and a second terminal Rx2 that the second balanced terminal Rx has, and a first ground terminal G1. , Second ground terminal G2, DC feed terminal DCfeed, first floating terminal F1, and second floating terminal F2. Specifically, the first floating terminal F1, the first ground terminal G1, the unbalanced terminal UB, and the second ground terminal G2 are sequentially arranged on the front side surface of the multilayer body 1 in FIG. 2 in the clockwise direction. It is formed. A DC feed terminal DCfeed is formed on the left side surface of the laminate 1 in FIG. 2, the second terminal Tx2 of the first balanced terminal Tx, the first terminal Tx1, the second terminal Rx2 of the second balanced terminal Rx, One terminal Rx1 is formed. The second floating terminal F2 is formed on the right side surface of the multilayer body 1 in FIG. Note that both ends of each terminal are formed to extend on the lower main surface and the upper main surface of the laminate 1, respectively.

The first floating terminal F1 and the second floating terminal F2 are not connected to the circuit inside the stacked body 1, and are bonded to a land electrode such as a substrate when the stacked balun 100 is mounted to increase mounting strength. Used for.

Unbalanced terminal UB, first terminal Tx1 and second terminal Tx2 of first balanced terminal Tx, first terminal Rx1 and second terminal Rx2 of second balanced terminal Rx, first ground terminal G1, second ground terminal G2, DC The feed terminal DCfeed, the first floating terminal F1, and the second floating terminal F2 can be made of, for example, a metal mainly composed of Ag, Cu, or an alloy thereof. On the surface of these terminals, a plating layer containing Ni, Sn, Au or the like as a main component may be formed over one layer or a plurality of layers as necessary.

As shown in FIG. 3, the multilayer body 1 is formed by laminating dielectric layers 1a to 1u made of, for example, ceramics in order from the bottom. As shown in FIGS. 4 to 6, the laminated balun 100 includes capacitor conductor patterns (hereinafter simply referred to as “capacitor electrodes”) 2a to 2i and connection conductor patterns (hereinafter simply referred to as “connections”) formed between the layers of the multilayer body 1. Electrode 3) and inductor conductor patterns (hereinafter simply referred to as “inductor electrodes”) 4a to 4w. Furthermore, the laminated balun 100 includes via conductor patterns (hereinafter simply referred to as “via electrodes”) 5a to 5v formed in the laminated body 1 in the laminating direction of the dielectric layers 1a to 1u.

Specifically, the connection electrode 3a is formed on the upper main surface of the dielectric layer 1b. One end of the connection electrode 3a is connected to the DC feed terminal DCfeed.

Two

capacitor electrodes

2a and 2b are formed on the upper main surface of the dielectric layer 1c. The capacitor electrode 2a is connected to the first ground terminal G1 and the second ground terminal G2.

Six capacitor electrodes 2c to 2h are formed on the upper main surface of the dielectric layer 1d.

Capacitor electrodes

2c and 2d are formed at positions overlapping capacitor electrode 2a when viewed from the stacking direction of dielectric layers 1a to 1u. The capacitor electrode 2e is connected to the second terminal Tx2 of the first balanced terminal Tx, the capacitor electrode 2f is connected to the first terminal Tx1 of the first balanced terminal Tx, and the capacitor electrode 2g is connected to the second terminal Rx2 of the second balanced terminal Rx. 2h is connected to the first terminal Rx1 of the second balanced terminal Rx.

Capacitor electrodes

2e and 2f are formed at positions that overlap capacitor electrode 2b when viewed from the stacking direction of dielectric layers 1a to 1u.

Two

capacitor electrodes

2i and 2j are formed on the upper main surface of the dielectric layer 1e. The capacitor electrode 2i is formed at a position overlapping the

capacitor electrodes

2e and 2f when viewed from the stacking direction of the dielectric layers 1a to 1u. The capacitor electrode 2j is formed at a position overlapping the

capacitor electrodes

2g and 2h when viewed from the stacking direction of the dielectric layers 1a to 1u.

An inductor electrode 4a is formed on the upper main surface of the dielectric layer 1f.
Two inductor electrodes 4b and 4c are formed on the upper main surface of the dielectric layer 1g.

Two

inductor electrodes

4d and 4e are formed on the upper main surface of the dielectric layer 1h.
Two

inductor electrodes

4f and 4g are formed on the upper main surface of the dielectric layer 1i. One end of the inductor electrode 4f is connected to the unbalanced terminal UB, and one end of the inductor electrode 4g is connected to the second terminal Rx2 of the second balanced terminal Rx.

Two

inductor electrodes

4h and 4i are formed on the upper main surface of the dielectric layer 1j. One end of the inductor electrode 4h is connected to the second terminal Tx2 of the first balanced terminal Tx.

Two

inductor electrodes

4j and 4k are formed on the upper main surface of the dielectric layer 1k.
Two inductor electrodes 4l and 4m are formed on the upper main surface of the dielectric layer 1l. The inductor electrode 4l has an open annular shape.

An inductor electrode 4n is formed on the upper main surface of the dielectric layer 1m. An inductor electrode 4o is formed on the upper main surface of the dielectric layer 1n. An inductor electrode 4p is formed on the upper main surface of the dielectric layer 1o. The inductor electrodes 4n to 4p have an open ring shape. When viewed from the stacking direction of the dielectric layers 1a to 1u, at least a part of the region surrounded by any of the annular inductor electrodes 4n to 4p overlaps with the region surrounded by the annular inductor electrode 4l.

An inductor electrode 4q is formed on the upper main surface of the dielectric layer 1p. The inductor electrode 4q is an open ring. When viewed from the stacking direction of the dielectric layers 1a to 1u, at least a part of the region surrounded by the annular inductor electrode 4q overlaps with the region surrounded by the annular inductor electrodes 4n to 4p.

Two

inductor electrodes

4r and 4s are formed on the upper main surface of the dielectric layer 1q.
Two

inductor electrodes

4t and 4u are formed on the upper main surface of the dielectric layer 1r. One end of the inductor electrode 4t is connected to the first terminal Tx1 of the first balanced terminal Tx.

An inductor electrode 4v is formed on the upper main surface of the dielectric layer 1s.
An inductor electrode 4w is formed on the upper main surface of the dielectric layer 1t. One end of the inductor electrode 4w is connected to the first terminal Rx1 of the second balanced terminal Rx.

The via electrode 5a penetrates through the dielectric layers 1c to 1l and connects the other end of the connection electrode 3a and the intermediate part of the inductor electrode 4l.

The via electrode 5b penetrates the

dielectric layers

1e and 1f and connects the capacitor electrode 2c and the intermediate portion of the inductor electrode 4a.

The via electrode 5c passes through the dielectric layers 1e to 1m, and connects the capacitor electrode 2d, one end of the inductor electrode 4d, and one end of the inductor electrode 4n.

The via electrode 5d penetrates the dielectric layer 1g and connects one end of the inductor electrode 4a and one end of the inductor electrode 4b.

The via electrode 5e penetrates the dielectric layer 1g and connects the other end of the inductor electrode 4a and one end of the inductor electrode 4c.

The via electrode 5f penetrates the dielectric layer 1h and connects the other end of the inductor electrode 4b and the other end of the inductor electrode 4d.

The via electrode 5g penetrates the dielectric layer 1h and connects the other end of the inductor electrode 4c and one end of the inductor electrode 4e.

The via electrode 5h penetrates the dielectric layer 1i and connects the other end of the inductor electrode 4e and the other end of the inductor electrode 4f.

The via electrode 5i passes through the dielectric layer 1j and connects the other end of the inductor electrode 4g and one end of the inductor electrode 4i.

The via electrode 5j penetrates the dielectric layer 1k and connects the other end of the inductor electrode 4h and one end of the inductor electrode 4j.

The via electrode 5k penetrates the dielectric layer 1k and connects the other end of the inductor electrode 4i and one end of the inductor electrode 4k.

Via electrode 5l penetrates through dielectric layer 11 and connects the other end of inductor electrode 4j and one end of inductor electrode 4l.

The via electrode 5m penetrates the dielectric layer 11 and connects the other end of the inductor electrode 4k and one end of the inductor electrode 4m.

The via electrode 5n penetrates the dielectric layers 1m to 1p and connects the other end of the inductor electrode 4m and one end of the inductor electrode 4q.

The via electrode 5o penetrates the dielectric layers 1m to 1q and connects the other end of the inductor electrode 4l and one end of the inductor electrode 4r.

The via electrode 5p penetrates the dielectric layer 1n and connects the other end of the inductor electrode 4n and one end of the inductor electrode 4o.

The via electrode 5q penetrates the dielectric layer 1o and connects the other end of the inductor electrode 4o and the other end of the inductor electrode 4p.

Via electrode 5r penetrates through dielectric layer 1q and connects the other end of inductor electrode 4q and one end of inductor electrode 4s.

The via electrode 5s penetrates the dielectric layer 1r and connects the other end of the inductor electrode 4r and the other end of the inductor electrode 4t.

The via electrode 5t penetrates the dielectric layer 1r and connects the other end of the inductor electrode 4s and one end of the inductor electrode 4u.

The via electrode 5u penetrates the dielectric layer 1s and connects the other end of the inductor electrode 4u and one end of the inductor electrode 4v.

The via electrode 5v passes through the dielectric layer 1t and connects the other end of the inductor electrode 4v and the other end of the inductor electrode 4w.

The above-described capacitor electrodes 2a to 2i, connection electrodes 3a, inductor electrodes 4a to 4w, and via electrodes 5a to 5v can be made of, for example, Ag, Cu, or a metal mainly composed of these alloys.

The laminated balun 100 of the present embodiment configured by laminating dielectric layers having the above-described configuration can be manufactured by a general manufacturing method conventionally used for manufacturing laminated baluns. it can.

Next, while comparing FIG. 1 with FIGS. 4 to 6, the equivalent circuit of the laminated balun 100 and the capacitor electrodes 2a to 2i, the connection electrodes 3a, and the inductor electrodes 4a to 4a formed between the dielectric layers 1a to 1u. 4w and the relationship with via electrodes 5a to 5v penetrating any one of dielectric layers 1a to 1u will be described.

The first inductor L11 of the low-pass filter starts from the unbalanced terminal UB, passes through the inductor electrode 4f, the via electrode 5h, the inductor electrode 4e, the via electrode 5g, the inductor electrode 4c, the via electrode 5e, and the inductor electrode 4a. It is formed by a line having the electrode 5b as an end point.

The first capacitor C1 of the low-pass filter is between the capacitor electrode 2c connected to the via electrode 5b that is the end point of the first inductor L11, and the capacitor electrode 2a connected to the first ground terminal G1 and the second ground terminal G2. It is formed by the capacitance formed in

The second inductor L12 of the low-pass filter starts from the via electrode 5b that is the end point of the first inductor L11, passes through the inductor electrode 4a, the via electrode 5d, the inductor electrode 4b, the via electrode 5f, and the inductor electrode 4d, and passes through the inductor electrode. 4d is formed by a line having one end as an end point.

The unbalanced inductor L2 starts from one end of the inductor electrode 4d that is the end point of the second inductor L12, and passes through the via electrode 5c, the inductor electrode 4n, the via electrode 5p, the inductor electrode 4o, the via electrode 5q, and the inductor electrode 4p. In addition, it is formed by a line having the second ground terminal G2 as an end point. One end of the inductor electrode 4d is electrically connected to the unbalanced terminal UB via each electrode constituting the second inductor L12 and each electrode constituting the first inductor L11. Therefore, each of the inductor electrodes 4n to 4p constituting the unbalanced inductor L2 is electrically connected between the unbalanced terminal UB and the second ground terminal G2. Here, the state of being “electrically connected” indicates a state of being connected by a conductive path or a state of being connected through a capacitor, and is not limited to a state of being directly connected, but another member is interposed therebetween. It also includes a state of being indirectly connected.

The second capacitor C2 connected in parallel with the unbalanced inductor L2 includes a capacitor electrode 2d connected to one end of the inductor electrode 4d, which is the end point of the second inductor L12, and the via electrode 5c, the first ground terminal G1, and the second capacitor C2. The capacitor is formed between the capacitor electrode 2a connected to the two ground terminals G2.

The first balanced-side inductor starts from the first terminal Tx1 of the first balanced terminal Tx, and starts from the inductor electrode 4t, the via electrode 5s, the inductor electrode 4r, the via electrode 5o, the inductor electrode 41, the via electrode 51, the inductor electrode 4j, and the via. The line is formed by a line having the second terminal Tx2 of the first balanced terminal Tx as an end point via the electrode 5j and the inductor electrode 4h. That is, each of the

inductor electrodes

4t, 4r, 4l, 4j, and 4h is electrically connected between the first terminal Tx1 and the second terminal Tx2 of the first balanced terminal Tx. Among these, the inductor electrode 4l formed so as to surround a region overlapping at least a part of the region surrounded by any of the annular inductor electrodes 4n to 4p when viewed from the stacking direction is the first balanced-side inductor. 2nd inductor part L32 is comprised. The region surrounded by the inductor electrode 41 and the region surrounded by any one of the inductor electrodes 4n to 4p are overlapped, so that an unbalance formed by the second inductor portion L32 configured by the inductor electrode 4l and the inductor electrodes 4n to 4p. The side inductor L2 is electromagnetically coupled.

The inductor electrode 4t, the via electrode 5s, the inductor electrode 4r, and the via electrode 5o that are electrically connected between the first terminal Tx1 of the first balanced terminal Tx and the inductor electrode 4l are the first inductor of the first balanced-side inductor. Part L31 is configured. The via electrode 51, the inductor electrode 4j, the via electrode 5j, and the inductor electrode 4h that are electrically connected between the inductor electrode 41 and the second terminal Tx2 of the first balanced terminal Tx are the third inductor of the first balanced-side inductor. Part L33 is configured.

Note that the intermediate portion of the inductor electrode 4l constituting the second inductor portion L32 of the first balanced inductor is connected to the DC feed terminal DCfeed via the via electrode 5a and the connection electrode 3a.

The second balanced-side inductor starts from the first terminal Rx1 of the second balanced terminal Rx, and starts from the inductor electrode 4w, via electrode 5v, inductor electrode 4v, via electrode 5u, inductor electrode 4u, via electrode 5t, inductor electrode 4s, via The second balanced terminal Rx second through the electrode 5r, the inductor electrode 4q, the via electrode 5n, the inductor electrode 4m, the via electrode 5m, the inductor electrode 4k, the via electrode 5k, the inductor electrode 4i, the via electrode 5i, and the inductor electrode 4g. It is formed by a line having the terminal Rx2 as an end point. That is, each of the

inductor electrodes

4w, 4v, 4u, 4s, 4q, 4m, 4k, 4i, and 4g is electrically connected between the first terminal Rx1 and the second terminal Rx2 of the second balanced terminal Rx. . Among these, the inductor electrode 4q formed so as to surround at least a part of the region surrounded by any of the annular inductor electrodes 4n to 4p when viewed from the stacking direction is a second balanced-side inductor. The second inductor portion L42 is configured. The region surrounded by the inductor electrode 4q and the region surrounded by any one of the inductor electrodes 4n to 4p are overlapped, so that an unbalance formed by the second inductor portion L42 formed by the inductor electrode 4q and the inductor electrodes 4n to 4p is formed. The side inductor L2 is electromagnetically coupled.

The inductor electrode 4w, the via electrode 5v, the inductor electrode 4v, the via electrode 5u, the inductor electrode 4u, the via electrode 5t, and the inductor electrode that are electrically connected between the first terminal Rx1 of the second balanced terminal Rx and the inductor electrode 4q. 4s and the via electrode 5r constitute the first inductor portion L41 of the second balanced-side inductor. Via electrode 5n, inductor electrode 4m, via electrode 5m, inductor electrode 4k, via electrode 5k, inductor electrode 4i, via electrode electrically connected between inductor electrode 4q and second terminal Rx2 of second balanced terminal Rx 5i and the inductor electrode 4g constitute a third inductor portion L43 of the second balanced-side inductor.

The third capacitor C3 mainly includes a capacitor electrode 2f connected to the first terminal Tx1 of the first balanced terminal Tx via the

capacitor electrodes

2b and 2i that are not connected to the terminals but are floating electrodes, The capacitor is formed by a capacitor formed between the balanced terminal Tx and the capacitor electrode 2e connected to the second terminal Tx2.

The fourth capacitor C4 mainly includes a capacitor electrode 2h connected to the first terminal Rx1 of the second balanced terminal Rx via a capacitor electrode 2j that is not connected to a terminal but is a floating electrode, and a second balanced terminal. The capacitor is formed between the capacitor electrode 2g connected to the second terminal Rx2 of Rx.

In the multilayer balun 100 of the present embodiment having the above equivalent circuit and configuration, the inductor electrodes 4n, 4o, 4p constituting the unbalanced inductor L2 are in the first balanced direction in the stacking direction of the dielectric layers 1a-1u. It arrange | positions between the inductor electrode 4l which comprises the 2nd inductor part L32 of a side inductor, and the inductor electrode 4q which comprises the 2nd inductor part L42 of a 2nd balanced side inductor.

As a result, when the multilayer balun 100 is used, the unbalanced inductor L2 and the second inductor portion L32 of the first balanced inductor are electromagnetically coupled. Further, the unbalanced inductor L2 and the second inductor section L42 of the second balanced inductor are electromagnetically coupled.

FIG. 7 is a diagram illustrating frequency characteristics between the unbalanced terminal UB and the first balanced terminal Tx (Tx1, Tx2) of the multilayer balun 100. FIG. FIG. 8 is a diagram illustrating a frequency characteristic between the unbalanced terminal UB and the second balanced terminal Rx (Rx1, Rx2). As can be seen by comparing FIG. 7 and FIG. 8, both have passbands of substantially the same frequency. Therefore, the laminated balun 100 of the present embodiment is suitable for use in TDD (Time Division Duplex) communication. However, it is formed between the frequency of the pass band formed between the first balanced terminal Tx (Tx1, Tx2) and the unbalanced terminal UB and between the unbalanced terminal UB and the second balanced terminal Rx (Rx1, Rx2). It is not necessary for the frequency of the pass band to be the same, and it may be different.

As described above, the laminated balun 100 of the present embodiment includes the laminated body 1 in which the plurality of dielectric layers 1a to 1u are laminated, the plurality of inductor electrodes formed between the layers of the laminated body 1, and the laminated body 1 And a plurality of terminals formed on the surface.

The plurality of terminals include an unbalanced terminal UB, a first balanced terminal Tx, a second balanced terminal Rx, and a second ground terminal G2. The first balanced terminal Tx has a first terminal Tx1 and a second terminal Tx2. The second balanced terminal Rx has a first terminal Rx1 and a second terminal Rx2.

The plurality of inductor electrodes include inductor electrodes (unbalanced side inductor conductor patterns) 4n to 4p electrically connected between the unbalanced terminal UB and the second ground terminal G2, and a first terminal of the first balanced terminal Tx. Between the inductor electrode (first balanced-side inductor conductor pattern) 4l electrically connected between Tx1 and the second terminal Tx2, and between the first terminal Rx1 and the second terminal Rx2 of the second balanced terminal Rx. Connected inductor electrodes (second balanced-side inductor conductor pattern) 4q.

When viewed from the stacking direction of the plurality of dielectric layers 1a to 1u, at least a part of the region surrounded by the inductor electrode 4l overlaps the region surrounded by the inductor electrodes 4n to 4p. Further, at least a part of the region surrounded by the inductor electrode 4q overlaps with the region surrounded by the inductor electrodes 4n to 4p. In the stacking direction, the inductor electrodes 4n to 4p are arranged between the inductor electrode 4l and the inductor electrode 4q.

With such an arrangement, the unbalanced inductor L2 constituted by the inductor electrodes 4n to 4p can be electromagnetically coupled to the second inductor portion L32 of the first balanced inductor constituted by the inductor electrode 4l, and the inductor electrode 4q. The second inductor portion L42 of the second balanced-side inductor constituted by the electromagnetic field coupling can also be performed. Furthermore, the stacked body 1 can be reduced in height by the above arrangement. Furthermore, since there is no need to use a divider, insertion loss due to passing through the divider can be suppressed, and the number of parts can be reduced. As a result, it is possible to realize a small-sized laminated balun including an unbalanced terminal and two pairs of balanced terminals and having a small signal insertion loss.

In the above description, the unbalanced-side inductor L2 is configured by the inductor electrodes 4n, 4o, 4p and the via

electrodes

5p, 5q respectively formed on the upper main surfaces of the three dielectric layers 1m-1o. However, the number of dielectric layers on which the inductor electrode constituting the unbalanced inductor L2 is formed is not limited to this.

FIG. 9 is an exploded perspective view showing a modified example of the laminated balun 100 of the present embodiment. In FIG. 9, only a part of the dielectric layers constituting the laminated balun is shown. The laminated balun according to the modification is different from the laminated balun 100 shown in FIGS. 4 to 6 only in that a dielectric layer 1v is provided instead of the dielectric layers 1m to 1o.

An inductor electrode 4x is formed on the upper main surface of the dielectric layer 1v. One end of the inductor electrode 4x is connected to the second ground terminal G2, and the other end of the inductor electrode 4x is connected to the via electrode 5c.

In the modification shown in FIG. 9, the unbalanced inductor L2 is connected to the second ground terminal G2 via the via electrode 5c and the inductor electrode 4x connected to one end of the inductor electrode 4d that is the end point of the second inductor L12. It is formed by the line. The inductor electrode 4x can be formed of, for example, Ag, Cu, or a metal mainly composed of these alloys.

In this modification, the

dielectric layers

11, 1 v, 1 p, and 1 q are sequentially stacked. The inductor electrode 41 that constitutes the second inductor portion L32 of the first balanced inductor is formed between the dielectric layer 11 and the dielectric layer 1v. The inductor electrode 4x constituting the unbalanced inductor L2 is formed between the dielectric layer 1v and the dielectric layer 1p. The inductor electrode 4q constituting the second inductor portion L42 of the second balanced side inductor is formed between the dielectric layer 1p and the dielectric layer 1q. That is, the inductor electrode 4x constituting the unbalanced inductor L2 is formed only between one layer in the multilayer body 1. Thereby, the number of dielectric layers constituting the laminated balun can be reduced, and the laminated balun can be reduced in height.

In the above description, it is assumed that the unbalanced inductor L2 is connected in parallel with the second capacitor C2. However, the unbalanced inductor L2 may be connected in series with the second capacitor C2. In this case, the unbalanced inductor L2 and the second capacitor C2 constitute an LC series resonator. For example, the unbalanced inductor L2 and the second capacitor C2 are connected in series in this order between the other end of the second inductor L12 and the ground.

The laminated balun 100 according to the above embodiment can also be expressed as follows.
The laminated balun 100 includes one unbalanced terminal UB, a first balanced terminal Tx having a first terminal Tx1 and a second terminal Tx2, and a second balanced terminal having a first terminal Rx1 and a second terminal Rx2. Rx. An unbalanced inductor L2 is inserted between the unbalanced terminal UB and the ground, a first balanced inductor is inserted between the first terminal Tx1 and the second terminal Tx2 of the first balanced terminal Tx, A second balanced-side inductor is inserted between the first terminal Rx1 and the second terminal Rx2 of the two balanced terminals Rx. The unbalanced inductor L2 is electromagnetically coupled to both the first balanced inductor and the second balanced inductor.

It is preferable that a low-pass filter is inserted between the unbalanced terminal UB and the unbalanced inductor L2. In this case, the frequency band of the signal passing between the unbalanced terminal UB and the first balanced terminal Tx and the signal passing between the unbalanced terminal UB and the second balanced terminal Rx by the low-pass filter. The frequency band can be adjusted.

A third capacitor C3 is further inserted between the first terminal Tx1 and the second terminal Tx2 of the first balanced terminal Tx, and between the first terminal Rx1 and the second terminal Rx2 of the second balanced terminal Rx, Furthermore, it is preferable that the fourth capacitor C4 is inserted. In this case, an LC parallel resonator is configured by the first balanced inductor and the third capacitor C3. Further, the second balanced-side inductor and the fourth capacitor C4 constitute an LC parallel resonator. The LC parallel resonator composed of the first balanced-side inductor and the fourth capacitor is the LC parallel resonator when the unbalanced-side inductor L2 and the second capacitor C2 constitute the LC parallel resonator. When the second capacitor C2 is omitted and the LC parallel resonator is not configured, the first band-pass filter is configured independently. The first band pass filter passes only a signal in an arbitrarily selected frequency band between the unbalanced terminal UB and the first balanced terminal Tx. Further, the LC parallel resonator constituted by the second balanced-side inductor and the fourth capacitor C4 is the LC parallel resonance when the LC parallel resonator is constituted by the unbalanced-side inductor L2 and the second capacitor C2. When the second capacitor C2 is omitted and the LC parallel resonator is not configured, the second bandpass filter is configured independently. The second band pass filter passes only a signal in a frequency band selected arbitrarily between the unbalanced terminal and the second balanced terminal. Even when the third capacitor C3 and the fourth capacitor C4 are not inserted, the LC parallel resonator composed of the unbalanced inductor L2 and the second capacitor C2 described above is used as a bandpass filter or Functions as part of a bandpass filter.

The first balanced-side inductor includes a first inductor portion L31, a second inductor portion L32, and a third inductor portion L33 that are sequentially connected in series. The unbalanced inductor L2 is electromagnetically coupled to the second inductor portion L32 of the first balanced inductor. The second balanced-side inductor includes a first inductor portion L41, a second inductor portion L42, and a third inductor portion L43 that are connected in series in order. The unbalanced inductor L2 is electromagnetically coupled to the second inductor portion L42 of the second balanced inductor. In this case, it is easy to adjust the strength of electromagnetic coupling between the unbalanced inductor L2 and the first balanced inductor, and strong electromagnetic coupling between the unbalanced inductor L2 and the second balanced inductor. Adjustment of the thickness becomes easy. That is, in the first balanced-side inductor and the second balanced-side inductor, the second inductor unit is used for adjusting the electromagnetic field coupling with the unbalanced-side inductor L2. On the other hand, in the first balanced side inductor and the second balanced side inductor, the first inductor unit and the third inductor unit are mainly used for adjusting the impedance of the first balanced terminal Tx or the second balanced terminal Rx, respectively.

It is preferable that a DC feed terminal DCfeed is connected to an intermediate portion of the first balanced inductor. In this case, for example, the strength of the Tx signal transmitted from the antenna can be increased by supplying DC power to the DC feed terminal Dcfeed.

It is preferable that the impedance of the first balanced terminal Tx is different from the impedance of the second balanced terminal Rx. In this case, for example, even when the impedance on the Rx side and the impedance on the Tx side of the RF circuit to be connected are different, the laminated balun 100 can be connected as it is. Furthermore, the impedance of the first balanced terminal Tx and the impedance of the second balanced terminal Rx can be designed independently of each other.

The frequency of the pass band formed between the unbalanced terminal UB and the first balanced terminal Tx is different from the frequency of the pass band formed between the unbalanced terminal UB and the second balanced terminal Rx. Also good.

Alternatively, the frequency of the pass band formed between the unbalanced terminal UB and the first balanced terminal Tx is the same as the frequency of the pass band formed between the unbalanced terminal UB and the second balanced terminal Rx. It may be. In this case, for example, the laminated balun 100 can be used for TDD (Time Division Duplex) communication.

The laminated balun 100 includes any one of a laminated body 1 in which a plurality of dielectric layers 1a to 1u are laminated, a plurality of inductor electrodes laminated between the dielectric layers 1a to 1u, and the dielectric layers 1a to 1u. A plurality of via electrodes formed therethrough. The inductor electrode, or the inductor electrode and the via electrode form an unbalanced inductor L2, a first balanced inductor, and a second balanced inductor, respectively.

Furthermore, the laminated balun 100 includes a plurality of capacitor electrodes laminated between the dielectric layers 1a to 1u. The first capacitor, the second capacitor, the third capacitor, and the fourth capacitor are formed by the capacitance formed between the plurality of capacitor electrodes.

In the stacking direction of the dielectric layers 1a to 1u, the inductor electrodes 4n to 4p that form the unbalanced inductor L2 are the inductor electrode 4l that forms the second inductor portion L32 of the first balanced side inductor and the second balanced side inductor. And the inductor electrode 4q forming the second inductor portion L42. As a result, the unbalanced inductor L2 and the first balanced inductor can be electromagnetically coupled, and at the same time, the unbalanced inductor L2 and the second balanced inductor can be electromagnetically coupled.

The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

1 laminated body, 1a-1v dielectric layer, 2a-2j capacitor electrode, 3a connection electrode, 4a-4x inductor electrode, 5a-5v via electrode, 100 laminated balun, C1 first capacitor, C2 second capacitor, C3 third Capacitor, C4 fourth capacitor, DCfeed DC feed terminal, F1 first floating terminal, F2 second floating terminal, G1 first ground terminal, G2 second ground terminal, L2 unbalanced side inductor, L11 first inductor, L12 second Inductor, L31, L41, first inductor section, L32, L42, second inductor section, L33, L43, third inductor section, Rx second balanced terminal, Tx first balanced terminal, UB unbalanced terminal.

Claims

A laminate in which a plurality of dielectric layers are laminated;
A plurality of inductor conductor patterns formed between the layers of the laminate;
A laminated balun comprising a plurality of terminals formed on the surface of the laminated body,
The plurality of terminals include an unbalanced terminal, a first balanced terminal, a second balanced terminal, and a ground terminal,
Each of the first balanced terminal and the second balanced terminal has a first terminal and a second terminal;
The plurality of inductor conductor patterns are:
An unbalanced inductor conductor pattern electrically connected between the unbalanced terminal and the ground terminal;
A first balanced-side inductor conductor pattern electrically connected between the first terminal of the first balanced terminal and the second terminal of the first balanced terminal;
A second balanced-side inductor conductor pattern electrically connected between the first terminal of the second balanced terminal and the second terminal of the second balanced terminal;
When viewed from the stacking direction of the plurality of dielectric layers, at least a part of the region surrounded by the first balanced-side inductor conductor pattern overlaps with the region surrounded by the unbalanced-side inductor conductive pattern, and the first At least a portion of the region surrounded by the two balanced inductor conductor patterns overlaps with the region surrounded by the unbalanced inductor conductor pattern;
The multilayer balun, wherein the unbalanced inductor conductor pattern is disposed between the first balanced inductor inductor pattern and the second balanced inductor conductor pattern in the stacking direction.
The plurality of dielectric layers include first to fourth dielectric layers stacked sequentially in sequence, and the first balanced-side inductor conductor pattern includes the first dielectric layer, the second dielectric layer, Formed between
The unbalanced inductor conductor pattern is formed between the second dielectric layer and the third dielectric layer,
The multilayer balun according to claim 1, wherein the second balanced-side inductor conductor pattern is formed between the third dielectric layer and the fourth dielectric layer.