WO2017000605A1

WO2017000605A1 - System on chip, graphic plotting method, intermediate layer, embedded device and medium

Info

Publication number: WO2017000605A1
Application number: PCT/CN2016/077924
Authority: WO
Inventors: 赵丙山
Original assignee: 深圳市中兴微电子技术有限公司
Priority date: 2015-06-29
Filing date: 2016-03-30
Publication date: 2017-01-05
Also published as: CN106326186A; CN106326186B

Abstract

A system on chip, a graphic plotting method, an intermediate layer, an embedded device and a medium. The system on chip comprises: a central processor operating an intermediate layer; a graphic processor acquiring configuration information, graphic data to be plotted and a processing task corresponding to the graphic data from the intermediate layer, plotting the graphic data according to the processing task and the configuration information to obtain a first graphic picture, and outputting the first graphic picture to a frame buffer device; the frame buffer device acquiring the configuration information, the graphic data and the processing task from the intermediate layer, and buffering the configuration information, the graphic data and the processing task; and the central processor acquiring the configuration information, the graphic data and the processing task from the frame buffer device, and plotting the graphic data according to the processing task and the configuration information to obtain a second graphic picture.

Description

System on chip, graphics drawing method, middle layer and embedded device, medium

Technical field

The present invention relates to graphics rendering and display technologies, and more particularly to a system on chip, a method for drawing graphics, an intermediate layer, and an embedded device and medium.

Background technique

With the popularity and development of mobile network embedded, the functions of system-on-chip (SoC) in embedded devices are becoming more and more powerful. Therefore, the application of embedded devices is more and more extensive, for example, users can Various multimedia applications (APPs) such as a graphics processing APP and a game APP are installed in the embedded system to perform graphics processing through a graphics processing APP (also referred to as an image processing APP) and various games through the game APP. Taking games as an example, many of the more and more large-scale game apps have high requirements on graphic display effects and graphic display speeds. In order to play games more smoothly, graphic display effects and graphic display speeds are important indicators for people to measure and purchase embedded devices. .

The above multimedia APP is based on the embedded graphical user interface (GUI), in other words, the embedded GUI is an important part of the embedded system. Unlike the operating system on a personal computer (PC), due to the limitations of the hardware of the embedded system itself, the GUI system of the commonly used PC is not suitable for running on an embedded system, so many embedded systems, especially embedded ones, are generated. Linux GUI. Currently embedded GUIs mainly include OpenGUI, Microwindows, QT/Embedded, MiniGUI and so on. However, the graphic display effect and graphic display speed of embedded devices are not satisfactory. For example, the graphical user interface (GUI) also involves many graphic operations, such as drawing points and drawing lines. , fill, transparency processing, smoothness processing, layer overlay, font processing, textures, and more. If these graphics operations are It is handled by the central processing unit (CPU), which will be a large load on the CPU.

In the prior art, there is no special graphics processing unit (GPU) for performing graphics processing in the on-chip system of the embedded device, so that all the graphics drawing operations are all handed over to the CPU for processing, thus increasing The CPU load, which in turn reduces the overall performance of the system, especially when performing complex game operations, the interface display will be stuck, ultimately affecting the user experience.

Summary of the invention

In view of this, the embodiment of the present invention provides a system on chip, a graphics drawing method, an intermediate layer, and an embedded device and a medium to solve at least one problem existing in the prior art, which can improve the overall performance of the system on a chip and improve the graphic display. The speed ultimately improves the user experience.

The technical solution of the embodiment of the present invention is implemented as follows:

In a first aspect, an embodiment of the present invention provides a system on a chip, where the system on a chip includes a central processing unit, a graphics processor, and a frame buffering device, where:

a central processing unit configured to run an intermediate layer;

a graphics processor configured to acquire configuration information, graphics data to be drawn, and processing tasks corresponding to the graphics data from the intermediate layer;

The graphics processor is further configured to: draw the graphics data according to the processing task and the configuration information, obtain a first graphics image, and output the first graphics image to a frame buffer device;

a frame buffering device configured to acquire the configuration information, the graphic data, and the processing task by the intermediate layer;

a frame buffer device, further configured to buffer the configuration information, graphics data, and the processing task;

The central processing unit is further configured to: acquire the configuration information, the graphic data, and the processing task from a frame buffer device, and draw the graphic data according to the processing task and the configuration information to obtain a second graphic Picture

a frame buffering device, further configured to acquire a second graphics screen from the central processing unit and output the second graphics screen; and acquire a first graphics screen from the graphics processor, and the first graphics screen Output.

In a second aspect, an embodiment of the present invention provides a graphics rendering method, where the method includes:

The middle layer receives a call request of the application layer, where the call request carries graphic data to be drawn and a processing task corresponding to the graphic data;

The middle layer responds to the call request, performs its own initialization to obtain configuration information;

After the initialization is completed, the middle layer determines whether the system on chip supports hardware acceleration;

When the system on chip supports hardware acceleration, the middle layer hands the configuration information, the graphics data, and the processing task to the graphics processor for drawing;

The intermediate layer obtains first response information from the graphics processor, where the first response information is used to indicate whether the graphics processor successfully renders the graphic data by using the processing task and the configuration information;

The middle layer carries the first response information in the call response, and returns the call response to the application layer.

In a third aspect, an embodiment of the present invention provides an intermediate layer, where the intermediate layer includes a first receiving unit, an initializing unit, a determining unit, a drawing unit, a first acquiring unit, and an output unit, where:

The first receiving unit is configured to receive a call request of an application layer, where the call request carries graphic data to be drawn and a processing task corresponding to the graphic data;

The initialization unit is configured to perform initialization of itself to obtain configuration information in response to the call request;

The determining unit is configured to determine whether the system on chip supports hardware acceleration after the initialization is completed;

The drawing unit is configured to configure the system when the system-on-chip supports hardware acceleration Information, the graphic data, and the processing task are drawn by a graphics processor;

The first obtaining unit is configured to acquire first response information from the graphics processor, where the first response information is used to indicate whether the graphics processor uses the processing task and the configuration information to the graphics data Successfully drawn;

The output unit is configured to carry the first response information in a call response, and return the call response to the application layer.

In a fourth aspect, an embodiment of the present invention provides an embedded device, where the embedded device includes a display screen and a system on chip, where:

The system on a chip includes a central processing unit, a graphics processor, and a frame buffering device, wherein:

a central processing unit configured to run an intermediate layer;

a graphics processor configured to: draw the graphics data according to the processing task, obtain a first graphics image, and output the first graphics image to a frame buffer device;

a frame buffer device configured to acquire the configuration information, the graphic data, and the processing task by the intermediate layer;

a frame buffer device, further configured to buffer the configuration information, the graphics data, and the processing task;

The central processing unit is further configured to: acquire the configuration information, the graphic data, and the processing task from the frame buffer device, and draw the graphic data according to the processing task and the configuration information to obtain a second graphic image;

a frame buffering device, further configured to acquire a second graphics screen from the central processing unit and output the second graphics screen; and acquire a first graphics screen from the graphics processor and to the first graphics Picture output

The display screen is configured to display a first graphic picture or a second graphic picture.

In a fifth aspect, an embodiment of the present invention provides a computer storage medium, where the computer storage medium stores computer executable instructions, and the computer executable instructions are used to execute the graphic drawing method of the first aspect.

The system on chip, the graphics drawing method, the intermediate layer, and the embedded device and the medium provided by the embodiment of the present invention, wherein the central processing unit runs the intermediate layer; the graphics processor obtains the configuration information, the graphic data to be drawn, and the graphic data to be drawn from the intermediate layer. a processing task corresponding to the graphic data; the graphics processor draws the graphic data according to the processing task and the configuration information, obtains a first graphic image, and outputs the first graphic image to a frame buffer device The intermediate layer of the frame buffering device acquires the configuration information, the graphics data, and the processing task; the frame buffering device buffers the configuration information, the graphics data, and the processing task; the central processor acquires the content from the frame buffer device Configuring information, the graphic data, and the processing task, drawing the graphic data according to the processing task and the configuration information to obtain a second graphic image; and the frame buffering device acquires the second graphic from the central processing unit a picture, and outputting the second graphic picture, and acquiring a first graphic picture from the graphics processor, The output of the first graphics screen; thus, it is possible to improve the overall performance of the system-on-chip and to improve the speed of the graphics display, and ultimately improve the user experience.

DRAWINGS

FIG. 1-1 is a schematic diagram of a system architecture when a system on a chip is drawn in a related art;

1-2 is a schematic structural diagram of a system when a system on a chip performs graphics rendering according to an embodiment of the present invention;

2 is a schematic structural diagram of a graphic processor according to an embodiment of the present invention;

3 is a schematic flowchart of an implementation process of a graphic drawing method according to Embodiment 3 of the present invention;

4 is a schematic flowchart of an implementation process of a graphic drawing method according to Embodiment 4 of the present invention;

5-1 is a schematic structural diagram 1 of an intermediate layer of an embodiment 9 of the present invention;

5-2 is a second schematic structural diagram of an intermediate layer according to Embodiment 9 of the present invention;

FIG. 6 is a schematic structural diagram of a structure of an embedded device according to Embodiment 10 of the present invention.

detailed description

In the prior art, there is no dedicated GPU in the system-on-chip of the embedded device, so that all the graphics drawing operations are all handed over to the CPU for processing. Specifically, as shown in Figure 1-1, the application layer application ( APP) 11 calls the drawing engine 12 when graphics drawing is required; then the drawing engine 12 implements graphics drawing through the DirectFB graphics library 14, and the DirectFB graphics library 14 buffers all graphics data in frames during the drawing process. On the buffer device 15, the CPU 13 acquires graphics data from the frame buffer device 15, and performs graphics operation processing by running the operating system; after the operation is completed, the CPU 15 returns the processed graphics data to the frame buffer device 15, and then the frame buffer device 15 returns. Give the DirectFB graphics library 14. In FIG. 1-1, the operating system (linux) includes an underlying hardware driver such as a CPU and a VOU, and the drawing engine 12 can directly call an interface provided by the operating system (13) to perform operation hardware drawing. The DirectFB graphics library is a graphics acceleration middle layer designed specifically for Linux graphics libraries. This middle layer is a lightweight graphics library that provides hardware graphics acceleration, input device processing features, and abstraction. The implementation principle of DirectFB graphics library is: software encapsulation of graphics algorithms that cannot be supported by current hardware to complete hardware acceleration. Therefore, DirectFB graphics library supports translucent window system and multiple layers on Linux framebuffer driver. Display, the upper layer of the DirectFB graphics library directly faces some application layer graphics libraries such as QT, which can provide services such as display, drawing, and input device control for the application layer graphics library. As can be seen from Figure 1-1, the current graphics drawing mainly depends on the DirectFB graphics library. Therefore, the graphics rendering method shown in Figure 1-1 is also called the drawing method through the DirectFB graphics library.

In the architecture shown in Figure 1-1, this drawing method through the DirectFB graphics library is a pure software drawing method, which passes all the graphics operations to the CPU for processing, thus increasing the CPU load. This reduces the overall performance of the system and results in slow graphics display. In order to solve the technical problems existing in the prior art, embodiments of the present invention provide a graphics processor-based drawing mode, and the graphics processor-based drawing mode can overcome the existence of the system on chip. The graphics display is slow.

The technical solutions of the present invention are further elaborated below in conjunction with the accompanying drawings and specific embodiments.

Embodiment 1

1-2 is a schematic diagram of a system architecture of a system on a chip in a graphics rendering according to an embodiment of the present invention. As shown in FIG. 1-2, an application layer (APP) 11 of an application layer invokes a graphics engine when graphics are required to be drawn. 12; then the drawing engine 12 implements graphics drawing through the DirectFB graphics library 14, which will buffer all graphics data in the frame buffer device 15 during the graphics rendering process, and then the frame buffer device 15 will process the graphics data. The graphics processor (GPU) 16 performs graphics processing; after the operation is completed, the graphics processor 16 returns the processed graphics data to the frame buffer device 15, and then returns to the DirectFB graphics library 14 by the frame buffer device 15.

In Figure 1-2, both the central processor and the graphics processor are part of the Linux operating system. Both can be drawn. The difference is that the central processor corresponds to the software drawing, the graphics processor corresponds to the hardware drawing, the middle layer can be DirectFB, and the DirectFB is drawn by the central processing unit or the graphics processor. The result of the drawing is given to the frame buffer device, and the frame buffer device is finally delivered to the display screen of the embedded device, and then the display screen of the embedded device displays the graphic image.

As can be seen from FIG. 1-2, the on-chip system provided by the embodiment of the present invention adds the graphics processor 16, which can greatly improve the speed of the graphics operation, and at the same time, can reduce the load of the CPU in the system on the chip, thereby improving the overall system. Performance in turn increases the speed of graphical display and ultimately improves the user experience. If a graphics operation allows the graphics processor to perform operations, it takes about 1 to 2 clock cycles (CLK). The same graphics operation requires at least 20 clock cycles for the CPU to perform operations. It can be seen that graphics processing is added to the system-on-chip. The device can greatly improve the speed of graphics operations. In addition, for embedded system-on-chip, the frequency of the CPU and Synchronous Dynamic Random Access Memory (SDRAM) or dynamic randomness The bandwidth between the DRAM (Dynamic Random Access Memory) is always the bottleneck of the graphics operation, so the on-chip system has no graphics processor, and the acceleration capability of the graphics processor is high and low, which ultimately determines the quality of the GUI.

It should be noted that if the graphics processor is to run in the target GUI system, some software intermediate layers such as the DirectFB graphics library are required to provide a unified interface for different hardware acceleration. The intermediate layer DirectFB graphics library is located above itself. The GUI provides services. The DirectFB graphics library uses hardware graphics to encapsulate hardware algorithms that are not supported by current hardware. The upper layer of the DirectFB graphics library directly faces the application layer graphics library such as QT. The DirectFB graphics library provides services such as display, drawing, and input device control for the application layer graphics library. The lower layer of the DirectFB graphics library directly faces the graphics (GFX) acceleration hardware. The hardware driver is required to implement all or part of the predetermined drawing function, wherein the GFX acceleration hardware may be the graphics processor in the embodiment of the present invention.

The graphics processor in Figure 1-2 can be implemented by various graphics processors in the prior art, for example, using a Vivante 2D GPU, where the Vivante 2D GPU mainly provides hardware acceleration for the display of the upper layer graphics, and the Vivante 2D GPU is a high Performance 2D graphics rendering acceleration unit for a wide range of consumer electronic devices. Among them, these consumer electronic devices can range in size from the smallest smartphone to 1080p electronic devices.

In Figure 1-2, the application layer needs to call the DirectFB graphics library during the drawing operation. The DirectFB graphics library relies on the kernel's frame buffer driver (also known as buffer device, including /dev/fb0) to access graphics processing. Device.

In the embodiment of the present invention, the frame buffer device (also referred to as a frame buffer driver) used in the system on chip can be driven by a video output unit (VOU). In the specific implementation process, a screen display unit can be used. The OSD (On Screen Display) driver is completed. It should be noted that due to the limitation of the OSD itself in the hardware scaling, the system on chip cannot meet the scaling effect and quality requirements. In addition, if the graphics operation operation adopts the mode shown in Figure 1-1, the performance of the system on chip does not meet the needs of users; based on the above aspects It is considered that the functions of the graphics operation operation and the scaling section can be performed by the graphics processor. The implementation process of Figure 1-1 and Figure 1-2 is compared below.

The implementation of Figure 1-1 is that the application layer calls the DirectFB graphics library. The DirectFB graphics library obtains the address, display mode and other parameters of the hardware display area through the frame buffer (Frame Buffer) driver, and then performs the graphics data sent by the upper layer through software. After decoding, scaling, filling, moving and other related graphics operations, they are sent to the display memory for the OSD driver to output to the display of the embedded device. The software mode refers to an implementation manner between the DirectFB graphics library 14 and the frame buffer driver 15 in FIG. 1-1.

The implementation of Figure 1-2 is that the application layer calls the DirectFB graphics library. The DirectFB graphics library obtains the parameters such as the address and display mode of the hardware display area through the Frame Buffer driver, and then decodes the data sent by the upper layer through software or hardware. After zooming, filling, handling, etc., it is sent to the display memory for the OSD driver to output to the screen. The software mode refers to the implementation manner between the DirectFB graphics library 14 and the frame buffer driver 15 in FIG. 1-2. The hardware mode refers to the DirectFB graphics library 14 and the graphics processor 16 in FIG. 1-2. The way to achieve it.

It can be seen from the foregoing comparison of FIG. 1-1 and FIG. 1-2 that the implementation manner of FIG. 1-2 provided by the embodiment of the present invention adds a hardware mode while retaining the original software mode operation. From the perspective of hardware design, it is necessary to add a graphics processor; from the software point of view, it needs to implement kernel mode driver and user mode driver; the kernel state is used to implement the linux system architecture when the graphics processor needs to run, and the user mode is used to complete the DirectFB graphics library. Docking operation.

Embodiment 2

Based on the foregoing embodiment 1, the embodiment of the present invention provides a graphics processor. FIG. 2 is a schematic structural diagram of a graphics processor according to an embodiment of the present invention. As shown in FIG. 2, the graphics processor 16 includes:

Host interface (main interface) 163, configured to provide a connection between the graphics processor and the external device interface The interface, specifically, communicates with the memory of the system-on-chip (such as DRAM/SDRAM) through an Advanced Extensible Interface Bus (AXI) 162 through an Advanced High Performance Bus (AHB). The 161 communicates with the CPU on the system on chip. Generally speaking, the process of transmitting graphics data on the Host interface is across the clock domain boundary, that is, more than one clock cycle is required to transmit or transmit data.

The memory controller 166 is mainly used as a memory pipeline processing memory request and an interface for communicating with the host interface 163. When the memory controller 166 communicates with the Host interface 163, the memory controller 166 can control the first memory control channel 164 and the second memory. Two channels of channel 165 are in communication with Host interface 163. In addition, memory controller 166 is also responsible for inserting high level components and commands into the graphics pipeline.

a graphic data storage 167 configured to store graphic data to be drawn and to store graphic data after the drawing is completed;

The drawing engine 168 is configured to draw with graphics data stored in the graphics data store 167 and to rasterize the graphics data.

A pixel engine, the pixel engine is configured to perform pixel operations and filtering on the rendered graphics; including a pixel engine distributor 169 and a pixel engine buffer 170, wherein the pixel engine distributor 169 is configured to distribute pixels of the graphics, the pixel engine buffer 170 The pixels are configured to be buffered, and the pixel engine distributor 169 and the pixel engine buffer 170 are connected by a pixel pipe. The graphics or images are composed of individual pixels. Therefore, the pixel engine processes in units of pixels. During the drawing process, the pixel engine distributor distributes the pixel data to the pixel pipeline for processing, and the pixel engine buffer processes the pixels processed by the respective channels. The data is cached.

Embodiment 3

Based on the foregoing embodiments, an embodiment of the present invention provides a graphics rendering method, where the method is applied to an embedded device, and the function implemented by the method can be invoked by a CPU in an embedded device. The program code is implemented, of course, the program code can be stored in a computer storage medium. As can be seen, the embedded device includes at least a processor and a storage medium.

FIG. 3 is a schematic diagram of an implementation process of a graphic drawing method according to Embodiment 3 of the present invention. As shown in FIG. 3, the graphic drawing method includes:

Step 301: The intermediate layer receives a call request of an application layer, where the call request carries graphic data to be drawn and a processing task corresponding to the graphic data.

Here, the middle layer refers to the middle layer software. In the specific implementation process, the middle layer may be a DirectFB graphics library and software similar in function to the DirectFB graphics library.

Here, the graphic data includes one or more graphic elements, and position coordinates of each of the graphic elements, and the processing task includes a graphic operation corresponding to the graphic elements. The graphics operations include, but are not limited to, operations of drawing points, drawing lines, filling, transparency processing, smoothness processing, layer superposition, font processing, mapping, and the like.

Step 302: The intermediate layer responds to the call request, and performs initialization of itself to obtain configuration information.

Here, the configuration information refers to configuration information of a frequency output unit (VOU) register, and the configuration information includes parameter information such as a display address and a display resolution.

Here, the intermediate layer performs initialization of itself to obtain configuration information in response to the call request, including: the intermediate layer responds to the call request, and the intermediate layer controls the frame buffer device to acquire configuration information of the video output unit VOU register, the configuration information. Includes display address and display resolution.

Step 303, after the initialization is completed, the intermediate layer determines whether the system on chip supports hardware acceleration;

Here, in the specific implementation process, determining whether the system on chip supports hardware acceleration includes a series of steps, for example, first determining whether the system on chip includes a graphics processor, and when the system on chip does not include a graphics processor, the system on chip supports hardware acceleration. When the system on chip includes a graphics processor, it is determined whether the graphics processor of the system on the chip is normal. When normal, the system on chip supports hardware acceleration. When not normal, the system on chip does not support hardware acceleration.

Step 304: When the system on chip supports hardware acceleration, the middle layer will use the configuration information, The graphic data and the processing task are drawn by a graphics processor;

Here, the graphics processor draws the graphics data according to the processing task and the configuration information, to obtain a first graphics image, including:

Determining a position coordinate of all graphic elements in the graphic data or a position coordinate of a graphic element of a part of the graphic data;

And correspondingly drawing a corresponding graphic element according to a graphic operation of the graphic element to obtain a first graphic image; wherein the first graphic image is the graphic processor according to the processing task and the configuration Information to be displayed after the drawing of the graphic data is completed.

Here, the graphics processor outputs the first graphics picture to the frame buffer device, and finally is finally delivered by the frame buffer device to the display screen of the embedded device, and then displays the first graphics screen by the display screen of the embedded device. .

Step 305: The intermediate layer acquires first response information from the graphics processor.

Here, the first response information is used to indicate whether the graphics processor successfully renders the graphic data by using the processing task and the configuration information;

Step 306: The middle layer carries the first response information in the call response, and returns the call response to the application layer.

Here, the application layer refers to a graphics library in the application layer, such as an embedded GUI, wherein the embedded GUI mainly includes OpenGUI, Microwindows, QT/Embedded, MiniGUI, and the like.

In the embodiment of the present invention, the method further includes steps 307 to 309, wherein:

Step 307, when the system on chip does not support hardware acceleration, the intermediate layer buffers the configuration information, the graphics data, and the processing task in a frame buffer device.

Step 308: The intermediate layer acquires second response information from the frame buffering device, where the second response information is used to indicate whether the central processor successfully renders the graphic data by using the processing task and the configuration information.

Here, the central processing unit draws the graphic data according to the processing task and the configuration information to obtain a second graphic image; wherein the second graphic image is a central processing unit according to the processing task and the The process of the second graphic picture obtained by the central processing unit is similar to the process of obtaining the first graphic picture by the graphic processor, so it will not be described here.

Step 309: The middle layer carries the second response information in the call response, and returns the call response to the application layer.

Here, the first graphic picture may be the same as or different from the second graphic picture.

In the embodiment of the present invention, before the intermediate layer outputs the first graphics image to the frame buffer device, the method further includes: after the intermediate layer performs anti-flicker processing on the first graphics image, a three graphics picture; correspondingly, the intermediate layer outputs the third graphics picture to a frame buffer device.

Embodiment 4

Based on the foregoing third embodiment, the embodiment of the present invention provides a graphics drawing method, where the method is applied to an embedded device, and the function implemented by the method can be implemented by calling a program code of a DirectFB graphics library by a CPU in the embedded device. Of course, the program code of the DirectFB graphics library can be saved in a computer storage medium. As can be seen, the embedded device includes at least a processor and a storage medium.

4 is a schematic flowchart of an implementation process of a graphic drawing method according to Embodiment 4 of the present invention. As shown in FIG. 4, the graphic drawing method includes:

Step 401, the DirectFB graphics library receives an application layer call request;

Step 402: The DirectFB graphics library initializes in response to the call request.

Specifically, when the DirectFB graphics library performs graphics initialization operations, the DirectFBInit(&argc,&argv) function and the DirectFBCreate(&dfb) function are finally called. The role of these two functions is to initialize the entire DirectFB graphics library, as well as the actual operation for the subsequent drawing and other operations. Ready. During the initialization process (see

steps

421, 422, 423, and 424), the DirectFB graphics library controls the Frame Buffer driver to obtain configuration information about the OSD register of the Linux kernel, and the related configuration information is used to allocate memory, etc., where configuration information It mainly includes parameter information such as display address and display resolution. Among them, DirectFBInit () function, mainly to read the system and user-defined configuration information (configuration), processing command lines, reading environment variables. The DirectFBCreate() function is used to complete a series of initializations and save various required information in the data structure pointed to by IDirectFB for subsequent use by the user.

Step 403, the DirectFB graphics library determines whether the system on chip supports hardware acceleration, if yes, proceeds to step 404, otherwise, proceeds to step 405;

Step 404, the DirectFB graphics library performs software drawing;

Here, based on the architecture shown in Figure 1-1, the graphics are drawn by the drawing method of the DirectFB graphics library.

Step 405, the DirectFB graphics library performs hardware drawing;

Specifically, the graphics are drawn by the graphics processor based on the architecture shown in FIGS. 1-2.

Step 406, the DirectFB graphics library determines whether anti-flicker processing is supported, if yes, proceed to step 407, otherwise, proceed to step 408;

In step 407, the DirectFB graphics library performs anti-flicker processing.

At step 408, the process ends.

In the above 403 to step 405, the DirectFB graphics library will check whether the system has the presence of a graphics processor, and if so, perform hardware drawing, and if not, perform software drawing. In addition, the premise of hardware drawing is that the corresponding hardware module is required to implement the interface function provided by the DirectFB graphics library. In the process of implementation, the graphics processor can implement the corresponding acceleration function according to the requirements of the DirectFB graphics library. Of course, the DirectFB graphics library can manually open or close the no-hardware option through the configuration file (directfbrc) file to further select whether hardware is needed. Drawing.

Embodiment 5

The following describes the way the DirectFB graphics library combines software to perform graphics processing. The disadvantage of this software method is that the performance is relatively low, and when the graphic display of the complex scene is performed, there is a problem that the screen display is not smooth enough. The software method mainly calls the following functions, which are the standard functions provided by the DirectFB graphics library as follows:

Void gFillRectangle(CardState*state,DFBRectangle*rect);

Void gDrawLine(CardState*state,DFBRegion*line);

Void gBlit(CardState*state, DFBRectangle*rect, int dx, int dy);

Void gStretchBlit(CardState*state, DFBRectangle*srect, DFBRectangle*drect);

Embodiment 6

The following describes the DirectFB graphics library combined with hardware (ie graphics processor) for graphics processing. Compared with the software mode, the hardware method has the advantages of improving the speed of graphics processing and significantly improving system performance. The main function called in this hardware mode is the hardware docking function provided by DirectFB, and it needs to implement the 2D hardware driver module. The main function of this hardware mode is as follows:

Bool(*Blit)(void*driver_data,void*device_data,DFBRectangle*rect,int dx,int dy);

Bool(*DrawLine)(void*driver_data,void*device_data,DFBRegion*line);

Bool(*FillTriangle)(void*driver_data,void*device_data,DFBTriangle*tri);

Bool(*StretchBlit)(void*driver_data,void*device_data,DFBRectangle*srect,DFBRectangle*drect);

In the following, the fifth embodiment and the sixth embodiment are as shown in Table 1:

Table 1

In Table 1, from line 07 to line 18, the environment in which the software mode and the hardware mode are located is the same, and the effect of the software mode and the hardware mode indicated by lines 01 to 06, The six indicators from line 01 to line 06 show that the hardware approach is far superior to the software approach.

Example 7

The following describes the anti-flicker processing. Due to the OSD hardware itself, the graphics display has obvious jitter for interlaced video output. Anti-flicker processing is implemented on the basis of software mode and hardware mode. Anti-flicker processing can improve interlaced graphics display. the quality of. The anti-flicking algorithm is specifically implemented by the following function.

Void cvbs_anti_shake_neon(u8 *src_addr, u8 *dst_addr, u32 pitch, DFBRectangle*rect, u8 factor_1, u8 factor_2, u8 factor_3);

Comparing Example 5 and Embodiment 6, this anti-flickering method does not have flicker and jitter on the screen from an intuitive point of view.

Example eight

Based on the foregoing embodiments, an embodiment of the present invention provides a system on chip, where the system on chip includes a central processing unit, a graphics processor, and a frame buffering device, where:

a central processing unit configured to run an intermediate layer;

a frame buffer device configured to acquire the configuration information, graphics data, and the intermediate layer Processing tasks;

In the embodiment of the present invention, the graphics processor and the central processing unit output the completed graphic image (for example, the first graphic image, the second graphic image, and the third graphic image) to the frame buffer device, and then the graphic image directly passes through the VOU. The OSD driver docks the display interface of other display interfaces directly to the embedded device. In general, the middle layer will carry the rendering success or not information in the call response, and return the call response to the application layer.

In the embodiment of the invention, the graphics processor is a Vivante 2D graphics processor.

In the embodiment of the present invention, the frame buffer device is driven by a video output unit.

In the embodiment of the present invention, the second graphic screen is the same as or different from the first graphic image.

In the embodiment of the present invention, the graphic data includes one or more graphic elements, and position coordinates of each of the graphic elements, and the processing task includes a graphic operation corresponding to the graphic elements.

In the embodiment of the present invention, the intermediate layer is configured to receive a call request of an application layer, where the call request carries graphic data to be drawn and a processing task corresponding to the graphic data;

The middle layer is further configured to perform its own initialization in response to the call request;

After the initialization is completed, the middle layer is further configured to determine whether the system on chip supports hardware acceleration;

When the system on chip supports hardware acceleration, the middle layer is further configured to display the graphic data And the processing task is handed over to the graphics processor for drawing;

The intermediate layer is further configured to obtain first response information from the graphics processor, where the first response information is used to indicate whether the graphics processor successfully renders the graphic data by using the processing task and the configuration information ;

The middle layer is further configured to carry the first response information in the call response, and return the call response to the application layer.

Example nine

Based on the foregoing embodiments, the embodiment of the present invention further provides an intermediate layer. FIG. 5-1 is a schematic structural diagram 1 of an intermediate layer according to Embodiment 9 of the present invention. As shown in FIG. 5-1, the intermediate layer 500 includes the first layer. The receiving unit 501, the initializing unit 502, the determining unit 503, the drawing unit 504, the first obtaining unit 505, and the output unit 506, wherein:

The first receiving unit 501 is configured to receive a call request of an application layer, where the call request carries graphic data to be drawn and a processing task corresponding to the graphic data;

The initialization unit 502 is configured to perform initialization of itself to obtain configuration information in response to the call request;

Here, the initialization unit is configured to: the intermediate layer controls the frame buffer device to acquire configuration information of a video output unit (VOU) register, and the configuration information includes a display address and a display resolution.

The determining unit 503 is configured to determine whether the system on chip supports hardware acceleration after the initialization is completed;

The drawing unit 504 is configured to: when the system on chip supports hardware acceleration, submit the configuration information, the graphic data, and the processing task to a graphics processor for drawing;

The first obtaining unit 505 is configured to acquire first response information from the graphics processor, where the first response information is used to indicate whether the graphics processor uses the processing task and the configuration information to view the graphic The data was successfully drawn;

The output unit 506 is configured to carry the first response information in a call response, and return the call response to the application layer.

In the embodiment of the present invention, as shown in FIG. 5-2, the intermediate layer 500 further includes a buffer unit 507 and a second obtaining unit 508, where:

The buffer unit 508 is configured to buffer configuration information, the graphics data, and the processing task in a frame buffer device when the system on chip does not support hardware acceleration;

The second obtaining unit 509 is configured to acquire second response information from the frame buffering device, where the second response information is used to indicate whether the central processing unit uses the processing task and the configuration information to view the graphic The data was successfully drawn;

Correspondingly, the output unit is configured to carry the second response information in a call response, and return the call response to the application layer.

In the embodiment of the present invention, the intermediate layer further includes a processing unit, configured to perform anti-flicker processing on the first graphic image to obtain a third graphic image; correspondingly, the intermediate layer displays the third graphic image Output to the frame buffer device.

It should be noted here that the description of the above intermediate layer embodiment is similar to the description of the above embodiment, and has similar advantageous effects as the above embodiment, and therefore will not be described again. For the technical details that are not disclosed in the embodiment of the present invention, please refer to the description of the above embodiments of the present invention, and the details are not described herein.

In the embodiment of the present invention, the first receiving unit, the initializing unit, the determining unit, the drawing unit, the first obtaining unit, and the output unit, which are included in the intermediate layer, may be implemented by a central processing unit in the terminal, and may also pass logic. The circuit is implemented. In a specific embodiment, the central processing unit may be a microprocessor (MPU), a digital signal processor (DSP), or a field programmable gate array (FPGA).

Example ten

Based on the foregoing embodiments, an embodiment of the present invention provides an embedded device, and FIG. 6 is a A schematic diagram of a composition structure of an embedded device, as shown in FIG. 6, the embedded device 600 includes a display screen 601 and a system on chip 500, wherein: the system on chip further includes a central processing unit, a graphics processor, and a frame buffer. Equipment, where:

a central processing unit configured to run an intermediate layer;

a graphics processor configured to acquire graphics data to be drawn and processing tasks corresponding to the graphics data from the intermediate layer;

The graphics processor is further configured to: draw the graphics data according to the processing task, obtain a first graphics image, and output the first graphics image to a frame buffer device;

a frame buffering device configured to acquire the graphic data and the processing task by the intermediate layer;

a frame buffer device, further configured to buffer the graphics data and the processing task;

The central processing unit is further configured to: acquire the graphic data and the processing task from the frame buffer device, and draw the graphic data according to the processing task to obtain a second graphic image;

a frame buffering device, configured to acquire a second graphics picture from the central processing unit, output the second graphics picture, and acquire a first graphics picture from the graphics processor, and the first graphics picture Output

In the embodiment of the present invention, the embedded device includes a terminal device such as a set top box, a smart phone, a tablet computer, a navigator, a car TV, and a personal digital assistant.

It should be noted that the description of the above embedded device embodiment item is similar to the description of the above embodiment, and has the same advantageous effects as the above embodiment, and therefore will not be described again. For the details of the technical solutions that are not disclosed in the embodiments of the present invention, those skilled in the art can understand the description of the foregoing embodiments of the present invention.

It should be noted that, in the embodiment of the present invention, if the graphic drawing method executed by the above intermediate layer is implemented in the form of a software function module, and is sold or used as an independent product, it may also be stored in a computer readable storage. In the medium. Based on such understanding, the present invention is implemented The technical solution of the example or the contribution to the prior art may be embodied in the form of a software product stored in a storage medium, including a plurality of instructions for causing a computer device (may be A personal computer, server, or network device, etc.) performs all or part of the methods described in various embodiments of the present invention. The foregoing storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read only memory (ROM), a magnetic disk, or an optical disk. Thus, embodiments of the invention are not limited to any specific combination of hardware and software.

Correspondingly, the embodiment of the present invention further provides a computer storage medium, where the computer storage medium stores computer executable instructions for executing a graphic drawing method performed by an intermediate layer in the embodiment of the present invention.

It is to be understood that the phrase "one embodiment" or "an embodiment" or "an" Thus, "in one embodiment" or "in an embodiment" or "an" In addition, these particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. It should be understood that, in various embodiments of the present invention, the size of the sequence numbers of the above processes does not mean the order of execution, and the order of execution of each process should be determined by its function and internal logic, and should not be taken to the embodiments of the present invention. The implementation process constitutes any limitation. The serial numbers of the embodiments of the present invention are merely for the description, and do not represent the advantages and disadvantages of the embodiments.

It is to be understood that the term "comprises", "comprising", or any other variants thereof, is intended to encompass a non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes those elements. It also includes other elements that are not explicitly listed, or elements that are inherent to such a process, method, article, or device. An element that is defined by the phrase "comprising a ..." does not exclude the presence of additional equivalent elements in the process, method, item, or device that comprises the element.

In the several embodiments provided by the present application, it should be understood that the disclosed apparatus and method, It can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of the unit is only a logical function division. In actual implementation, there may be another division manner, such as: multiple units or components may be combined, or Can be integrated into another system, or some features can be ignored or not executed. In addition, the coupling, or direct coupling, or communication connection of the components shown or discussed may be indirect coupling or communication connection through some interfaces, devices or units, and may be electrical, mechanical or other forms. of.

The units described above as separate components may or may not be physically separated, and the components displayed as the unit may or may not be physical units; they may be located in one place or distributed on multiple network units; Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may be separately used as one unit, or two or more units may be integrated into one unit; The unit can be implemented in the form of hardware or in the form of hardware plus software functional units.

It will be understood by those skilled in the art that all or part of the steps of implementing the foregoing method embodiments may be performed by hardware related to program instructions. The foregoing program may be stored in a computer readable storage medium, and when executed, the program includes The foregoing steps of the method embodiment; and the foregoing storage medium includes: a removable storage device, a read only memory (ROM), a magnetic disk, or an optical disk, and the like, which can store program codes.

Alternatively, the above-described integrated unit of the present invention may be stored in a computer readable storage medium if it is implemented in the form of a software function module and sold or used as a standalone product. Based on such understanding, the technical solution of the embodiments of the present invention may be embodied in the form of a software product in essence or in the form of a software product stored in a storage medium, including a plurality of instructions. Enabling a computer device (which may be a personal computer, server, or network device, etc.) to perform all of the methods of the various embodiments of the present invention or section. The foregoing storage medium includes various media that can store program codes, such as a mobile storage device, a ROM, a magnetic disk, or an optical disk.

The above is only a specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily think of changes or substitutions within the technical scope of the present invention. It should be covered by the scope of the present invention. Therefore, the scope of the invention should be determined by the scope of the appended claims.

Industrial applicability

In the embodiment of the present invention, the central processing unit runs an intermediate layer; the graphics processor acquires configuration information, graphic data to be drawn, and processing tasks corresponding to the graphic data from the intermediate layer; the graphics processor according to the processing task And drawing, by the configuration information, the graphic data to obtain a first graphic image, and outputting the first graphic image to a frame buffer device; the intermediate layer of the frame buffering device acquiring the configuration information, the graphic data, and the a processing task; a frame buffer device buffering the configuration information, graphics data, and the processing task; the central processor acquiring the configuration information, the graphics data, and the processing task from a frame buffer device, according to the processing And the configuration information is used to draw the graphic data to obtain a second graphic image; the frame buffering device acquires a second graphic image from the central processing unit, and outputs the second graphic image, and the graphic image The processor acquires the first graphics picture and outputs the first graphics picture; thus, the integrity of the system on a chip can be improved Thereby increasing the speed of the graphics display, and ultimately improve the user experience.

Claims

A system on a chip, the system on a chip comprising a central processing unit, a graphics processor, and a frame buffering device, wherein:

a central processing unit configured to run an intermediate layer;

a graphics processor configured to acquire configuration information, graphics data to be drawn, and processing tasks corresponding to the graphics data from the intermediate layer;

The graphics processor is further configured to: draw the graphics data according to the processing task and the configuration information, obtain a first graphics image, and output the first graphics image to a frame buffer device;

a frame buffering device configured to acquire the configuration information, the graphic data, and the processing task by the intermediate layer;

a frame buffer device, further configured to buffer the configuration information, graphics data, and the processing task;

The central processing unit is further configured to: acquire the configuration information, the graphic data, and the processing task from a frame buffer device, and draw the graphic data according to the processing task and the configuration information to obtain a second graphic Picture

a frame buffering device, configured to acquire a second graphics picture from the central processing unit, and output the second graphics picture; acquire a first graphics picture from the graphics processor, and output the first graphics picture .
The system on chip of claim 1, wherein the second graphics picture is the same as or different from the first graphics picture.
The system-on-chip according to claim 1 or 2, wherein said graphic data includes one or more graphic elements, and position coordinates of each of said graphic elements, said processing task including corresponding to said graphic elements Graphical operations.
The system on chip according to claim 1 or 2, wherein said intermediate layer is configured Receiving a call request of an application layer, where the call request carries graphic data to be drawn and a processing task corresponding to the graphic data;

The middle layer is further configured to perform its own initialization in response to the call request;

After the initialization is completed, the middle layer is further configured to determine whether the system on chip supports hardware acceleration;

When the system on chip supports hardware acceleration, the intermediate layer is further configured to submit the graphics data and the processing task to the graphics processor for drawing;

The intermediate layer is further configured to obtain first response information from the graphics processor, where the first response information is used to indicate whether the graphics processor successfully renders the graphic data by using the processing task and the configuration information ;

The middle layer is further configured to carry the first response information in the call response, and return the call response to the application layer.
A graphic drawing method, the method comprising:

The middle layer receives a call request of the application layer, where the call request carries graphic data to be drawn and a processing task corresponding to the graphic data;

The middle layer responds to the call request, performs its own initialization to obtain configuration information;

After the initialization is completed, the middle layer determines whether the system on chip supports hardware acceleration;

When the system on chip supports hardware acceleration, the middle layer hands the configuration information, the graphics data, and the processing task to the graphics processor for drawing;

The intermediate layer obtains first response information from the graphics processor, where the first response information is used to indicate whether the graphics processor successfully renders the graphic data by using the processing task and the configuration information;

The middle layer carries the first response information in the call response, and returns the call response to the application layer.
The method of claim 5, wherein the method further comprises: when the slice When the upper system does not support hardware acceleration, the middle layer buffers the configuration information, the graphic data, and the processing task in the frame buffer device;

The intermediate layer obtains second response information from the frame buffering device, where the second response information is used to indicate whether the central processor successfully renders the graphic data by using the processing task and the configuration information;

The middle layer carries the second response information in the call response, and returns the call response to the application layer.
The method according to claim 5, wherein the intermediate layer performs initialization of itself to obtain configuration information in response to the invoking request, including:

The middle layer controls the frame buffer device to obtain configuration information of the video output unit VOU register, and the configuration information includes a display address and a display resolution.
The method according to any one of claims 5 to 7, wherein before the intermediate layer outputs the first graphics picture to the frame buffer device, the method further comprises:

After the intermediate layer performs anti-flicker processing on the first graphics picture, a third graphics picture is obtained; correspondingly, the intermediate layer outputs the third graphics picture to the frame buffer device.
An intermediate layer includes a first receiving unit, an initializing unit, a determining unit, a drawing unit, a first obtaining unit, and an output unit, wherein:

The first receiving unit is configured to receive a call request of an application layer, where the call request carries graphic data to be drawn and a processing task corresponding to the graphic data;

The initialization unit is configured to perform initialization of itself to obtain configuration information in response to the call request;

The determining unit is configured to determine whether the system on chip supports hardware acceleration after the initialization is completed;

The drawing unit is configured to: when the system on chip supports hardware acceleration, submit the configuration information, the graphic data, and the processing task to a graphics processor for drawing;

The first obtaining unit is configured to acquire first response information from the graphics processor, where the first response information is used to indicate whether the graphics processor uses the processing task and the configuration information to the graphics data Successfully drawn;

The output unit is configured to carry the first response information in a call response, and return the call response to the application layer.
An embedded device comprising a display screen and a system on chip, wherein: the system on a chip comprises a central processing unit, a graphics processor and a frame buffering device, wherein:

a central processing unit configured to run an intermediate layer;

a graphics processor configured to acquire configuration information, graphics data to be drawn, and processing tasks corresponding to the graphics data from the intermediate layer;

The graphics processor is further configured to: draw the graphics data according to the processing task, obtain a first graphics image, and output the first graphics image to a frame buffer device;

a frame buffer device configured to acquire the configuration information, the graphic data, and the processing task by the intermediate layer;

a frame buffer device, further configured to buffer the configuration information, the graphics data, and the processing task;

The central processing unit is further configured to: acquire the configuration information, the graphic data, and the processing task from the frame buffer device, and draw the graphic data according to the processing task and the configuration information to obtain a second graphic image;

a frame buffer device, configured to acquire a second graphics screen from the central processor, and output the second graphics screen;

The display screen is configured to display a first graphic picture or a second graphic picture.
A computer storage medium having stored therein computer executable instructions for performing the graphics rendering method of any one of claims 5 to 8.