+

WO2013032645A3 - Real-time clock integrated circuit with time code receiver, method of operation thereof and devices incorporating the same - Google Patents

Real-time clock integrated circuit with time code receiver, method of operation thereof and devices incorporating the same Download PDF

Info

Publication number
WO2013032645A3
WO2013032645A3 PCT/US2012/049843 US2012049843W WO2013032645A3 WO 2013032645 A3 WO2013032645 A3 WO 2013032645A3 US 2012049843 W US2012049843 W US 2012049843W WO 2013032645 A3 WO2013032645 A3 WO 2013032645A3
Authority
WO
WIPO (PCT)
Prior art keywords
integrated circuit
real
devices incorporating
same
code receiver
Prior art date
Application number
PCT/US2012/049843
Other languages
French (fr)
Other versions
WO2013032645A2 (en
Inventor
Oren E. Eliezer
Thomas Jung
Stephan MORRISON
Mary COOLEY
Original Assignee
Xw, Llc Dba Xtendwave
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US13/297,768 external-priority patent/US20130051184A1/en
Application filed by Xw, Llc Dba Xtendwave filed Critical Xw, Llc Dba Xtendwave
Publication of WO2013032645A2 publication Critical patent/WO2013032645A2/en
Publication of WO2013032645A3 publication Critical patent/WO2013032645A3/en

Links

Classifications

    • G—PHYSICS
    • G04—HOROLOGY
    • G04R—RADIO-CONTROLLED TIME-PIECES
    • G04R20/00—Setting the time according to the time information carried or implied by the radio signal
    • G04R20/08—Setting the time according to the time information carried or implied by the radio signal the radio signal being broadcast from a long-wave call sign, e.g. DCF77, JJY40, JJY60, MSF60 or WWVB
    • G04R20/10—Tuning or receiving; Circuits therefor

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Electric Clocks (AREA)

Abstract

An integrated circuit (IC), a method of operating the IC and devices incorporating the IC. In one embodiment, the IC includes: (1) a monolithic substrate and (2) a time code receiver supported by the monolithic substrate and configured to receive a timing signal and employ the timing signal to adjust a local oscillator of a real time clock (RTC).
PCT/US2012/049843 2011-08-26 2012-08-07 Real-time clock integrated circuit with time code receiver, method of operation thereof and devices incorporating the same WO2013032645A2 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201161527979P 2011-08-26 2011-08-26
US61/527,979 2011-08-26
US13/297,768 US20130051184A1 (en) 2011-08-26 2011-11-16 Real-time clock integrated circuit with time code receiver, method of operation thereof and devices incorporating the same
US13/297,768 2011-11-16

Publications (2)

Publication Number Publication Date
WO2013032645A2 WO2013032645A2 (en) 2013-03-07
WO2013032645A3 true WO2013032645A3 (en) 2013-04-25

Family

ID=47757114

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2012/049843 WO2013032645A2 (en) 2011-08-26 2012-08-07 Real-time clock integrated circuit with time code receiver, method of operation thereof and devices incorporating the same

Country Status (1)

Country Link
WO (1) WO2013032645A2 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005274349A (en) * 2004-03-24 2005-10-06 Citizen Electronics Co Ltd Clock unit for radio controlled timepiece, and manufacturing method therefor
US20070159928A1 (en) * 2006-01-12 2007-07-12 Shoji Nirasawa Digital display type radio-corrected timepiece and standard wave receiving method of the timepiece
EP2293158A2 (en) * 2009-09-01 2011-03-09 Seiko Epson Corporation Timepiece with internal antenna

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005274349A (en) * 2004-03-24 2005-10-06 Citizen Electronics Co Ltd Clock unit for radio controlled timepiece, and manufacturing method therefor
US20070159928A1 (en) * 2006-01-12 2007-07-12 Shoji Nirasawa Digital display type radio-corrected timepiece and standard wave receiving method of the timepiece
EP2293158A2 (en) * 2009-09-01 2011-03-09 Seiko Epson Corporation Timepiece with internal antenna

Also Published As

Publication number Publication date
WO2013032645A2 (en) 2013-03-07

Similar Documents

Publication Publication Date Title
WO2009149104A3 (en) Time, frequency, and location determination for femtocells
EP2384086A4 (en) SUBSTRATE FOR ELECTRONIC DEVICE, AS WELL AS ELECTRONIC DEVICE USING THE SAME
WO2007149212A3 (en) Rfid device with first clock for data acquisition and/or calibration of second clock
WO2012121892A3 (en) Delay circuitry
EP2161630A3 (en) Electronic device and method providing improved indication that an alarm clock is in an on condition
EP2128996A4 (en) HIGH FREQUENCY CIRCUIT, HIGH FREQUENCY COMPONENT AND COMMUNICATION DEVICE
JP2011220998A5 (en) Correlation operation method, satellite signal acquisition method, correlation operation circuit and electronic device
WO2012027708A3 (en) Operation of a computing device involving wireless tokens
WO2006121497A3 (en) Accurate persistent nodes
WO2012118714A3 (en) Timing calibration for multimode i/o systems
WO2012067884A3 (en) Techniques for wakeup signaling for a very low power wlan device
EP2565735A3 (en) Electronic timepiece and electronic device
FR2965082B1 (en) METHOD AND DEVICE FOR INDUCTIVE COUPLING ACTIVATED LOAD MODULATION
DE602004006418D1 (en) RUNNING CIRCUIT FOR A DELAY RULE
TW200633393A (en) Semiconductor device and electronic apparatus using the same
TW201130229A (en) Delay locked loop and method of driving delay locked loop
WO2012074711A3 (en) Integrated circuit device having an injection-locked oscillator
WO2010056611A3 (en) System and method for determining the location of a mobile device
GB2447362A (en) Receive clock deskewing method,apparatus and system
WO2008024659A3 (en) Circuits to delay a signal from a memory device
WO2013188272A3 (en) Optimizing power in a memory device
WO2011010146A3 (en) Real-time clock
GB201201530D0 (en) A method and arrangement
WO2012164452A3 (en) Vlsi circuit verification
GB2464041A (en) Clock shifting and prioritization system and method

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 12753858

Country of ref document: EP

Kind code of ref document: A2

NENP Non-entry into the national phase

Ref country code: DE

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 30/06/2014)

122 Ep: pct application non-entry in european phase

Ref document number: 12753858

Country of ref document: EP

Kind code of ref document: A2

点击 这是indexloc提供的php浏览器服务，不要输入任何密码和下载