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WO2013018842A1 - Dispositif à semi-conducteur et son procédé de fabrication - Google Patents

Dispositif à semi-conducteur et son procédé de fabrication Download PDF

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Publication number
WO2013018842A1
WO2013018842A1 PCT/JP2012/069627 JP2012069627W WO2013018842A1 WO 2013018842 A1 WO2013018842 A1 WO 2013018842A1 JP 2012069627 W JP2012069627 W JP 2012069627W WO 2013018842 A1 WO2013018842 A1 WO 2013018842A1
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Prior art keywords
insulating film
layer
upper electrode
resistance change
variable resistance
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Application number
PCT/JP2012/069627
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English (en)
Japanese (ja)
Inventor
阪本　利司
宗弘 多田
信 宮村
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日本電気株式会社
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Publication of WO2013018842A1 publication Critical patent/WO2013018842A1/fr

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H10N70/24—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
    • H10N70/245—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies the species being metal cations, e.g. programmable metallization cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/821—Device geometry
    • H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/841—Electrodes
    • H10N70/8416—Electrodes adapted for supplying ionic species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/883—Oxides or nitrides
    • H10N70/8833—Binary metal oxides, e.g. TaOx

Definitions

  • the present invention is based on the priority claim of Japanese patent application: Japanese Patent Application No. 2011-169399 (filed on August 2, 2011), the entire content of which is incorporated herein by reference. Shall.
  • the present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly, a semiconductor device in which a programmable logic device or a nonvolatile memory device having a resistance variable nonvolatile element (hereinafter referred to as “resistance variable element”) is provided in a multilayer wiring layer, and It relates to the manufacturing method.
  • the resistance change element whose resistance is changed by applying a voltage can be used as a nonvolatile memory or a nonvolatile switch.
  • a non-volatile memory it is advantageous in that it can operate at a low voltage and can read out information faster than a conventional flash memory.
  • a non-volatile switch by using it as a switch in a programmable logic device, the element size is greatly reduced, and further improvement in power consumption and operation speed is expected.
  • the resistance change element is divided into a unipolar type and a bipolar type from the electric conduction characteristics.
  • a unipolar variable resistance element does not depend on the polarity of the applied voltage, and its resistance changes depending on the magnitude of the applied voltage.
  • the resistance of the bipolar variable resistance element changes depending on the polarity of the applied voltage.
  • FIG. 8A shows the resistance change element 10.
  • the resistance change element 10 has a structure in which the resistance change layer 13 is sandwiched between two electrodes (first electrode 11 and second electrode 12). The difference in electrode material, the resistance change layer material, etc. makes the electric conduction characteristics bipolar.
  • the electrode used for the bipolar variable resistance element is defined as follows. When a voltage is applied between the electrodes, a transition is made to a low resistance (on state) in the case of a high resistance (off state), and a low resistance state is maintained in the case of a low resistance. The higher potential at this time is defined as “first electrode”, and the lower potential is defined as “second electrode”.
  • FIGS. 8B and 8C respectively show a connection method for transitioning states and a schematic diagram of current-voltage characteristics.
  • the first electrode 11 is connected to the first node 14 to which the voltage source 16 is connected, and the second electrode is connected to the second node 15 that is grounded.
  • a positive voltage is applied to the voltage source.
  • the resistance change element 10 when the variable resistance element 10 is in the on state, there is no change in resistance, and the voltage and current are proportional.
  • the resistance change element 10 when the resistance change element 10 is in the off state, the resistance change element 10 changes from the off state to the on state at a certain threshold voltage. The change from the off state to the on state is called “set operation”, and the threshold voltage at that time is called “set voltage”.
  • a negative voltage is applied to the voltage source. When the variable resistance element 10 is in the off state, no current changes and no current flows.
  • the resistance change element 10 when the resistance change element 10 is in the on state, the state changes from an on state in which current flows at a certain threshold voltage to an off state in which no current flows.
  • the change from the on state to the off state is called “reset operation”, and the threshold voltage at that time is called “reset voltage”.
  • Patent Document 1 Non-Patent Document 1, and Patent Document 2 describe an example of a resistance change element using a metal precipitation phenomenon by an electrochemical reaction.
  • the variable resistance layer in the variable resistance element is an ion conductive layer capable of conducting metal ions
  • the first electrode is an oxidizable electrode that is oxidized by applying a voltage and supplies the metal ions to the variable resistance layer.
  • the second electrode is an electrode that does not participate in an electrochemical reaction such as an oxidation-reduction reaction.
  • a positive voltage is applied to the first electrode.
  • a part of the metal of the first electrode is converted into metal ions by an electrochemical reaction (oxidation reaction) and dissolved in the ion conductive layer.
  • metal ions in the ion conductive layer are deposited (reduced) as a metal at the interface between the second electrode and the resistance change layer, and a metal bridge in which the first electrode and the second electrode are connected is formed.
  • the first electrode and the second electrode are electrically connected via the metal bridge, so that the low resistance state (ON state) is obtained.
  • a negative voltage is applied to the first electrode. When a negative voltage is applied, a part of the metal bridge is cut and transitions to a high resistance state (off state).
  • metal ions are used as metal ions
  • copper is used as the first electrode serving as a supply source thereof
  • metal oxides such as tantalum oxide are used as an ion conductive layer, which further contributes to the reaction.
  • Platinum or ruthenium is used as the second electrode that is difficult to perform.
  • variable resistance element When the variable resistance element described above is used together with a conventional semiconductor element in a semiconductor integrated circuit (LSI; Large Scale Integration), the guaranteed operation period of the element is required to be 10 years or more, which is the same as that of the semiconductor element.
  • LSI semiconductor integrated circuit
  • the conventional resistance change element there is a problem of malfunction that even when the applied voltage is equal to or lower than the threshold voltage that causes the resistance change, the state transitions to another state due to deterioration over time. The problem caused by this malfunction is called “disturbance failure”. For example, in FIG. 8C, it is necessary to apply a voltage higher than the set voltage to the resistance change element to make a transition from the off state to the on state, while the resistance change element in the off state is the LSI operating voltage.
  • FIG. 9 shows a case where the first electrodes 11 of FIG. 8 are connected.
  • the electrodes to be connected can have a simpler structure by sharing one electrode.
  • FIG. 9 (b) shows the switch structure of FIG. 9 (a) with symbols.
  • the second node 27 is the first electrode 21, the first node 26 is the second electrode 23, and the third node 28 is the second electrode. 25.
  • the variable resistance element described above is formed in a multilayer wiring of an LSI.
  • the wiring material of the multilayer wiring is mainly composed of copper, and a method of efficiently forming a resistance change element in the multilayer copper wiring is desired.
  • Patent Document 3 and Non-Patent Document 2 disclose a technique for integrating a resistance change element using an electrochemical reaction in a semiconductor device. According to them, as shown in FIG. 10, the resistance change element is formed between two copper wirings (first copper wiring 31 and second copper wiring 35). A technique that also serves as one electrode is described.
  • the first copper wiring 31 is a wiring that goes in a direction perpendicular to the paper surface
  • the second copper wiring 35 is a wiring that goes in a direction parallel to the paper surface.
  • the resistance change element includes a first copper wiring 31 that also serves as a first electrode, a resistance change layer 33, and a second electrode 32.
  • the second electrode 32 and the second copper wiring 35 are electrically connected by a via 34.
  • FIG. 11 shows an example in which a resistance change element (see FIG. 8) is used for a crossbar switch.
  • the crossbar switch is a switch for selecting whether the respective lines are electrically connected or not connected to the intersections of the input lines X1 to XN, the output lines Y1 to YN, and the input line and the output line. It consists of a change element.
  • the crossbar switch is an important component of a programmable device such as an FPGA (Field Programmable Gate Array).
  • Non-Patent Document 2 describes a 32 ⁇ 32 crossbar switch using a resistance change element.
  • the crossbar switch is formed in a multilayer copper wiring, and the output line and the input line are each formed of a copper wiring.
  • FIG. 8 shows an example in which a resistance change element (see FIG. 8) is used for a crossbar switch.
  • the crossbar switch is a switch for selecting whether the respective lines are electrically connected or not connected to the intersections of the input lines X1 to XN
  • the cross section of the intersection of the input line and the output line is as shown in FIG. If the minimum feature size of the wiring and F, 1 single element of the crossbar switch is vertical and horizontal length is 2F, the area is 4F 2.
  • the copper wiring width and the distance between the wirings are equal to F.
  • FIG. 12 shows a crossbar switch using a complementary resistance change element (see FIG. 9).
  • the crossbar switch is a switch for selecting whether to electrically connect or not connect each of the input lines X1 to XN, the output lines Y1 to YN, and the intersection of the input line and the output line. It consists of a variable resistance element.
  • the input lines X1 to XN and the output lines Y1 to YN in FIG. 12 are copper wirings.
  • one element of the crossbar switch requires an area of 36F 2 according to the inventors' estimation, and requires 9 times as much area as the crossbar switch using the resistance change element of FIG. To do.
  • the main object of the present invention is to provide a semiconductor device and a method for manufacturing the same that can reduce the number of steps or make the area of the resistance change element as small as possible.
  • a semiconductor device having two or more variable resistance elements inside a multilayer wiring layer on a semiconductor substrate, wherein the variable resistance element is interposed between a lower electrode and an upper electrode.
  • a variable resistance layer with variable resistance is interposed, and the wiring of a predetermined wiring layer in the multilayer wiring layer also serves as the lower electrode, and the upper electrode is formed in a line extending in one direction. And also serves as an upper electrode of another first variable resistance element adjacent to the variable resistance element along the one direction.
  • variable resistance elements are provided in the multilayer wiring layer, and are arranged in a two-dimensional array. It is formed in a line extending in a direction perpendicular to the direction, and also serves as a lower electrode of another second variable resistance element adjacent to the variable resistance element along the right direction in one direction. preferable.
  • the lower electrode includes a material serving as a metal ion supply source
  • the upper electrode is formed of a material that is less likely to be ionized than the lower electrode
  • the resistance change layer includes the metal It is preferable that the ion conductive layer is capable of conducting ions.
  • variable resistance layer is disposed so as to overlap the upper electrode.
  • a semiconductor device having two or more complementary variable resistance elements inside a multilayer wiring layer on a semiconductor substrate, wherein the complementary variable resistance element includes a lower electrode and a first electrode.
  • a second resistance whose resistance changes between the lower electrode and the second upper electrode at a position spaced apart from the first upper electrode is interposed between the first resistance change layer whose resistance changes between the upper electrode and the upper electrode.
  • the change layer is interposed, the lower electrode is arranged in a predetermined wiring layer in the multilayer wiring layer, and the first upper electrode is formed in a line extending in one direction, It also serves as a first upper electrode of another first complementary variable resistance element adjacent to the complementary variable resistance element along the one direction.
  • the complementary resistance change element has four or more inside the multilayer wiring layer and is arranged in a two-dimensional array, and the wiring of another predetermined wiring layer in the multilayer wiring layer Is formed in a line extending in a direction perpendicular to the one direction, and is adjacent to the second upper electrode and the complementary resistance change element along the direction perpendicular to the one direction. It is preferable that the second complementary resistance change element is connected to each of the second upper electrodes through vias.
  • the lower electrode extends in a direction perpendicular to the one direction from a region where the first upper electrode and a wiring of another predetermined wiring layer in the multilayer wiring layer overlap. 2 It is preferable that the upper electrode and the wiring of another predetermined wiring layer in the multilayer wiring layer are arranged in a region up to a region where they overlap.
  • the lower electrode includes a material serving as a metal ion supply source
  • the first upper electrode and the second upper electrode are made of a material that is less ionized than the lower electrode
  • the first variable resistance layer and the second variable resistance layer are preferably ion conductive layers capable of conducting the metal ions.
  • the first upper electrode and the second upper electrode are arranged in the same layer, and the first resistance change layer and the second resistance change layer are arranged in the same layer. .
  • the first variable resistance layer is disposed so as to overlap the first upper electrode
  • the second variable resistance layer is disposed so as to overlap the second upper electrode. Is preferred.
  • a step of forming a wiring groove extending in one direction with a predetermined length in the first interlayer insulating film, a step of embedding a lower electrode in the wiring groove, and the lower electrode Including a step of depositing a first barrier insulating film on the first interlayer insulating film, a step of forming two openings communicating with the lower electrode in the first barrier insulating film, and the first including the lower electrode.
  • a line-shaped first upper electrode and a first variable resistance layer extending in a direction perpendicular to the one direction so as to pass over one opening of the opening are formed, and the other opening of the two openings Block-like second upper arranged above Characterized in that it comprises a step of forming an electrode and the second resistance variable layer.
  • a second interlayer insulating layer is formed on the first barrier insulating film including the first upper electrode, the first variable resistance layer, the second upper electrode, and the second variable resistance layer.
  • the copper wiring used conventionally and the via for connecting to the copper wiring become unnecessary, the area of the resistance change element can be reduced, and the production thereof The number of processes can be reduced. Furthermore, the copper wiring that is no longer used can be used for other purposes.
  • FIG. 1A is a top view and FIG. 2B is a cross-sectional view schematically showing a configuration of a variable resistance element in a semiconductor device according to Example 1 of the present invention.
  • A Top view which showed typically the structure of the crossbar switch using the resistance change element formed in the multilayer copper wiring in the semiconductor device based on Example 1 of this invention,
  • (b) (a) It is sectional drawing between XX '. It is process sectional drawing which showed typically the manufacturing method of the crossbar switch using the resistance change element formed in the multilayer copper wiring in the semiconductor device which concerns on Example 1 of this invention.
  • 4A is a top view and FIG.
  • FIG. 5B is a cross-sectional view schematically showing a configuration of a complementary resistance change element in a semiconductor device according to Example 2 of the present invention.
  • A Top view which showed typically the structure of the crossbar switch using the complementary resistance change element formed in the multilayer copper wiring in the semiconductor device based on Example 2 of this invention
  • b (a FIG. 6 is a cross-sectional view taken along the line XX ′ in FIG. It is 1st process sectional drawing which showed typically the manufacturing method of the crossbar switch using the complementary resistance change element formed in the multilayer copper wiring in the semiconductor device which concerns on Example 2 of this invention.
  • the semiconductor device according to Embodiment 1 of the present invention is a semiconductor device having two or more variable resistance elements (100 in FIG. 2) inside a multilayer wiring layer on a semiconductor substrate (101 in FIG. 2),
  • the variable resistance element has a configuration in which a variable resistance layer (111 in FIG. 2) whose resistance changes is interposed between a lower electrode (105 in FIG. 2) and an upper electrode (112 in FIG. 2).
  • a wiring of a predetermined wiring layer in the wiring layer also serves as the lower electrode, and the upper electrode is formed in a line extending in one direction and adjacent to the resistance change element along the one direction. It also serves as the upper electrode of the other first variable resistance element.
  • the semiconductor device according to Embodiment 2 of the present invention is a semiconductor device having two or more complementary resistance change elements (200 in FIG. 5) inside a multilayer wiring layer on a semiconductor substrate (301 in FIG. 5).
  • a complementary resistance change element a first resistance change layer (311 in FIG. 5) whose resistance changes is interposed between the lower electrode (305 in FIG. 5) and the first upper electrode (313 in FIG. 5).
  • a configuration in which a second variable resistance layer (312 in FIG. 5) having a resistance change is interposed between the lower electrode and the second upper electrode (314 in FIG. 5) at a position separated from the first upper electrode.
  • the lower electrode is disposed on a predetermined wiring layer in the multilayer wiring layer, the first upper electrode is formed in a line extending in one direction, and the complementary resistance change element Another first phase adjacent to each other along the one direction with respect to Also serve as the first upper electrode type variable resistance element.
  • a step of forming a wiring groove extending in one direction in the interlayer insulating film (step in FIG. 3A) and a lower electrode are embedded in the wiring groove.
  • a step of forming a communicating opening step of FIG. 3B), a step of depositing a variable resistance layer on the barrier insulating film including the lower electrode (step of FIG. 3C), and the resistance change
  • a step of forming a wiring trench extending in one direction with a predetermined length in the first interlayer insulating film (step of FIG. 6A), A step of embedding the lower electrode in the wiring trench (step of FIG. 6A) and a step of depositing a first barrier insulating film on the first interlayer insulating film including the lower electrode (step of FIG. 6A)
  • a step of forming two openings communicating with the lower electrode in the first barrier insulating film step of FIG. 6B
  • a variable resistance layer on the first barrier insulating film including the lower electrode step of depositing (step of FIG. 6C), step of depositing the upper electrode layer on the variable resistance layer (step of FIG.
  • part of the upper electrode layer and the variable resistance layer Removing one of the two openings A linear first upper electrode and a first variable resistance layer extending in a direction perpendicular to the one direction so as to pass through, and a block-like shape disposed on the other opening of the two openings Forming a second upper electrode and a second variable resistance layer (step of FIG. 7A).
  • FIG. 1A is a top view and FIG. 1B is a cross-sectional view schematically showing a configuration of a variable resistance element in a semiconductor device according to Example 1 of the present invention.
  • FIGS. 2A and 2B schematically show the configuration of the crossbar switch using the resistance change element formed in the multilayer copper wiring in the semiconductor device according to the first embodiment of the present invention, and FIG. It is sectional drawing between XX 'of (a).
  • FIG. 1 shows a variable resistance element that is one component of the crossbar switch.
  • FIG. 1 shows a variable resistance element that is one component of the crossbar switch.
  • the semiconductor device according to Example 1 has a multilayer copper wiring layer in which a multilayer copper wiring is formed in an insulator on a semiconductor substrate.
  • the semiconductor device has a resistance change element in the multilayer copper wiring.
  • the variable resistance element has a variable resistance layer 43 stacked on a portion of the first copper wiring 41, and a second electrode 42 is formed so as to cover the variable resistance layer 43.
  • the first copper wiring 41 extends in a direction perpendicular to the paper surface, and is another first resistor having the same structure adjacent along the direction perpendicular to the paper surface. It also serves as the first copper wiring 41 of the change element.
  • the second electrode 42 extends in parallel in the left-right direction with respect to the paper surface, and another second resistance change element (other It also serves as the second electrode (which is different from the first variable resistance element).
  • the resistance change layer 43 extends parallel to the paper surface in the left-right direction so as to overlap the second electrode 42, but is disposed only in the region where the first copper wiring 41 and the second electrode 42 overlap. May be.
  • the second electrode 42 is formed of a material different from copper between the two copper wirings in the multilayer copper wiring layer. In the conventional example, two layers of copper wiring are required to form the crossbar switch. However, according to the first embodiment of the present invention, only one layer of copper wiring may be used. As a result, process man-hours are reduced.
  • the area per one variable resistance element is 4F 2, is the same as the conventional example.
  • two layers of copper wiring were required.
  • two layers of crossbar switches were stacked in order to suffice for one layer.
  • a crossbar switch can be formed with twice the degree of integration.
  • FIG. 2 shows an example in which a crossbar switch using the resistance change element shown in FIG. 1 is formed inside a multilayer copper wiring layer on the semiconductor substrate 101.
  • the multilayer copper wiring layer has an insulating stacked body in which an interlayer insulating film 102, a barrier insulating film 103, an interlayer insulating film 104, a barrier insulating film 107, and an interlayer insulating film 120 are stacked in this order on the semiconductor substrate 101.
  • a first copper wiring 105 is embedded in a wiring groove formed in the interlayer insulating film 104 and the barrier insulating film 103 via a barrier metal 106.
  • a variable resistance layer 111 and an upper electrode 112 are formed on the first copper wiring 105.
  • the variable resistance element 100 is formed in a region where the first copper wiring 105 overlaps with the variable resistance layer 111 and the upper electrode 112.
  • the first copper wiring 105 corresponds to the first electrode 11 in FIG. 8A
  • the upper electrode 112 corresponds to the second electrode 12 in FIG.
  • the variable resistance element 100 is a variable resistance nonvolatile element, and can be, for example, a switching element that utilizes metal ion migration and an electrochemical reaction in an ion conductor.
  • the resistance change element 100 has a configuration in which a resistance change layer 111 is interposed between a first copper wiring 105 serving as a first electrode and an upper electrode 112 serving as a second electrode.
  • a barrier insulating film 107 is formed on the interlayer insulating film 104 including the first copper wiring 105 and the barrier metal 106.
  • the barrier insulating film 107 has an opening in a region where the variable resistance element 100 is formed.
  • the bottom surface of the variable resistance layer 111 and the top surface of the first copper wiring 105 are in contact with each other in the region of the opening formed in the barrier insulating film 107.
  • the bottom surface of the upper electrode 112 is in contact.
  • the resistance change element 100 performs switching between a high resistance state and a low resistance state by applying a voltage or passing a current, for example, metal ions included in the first copper wiring 105 into the resistance change layer 111. Switching is performed using diffusion caused by electrolysis.
  • An interlayer insulating film 120 is formed on the barrier insulating film 107 including the resistance change layer 111 and the upper electrode 112.
  • the semiconductor substrate 101 is a substrate on which a semiconductor element (not shown) is formed.
  • a semiconductor substrate 101 for example, a silicon substrate, a single crystal substrate, an SOI (Silicon on Insulator) substrate, a TFT (Thin Film Transistor) substrate, a substrate such as a liquid crystal manufacturing substrate, or a silicon substrate provided with a multilayer copper wiring layer is used. be able to.
  • the interlayer insulating film 102 is an insulating film formed on the semiconductor substrate 101.
  • the interlayer insulating film 102 for example, a silicon oxide film, a low dielectric constant film (for example, a SiOCH film) having a relative dielectric constant lower than that of the silicon oxide film, or the like can be used.
  • the interlayer insulating film 102 may be a stack of a plurality of insulating films.
  • the barrier insulating film 103 is an insulating film having a barrier property interposed between the interlayer insulating films 102 and 104.
  • the barrier insulating film 103 serves as an etching stop layer when the first copper wiring 105 is processed.
  • As the barrier insulating film 103 for example, a SiN film, a SiC film, a SiCN film, or the like can be used.
  • the barrier insulating film 103 can be removed depending on the selection of the etching conditions for the wiring trench.
  • the interlayer insulating film 104 is an insulating film formed on the barrier insulating film 103.
  • the interlayer insulating film 104 for example, a silicon oxide film, a low dielectric constant film (for example, a SiOCH film) having a relative dielectric constant lower than that of the silicon oxide film, or the like can be used.
  • the interlayer insulating film 104 may be a stack of a plurality of insulating films.
  • a wiring trench for embedding the first copper wiring 105 is formed in the interlayer insulating film 104.
  • the wiring groove is a groove extending in a direction perpendicular to the paper surface in FIG.
  • a first copper wiring 105 is embedded in the wiring trench via a first barrier metal 106.
  • the first copper wiring 105 is a wiring buried in a wiring groove formed in the interlayer insulating film 104 and the barrier insulating film 103 via the first barrier metal 106.
  • the first copper wiring 105 also serves as the first electrode of the variable resistance element 100 and is in direct contact with the variable resistance layer 111 at a predetermined position.
  • An electrode layer or the like may be inserted between the first copper wiring 105 and the resistance change layer 111.
  • the upper electrode 112 and the resistance change layer 111 are deposited in a continuous process and processed in the continuous process.
  • copper capable of diffusing and ion conducting in the resistance change layer 111 is used.
  • the first copper wiring 105 may be alloyed with Al, silicided, or nitrided.
  • the barrier metal 106 is a conductive material having a barrier property that covers the side surface or the bottom surface of the first copper wiring 105 in order to prevent the metal contained in the first copper wiring 105 from diffusing into the interlayer insulating film 104 or the lower layer. It is a membrane.
  • the barrier metal 106 includes tantalum (Ta), tantalum nitride (TaN), titanium nitride (TiN), and tungsten carbonitride (WCN). ), A refractory metal thereof, a nitride thereof, or a laminated film thereof.
  • the barrier insulating film 107 is formed on the interlayer insulating film 104 including the first copper wiring 105 and the barrier metal 106 to prevent oxidation of a metal (for example, copper) related to the first copper wiring 105 or in the interlayer insulating film 104. It has a role of preventing the diffusion of the metal related to the first copper wiring 105 to the metal.
  • a metal for example, copper
  • the barrier insulating film 107 for example, a SiC film, a SiCN film, a SiN film, and a stacked structure thereof can be used.
  • the barrier insulating film 107 has an opening in a region where the first copper wiring 105 and the resistance change layer 111 on the first copper wiring 105 overlap.
  • the first copper wiring 105 and the resistance change layer 111 are in contact with each other.
  • the opening of the barrier insulating film 107 is formed in the region of the first copper wiring 105.
  • the variable resistance element 100 can be formed on the surface of the first copper wiring 105 having small irregularities.
  • the resistance change layer 111 is a film whose resistance changes.
  • the resistance change layer 111 can be made of a material whose resistance is changed by the action (diffusion, ion conduction, etc.) of the metal related to the first copper wiring 105 (corresponding to the first electrode 11 in FIG. 8).
  • a film capable of ion conduction is used.
  • an oxide insulating film containing Ta such as Ta 2 O 5 or TaSiO can be used.
  • the resistance change layer 111 can have a stacked structure in which Ta 2 O 5 and TaSiO are stacked in this order from the bottom.
  • the resistance change layer 111 when used as an ion conductive layer, metal ions (for example, copper ions) formed inside the ion conductive layer at the time of low resistance (ON) are used. By dividing the cross-linking with the Ta 2 O 5 layer, metal ions can be easily recovered at the time of OFF, and switching characteristics can be improved.
  • the resistance change layer 111 is formed on the first copper wiring 105 and the opening of the barrier insulating film 107 or on the barrier insulating film 107.
  • the resistance change layer 111 extends in the left-right direction in FIG. 2A and is arranged so as to overlap in the same region as the upper electrode 112.
  • the upper electrode 112 plays the role of the second electrode 12 in FIG. 8 and is in contact with the upper surface of the resistance change layer 111.
  • the upper electrode 112 includes, for example, a refractory metal such as platinum (Pt), ruthenium (Ru), tantalum (Ta), tantalum nitride (TaN), titanium nitride (TiN), tungsten carbonitride (WCN), or nitride thereof. A thing etc. or those laminated films can be used. Further, oxygen may be added to a top surface and a side surface of the upper electrode 112 with a metal material such as Pt or Ru as a main component, or a stacked structure with a layer to which oxygen is added may be employed.
  • the upper electrode 112 extends in the left-right direction in FIG. 2A and is disposed so as to overlap in the same region as the resistance change layer 111.
  • the first copper wiring 105, the upper electrode 112, and the resistance change layer 111 have a pattern shown in FIG. That is, the first copper wiring 105 has a pattern extending in the vertical direction in FIG. 2A, and a plurality of first copper wirings 105 are formed with a line width F and a line interval F.
  • the upper electrode 112 and the resistance change layer 111 have a pattern extending in the left-right direction in FIG. 2A, and are arranged above the first copper wiring 105 with respect to the paper surface of FIG.
  • the first copper wiring 105 is orthogonal (three-dimensionally intersected), and a plurality of lines are formed with a line width F and a line interval F.
  • the resistance change layer 111 has the same shape as the upper electrode 112. Further, F indicates a minimum processing dimension, for example, 180 nm or less and 20 nm or more.
  • the interlayer insulating film 120 is an insulating film formed on the barrier insulating film 107 including the resistance change layer 111 and the upper electrode 112.
  • the interlayer insulating film 120 for example, a silicon oxide film, a SiOC film, a low dielectric constant film (for example, a SiOCH film) having a relative dielectric constant lower than that of the silicon oxide film can be used.
  • the interlayer insulating film 120 may be a laminate of a plurality of insulating films.
  • the interlayer insulating film 120 may be made of the same material as the interlayer insulating film 104.
  • FIG. 3 is a process cross-sectional view schematically showing the method for manufacturing the crossbar switch according to the first embodiment of the present invention.
  • an interlayer insulating film 102 (for example, a silicon oxide film, a film thickness of 300 nm) is deposited on a semiconductor substrate 101 (for example, a substrate on which a semiconductor element is formed), and then a barrier insulating film 103 (for example, on the interlayer insulating film 102).
  • a SiN film having a film thickness of 50 nm is deposited, and thereafter, an interlayer insulating film 104 (for example, a silicon oxide film having a film thickness of 300 nm) is deposited on the barrier insulating film 103.
  • Etching and photoresist removal are used to form a wiring groove in the interlayer insulating film 104, and then the first wiring via the barrier metal 106 (for example, TaN / Ta, film thickness 5 nm / 5 nm) is formed in the wiring groove.
  • the copper wiring 105 is embedded, and then the barrier insulating film 1 is formed on the interlayer insulating film 104 including the first copper wiring 105 and the barrier metal 106.
  • 7 eg, SiN film, thickness 50 nm
  • step A1 see Figure 3 (a)).
  • the interlayer insulating films 102 and 104 and the barrier insulating films 103 and 107 can be formed by a plasma CVD method.
  • the plasma CVD (Chemical Vapor Deposition) method refers to, for example, vaporizing a gas source or a liquid source to continuously supply the reaction chamber under reduced pressure, bringing the molecules into an excited state by plasma energy, In this method, a continuous film is formed on a substrate by a phase reaction or a substrate surface reaction.
  • the first copper wiring 105 is formed by forming a barrier metal 106 (for example, a TaN / Ta laminated film) by, for example, PVD (Physical Vapor Deposition) method, and after forming a Cu seed by PVD method, electrolysis It can be formed by embedding copper in the wiring trench by a plating method, after heat treatment at a temperature of 200 ° C. or higher, and then removing excess copper other than in the wiring trench by a CMP (Chemical-Mechanical-Polishing) method. As a method for forming such a series of copper wirings, a general method in this technical field can be used.
  • PVD Physical Vapor Deposition
  • the CMP method is a method of flattening by polishing the unevenness of the wafer surface that occurs during the multilayer wiring formation process by bringing the polishing liquid into contact with a rotating polishing pad while flowing the polishing liquid over the wafer surface.
  • the excess copper embedded in the wiring trench is polished to form a buried wiring (damascene wiring), or the interlayer insulating film is polished to perform planarization.
  • a silicon oxide film or the like (not shown) is deposited on the barrier insulating film 107, and a photoresist (not shown) having a pattern for forming the opening 108 is formed on the silicon oxide film or the like.
  • the silicon oxide film etc. is dry etched using the photoresist as a mask to transfer the opening forming pattern to the silicon oxide film etc., and then the photoresist is removed by oxygen plasma ashing etc., and then the silicon oxide film etc. is masked Etchback (dry etching) the barrier insulating film 107 exposed from the opening forming pattern to form an opening 108 in the barrier insulating film 107, and the first copper wiring from the opening 108 of the barrier insulating film 107.
  • step A2 when the photoresist opening formation pattern is transferred to the silicon oxide film or the like, the dry etching does not necessarily stop at the upper surface of the barrier insulating film 107, and reaches the inside of the barrier insulating film 107. You may do it.
  • the shape of the opening 108 of the barrier insulating film 107 can be a circle, and the diameter of the circle can be 10 nm to 500 nm.
  • a resistance change layer 111 (for example, Ta 2 O 5 , film thickness of 15 nm) is deposited on the barrier insulating film 107 including the first copper wiring 105, and then the upper electrode is formed on the resistance change layer 111 by the PVD method.
  • 112 (for example, a laminated structure having a Ru film thickness of 10 nm and a Ta film thickness of 50 nm) is formed.
  • a silicon oxide film or the like (not shown) is deposited on the upper electrode 112, and then the upper portion is formed on the silicon oxide film or the like.
  • a photoresist (not shown) having an electrode formation pattern is formed, and then the upper electrode formation pattern is transferred to a silicon oxide film or the like by dry etching the silicon oxide film using the photoresist as a mask.
  • the photoresist is removed by oxygen plasma ashing, etc., and then etched back using the silicon oxide film as a mask (dry etching)
  • the upper electrode 112 and the resistance change layer 111 are processed, and then the silicon oxide film or the like used for the etching mask is removed (step A3; see FIG. 3C).
  • the resistance change layer 111 can be formed using a PVD method or a CVD method.
  • the opening (108 in FIG. 3B) is attached with moisture or the like by the organic peeling process in Step A2, so that the resistance change layer 111 is deposited at a temperature of about 250 ° C. to 350 ° C. It is preferable to degas by applying a heat treatment under reduced pressure. At this time, care must be taken such as in a vacuum or a nitrogen atmosphere so that the copper surface is not oxidized again.
  • Step A3 when a resistance change layer using a transition metal oxide (eg, TiO, NiO) is used as the resistance change layer 111, an electrode is formed before the resistance change layer 111 is deposited.
  • a transition metal oxide eg, TiO, NiO
  • an electrode is formed before the resistance change layer 111 is deposited.
  • the upper electrode 112 for example, Ti, TiN, W, WN, Ta, TaN, Ru, RuOx, or the like can be used.
  • the laminated structure for example, TaN (lower layer) / Ru (upper layer). There may be.
  • the total film thickness of the laminated structure is preferably 10 nm or less for the convenience of forming the resistance change layer 111 inside the opening 108.
  • step A3 when the upper electrode formation pattern of the photoresist is transferred to the silicon oxide film or the like, the dry etching does not necessarily stop on the upper surface of the upper electrode 112, and reaches the inside of the upper electrode 112. You may do it.
  • an interlayer insulating film 120 (for example, a silicon oxide film, a film thickness of 300 nm) is deposited on the barrier insulating film 107 including the resistance change layer 111 and the upper electrode 112 (Step A4; see FIG. 2B). Although not shown, a multilayer wiring layer is formed on the interlayer insulating film 120.
  • the copper wiring used conventionally and the via for connecting to the copper wiring become unnecessary, and the area of the resistance change element can be reduced.
  • the number of manufacturing steps can be reduced.
  • the copper wiring that is no longer used can be used for other purposes.
  • a crossbar switch using the resistance change element 100 can be formed by using the upper electrode 112 as a wiring and using only one layer of the first copper wiring 105 among the multilayer copper wiring. Since there is no need to electrically connect the upper and lower copper wirings, the number of steps can be reduced. Furthermore, since it is not necessary to electrically connect the upper electrode 112 with an upper copper wiring having a generally large wiring width, the area of the resistance change element 100 can be made as small as possible.
  • FIG. 4A is a top view and FIG. 4B is a cross-sectional view schematically showing a configuration of a complementary resistance change element in a semiconductor device according to Example 2 of the present invention.
  • 5A is a top view schematically showing the configuration of a crossbar switch using complementary resistance change elements formed in a multilayer copper wiring in a semiconductor device according to Example 2 of the present invention
  • FIG. 2B is a cross-sectional view taken along the line XX ′ in FIG. 2A
  • FIG. FIG. 4 shows a complementary resistance change element which is one component of the crossbar switch.
  • FIG. 12 for a circuit diagram of a crossbar switch using a complementary resistance change element.
  • the semiconductor device according to Example 2 has a multilayer copper wiring layer in which a multilayer copper wiring is formed in an insulator on a semiconductor substrate.
  • the semiconductor device has a complementary resistance change element in the multilayer copper wiring.
  • the complementary resistance change element includes a first resistance change layer 62 and a second resistance change layer 63 laminated on a part of the first copper wiring 61, and the upper surfaces of the resistance change layers 63 and 63.
  • a first upper electrode 67 and a second upper electrode 64 are formed so as to cover each other.
  • the first resistance change layer 62 and the second resistance change layer 63 are arranged to be separated from each other in the same layer.
  • the first upper electrode 67 and the second upper electrode 64 are spaced apart from each other in the same layer.
  • the first variable resistance layer 62 and the first upper electrode 67 extend in a direction perpendicular to the paper surface and have the same structure adjacent in the direction perpendicular to the paper surface. It also serves as a first variable resistance layer and a first upper electrode of another first complementary variable resistance element.
  • the second copper wiring 66 extends in the left-right direction with respect to the plane of the paper, and another second complementary variable resistance element (the other first complementary variable element) of the same structure adjacent to the plane of the paper along the left-right direction. This also serves as the second copper wiring of the type variable resistance element.
  • the area required for one complementary variable resistance element can be 8F 2 .
  • FIG. 5 is an example in which a crossbar switch using the complementary resistance change element shown in FIG. 4 is formed inside a multilayer copper wiring layer on the semiconductor substrate 301.
  • the multilayer copper wiring layer is formed on the semiconductor substrate 301 by an interlayer insulating film 302, a barrier insulating film 303, an interlayer insulating film 304, a barrier insulating film 307, an interlayer insulating film 320, a barrier insulating film 315, an interlayer insulating film 316, and a barrier insulating.
  • An insulating stacked body in which a film 325 and an interlayer insulating film 326 are stacked in this order is included.
  • the first copper wiring 305 is embedded in the wiring trench formed in the interlayer insulating film 304 and the barrier insulating film 303 via the barrier metal 306.
  • the second copper wiring 332 is embedded in the wiring groove formed in the interlayer insulating film 316 and the barrier insulating film 315 via the barrier metal 323, and the interlayer insulating film 320 and the barrier insulating film 307 are embedded in the multilayer copper wiring layer.
  • a via 330 is embedded in the formed prepared hole via a barrier metal 323, and the second copper wiring 332 and the via 330 are integrated, and the side surface or the bottom surface of the second copper wiring 332 and the via 330 are barrier metal. 323.
  • the first copper wiring 305 corresponds to the first electrode 21 in FIG. 9A
  • the first upper electrode 313 corresponds to the second electrode 25 in FIG. 9A
  • the second upper electrode 314 corresponds to the first electrode 21 in FIG. ) Of the second electrode 23.
  • the complementary resistance change element 200 can be, for example, a switching element utilizing metal ion migration and electrochemical reaction in an ion conductor.
  • the complementary resistance change element 200 is an element in which two resistance change elements are connected in series.
  • a first resistance change layer 311 is interposed between the first copper wiring 305 corresponding to the first electrode 21 in FIG. 9A and the first upper electrode 313 serving as the second electrode 25, and FIG.
  • the second resistance change layer 312 is interposed between the first copper wiring 305 corresponding to the first electrode 21 and the second upper electrode 314 serving as the second electrode 23.
  • Each of the resistance change layers 311, 312 is in contact with the bottom surface of the first resistance change layer 311 and the second resistance change layer 312 and the top surface of the first copper wiring 305 in the region of the opening formed in the barrier insulating film 307. Furthermore, the top surfaces of the first variable resistance layer 311 and the second variable resistance layer 312 are in contact with the bottom surfaces of the first upper electrode 313 and the second upper electrode 314. The resistance change layers 311 and 312 are separated from each other, and the upper electrodes 313 and 314 are also separated from each other.
  • the complementary resistance change element 200 transitions between a high resistance state and a low resistance state by applying a voltage or passing a current.
  • the first resistance change layer 311 and the first resistance change layer 312 have a first resistance change layer 312. Switching is performed by utilizing diffusion of metal ions contained in the copper wiring 305 by electrolysis.
  • the semiconductor substrate 301 is a substrate on which a semiconductor element (not shown) is formed.
  • a substrate such as a silicon substrate, a single crystal substrate, an SOI (Silicon on Insulator) substrate, a TFT (Thin Film Transistor) substrate, a liquid crystal manufacturing substrate, or a silicon substrate provided with a multilayer copper wiring layer is used. be able to.
  • the interlayer insulating film 302 is an insulating film formed on the semiconductor substrate 301.
  • a silicon oxide film, a low dielectric constant film (for example, a SiOCH film) having a relative dielectric constant lower than that of the silicon oxide film, or the like can be used.
  • the interlayer insulating film 302 may be a stack of a plurality of insulating films.
  • the barrier insulating film 303 is an insulating film having a barrier property interposed between the interlayer insulating films 302 and 304.
  • the barrier insulating film 303 serves as an etching stop layer when the wiring groove of the first copper wiring 305 is processed.
  • a SiN film, a SiC film, a SiCN film, or the like can be used for the barrier insulating film 303.
  • a wiring groove for embedding the first copper wiring 305 is formed, and the first copper wiring 305 is embedded in the wiring groove via a barrier metal 306.
  • the barrier insulating film 303 can be omitted depending on the selection of the etching conditions for the wiring trench.
  • the interlayer insulating film 304 is an insulating film formed on the barrier insulating film 303.
  • the interlayer insulating film 304 for example, a silicon oxide film, a low dielectric constant film (for example, a SiOCH film) having a relative dielectric constant lower than that of the silicon oxide film, or the like can be used.
  • the interlayer insulating film 304 may be a stack of a plurality of insulating films.
  • a wiring groove for embedding the first copper wiring 305 is formed in the interlayer insulating film 304, and the first copper wiring 305 is embedded in the wiring groove via a barrier metal 306.
  • the first copper wiring 305 is a wiring buried in a wiring groove formed in the interlayer insulating film 304 and the barrier insulating film 303 via the barrier metal 306.
  • the first copper wiring 305 also serves as an electrode corresponding to the first electrode 21 in FIG. 9 of the variable resistance element, and is in direct contact with the first variable resistance layer 311 and the second variable resistance layer 312.
  • An electrode layer or the like may be inserted between the first copper wiring 305 and each resistance change layer. When the electrode layer is formed, the electrode layer and the resistance change layer are deposited in a continuous process and processed in the continuous process.
  • a metal capable of diffusing and ion conducting in the resistance change layer is used, and for example, copper or the like can be used.
  • the first copper wiring 305 may be alloyed with Al, silicided, or nitrided.
  • the surface of the first copper wiring 305 may be silicided or nitrided.
  • the first copper wiring 305 is formed in a part of the region of the second copper wiring 332 extending in the left-right direction in FIG. 5A, and a plurality of first copper wirings 305 are formed in the region of the second copper wiring 332.
  • the first copper wiring 305 extends in the left-right direction in FIG. 5B from the region where the second copper wiring 332 and the first upper electrode 313 overlap, and the second copper wiring 332 and the second upper electrode 314 overlap. It is formed between the areas.
  • the first copper wiring 305 is separated from other adjacent first copper wirings (not shown) in the horizontal direction of FIG. 5B and in the direction perpendicular to the paper surface.
  • the barrier metal 306 covers the side surface or bottom surface of the first copper wiring 305 and prevents the metal contained in the first copper wiring 305 from diffusing into the interlayer insulating film 304 or the lower layer. It is a membrane.
  • the barrier metal 306 includes tantalum (Ta), tantalum nitride (TaN), titanium nitride (TiN), and tungsten carbonitride (WCN). ), A refractory metal thereof, a nitride thereof, or a laminated film thereof.
  • the barrier insulating film 307 is an insulating film formed on the interlayer insulating film 304 including the first copper wiring 305 and the barrier metal 306, and prevents oxidation of a metal (for example, Cu) related to the first copper wiring 305, It plays a role of preventing diffusion of the metal related to the first copper wiring 305 into the interlayer insulating film 304.
  • a metal for example, Cu
  • the barrier insulating film 307 for example, a SiC film, a SiCN film, a SiN film, and a stacked structure thereof can be used.
  • the barrier insulating film 307 has an opening on the first copper wiring 305.
  • the first copper wiring 305 is in contact with the first resistance change layer 311 and the second resistance change layer 312.
  • the opening of the barrier insulating film 307 is formed in the region of the first copper wiring 305. In this way, the complementary resistance change element 200 can be formed on the surface of the first copper wiring 305 with small unevenness.
  • the first resistance change layer 311 and the second resistance change layer 312 are films whose resistance changes.
  • the first resistance change layer 311 and the second resistance change layer 312 can be made of a material whose resistance is changed by the action (diffusion, ion conduction, etc.) of the metal related to the first copper wiring 305 (first electrode).
  • a film capable of ion conduction is used.
  • an oxide insulating film containing Ta such as Ta 2 O 5 or TaSiO can be used.
  • the first resistance change layer 311 and the second resistance change layer 312 may have a stacked structure in which Ta 2 O 5 and TaSiO are stacked in this order from the bottom.
  • first variable resistance layer 311 and the second variable resistance layer 312 are used as the ion conductive layer, they are formed inside the ion conductive layer when the resistance is low (ON).
  • metal ions for example, copper ions
  • the first resistance change layer 311 and the second resistance change layer 312 are formed on the first copper wiring 105 and the opening of the barrier insulating film 107 or on the barrier insulating film 107.
  • the first resistance change layer 311 and the second resistance change layer 312 are separated from each other in the same layer.
  • the first resistance change layer 311 extends in the vertical direction in FIG. 5A and is arranged so as to overlap in the same region as the first upper electrode 313.
  • the second resistance change layer 312 is disposed at a position separated from the first resistance change layer 311 in a region where the second copper wiring 332 and the first copper wiring 305 overlap.
  • the first upper electrode 313 plays the role of the second electrode 25 in FIG. 9 and is in contact with the upper surface of the first variable resistance layer 311.
  • the second upper electrode 314 serves as the second electrode 23 in FIG. 9 and is in contact with the upper surface of the second resistance change layer 312.
  • the first upper electrode 313 and the second upper electrode 314 are made of a metal that is less likely to ionize than the metal related to the first copper wiring 305 and is less likely to diffuse and ion-conduct in the first resistance change layer 311 and the second resistance change layer 312. It is preferable to use a metal material that is used and has an absolute value of free energy of oxidation smaller than that of the metal component (Ta) related to the first resistance change layer 311 and the second resistance change layer 312.
  • first upper electrode 313 and the second upper electrode 314 examples include platinum (Pt), ruthenium (Ru), tantalum (Ta), tantalum nitride (TaN), titanium nitride (TiN), and tungsten carbonitride (WCN). Such a refractory metal, a nitride thereof, or a laminated film thereof can be used. Further, oxygen may be added to the top and side surfaces of the first upper electrode 313 and the second upper electrode 314 as a main component of a metal material such as Pt or Ru, or a laminated structure with a layer to which oxygen is added. Good. The first upper electrode 313 and the second upper electrode 314 are separated from each other in the same layer.
  • the first upper electrode 313 extends in the vertical direction in FIG. 5A and is arranged to overlap in the same region as the first resistance change layer 311.
  • the second upper electrode 314 is disposed at a position separated from the first upper electrode 313 in a region where the second copper wiring 332 and the first copper wiring 305 overlap.
  • the upper electrodes 313 and 314 and the resistance change layers 311 and 312 have a pattern shown in FIG. That is, the first upper electrode 313 and the first resistance change layer 311 have a pattern extending in the vertical direction in FIG.
  • the second upper electrode 314 and the second resistance change layer 312 are disposed between adjacent first upper electrodes 313 in the region of the second copper wiring 332 extending in the left-right direction in FIG.
  • the second upper electrode 314 and the second variable resistance layer 312 that are matched with each other are separated from each other.
  • the upper electrodes 313 and 314 and the resistance change layers 311 and 312 are arranged below the first copper wiring 305 with respect to the paper surface of FIG.
  • a plurality of first upper electrodes 313 and first resistance change layers 311 are formed orthogonal to the first copper wiring 305 (three-dimensional intersection).
  • the first resistance change layer 311 has the same shape as the first upper electrode 313, and the second resistance change layer 312 has the same shape as the second upper electrode 314.
  • the interlayer insulating film 320 is an insulating film formed on the barrier insulating film 307 including the upper electrodes 313 and 314 and the resistance change layers 311 and 312.
  • the interlayer insulating film 320 for example, a silicon oxide film, a SiOC film, a low dielectric constant film (for example, a SiOCH film) having a relative dielectric constant lower than that of the silicon oxide film can be used.
  • the interlayer insulating film 320 may be a stack of a plurality of insulating films.
  • the interlayer insulating film 320 may be made of the same material as the interlayer insulating film 304.
  • a pilot hole for embedding the via 330 is formed in the interlayer insulating film 320, and the via 330 is embedded in the pilot hole via the barrier metal 323.
  • the barrier insulating film 315 is an insulating film interposed between the interlayer insulating film 320 and the interlayer insulating film 316 (see FIG. 5C).
  • the barrier insulating film 315 has a role of preventing oxidation of the metal (for example, Cu) related to the via 330 and preventing diffusion of the metal related to the via 330 into the interlayer insulating film 320.
  • a SiN film, a SiC film, a SiCN film, or the like can be used.
  • a wiring groove for embedding the second copper wiring 332 is formed, and the second copper wiring 332 is embedded in the wiring groove via the barrier metal 323.
  • the interlayer insulating film 316 is an insulating film formed on the barrier insulating film 315 (see FIG. 5C).
  • the interlayer insulating film 316 for example, a silicon oxide film, a SiOC film, a low dielectric constant film (for example, a SiOCH film) having a relative dielectric constant lower than that of the silicon oxide film can be used.
  • the interlayer insulating film 316 may be a stack of a plurality of insulating films.
  • the interlayer insulating film 316 may be made of the same material as the interlayer insulating film 304.
  • a wiring groove for embedding the second copper wiring 332 is formed, and the second copper wiring 332 is embedded in the wiring groove via a barrier metal 323.
  • the barrier metal 323 covers the side surface or bottom surface of the via 330 and the second copper wiring 332 in order to prevent the metal contained in the via 330 and the second copper wiring 332 from diffusing into the interlayer insulating film 320 or the lower layer. It is a conductive film having a barrier property.
  • the barrier metal 323 include platinum (Pt), ruthenium (Ru), tantalum (Ta), tantalum nitride (TaN), titanium nitride (TiN), and a refractory metal such as tungsten carbonitride (WCN). A thing etc. or those laminated films can be used.
  • the second copper wiring 332 is a wiring buried in a wiring groove formed in the interlayer insulating film 316 and the barrier insulating film 315 via the barrier metal 323.
  • the second copper wiring 332 extends in the left-right direction in FIG. 5A, and a plurality of the second copper wirings 332 are formed apart from each other in the same layer.
  • the second copper wiring 332 is integrated with the via 330.
  • the via 330 is embedded in a pilot hole formed in the interlayer insulating film 320 via a barrier metal 323 and is electrically connected to the second upper electrode 314 via the barrier metal 323.
  • Al, Cu, W, or the like can be used for the second copper wiring 332 and the via 330.
  • Cu may be alloyed with Al.
  • the second copper wiring 332 and the via 330 may be silicided or nitrided.
  • the barrier insulating film 325 is formed on the interlayer insulating film 316 including the second copper wiring 332, prevents oxidation of a metal (for example, Cu) related to the second copper wiring 332, and forms an upper layer of the second copper wiring 332. It is an insulating film having a role of preventing diffusion of the metal.
  • a SiC film, a SiCN film, a SiN film, and a stacked structure thereof can be used.
  • the interlayer insulating film 326 is an insulating film formed on the barrier insulating film 325.
  • the interlayer insulating film 326 for example, a silicon oxide film, a SiOC film, a low dielectric constant film (for example, a SiOCH film) having a relative dielectric constant lower than that of the silicon oxide film can be used.
  • the interlayer insulating film 316 may be a stack of a plurality of insulating films.
  • 6 and 7 are process cross-sectional views schematically showing a method for manufacturing a crossbar switch using complementary resistance change elements formed in a multilayer copper wiring in a semiconductor device according to Example 2 of the present invention. is there.
  • an interlayer insulating film 302 (for example, a silicon oxide film, a film thickness of 300 nm) is deposited on a semiconductor substrate 301 (for example, a substrate on which a semiconductor element (not shown) is formed), and then the interlayer insulating film 302 is formed.
  • a semiconductor substrate 301 for example, a substrate on which a semiconductor element (not shown) is formed
  • a barrier insulating film 303 (for example, a SiN film, a film thickness of 50 nm) is deposited, and then an interlayer insulating film 304 (for example, a silicon oxide film, a film thickness of 300 nm) is deposited on the barrier insulating film 303, and then a lithography method ( (Including photoresist formation, dry etching, and photoresist removal), a wiring groove is formed in the interlayer insulating film 304, and then the barrier metal 306 (for example, TaN / Ta, film thickness 5 nm / 5 nm) is formed in the wiring groove.
  • the barrier metal 306 for example, TaN / Ta, film thickness 5 nm / 5 nm
  • the first copper wiring 305 is embedded via the first insulating film 304 and the first copper wiring 305 and the interlayer insulating film 304 including the barrier metal 306 are then buried.
  • a dielectric film 307 eg, SiN film, thickness 50 nm is deposited (step B1; see FIG. 6 (a)).
  • the interlayer insulating films 302 and 304 and the barrier insulating films 303 and 307 can be formed by a plasma CVD method.
  • the first copper wiring 305 is formed by forming a barrier metal 306 (for example, a TaN / Ta laminated film) by the PVD method, and forming copper seed by the PVD method, and then copper by the electrolytic plating method. It can be formed by embedding in the wiring trench, after heat treatment at a temperature of 200 ° C. or higher, and then removing excess copper other than in the wiring trench by CMP.
  • a method for forming such a series of copper wirings a general method in this technical field can be used.
  • a silicon oxide film or the like is deposited on the barrier insulating film 307, and then a photoresist (not shown) having a pattern for forming the opening 308 is formed on the silicon oxide film or the like.
  • the silicon oxide film is dry-etched as a mask to transfer the opening formation pattern to the silicon oxide film, etc., and then the photoresist is removed by oxygen plasma ashing, etc., and then the silicon oxide film is used as a mask to form the opening.
  • the barrier insulating film 307 exposed from the pattern for use is etched back (dry etching) to form an opening 308 in the barrier insulating film 307, and the first copper wiring 305 is exposed from the opening 308 in the barrier insulating film 307.
  • the first copper wiring 30 is obtained by performing an organic stripping treatment with an amine stripping solution or the like.
  • the etching by-product generated during the etch back is removed, and then the silicon oxide film and the like on the barrier insulating film 307 are removed (step B2; FIG. 6). (See (b)).
  • step B2 when the photoresist opening formation pattern is transferred to the silicon oxide film or the like, the dry etching does not necessarily stop on the upper surface of the barrier insulating film 307, and reaches the inside of the barrier insulating film 307. You may do it.
  • the shape of the opening 308 of the barrier insulating film 307 can be a circle, and the diameter of the circle can be 10 nm to 500 nm.
  • a resistance change layer 309 (for example, Ta 2 O 5 , film thickness of 15 nm) is formed on the barrier insulating film 307 including the first copper wiring 305, and further a metal layer 310 (for example, Ru film thickness of 10 nm and Ta A laminated structure having a thickness of 50 nm is formed (step B3; see FIG. 6C).
  • the resistance change layer 309 can be formed using a PVD method or a CVD method.
  • step B3 since the opening 308 is attached with moisture or the like by the organic peeling process in step B2, heat treatment is performed under reduced pressure at a temperature of about 250 ° C. to 350 ° C. before the resistance change layer 309 is deposited. It is preferable to degas. At this time, care must be taken such as in a vacuum or a nitrogen atmosphere so that the copper surface is not oxidized again.
  • step B3 when a resistance change layer using a transition metal oxide (eg, TiO, NiO, etc.) is used as the resistance change layer 309, an electrode is formed before the resistance change layer 309 is deposited. May be.
  • the electrode for example, Ti, TiN, W, WN, Ta, TaN, Ru, RuOx, etc. can be used.
  • their laminated structure for example, TaN (lower layer) / Ru (upper layer) Also good.
  • a silicon oxide film or the like is deposited on the metal layer (310 in FIG. 6C), and then a photoresist (not shown) having an upper electrode formation pattern is formed on the silicon oxide film or the like, Thereafter, the silicon oxide film or the like is dry-etched using the photoresist as a mask to transfer the upper electrode forming pattern to the silicon oxide film or the like. Thereafter, the photoresist is removed by oxygen plasma ashing or the like, and then the silicon oxide film is removed. Etching back (dry etching) using the above as a mask to process the metal layer (310 in FIG. 6C) and the resistance change layer (309 in FIG.
  • Step B4 when the upper electrode formation pattern of the photoresist is transferred to the silicon oxide film or the like, the dry etching does not necessarily stop on the upper surface of the metal layer 310, and has reached the inside of the metal layer 310. May be.
  • an interlayer insulating film 320 (for example, a silicon oxide film) is formed on the barrier insulating film 307 including the first resistance change layer 311 / first upper electrode layer 313 and the second resistance change layer 312 / second upper electrode layer 314.
  • the surface of the interlayer insulating film 320 is flattened by a CMP method, and then a barrier insulating film 315 (for example, a SiN film, film thickness of 50 nm) is deposited on the interlayer insulating film 320, and then barrier insulation is performed.
  • An interlayer insulating film 316 (for example, a silicon oxide film having a thickness of about 300 nm) is deposited on the film 315 (step B5; see FIG. 7B). In step B5, the thickness of the interlayer insulating film 320 is set to about 300 nm after planarization.
  • the second copper wiring 332 and the via 330 are formed in the interlayer insulating film 316 and the interlayer insulating film 320 by the dual damascene method which is a conventional technique (step B6; see FIG. 7C).
  • the lower surface and side surfaces of the second copper wiring 332 and the via 330 are covered with the barrier metal 323.
  • a barrier insulating film 325 for example, SiN film
  • an interlayer insulating film 326 for example, silicon oxide film, film thickness of 300 nm
  • a multilayer wiring layer is formed on the interlayer insulating film 120.
  • the complementary resistance change element 200 can be formed.
  • the used crossbar switch can be formed, the copper wiring used conventionally, and the via for connecting to the copper wiring become unnecessary, the area of the resistance change element can be reduced, and the number of manufacturing steps can be reduced. it can. Further, since it is not necessary to electrically connect the first upper electrode 313 with an upper copper wiring having a generally wide wiring width, the area of the complementary resistance change element 200 can be made as small as possible.
  • Resistance change element 20 Complementary resistance change element 11 1st electrode 12 2nd electrode 13 Resistance change layer 14 1st node 15 2nd node 16 Voltage source 21 1st electrode 22 Resistance change layer 23, 25 2nd electrode 24 Resistance change Layer 26 First node 27 Second node 28 Third node 31 First copper wiring 32 Second electrode 33 Resistance change layer 34 Via 35 Second copper wiring 41 First copper wiring 42 Second electrode 43 Resistance change layer 61 First copper Wiring 62 First variable resistance layer 63 Second variable resistance layer 64 Second upper electrode 65 Via 66 Second copper wiring 67 First upper electrode 100 Variable resistance element 101 Semiconductor substrate 102, 104, 120 Interlayer insulating film 103, 107 Barrier insulation Film 105 First copper wiring (lower electrode) 106 Barrier metal 108 Opening 111 Resistance change layer 112 Upper electrode 200 Complementary variable resistance element 301 Semiconductor substrate 302, 326 Interlayer insulating film 303, 325 Barrier insulating film 304 Interlayer insulating film (first interlayer insulating film) 305 First

Landscapes

  • Semiconductor Memories (AREA)

Abstract

La présente invention concerne un dispositif à semi-conducteur capable de diminuer les processus ou de réduire la superficie d'un élément à résistance variable autant que possible ; et un procédé de fabrication du dispositif à semi-conducteur. Un dispositif à semi-conducteur comprend deux éléments à résistance variable (100) ou plus à l'intérieur d'une couche de câblage multicouche sur un substrat à semi-conducteur (101), et chaque élément à résistance variable (100) présente une configuration dans laquelle une couche à résistance variable (111) présentant une résistance variable est interposée entre une électrode inférieure (105) et une électrode supérieure (112). Une ligne de câblage dans une couche de câblage prédéterminée dans la couche de câblage multicouche sert également d'électrode inférieure (105). L'électrode supérieure (112) est formée en tant que ligne s'étendant dans une direction et sert également d'électrode supérieure d'un autre élément à résistance variable adjacent à l'élément à résistance variable (100) dans la direction mentionnée ci-dessus.
PCT/JP2012/069627 2011-08-02 2012-08-01 Dispositif à semi-conducteur et son procédé de fabrication WO2013018842A1 (fr)

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JP2011-169399 2011-08-02

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Publication number Priority date Publication date Assignee Title
WO2017051527A1 (fr) * 2015-09-24 2017-03-30 日本電気株式会社 Élément à résistance variable, son procédé de fabrication, et dispositif semi-conducteur

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JP2002198496A (ja) * 2000-12-26 2002-07-12 Seiko Epson Corp 強誘電体キャパシタおよびその製造方法ならびに強誘電体メモリ装置
JP2007149800A (ja) * 2005-11-25 2007-06-14 Elpida Memory Inc 半導体記憶装置
WO2009001534A1 (fr) * 2007-06-22 2008-12-31 Panasonic Corporation Dispositif de stockage non volatile du type à changement de résistance
WO2010079829A1 (fr) * 2009-01-09 2010-07-15 日本電気株式会社 Elément de commutation et son procédé de fabrication

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002198496A (ja) * 2000-12-26 2002-07-12 Seiko Epson Corp 強誘電体キャパシタおよびその製造方法ならびに強誘電体メモリ装置
JP2007149800A (ja) * 2005-11-25 2007-06-14 Elpida Memory Inc 半導体記憶装置
WO2009001534A1 (fr) * 2007-06-22 2008-12-31 Panasonic Corporation Dispositif de stockage non volatile du type à changement de résistance
WO2010079829A1 (fr) * 2009-01-09 2010-07-15 日本電気株式会社 Elément de commutation et son procédé de fabrication

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017051527A1 (fr) * 2015-09-24 2017-03-30 日本電気株式会社 Élément à résistance variable, son procédé de fabrication, et dispositif semi-conducteur
JPWO2017051527A1 (ja) * 2015-09-24 2018-08-02 日本電気株式会社 抵抗変化素子とその製造方法および半導体装置
US10490743B2 (en) 2015-09-24 2019-11-26 Nec Corporation Crossbar switch and method of manufacturing the same and semiconductor device
JP7023449B2 (ja) 2015-09-24 2022-02-22 ナノブリッジ・セミコンダクター株式会社 クロスバスイッチとその製造方法およびクロスバスイッチを有する半導体装置

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