+

WO2013008967A1 - Circuit d'excitation de del - Google Patents

Circuit d'excitation de del Download PDF

Info

Publication number
WO2013008967A1
WO2013008967A1 PCT/KR2011/005133 KR2011005133W WO2013008967A1 WO 2013008967 A1 WO2013008967 A1 WO 2013008967A1 KR 2011005133 W KR2011005133 W KR 2011005133W WO 2013008967 A1 WO2013008967 A1 WO 2013008967A1
Authority
WO
WIPO (PCT)
Prior art keywords
voltage
led
channel
driving
gate
Prior art date
Application number
PCT/KR2011/005133
Other languages
English (en)
Korean (ko)
Inventor
김진혁
김종선
정해양
배성호
Original Assignee
(주)실리콘인사이드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by (주)실리콘인사이드 filed Critical (주)실리콘인사이드
Priority to PCT/KR2011/005133 priority Critical patent/WO2013008967A1/fr
Priority to KR1020117017785A priority patent/KR101255176B1/ko
Publication of WO2013008967A1 publication Critical patent/WO2013008967A1/fr

Links

Images

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/40—Details of LED load circuits
    • H05B45/44—Details of LED load circuits with an active control inside an LED matrix
    • H05B45/46—Details of LED load circuits with an active control inside an LED matrix having LEDs disposed in parallel lines
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/50—Circuit arrangements for operating light-emitting diodes [LED] responsive to malfunctions or undesirable behaviour of LEDs; responsive to LED life; Protective circuits
    • H05B45/54—Circuit arrangements for operating light-emitting diodes [LED] responsive to malfunctions or undesirable behaviour of LEDs; responsive to LED life; Protective circuits in a series array of LEDs
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/10—Controlling the intensity of the light
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/30—Driver circuits
    • H05B45/347—Dynamic headroom control [DHC]

Definitions

  • the present invention relates to a driving driver of a light emitting diode (LED), and relates to an LED driving driver that can be controlled even by detecting only a gate end and a source end of an LED channel transistor. That is, according to the present invention, since the LED is driven by the 2-PIN detecting method rather than the conventional 3-PIN detecting method, the number of pins allocated to one channel is reduced, so that the manufacturing cost is low and the LED can be efficiently controlled. Provide a driver.
  • LED light emitting diode
  • LEDs have high brightness overall and can be used in many applications, including backlighting of liquid crystal displays (LCDs).
  • LCDs liquid crystal displays
  • a backlight for an LCD monitor i) use one or more channels of white LEDs, including blue LEDs with phosphors (materials), to absorb blue light by the phosphors, Or ii) one or more individual channels of colored LEDs are placed adjacent to each other so that the light combined with each other looks like white light.
  • the LED channels made of the same type of LEDs also exhibit electrical characteristics such as different voltage drops. Because of this feature, in order to allow the same current to flow through each of the LED channels, a controllable element or the like connected in series to each LED channel to compensate for different voltage drops is required.
  • the driver for driving the LEDs must generate enough DC current to drive a series of LEDs, and its input voltage must be stepped up to a voltage sufficient to drive the LEDs.
  • the operation state of the LED has been controlled by using the 3-PIN method, that is, bias information of each of the drain, gate, and source of the transistor in the LED channel.
  • the 3-PIN method that is, bias information of each of the drain, gate, and source of the transistor in the LED channel.
  • the 3-PIN method since three pins are required for one channel, the number of pins of a chip required for a driving driver increases, thereby increasing the manufacturing cost and complicating the system.
  • the present invention has been made to solve the above-mentioned problems of the prior art, LED drive driver for driving the LED by the 2-PIN detection method away from the conventional 3-PIN detection method applied to the driver for driving the LED.
  • the purpose is to provide.
  • the present invention is another object to provide a LED drive driver to reduce the manufacturing cost, simplifying the system by reducing the number of pins of the LED chip per channel provided in the LED drive driver.
  • the driving voltage (V LED ) is input, LED channel unit having a plurality of LED channels connected to the at least one LED (Light Emitting Diode), the field effect transistor and the channel resistance in series ; A channel irradiator connected to the field effect transistor to control a constant current to flow in each LED channel, and determine whether the LED channel is open or short; And a driving voltage V LED that is connected to a gate terminal of the field effect transistor and compares a maximum gate voltage V G_MAX and a control voltage V CTL among a plurality of gate voltages V G.
  • V X Voltage; V X) is adjusted to be minimized in size and the power control channel to be supplied to the LED unit part; Including but, the channel irradiator provides an LED driving driver is connected to the gate terminal and the source terminal excluding the drain terminal of the field effect transistor.
  • the channel irradiation unit, the first OP-AMP and the output terminal is connected to the source terminal, the (-) terminal is connected to the source terminal, the (+) terminal is input to the reference voltage (V REF ) It is preferable to include a short circuit determination unit for comparing and outputting the source voltage V S and the open voltage V OPEN of the field effect transistor.
  • the channel irradiator further includes an analog-to-digital converter (AD converter) for analog-to-digital conversion of the gate voltage (V G ) value of each of the LED channel and stored in a predetermined registry.
  • AD converter analog-to-digital converter
  • the power control unit the gate voltage input terminal for receiving the gate voltage (V G ) of the plurality of LED channels to filter the maximum gate voltage (V G_MAX ); A control voltage input terminal to which a control voltage V CTL is input; GM-AMP comparing the maximum gate voltage (V G_MAX ) and the control voltage (V CTL ) to generate and output a current difference between the voltages; An inversion unit for inverting the output of the GM-AMP using the headroom voltage V X ; And a DC-DC converter that generates an optimized driving voltage (V LED.OPT ) by controlling a feedback loop using the output of the inverting unit.
  • the gate voltages V G and the control voltage V CTL are voltage-dropped by a diode and input to the GM-AMP.
  • the optimized driving voltage (V LED.OPT ) is preferably a voltage of which the headroom voltage of the LED channel is minimized in order to maximize power efficiency while all LED channels operate in a saturated state.
  • the field effect transistor is preferably an NMOS transistor.
  • the driving voltage increases linearly to a voltage at which all the LED channels can enter a saturation state. It is desirable to determine that the LED channel with no response even after the time t MAX elapses to open is open.
  • whether or not the LED channel is opened during normal operation increases linearly the driving voltage (V LED ) to a voltage at which all the LED channels can enter a saturation state. after the time taken (t MAX) last, it is preferable that it is determined that the source voltage (V S) by said irradiation unit is an open channel is detected as a voltage lower than an open voltage (V oPEN).
  • V MAX.VAR is the difference between the maximum drain voltage (V D.MAX ) and the minimum drain voltage (V D.MIN ) of the LED channel in a steady state
  • t R is the channel voltage increased by X ⁇ V REF .
  • X is a constant
  • t TOT is the time taken for the channel voltage to rise by V MAX.VAR .
  • the driving voltage (V LED.OPT ) optimized through headroom voltage control during a calibration period Is increased by a predetermined value and the gate voltage (V G ) of each channel is converted to analog-digital value and stored in the registry, and then the optimized driving voltage (V LED.OPT ) is decreased by the predetermined value in the normal operation section.
  • the gate voltage (V G) after collecting the value the gate voltage is collected in the normal operation period (V G) if the value is less than the calibration (calibration) gate voltage (V G) are stored in the interval value paragraph (short) It is preferable to determine that it is.
  • V G Gate voltage (V G) values in the calibration region a gate voltage (V G) value or a normal operation time period in the present invention, is periodically collected and it is desirable to determine whether short circuit (short).
  • the LED drive driver according to the present invention there is an effect of driving and controlling the LED by the 2-PIN detection method, away from the conventional 3-PIN detection method applied to the driver for driving the LED.
  • the present invention by reducing the number of pins of the LED chip required for each channel provided in the LED driver, it is possible to reduce the manufacturing cost of the LED driver and simplify the system.
  • FIG 1 is an illustration of an LED drive driver according to the prior art.
  • Figure 2 is an exemplary view of an LED drive driver according to an embodiment of the present invention.
  • FIG 3 is a graph showing a relationship between a gate voltage and a drain voltage according to an embodiment of the present invention.
  • 4 to 5 is a configuration diagram of the LED drive driver according to an embodiment of the present invention.
  • FIG. 6 is a configuration diagram of an LED channel according to an embodiment of the present invention.
  • FIG. 7 is a configuration diagram of a power control unit according to an embodiment of the present invention.
  • FIG. 8 is a graph showing a relationship between a control voltage and a drain voltage according to an embodiment of the present invention.
  • FIG 9 is a graph illustrating a relationship between a driving voltage and a source voltage at the start of driving an LED channel according to an embodiment of the present invention.
  • FIG 10 is an exemplary view of an LED channel unit including an open LED channel according to an embodiment of the present invention.
  • 11 is a graph showing a relationship between a driving voltage and a source voltage for each channel when one channel is opened at the start of driving the LED channel according to an embodiment of the present invention.
  • FIG. 12 is an exemplary view of a channel irradiation unit according to an embodiment of the present invention.
  • Figure 13 is an exemplary view of an LED channel unit including a shorted LED channel according to an embodiment of the present invention.
  • FIG. 14 is a graph showing a relationship between a driving voltage and a source voltage for each channel when one channel is shorted at the start of driving the LED channel according to an embodiment of the present invention.
  • 15 is a graph illustrating a short circuit determination reference voltage obtained during a calibration period and a gate voltage obtained during a normal period according to an embodiment of the present invention.
  • FIG. 16 is a graph illustrating a change in an optimized driving voltage according to a driving start section, a calibration section, and a normal operation section of an LED channel according to an embodiment of the present invention.
  • Figure 17 is an exemplary view showing the front end of the inverting portion provided with a power control unit according to an embodiment of the present invention.
  • FIG. 1 is an exemplary view of a LED driving driver according to the prior art.
  • Conventional LED drivers generally use a 3-PIN detection scheme that controls the LEDs outside the driver using all of the information of the drain 150, gate 160 and source 170 of the transistor of the LED channel.
  • FIG 2 is an exemplary view of a LED driving driver according to an embodiment of the present invention.
  • the main point is to reduce the number of pins of the chip allocated to the driver, headroom voltage control is performed using only the information of the gate G and the source S, and the LED channel is opened. Or it is configured to be able to determine whether short (short).
  • the voltage V S of the source terminal 170 may be set to the reference voltage V using the virtual short property of the OP-AMP. REF ).
  • a structure in which the change in the drain voltage V D is inferred and judged using the change in the gate voltage V G is obtained.
  • FIG 3 is a graph illustrating a relationship between a gate voltage and a drain voltage according to an embodiment of the present invention.
  • the gate voltage V G is changed and the state of the drain voltage V D is inferred using the change.
  • the distribution of the LED or the distribution of the transistor is represented by a change in the drain voltage (V D ).
  • V D drain voltage
  • V G gate voltage
  • 4 to 5 is a configuration diagram of the LED driving driver according to an embodiment of the present invention.
  • the driving voltage (V LED ) is input, LED channel unit 100 having a plurality of LED channels connected to the at least one diode, the field effect transistor and the channel resistance in series, the electric field It is connected to the effect transistor to control the constant current flow through each LED channel, and is connected to the channel irradiation unit 200 and the gate terminal of the field effect transistor to determine whether the LED channel open or short (short).
  • the driving voltage (V LED ) may be compared with the maximum gate voltage (V G_MAX ) and the control voltage (V CTL ) among the plurality of gate voltages (V G ) to minimize the headroom voltage (V X ). It may be configured to include a power control unit 300 to adjust the supply to the LED channel unit.
  • the present invention employs a 2-PIN detecting method, the channel irradiator 200 is connected to the gate terminal and the source terminal excluding the drain terminal of the field effect transistor, LED A constant current flows through the channel, and headroom voltage control and whether each LED channel is open or short is determined.
  • the channel irradiator includes a first OP having a positive terminal connected to a reference voltage V REF input terminal 210, a negative terminal connected to a source terminal of a transistor, and an output terminal thereof connected to a gate terminal of a transistor.
  • An AMP 220 and a short circuit determination unit 230 for comparing and outputting the source voltage V S and the open voltage V OPEN of the field effect transistor may be provided.
  • the short circuit determination unit 230 may be formed of a second OP-AMP to receive the source voltage V S and the open voltage V OPEN , and output a comparison value thereof.
  • the source voltage V S at the (+) terminal of the second OP-AMP, the open voltage V OPEN at the (-) terminal, or the source voltage It is possible to determine whether a short circuit by inputting the open voltage (V OPEN ) to the V S ), (+) terminal.
  • the reference voltage V REF serves to determine the magnitude of the current flowing through each channel by fixing the source voltage V S by the abnormal shorting property of the first OP-AMP.
  • the channel irradiator 200 may further include an analog-to-digital converter (AD converter) for analog-to-digital converting a gate voltage (V G ) value of each LED channel and storing it in a predetermined registry.
  • AD converter analog-to-digital converter
  • the power control unit 300 receives a gate voltage V G of the plurality of LED channels and filters a maximum gate voltage V G_MAX , and a control voltage terminal to which a control voltage V CTL is input.
  • GM-AMP 350 and headroom voltage V X 360 that compare the maximum gate voltage V G_MAX and the control voltage V CTL to generate and output the current difference;
  • Inverter 380 for inverting the output of the GM-AMP and DC-DC converter 370 for controlling the feedback loop using the output of the inverter to generate an optimized driving voltage (V LED.OPT ) It may be configured to include).
  • the optimized driving voltage may be a voltage of which the headroom voltage of the LED channel is minimized to maximize power efficiency while all LED channels operate in a saturated state.
  • the gate voltages V G and the control voltage V CTL are dropped by the diodes 310 and 320 and input to the GM-AMP 350.
  • the field effect transistor is an NMOS transistor. Is preferably.
  • FIG. 6 is a configuration diagram of an LED channel according to an embodiment of the present invention.
  • the LED channel of the present invention is connected to the driving voltage input terminal 110, the at least one LED (light emitting diode) 120, and the field effect transistor and the channel resistance 140 are sequentially connected to the driving voltage (V LED ) in sequence. It takes a structure to become.
  • the reference voltage V REF is input to a (+) terminal, a ( ⁇ ) terminal is connected to the source terminal 170, and an output terminal thereof is connected to the gate terminal 160. 1 shows OP-AMP 220 together.
  • the current I R passing through the channel resistor R 140 is determined by the voltage V a of the node a , that is, the source terminal voltage V S and the channel resistance R.
  • the voltage V a is equal to the reference voltage V REF due to the virtual short characteristic of the OP-AMP.
  • Equation 1 the current I R penetrating through the channel resistance R 140 may be expressed by Equation 1 below.
  • the forward current I F of the same LED as the current I R penetrating through the channel resistance R 140 may also be expressed by Equation 2 below.
  • the forward current (I F) of the LED will be able to because it is proportional to the reference voltage (V REF), by adjusting the reference voltage (V REF) to adjust the luminance (Brightness) of the LED.
  • the voltage V a of the node a (source terminal) is the same as the reference voltage V REF due to the abnormal shorting characteristic of the first OP-AMP, the voltage V a may be represented by Equation 3 below.
  • the voltage V b of the node (drain end) is equal to the driving voltage V LED minus the number of forward voltages (V F ) of n (the number of diodes), and is represented by Equation 4 below. Can be.
  • Equation 5 the condition for the NMOS transistor to operate in the saturation region is shown in Equation 5 below. That is, to be less than the drain voltage (V b) and the source voltage (V a), the saturation (saturation) the drain voltage (V DSAT) difference.
  • Equation 6 may be represented.
  • equation (6) can be summarized as shown in equation (7).
  • Equation 7 if the NMOS transistor is operating in the saturation region even though the driving voltage V LED increases, the forward current I F is determined by the reference voltage V REF and the channel resistance R. As determined, the brightness of the LED does not change. However, the V DS of the NMOS transistor is increased, and this V DS is called a headroom voltage, and can be expressed as Equation 8 below.
  • the LED driving driver of the present invention adjusts the driving voltage (V LED ) so that the headroom voltage is as small as possible when the transistors of all the LED channels operate in the saturation region, and the headroom voltage control It is called (Headroom Voltage Control). This will be described later.
  • FIG. 7 is a configuration diagram of a power control unit according to an embodiment of the present invention.
  • the power supply control unit the gate voltage input terminal for filtering the maximum gate voltage (V G_MAX ) by receiving the gate voltage (V G ) of the plurality of LED channels
  • the control voltage input terminal 340 is input the control voltage (V CTL ) GM-AMP 350 that compares the maximum gate voltage V G_MAX with the control voltage V CTL and generates and outputs a difference between the voltages as a current and a voltage V X between the source and drain terminals.
  • the gate voltage input terminal preferably includes a diode 310 to filter out the maximum gate voltage V G_MAX among the gate voltages V G input from each LED channel. That is, the maximum gate voltage V G_MAX is dropped by a predetermined value (for example, 0.7 V) by the diode 310 of the gate voltage input terminal, and accordingly, the control voltage input terminal diode 320 is provided to control the voltage V CTL. ) Is inputted to GM-AMP by a voltage drop to a predetermined degree.
  • the headroom voltage can be minimized by directly monitoring the drain voltage V D of the transistor.
  • the 2-PIN detecting method since the 2-PIN detecting method is used, the state of the drain voltage V D of the transistor must be inferred from the gate voltage V G.
  • the level of the gate voltage (V G ) when the transistor operates in a saturation region is set in advance.
  • the control voltage (V CTL ) which is a preset level value, is selected among the gate voltages (V G ) of each LED channel.
  • the feedback loop of the Dc-DC converter 370 is controlled in comparison with the maximum gate voltage V G_MAX , which is the highest gate voltage V G.
  • the maximum gate voltage V G_MAX and the control voltage V CTL are input to the GM-AMP 350 so that a difference is generated and outputted as a current, and the output of the Gm-AMP is a predetermined inversion.
  • the output is inverted by the voltage V Z.
  • the output of the inverting unit 380 controls the feedback loop of the DC-DC converter 370 to generate the optimized driving voltage V LED_OPT and then resupply the driving voltage input terminal of each LED channel.
  • the inverting unit 380 has a third OP-AMP having an output of Gm-AMP input to a (+) terminal, a (-) terminal connected to an output terminal thereof, and a predetermined inversion voltage (V) at a (+) terminal.
  • Z may be configured to include a fourth OP-AMP input, and may be formed such that the output of the Gm-AMP is inverted and output by appropriately disposing a resistor.
  • the DC-DC converter 370 adjusts a voltage fed back to the DC-DC converter 370 by the output of the inverting unit 380, thereby generating a driving voltage (V LED) generated by the DC-DC converter. Will be adjusted. That is, when the voltage fed back to the DC-DC converter 370 decreases, the DC-DC converter 370 generates a higher driving voltage V LED . On the contrary, when the voltage fed back increases, the driven output is increased. It will lower the voltage (V LED ).
  • FIG. 8 is a graph illustrating a relationship between a control voltage and a drain voltage according to an embodiment of the present invention.
  • a structure in which the drain voltage is inferred and determined by the gate voltage is used to determine the minimum drain voltage (V D.MIN ) for the NMOS transistor to operate in the saturation region.
  • V D.MIN minimum drain voltage
  • FIG. 9 is a graph showing a relationship between a driving voltage and a source voltage at the start of driving an LED channel according to an embodiment of the present invention.
  • V LED driving voltage
  • the field effect transistor operates in the linear region when the driving voltage V LED is low, the transistor at this time has a resistance component, and when the driving voltage V LED is linearly increased, the source of the transistor is Voltage V S also increases linearly. At this time, the current of the channel determined by the channel resistance (R) and the source voltage (V S ) also increases linearly.
  • the source voltage V S becomes equal to the fixed reference voltage V REF in accordance with the amount of current to flow in the channel in advance. Accordingly, it is possible when the source voltage (V S) is turned the same as the reference voltage (V REF) LED channel can be determined deuleogatdago in saturation.
  • the reference voltage V REF is fixed to a limit for optimizing the driving voltage V LED to saturate all channels, and thus may be used as a constant current source.
  • FIG 10 is an exemplary view of an LED channel unit including an open LED channel according to an embodiment of the present invention.
  • 11 is a graph illustrating a relationship between a driving voltage and a source voltage for each channel when one channel is opened at the start of driving the LED channel according to an embodiment of the present invention.
  • the LED drive driver of the present invention linearly increases the drive voltage (V LED ) to a sufficient voltage for all LED channels to enter the saturation region at the start-up of the drive. That is, when the time for increasing the driving voltage (V LED) linearly to a sufficient voltage in all the LED channel is getting into the saturation region t MAX la, after the t MAX last response (eg, a source voltage (V S) The channel without the increase of is determined to be open.
  • FIG. 12 is an exemplary view of a channel irradiator according to an embodiment of the present invention.
  • the channel irradiator includes a first OP ⁇ connected to the reference voltage V REF at a positive terminal, a negative terminal connected to the source terminal 170, and an output terminal connected to the gate terminal.
  • the AMP 220 and the short-circuit determination unit 230 comparing the source voltage V S and the open voltage V OPEN of the field effect transistor may be output.
  • the channel irradiator controls i) a constant current to flow through the channel by fixing the source voltage V S of the transistor to the reference voltage V REF , and ii) controlling the LED channel through the short circuit determination unit 230. investigate the opening and, iii) by using a short-circuit whether research and iv) a source voltage (V S) of the transistor during normal operation via the AD converter and performs a function to check whether the short circuit at the start of driving.
  • the short circuit determination unit 230 is a source voltage (V S ) of the field effect transistor (FET) is input to the (+) terminal, open voltage (V OPEN ) to the (-) terminal This may be configured as the input 2OP-AMP. On the contrary, the source voltage V S of the field effect transistor FET is input to the negative terminal and the open voltage V OPEN is input to the positive terminal.
  • V S source voltage
  • V OPEN open voltage
  • the channel irradiator By using the channel irradiator, it is possible to detect whether the LED channel is open in the normal operation.
  • the source voltage V S is the gate voltage V G. ) so down to ground level, regardless of, upon detecting a source voltage (V S) by using the first OP-AMP 2, it will be able to determine whether the open (open).
  • FIG. 13 is an exemplary view of an LED channel unit including a shorted LED channel according to an embodiment of the present invention
  • FIG. 14 is a case where one channel is shorted at the start of driving an LED channel according to an embodiment of the present invention. Is a graph showing the relationship between driving voltage and source voltage for each channel.
  • the drain voltage V D2 of the shorted channel is smaller than the drain voltages V D1 , V D3 and V D4 of another channel (eg, 2.5 V). Will rise by.
  • V MAX.VAR for determining whether or not a short circuit for each channel is defined by Equation 9 below, where V MAX.VAR is a difference between drain voltages allowed when all LED channels are saturated, in other words, It may be defined as the difference between the maximum drain voltage (V D.MAX ) and the minimum drain voltage (V D.MIN ) of the LED channel in a normal state.
  • the V MAX.VAR may be referred to as the variation range of the drain voltage (V D ) that is permitted in various applications to which the LED driving driver of the present invention is applied, and V MAX.VAR from the minimum value of the drain voltage (V D.MIN ). It is determined that the LED channel having the above drain voltage V D is bad.
  • Equation 9 is that V MAX.VAR means an allowable maximum value of the nV F difference caused by the forward voltage (V F ) of the LED when the LED is normally connected to the channel. can do. Therefore, when the drain voltage of each channel exceeds 2.0 V when the channel is normally connected, the channel having the highest drain voltage may be determined to be defective.
  • t TOT may be expressed as in the following equation.
  • the first driving voltage (V LED) is X ⁇ V REF for the time it takes to rise measured by using a counter as a t R, and the above equation V MAX.VAR (2.0V) and the X ⁇ V REF and t Substituting R makes t TOT easy to find.
  • X represents a constant.
  • 0.5V REF can be substituted, and it is preferable to select from the range of 0.25V REF to 0.75V REF .
  • each LED channel is saturated.
  • t TOT is reversely substituted from the last saturated channel as time passes, and it is determined that a channel saturated before t TOT is shorted. That is, the short-circuit since it is possible the drain voltage of the first channel than the saturated T TOT (V D) is more than V MAX.VAR higher than the drain voltage in the saturation channels to the last (V D) is determined from the calculated channel is saturated at the end It can be judged.
  • t TOT is divided from four channels, which are the last saturated channels, to short-circuit two channels, which are previously saturated channels.
  • 15 is a graph illustrating a short circuit determination reference voltage obtained during a calibration period and a gate voltage obtained during a normal period according to an embodiment of the present invention.
  • FIG. 15 illustrates a change in the gate voltage V G that can be monitored in the 2-PIN detecting method of the present invention according to the change of the drain voltage V D during the calibration period and the normal operation period.
  • a predetermined procedure is performed to determine whether the LED channel is short-circuited during normal operation.
  • the gate voltage of each channel obtained by artificially raising the driving voltage V LED by a predetermined value during a calibration period is provided.
  • the (V G ) values become the short-circuit determination reference voltage V SHT .
  • the calibration artificially raises the driving voltage (V LED ) by the drain voltage (V D ) which will increase when any one of the LED channels is short-circuited, thereby raising the driving voltage (V LED ).
  • the purpose is to obtain the gate voltage V G in the quasi-section. As will be described later, if the gate voltage V G obtained in the normal operation period is lower than the gate voltage V G obtained during the calibration period, it is determined that a short circuit has occurred in the channel.
  • the gate voltage V G should be repeatedly obtained in the normal operation section in order to determine whether the channel is shorted.
  • the acquisition of the gate voltage V G value in the calibration period is also preferably performed periodically.
  • the drain voltage V D should be inferred by using the gate voltage V G.
  • the short-circuit determination reference voltage V SHT is used. The short circuit determination reference voltage V SHT is periodically checked and used.
  • 16 is a graph illustrating a change in an optimized driving voltage according to a driving start section, a calibration section and a normal operation section of an LED channel according to an embodiment of the present invention.
  • the driving voltage V LED increases linearly until the optimized driving voltage V LED .OPT is achieved .
  • V LED.OPT drive voltage
  • V G gate voltage
  • V MAX.VAR is a difference between the drain voltages allowed when all the LED channels are saturated.
  • V MAX.VAR is the difference between the maximum value of each channel's drain voltage (V D.MAX ) and the minimum value of the drain voltage (V D.MIN ). It's a car.
  • V V MAX.VAR MAX.VAR from the drain voltage (V D) the minimum value (V D.MIN) can be described as the variation range, and the drain voltage of which is allowed by the various applications to be applied to the LED drive driver of the present invention It is determined that the LED channel having the above drain voltage V D is bad.
  • V LED.OPT a method of increasing the optimized driving voltage (V LED.OPT ) by V MAX.VAR (about 2.5V), if the voltage input to the inverting part is increased for a necessary time, the inverting output is DC-DC. The feedback voltage of the converter will drop, resulting in an easy way to increase the optimized drive voltage (V LED.OPT ).
  • T R is a time required to increase V S by 0.5 V
  • T TOT is a time required to increase channel voltage by V MAX_VAR
  • the T DC is driven by the DCDC converter of the power control unit during the time of T TOT .
  • voltage (V LED) give the information has not been optimized (optimize), driving voltage (V LED) will be raised by V MAX_VAR.
  • the power controller when the voltage output to the inverter is adjusted through the first switch SW1, the power controller performs a normal headroom voltage control operation to optimize the driving voltage V LED_OPT . Will be supplied.
  • V LED driving voltage
  • V LED_OPT optimized driving voltage
  • V LED_OPT V LED_OPT
  • the current entering the capacitance through the second switch SW2 has a 1 / Gm value which is an inverse value of the Gm value of Gm-AMP.
  • the gate voltage V G of each LED channel is converted into a digital value by using an AD converter in the optimized driving voltage V LED.OPT section and stored in the registry.
  • the data based on the stored gate voltage V G values becomes a short-circuit determination reference voltage V SHT for determining whether a short circuit occurs.
  • V LED.OPT driving voltage
  • V LED.OPT headroom Voltage Control
  • the gate voltage V G of each channel is periodically collected in the normal operation period.
  • the gate voltage (V G ) of each channel is converted into a digital value through analog-to-digital conversion, and the gate voltage is higher than the value of the data stored in the registry, that is, the short-circuit determination reference voltage (V SHT ), during the calibration period 520. If the (V G ) value is small, it is determined that it is short.

Landscapes

  • Led Devices (AREA)

Abstract

La présente invention concerne un circuit d'excitation de DEL (diode électroluminescente) et, plus précisément, un circuit d'excitation de DEL pouvant exécuter une commande même lorsqu'il n'est détecté qu'une borne de grille et une borne de source d'un transistor à canal de DEL.
PCT/KR2011/005133 2011-07-13 2011-07-13 Circuit d'excitation de del WO2013008967A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
PCT/KR2011/005133 WO2013008967A1 (fr) 2011-07-13 2011-07-13 Circuit d'excitation de del
KR1020117017785A KR101255176B1 (ko) 2011-07-13 2011-07-13 Ｌｅｄ구동 드라이버

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/KR2011/005133 WO2013008967A1 (fr) 2011-07-13 2011-07-13 Circuit d'excitation de del

Publications (1)

Publication Number Publication Date
WO2013008967A1 true WO2013008967A1 (fr) 2013-01-17

Family

ID=47506237

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2011/005133 WO2013008967A1 (fr) 2011-07-13 2011-07-13 Circuit d'excitation de del

Country Status (2)

Country Link
KR (1) KR101255176B1 (fr)
WO (1) WO2013008967A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014208989A1 (fr) * 2013-06-26 2014-12-31 주식회사 실리콘웍스 Circuit de pilotage pour un dispositif émetteur de lumière, et puce à semi-conducteurs employant ledit circuit de pilotage
WO2014209008A1 (fr) * 2013-06-28 2014-12-31 주식회사 실리콘웍스 Dispositif d'éclairage à diodes électroluminescentes et circuit de commande pour ce dernier

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20090076330A (ko) * 2008-01-08 2009-07-13 주식회사 케이이씨 시간 분할 다중 출력 직류-직류 컨버터를 갖는 발광 장치및 전원 장치
KR100936815B1 (ko) * 2009-04-28 2010-01-14 주식회사 튜반 멀티 채널 발광 다이오드 구동장치
KR20100008353A (ko) * 2008-07-15 2010-01-25 인터실 아메리카스 인코포레이티드 Ｌｅｄ 드라이버를 위한 동적 헤드룸 제어
KR20110038591A (ko) * 2009-10-08 2011-04-14 인터실 아메리카스 인코포레이티드 다상 ｌｅｄ 드라이버용 적응적 ｐｗｍ 컨트롤러

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20090076330A (ko) * 2008-01-08 2009-07-13 주식회사 케이이씨 시간 분할 다중 출력 직류-직류 컨버터를 갖는 발광 장치및 전원 장치
KR20100008353A (ko) * 2008-07-15 2010-01-25 인터실 아메리카스 인코포레이티드 Ｌｅｄ 드라이버를 위한 동적 헤드룸 제어
KR100936815B1 (ko) * 2009-04-28 2010-01-14 주식회사 튜반 멀티 채널 발광 다이오드 구동장치
KR20110038591A (ko) * 2009-10-08 2011-04-14 인터실 아메리카스 인코포레이티드 다상 ｌｅｄ 드라이버용 적응적 ｐｗｍ 컨트롤러

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014208989A1 (fr) * 2013-06-26 2014-12-31 주식회사 실리콘웍스 Circuit de pilotage pour un dispositif émetteur de lumière, et puce à semi-conducteurs employant ledit circuit de pilotage
WO2014209008A1 (fr) * 2013-06-28 2014-12-31 주식회사 실리콘웍스 Dispositif d'éclairage à diodes électroluminescentes et circuit de commande pour ce dernier
US9609702B2 (en) 2013-06-28 2017-03-28 Silicon Works Co., Ltd. LED lighting apparatus and control circuit thereof

Also Published As

Publication number Publication date
KR20130016720A (ko) 2013-02-18
KR101255176B1 (ko) 2013-04-22

Similar Documents

Publication Publication Date Title
WO2018128257A1 (fr) Circuit intégré de détection de tension et système de gestion de batterie le comprenant
WO2013039361A1 (fr) Appareil d'éclairage comprenant des diodes électroluminescentes à semi-conducteurs
WO2012144864A2 (fr) Appareil d'éclairage à del capable de protéger les éléments de del, et procédé de commande dudit appareil d'éclairage à del
WO2020085702A1 (fr) Appareil d'affichage et son procédé de commande
WO2013100733A1 (fr) Appareil de commande de rétroéclairage
WO2020082466A1 (fr) Circuit et procédé de correction de tension gamma, et dispositif d'affichage
WO2014137099A1 (fr) Appareil d'attaque de diodes électroluminescentes
WO2019017626A1 (fr) Dispositif d'affichage, circuit de détection et circuit intégré de pilote source
WO2020098064A1 (fr) Circuit de commande, appareil d'affichage et procédé de commande de circuit de commande
WO2018079929A1 (fr) Convertisseur cc-cc aux propriétés de sortie stables sur une large plage de tensions d'entrée, et muni d'un dispositif de gestion de modification de tension d'entrée
WO2010058923A2 (fr) Dispositif lumineux à courant alternatif, son dispositif d'attaque et procédé d'attaque associé
WO2018169212A1 (fr) Dispositif et procédé de mesure de la diode électroluminescente organique
WO2013008967A1 (fr) Circuit d'excitation de del
WO2016104940A1 (fr) Dispositif d'attaque d'élément électroluminescent
WO2016108397A1 (fr) Appareil d'affichage et procédé de commande associé
WO2014208989A1 (fr) Circuit de pilotage pour un dispositif émetteur de lumière, et puce à semi-conducteurs employant ledit circuit de pilotage
WO2016037347A1 (fr) Appareil et procédé d'essai de panneau d'affichage
WO2021045379A1 (fr) Dispositif de commande de données pour déterminer un défaut de liaison, et dispositif d'affichage le comprenant
WO2015122635A1 (fr) Module d'entraînement de del intelligentes de type connexion directe à ca
WO2021066444A1 (fr) Circuit de détection de pixel et circuit intégré de pilote d'affichage
WO2017086674A1 (fr) Dispositif d'éclairage à diodes électroluminescentes
WO2021066434A1 (fr) Circuit de détection de pixel et circuit intégré
WO2020209532A2 (fr) Dispositif stroboscopique à del synchronisé avec une caméra
WO2024136431A1 (fr) Dispositif de gestion de puissance
WO2015080467A1 (fr) Appareil d'alimentation électrique pour éclairage à led

Legal Events

Date Code Title Description
ENP Entry into the national phase

Ref document number: 20117017785

Country of ref document: KR

Kind code of ref document: A

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 11869431

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 18/07/2014)

122 Ep: pct application non-entry in european phase

Ref document number: 11869431

Country of ref document: EP

Kind code of ref document: A1

点击 这是indexloc提供的php浏览器服务，不要输入任何密码和下载