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WO2012136000A1 - Procédé et dispositif de remplissage d'adhésif (4) dans un boîtier de semi-conducteur - Google Patents

Procédé et dispositif de remplissage d'adhésif (4) dans un boîtier de semi-conducteur Download PDF

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Publication number
WO2012136000A1
WO2012136000A1 PCT/CN2011/072462 CN2011072462W WO2012136000A1 WO 2012136000 A1 WO2012136000 A1 WO 2012136000A1 CN 2011072462 W CN2011072462 W CN 2011072462W WO 2012136000 A1 WO2012136000 A1 WO 2012136000A1
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WIPO (PCT)
Prior art keywords
primer
substrate
oven
flow
filling
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PCT/CN2011/072462
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English (en)
Chinese (zh)
Inventor
金鹏
卢基存
Original Assignee
北京大学深圳研究生院
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Application filed by 北京大学深圳研究生院 filed Critical 北京大学深圳研究生院
Priority to CN201180004482.2A priority Critical patent/CN103109361B/zh
Priority to PCT/CN2011/072462 priority patent/WO2012136000A1/fr
Publication of WO2012136000A1 publication Critical patent/WO2012136000A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
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    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
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    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
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    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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    • H01L2224/81053—Bonding environment
    • H01L2224/8109—Vacuum
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    • H01L2224/818—Bonding techniques
    • H01L2224/8185—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/81855—Hardening the adhesive by curing, i.e. thermosetting
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
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    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83104—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus by applying pressure, e.g. by injection
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    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
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    • H01L2224/83986—Specific sequence of steps, e.g. repetition of manufacturing steps, time sequence
    • H—ELECTRICITY
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    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9212—Sequential connecting processes
    • H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
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    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

Definitions

  • the invention relates to a method and a device for filling a primer in a semiconductor package.
  • Surface mount is one of the most popular packaging methods for assembling electronic devices on substrates or printed circuit board PCBs.
  • the surface mount device is interconnected with a substrate using a plurality of metal solder joints (such as lead-tin alloy) with a gap between the mount device and the substrate.
  • metal solder joints such as lead-tin alloy
  • CTE coefficients of thermal expansion
  • stress and strain will occur in the solder joint when the temperature changes.
  • the stress and strain generated by the temperature change of the device during use will cause the solder joint to break and fail.
  • the common practice in the electronics industry is to fill the underfill material between the device and the substrate, thereby reducing the deformation and strain of the solder joint and improving the reliability life of the solder joint.
  • the packaging process of the underfill is often called Underfill.
  • Examples of electronics that require underfill include flip chip, chip scale package (CSP) and ball grid array (BGA) packages. Air gaps in other forms of packaging, such as voids between electronic device stacks, may also require padding.
  • flip chip package the active side of the semiconductor chip is "flip" and is mounted directly on the printed circuit board by ball joints.
  • the chip material is silicon, gallium arsenide, etc.
  • CTE is 2-4ppm/ °C
  • the substrate material is organic (such as FR-4, polyimide and BT, CTE is 20ppm/ °C ) or inorganic materials (such as alumina and low temperature co-fired ceramics, CTE 3-10 ppm / °C
  • CTE 3-10 ppm / °C
  • CSP chip scale package
  • BGA ball grid array
  • the semiconductor chip is mounted on a substrate made of a material such as BT, and the substrate is then connected to the printed circuit board PCB through solder joints.
  • the thermal expansion coefficient of the substrate and the printed circuit board is different, The gap between them also requires a primer fill, while the underfill fill can greatly increase the ability of the solder joint to withstand external mechanical stresses, such as the stress experienced by the mobile device when it falls to the ground.
  • Primer filling is a very time consuming process, and despite the many underfill processes such as no-flow and wafer-level processes, the traditional capillary flow underfill process still dominates today's industry.
  • a liquid primer material is applied to a printed circuit board PCB or a mounting device on a substrate with a pinhole or nozzle to heat the substrate to a temperature at which the primer can flow (eg, 70). -90 degrees Celsius) to reduce the viscosity of the underfill.
  • the primer flows and fills the gap between the device and the substrate.
  • the above process is performed on a heating table on the dispensing device.
  • the primer flows and fills the gap (such as 0.05).
  • the gap such as 0.05.
  • - 0.15mm flip chip and for 0.3 - 0.8 mm CSP takes longer.
  • the underfill flow takes longer than 15 seconds, and it takes longer for the larger device and the smaller gap to fill.
  • ⁇ is the viscosity coefficient of the primer
  • L is the flow distance
  • h is the flow gap height
  • ⁇ is the contact angle of the primer to the substrate.
  • Another major problem with the capillary flow underfill process is the presence of voids in the primer material, especially for large devices, smaller device and substrate gaps, and more solder joint devices.
  • the liquid primer material flows unevenly in the gap between the device and the substrate.
  • the flow velocity changes in the area with solder joints, and the flow near the edge of the device tends to be faster than the middle.
  • the surface environment of the device and the substrate changes.
  • the presence of flux and residue can change the flow rate of the primer. Air bubbles appear between the fast and slow flow areas of the primer, and the bubbles become voids after the primer cures.
  • the existence of the void not only changes the size of the primer, but also forms a pressure concentration point inside the primer, and moisture is easily accumulated in the cavity, which adversely affects the reliability of the device.
  • US Patent 5,998,242 "Vacuum assisted Underfill process and apparatus for semiconductor package Fabrication is about placing a vacuum chamber on a single device substrate.
  • the primer is applied around the device through a needle through the vacuum chamber and fills the gap between the device and the substrate.
  • the vacuum environment is beneficial to reduce air bubbles in the primer, but the vacuum chamber for the device and the special primer coating equipment are the difficulties of this method.
  • US Patent 6,653,172 Methods For providing void-free layers for semiconductor assemblies, a method for removing bubbles from a primer is described. Special pressurization equipment is also required.
  • the prior invention has mainly reduced the glue flow time of a single electronic device to improve the efficiency of the process.
  • a small cavity is pressed against the substrate of the device, and a vacuum or high pressure within the cavity accelerates the flow of the primer around the device and reduces air bubbles in the primer.
  • They have some major process and equipment difficulties, and the cavity needs to be customized for the size of the device. After the device is changed, the design of the cavity needs to change.
  • Another disadvantage is that although the primer flow time is reduced, However, it takes time to place a cavity on the device substrate and to evacuate or pressurize. The most important thing is that the underfill filling is still completed by one device and one device, and the overall process efficiency is not high. Therefore, there is an urgent need for a simple and versatile process and equipment, and at the same time, a high efficiency and void-free primer filling method can be achieved.
  • the main technical problem to be solved by the present invention is to provide a method and a device for filling a primer in a semiconductor device package, which can shorten the time consuming process of the underfill filling process.
  • the present technology takes a semiconductor device as an example, but can also be applied to other devices such as optoelectronics that require a primer filling process or even a top potting.
  • the present invention adopts the following technical solutions:
  • a primer filling method in a semiconductor package for filling a gap between a substrate and a semiconductor device packaged on the substrate comprising:
  • Primer coating applying a primer to the edge of the semiconductor device on the substrate by using a primer coating machine
  • Primer flow transferring the substrate coated with the primer into an oven, heating at a primer flow temperature until a primer is filled into a gap between the substrate and the semiconductor device;
  • Primer curing heating at the primer curing temperature until the primer cures.
  • the oven is maintained in a vacuum environment as the primer flows.
  • the advantage is that there is no void in the primer, and the vacuum furnace evacuates the air between the device and the substrate before the primer fills the gap. Even if the primer is filled before entering the vacuum furnace, the vacuum furnace will drive out the bubbles in the primer as long as the primer is not cured. Therefore, the process window of the present invention for bubble-free underfill filling is large.
  • the primer is applied along the periphery of the semiconductor device in a symmetrical manner as the primer is applied.
  • the substrate is tilted in the oven while the primer is flowing, and a surface is covered on the surface of the semiconductor device before the primer flows.
  • Adhesive layer Adhesive layer.
  • the primer comprises a liquid primer, a solid primer or a paste primer.
  • the liquid primer is applied to the substrate by a dropping process;
  • a solid primer it is applied to the substrate by means of heated needle coating and solid block placement; when the paste is applied, it is applied to the substrate by a printing process or a needle tube.
  • a batch process is used to simultaneously perform primer flow and solidification on a plurality of substrates.
  • the present invention also provides a primer filling device for a semiconductor package for filling a gap between a substrate and a semiconductor device packaged on the substrate, comprising:
  • a primer coating machine for applying a primer to an edge of a semiconductor device on the substrate
  • the oven is used to heat the primer on the substrate coated with the primer placed therein at a primer flow temperature until the primer is filled into the gap between the substrate and the semiconductor device;
  • the gum curing temperature heats the primer until the primer cures.
  • the oven for performing the flow of the primer is a vacuum oven or a vacuum reflow oven.
  • the oven for curing the primer is a hot plate, a conventional oven or a reflow oven.
  • the invention can effectively shorten the time required for the primer to flow, thereby reducing the time consumption of the primer filling process as a whole.
  • Figure 1 is a schematic diagram of a capillary flow underfill filling process commonly used in the industry today; wherein, Figure 1A It is a liquid primer coating process diagram on the dispenser; Figure 1B is a gap diagram of the substrate and the substrate gap flow on the dispenser; the substrate temperature is maintained at the temperature required for the primer to flow (eg 70-90 ° C); 1C is a cure diagram of the primer; the curing temperature is usually at a higher temperature (eg 125-165 ° C);
  • FIG. 2 is a process diagram of a capillary flow primer filling process in an embodiment of the present invention
  • FIG. 2A is a liquid primer coating process diagram on a dispenser
  • FIG. 2B is in an oven (vacuum oven or vacuum reflow oven, temperature 70) -90 ° C) the bottom glue flow fill chip and substrate gap diagram
  • Figure 2C is in the oven (vacuum oven or vacuum reflow oven) primer cure diagram
  • Figure 3 is a schematic view of the symmetrical coating process along the periphery of the device; wherein, Figure 3A is a top view of the primer uniformly coated around the device; Figure 3B It is a cross-sectional view of the primer evenly coated around the device.
  • the present invention relates to a method and apparatus for filling a primer in a device such as a semiconductor package.
  • the encapsulation herein refers to the interconnection of one or more semiconductor package devices to a printed circuit board substrate or a device using a bonding material such as solder.
  • the conventional underfill is applied to the edge of the package component on a machine, and the primer flows through the capillary in an air environment and fills the gap between the substrate and the device. Finally, The primer is cured in a conventional air heating furnace.
  • the main disadvantage of the conventional method is that the adhesive flow of a single component is long or the production efficiency is low, and voids are likely to occur due to the flow of the primer material in the air.
  • the present invention provides a high efficiency void-free primer filling method and apparatus, as follows:
  • a primer filling method in a semiconductor package for filling a gap between a substrate and a semiconductor device packaged on the substrate comprising:
  • Primer coating applying a primer to the edge of the semiconductor device on the substrate by using a primer coating machine
  • Primer flow transferring the substrate coated with the primer into an oven, heating at a primer flow temperature until a primer is filled into a gap between the substrate and the semiconductor device;
  • Primer curing heating at the primer curing temperature until the primer cures.
  • the primer used in the prior art is generally a liquid primer which is coated with a glue needle or a jet pump and controls the gantry along both sides of the device.
  • Asymtek's C-720 is an example of a liquid primer coater.
  • the primer may comprise a liquid primer, a solid primer or a paste primer, i.e., in addition to conventional liquid primers, the invention may also be filled with a paste and a solid primer material.
  • the liquid underfill material is applied to the substrate along the edge of the device by a machine dropping method, and the solid and paste underfill materials are directly placed and printed or coated on the substrate, respectively, and the primer can be like a conventional The process is placed on one or both sides of the device, and three or four sides of the device can be placed.
  • the heating plate of the dispenser may be heated or slightly heated in order to adhere the primer to the edge of the device. Since the viscosity of the primer is still large because it is not heated, the purpose of the present invention on the dispenser is that the gap between the device and the substrate does not flow or the flow distance is small.
  • Another possible state for the underfill used for filling is solid at room temperature (eg epoxy).
  • epoxy resin is that once cured, the viscosity will be very low and have a high proportion of inorganic fillers (such as 80% SiO2 particles). A higher proportion of filler has a lower coefficient of thermal expansion and higher reliability.
  • Solid primers are applied in two ways: (1) heated needle or nozzle coating (2) solid coating.
  • needle coating the primer is heated in a syringe to a medium temperature to melt into a liquid state. During coating, heating near the needle of the needle causes the primer to drip along the edge of the device. It can also be coated with a heated nozzle.
  • the primer falls on a substrate at room temperature or low temperature, it cools and solidifies into a solid.
  • the primer solid is first shaped into strips of the size of the base device, and the strip-shaped primer is placed along the device by a robot.
  • the substrate is usually heated or coated with a layer of bonding material to ensure adhesion of the primer to the substrate.
  • a paste primer is used, a template with a hole such as a steel plate may be printed on the substrate. It can also be applied by nozzle or nozzle.
  • the primer coating process of the present invention has the following three differences from the prior art primer coating process:
  • the printed circuit board substrate of the present invention may or may not be heated.
  • the substrate may not be heated or heated only to a temperature lower than that required for the flow of the primer (less than 70-90). °C). Therefore, the primer applied on the substrate has a low temperature and a high viscosity, which weakens the fluidity of the primer in the primer coating process.
  • the existing process generally adopts a liquid primer, and in addition to the liquid primer, the solid and paste primer can also be applied.
  • the primer can be applied along the four sides of the device, however in the prior art, the primer is applied only along one or both sides of the device to reduce bubble generation. Therefore, process engineers do not need to perform a large number of experiments to minimize bubbles, which are adjusted by the coating scheme and substrate temperature.
  • the needle cross section can be a small square shape.
  • An important parameter during coating is the size of the primer, which is equal to the volume of the gap between the device and the substrate plus the amount of primer required for the edge of the device.
  • the device is placed obliquely in the oven so that the primer on the surface flows to the side walls of the device and the gap between the device and the substrate is filled.
  • the upper surface of the device is first covered with a non-adhesive layer such as, for example, Teflon.
  • the primer flow is performed.
  • the flow and cure of the primer in the present invention is carried out in an oven in an air or vacuum environment.
  • the oven can for example be a separate reflow oven or an oven with three to seven heating zones and a moving belt.
  • the temperature profile of the primer flowing in the oven and curing is divided into two stages.
  • the primer flow temperature of the first stage (for example, 70 to 90) °C ) is to reduce the viscosity of the primer to promote the flow of the primer.
  • the primer is filled with a gap and heated to the second stage of the primer cure temperature (eg, 140-165 ° C)
  • the length of cure depends on the cure rate of the primer. As long as the primer can fill the gap before curing, a temperature profile of more than 2 stages of the oven can be used.
  • a simple conventional oven and reflow oven can be used for small device packages that are less prone to bubble formation.
  • a simple conventional oven and reflow oven can be used for small device packages that are less prone to bubble formation.
  • a vacuum oven, a vacuum reflow oven or a vacuum chamber for the flow and curing of the primer.
  • the device and PCB board will be transferred from the coating machine to the vacuum oven.
  • the starting temperature of the oven is a temperature between the room temperature and the gel flow temperature (for example, 70-90 ° C) or the primer flow temperature.
  • the oven is raised to the primer flow temperature and held for a period of time until the primer fills the gap between the device and the substrate and forms a fillet around the device.
  • the package is then baked or cured by UV curing at the base curing temperature (eg, 125-165 ° C) from the same vacuum oven or another conventional oven.
  • a vacuum furnace may or may not be used during the curing process.
  • the main purpose of the primer flow in a vacuum oven is to remove the air between the chip and the substrate before the primer fills the gap; and even if the primer has been coated and filled with gaps, two temperature gradients are used in the vacuum oven. The heating of the curve also drives the air away.
  • a vacuum reflow furnace can also be used in the present invention, and the device primer can be covered with a vacuum chamber in a certain area of the reflow furnace when flowing.
  • the primer-coated package is placed in a movable vacuum chamber, a batch of the package is placed, the vacuum chamber is evacuated, and then the temperature in the vacuum chamber is raised to the flow temperature of the glue, or the temperature in the vacuum chamber is initially Maintaining the flow temperature of the primer, it takes time for the substrate to heat up.
  • the primer is warmed up.
  • the oven is in a vacuum environment, and the flow of the primer is in a vacuum, thereby avoiding the air flow process.
  • the curing of the primer can be in any environment, and the baking machine can be a hot plate, a conventional oven or a reflow oven.
  • the primer For small devices (5mm or less), the primer should be applied along one or both sides of the device and the package placed in a conventional oven or reflow oven. Since small devices are less prone to bubble generation, vacuuming is generally not required.
  • the baking temperature is also a medium flow temperature and a higher curing temperature. Transfer the primer flow process from the dispenser to the oven, the primer flow time is reduced, and the process efficiency is improved.
  • the benefit of transferring the primer flow process from the dispenser to the oven is that it can significantly increase productivity and reduce equipment investment.
  • a plurality of substrates can be subjected to a primer flow and a filling gap in a batch process in an oven.
  • the flow of the primer can only be carried out one by one. For example, it takes 20 seconds to fill the gap of 100 flip chips, and the total time required on the dispenser will be 2000 seconds.
  • the primer cure can also be carried out in batch mode in an oven.
  • the present invention also achieves uniformity of the bottom glue volume around the device.
  • the edge of the device is filled with excess primer around the device. Its cross section is rounded, and the consistency of the fillet helps to improve reliability.
  • the cross section of the fillet is generally concave and convex if the primer is applied in excess.
  • the problem with conventional primers is that the primer is not uniform around the device because the primer is applied on one or both sides of the device, the primer flows from the coated edge to the uncoated edge, and the bottom is often coated with more primer. On uncoated edges. In the worst case, there is no coating edge without primer.
  • the current practice in the industry is to apply a layer of primer around the device after the primer is filled.
  • the present invention can apply a primer along the periphery of the device in a symmetrical manner during the application of the primer to ensure uniformity of the fillet at the edge of the device.
  • the present invention employs different machines to separately treat the primer coating and flow. This brings many advantages:
  • the primer material can be used in a wider form, and the substrate can be heated or slightly heated.
  • the substrate must be heated compared with the prior art to simplify the process or save energy.
  • the application of the primer along the periphery of the device in a symmetrical manner during the coating of the primer can ensure the consistency of the underfill at the end of the primer coating process, that is, at the end of the primer filling process.
  • the prior art requires an additional process to ensure this consistency.
  • the bottom glue flow in the oven can save the flow process time and save equipment investment, especially through the batch processing method to simultaneously process the bottom glue flow of multiple devices, can greatly reduce the overall underfill filling of a batch of devices time.
  • the oven into a vacuum environment to complete the flow of the primer in a vacuum, the possibility of voids in the filling of the primer can be greatly reduced.

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

La présente invention concerne un procédé et un dispositif de remplissage d'adhésif (4) dans un boîtier de semi-conducteur. L'adhésif (4) recouvre un bord ou quatre bords de semi-conducteur ou de puces sur le substrat, puis l'adhésif (4) s'écoule entre la puce et le substrat jusqu'à remplir tout l'espace. Plusieurs bords du dispositif sont recouverts d'adhésif (4) et le dispositif est déplacé vers une boîte à vide, puis l'adhésif (4) s'écoule par lot dans les divers dispositifs, ce qui permet de diminuer le temps de remplissage en adhésif (4) et d'augmenter le rendement de production. L'adhésif (4) se solidifie dans la boîte à vide, les bulles d'air s'annulent durant le temps pendant lequel l'adhésif (4) est formé, et les cavités s'annulent du fait que les gaz se volatilisent durant la solidification de l'adhésif (4). Ceci permet d'augmenter la qualité et la fiabilité du remplissage de dispositif par adhésif (4).
PCT/CN2011/072462 2011-04-06 2011-04-06 Procédé et dispositif de remplissage d'adhésif (4) dans un boîtier de semi-conducteur WO2012136000A1 (fr)

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CN201180004482.2A CN103109361B (zh) 2011-04-06 2011-04-06 一种半导体封装中的底胶填充方法及设备
PCT/CN2011/072462 WO2012136000A1 (fr) 2011-04-06 2011-04-06 Procédé et dispositif de remplissage d'adhésif (4) dans un boîtier de semi-conducteur

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CN106449685A (zh) * 2016-10-24 2017-02-22 江苏钜芯集成电路技术股份有限公司 用于感光芯片封装的喷胶工艺
CN106548951A (zh) * 2016-11-25 2017-03-29 维沃移动通信有限公司 一种指纹识别模组芯片的封装方法
CN107293498A (zh) * 2017-07-03 2017-10-24 华进半导体封装先导技术研发中心有限公司 一种倒装芯片制备方法
CN108260292A (zh) * 2017-12-08 2018-07-06 江西合力泰科技有限公司 一种smt之后增加底部填充胶覆盖率的方法
CN110072347A (zh) * 2019-04-09 2019-07-30 南昌嘉研科技有限公司 一种bga封装芯片的防护结构及其加工方法
CN110707052A (zh) * 2019-11-13 2020-01-17 东莞市新懿电子材料技术有限公司 一种芯片封装结构
CN113113325A (zh) * 2021-04-08 2021-07-13 中国电子科技集团公司第二十四研究所 多芯片倒装焊三层封装结构的底填灌封方法
CN114554769A (zh) * 2020-11-18 2022-05-27 英业达科技有限公司 服务器的密封方法

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CN108108681A (zh) * 2017-12-14 2018-06-01 江西合力泰科技有限公司 具有高抵抗外力能力的生物识别模组及其制备方法
CN108906527A (zh) * 2018-06-04 2018-11-30 昆山丘钛微电子科技有限公司 一种胶水填充方法和胶水固化方法
CN118369751A (zh) * 2021-12-06 2024-07-19 国际商业机器公司 底部填充真空工艺
CN116705656B (zh) * 2023-05-29 2024-03-22 武汉光启源科技有限公司 一种定向去除底部胶水气泡的方法及装置
CN119230425A (zh) * 2024-09-27 2024-12-31 重庆鹰谷光电股份有限公司 一种半导体芯片封装除泡系统及除泡方法

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CN106449685A (zh) * 2016-10-24 2017-02-22 江苏钜芯集成电路技术股份有限公司 用于感光芯片封装的喷胶工艺
CN106548951A (zh) * 2016-11-25 2017-03-29 维沃移动通信有限公司 一种指纹识别模组芯片的封装方法
CN107293498A (zh) * 2017-07-03 2017-10-24 华进半导体封装先导技术研发中心有限公司 一种倒装芯片制备方法
CN108260292A (zh) * 2017-12-08 2018-07-06 江西合力泰科技有限公司 一种smt之后增加底部填充胶覆盖率的方法
CN110072347A (zh) * 2019-04-09 2019-07-30 南昌嘉研科技有限公司 一种bga封装芯片的防护结构及其加工方法
CN110072347B (zh) * 2019-04-09 2024-10-29 深圳市中星联技术有限公司 一种bga封装芯片的防护结构及其加工方法
CN110707052A (zh) * 2019-11-13 2020-01-17 东莞市新懿电子材料技术有限公司 一种芯片封装结构
CN114554769A (zh) * 2020-11-18 2022-05-27 英业达科技有限公司 服务器的密封方法
CN114554769B (zh) * 2020-11-18 2024-03-22 英业达科技有限公司 服务器的密封方法
CN113113325A (zh) * 2021-04-08 2021-07-13 中国电子科技集团公司第二十四研究所 多芯片倒装焊三层封装结构的底填灌封方法

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