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WO2012068845A1 - Procédé et système de synchronisation temporelle - Google Patents

Procédé et système de synchronisation temporelle Download PDF

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Publication number
WO2012068845A1
WO2012068845A1 PCT/CN2011/074301 CN2011074301W WO2012068845A1 WO 2012068845 A1 WO2012068845 A1 WO 2012068845A1 CN 2011074301 W CN2011074301 W CN 2011074301W WO 2012068845 A1 WO2012068845 A1 WO 2012068845A1
Authority
WO
WIPO (PCT)
Prior art keywords
physical network
network port
indicates
port rate
slave device
Prior art date
Application number
PCT/CN2011/074301
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English (en)
Chinese (zh)
Inventor
罗丽
彭勇
傅小明
唐雄
Original Assignee
中兴通讯股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 中兴通讯股份有限公司 filed Critical 中兴通讯股份有限公司
Publication of WO2012068845A1 publication Critical patent/WO2012068845A1/fr

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0658—Clock or time synchronisation among packet nodes
    • H04J3/0661—Clock or time synchronisation among packet nodes using timestamps
    • H04J3/0667—Bidirectional timestamps, e.g. NTP or PTP for compensation of clock drift and for compensation of propagation delays

Definitions

  • the present invention relates to the field of clock synchronization, and in particular, to a method and system for time synchronization.
  • IP-based packet network transmission data has been the mainstream of development.
  • new services and new applications impose higher requirements on the synchronization of the network, and on the other hand, traditional time division multiplexing
  • TDM Time Division Multiplexing
  • the Precision Time Synchronization Protocol (1588-2008) is a timing mechanism for overcoming the lack of real-time Ethernet. Its emergence has brought us hope. Its main principle is to all the network. The node performs time synchronization, and the clock of all nodes in the network is periodically synchronized and corrected by an accurate time source.
  • IEEE 1588 PTP is an Ethernet clock synchronization protocol that implements master-slave synchronization by synchronizing messages.
  • the PTP standard protocol can be carried over Ethernet 802.3, UDP/IPv4, and UDP/IPv6.
  • the format of the 802.3 frame structure is shown in Table 1.
  • the IEEE 1588v2 system is a master-slave synchronization system.
  • the master clock sends PTP time information according to a predetermined time interval
  • the clock port receives the timestamp information sent by the master clock port, and the system calculates the master according to the time.
  • the line time delay and the master-slave time difference are used, and the time difference is used to adjust the local time so that the slave time is kept at the same frequency and phase as the master time.
  • the body scheme is shown in Figure 1.
  • the master sends a Sync message and records the time tl.
  • the slave device receives the Sync message, it records t2.
  • the slave learns tl based on the Follow_up message sent by the master.
  • the slave device initiates a Delay_Req message and records the time t3.
  • the master device After receiving the Delay-Req message, the master device records the time t4 and fills in the Delay_Resp message.
  • the slave learns t4 based on the Delay_Resp message sent by the master.
  • tl and t2 are the timestamps for sending and receiving Sync messages, that is, t1 is the time when the Sync message is sent out to the master device, and t2 is the time when the Sync message arrives at the slave device.
  • T3 and t4 are the transmission and reception timestamps of the Delay-Req message respectively, that is, t3 is the time when the Delay-Req message is sent out from the device, and t4 is the time when the Delay-Req message is sent to the master device.
  • the difference between the time of the slave device and the time of the master device is the difference between the time of the slave device and the time of the master device.
  • the existing IEEE 1588-2008 standard does not explicitly describe whether the primary and secondary physical network ports are rate matched. If the rate of the primary and secondary physical network ports is inconsistent, the delay time from the master to the slave is different from the delay time from the master to the slave. Time synchronization error, resulting in phase asymmetry in synchronization.
  • the technical problem to be solved by the present invention is to provide a method and system for time synchronization, which solves the problem that the time between the master and the slave is inconsistent due to the inconsistent physical rate of the time stamp interface.
  • the present invention provides a method for time synchronization, including: The master device notifies the slave device of its physical network port rate information.
  • the device learns the physical network port rate of the master device, it compares it with its own physical network port rate. If it is not the same, it compensates the calculated average line transmission delay. Otherwise, no compensation is performed.
  • the above method has the following characteristics:
  • the step of the master device notifying the slave device of the physical network port rate includes:
  • the master device sends a notification packet to the slave device, where the notification packet carries its own physical network port rate information.
  • the above method has the following characteristics:
  • the master device Before the master device sends the notification packet to the slave device, the master device writes its own physical network port rate information into the reserved byte between the domain number of the notification packet and the identifier field.
  • the above method has the following characteristics:
  • 0001 indicates the physical network port rate of 10M
  • 0010 indicates the 100M physical network port rate
  • 0100 indicates the 1000M physical network port rate
  • 1000 indicates the 10000M physical network port rate.
  • the above method has the following characteristics:
  • the slave device compensates the clock offset by subtracting the delay error from the calculated average line transmission delay, where
  • J represents the entire frame length except the frame preamble and the check bit
  • J 2 represents the check bit length
  • ⁇ represents the frame preamble length
  • Sm represents the time at which the physical network port of the master device forwards each bit of data
  • Ss represents the physical network port of the slave device. The time to forward each bit of data.
  • the present invention provides a time synchronization system including a master device and one or more slave devices.
  • the master device is configured to: notify the slave device of the physical network port rate information;
  • the slave device is set to: After the physical network port rate of the master device is learned, the physical network port rate is For comparison, if not the same, the calculated average line transmission delay is compensated, otherwise, no compensation is performed.
  • the above system has the following characteristics:
  • the master device is further configured to: notify the slave device by sending the notification message to the slave device, and the notification packet carries the rate information of the physical network port of the device.
  • the above system has the following characteristics:
  • the master device is further configured to: write the physical network port rate information of the notification message into the reserved byte between the domain number of the notification message and the identifier field before sending the notification message to the slave device.
  • the above system has the following characteristics:
  • 0001 indicates the physical network port rate of 10M
  • 0010 indicates the 100M physical network port rate
  • 0100 indicates the 1000M physical network port rate
  • 1000 indicates the 10000M physical network port rate.
  • the above system has the following characteristics:
  • the slave device is further configured to: compensate the clock offset by subtracting a delay error from the calculated average line transmission delay, where
  • ⁇ indicates the entire frame length except the frame preamble and check digit
  • J 2 indicates the check bit length
  • ⁇ indicates the frame preamble length
  • Sm indicates the time at which the physical network port of the master device forwards each bit of data
  • Ss indicates the physical network port of the slave device. The time to forward each bit of data.
  • the delay asymmetry caused by the inconsistent rate of the primary and secondary physical network ports can be solved in the delay request response mechanism, resulting in phase unsynchronization.
  • Figure 1 is a schematic diagram of a delay request response mechanism
  • FIG. 2 is a schematic diagram of networking
  • Fig. 3 is a flow chart showing an application example of the present invention. Preferred embodiment of the invention
  • the intermediate unknown network (cloud network) has the same delay
  • the check digit is 4 bits
  • the physical network port rate of the master device is Gigabit Ethernet
  • the physical network port rate of the slave device is 100 Mbps Ethernet
  • the delay of the event message is:
  • t2-tl (L l + L 2 ⁇ ytes x ltslbyte x GE nslbit + D PSN + (L 3) bytes x ltslbyte x FE mlbit ( Formula 3) wherein, A represents a frame preamble (pre-amble) and other checking The entire frame length outside the bit (FCS); J 2 represents the length of the check bit ( FCS );
  • J 3 represents the length of the frame preamble (re-amble).
  • FE m/bit indicates the time when the 100M physical network port forwards data per bit.
  • D PSN represents unknown time delay through the packet network
  • T4-t3 ⁇ L x + L 2 ) bytes x Usjbyte x FE nsjbu + D PSN + (L 3 ) bytes x ltslhyte x GE nsjbu (Formula 4) where A, 2 , L GE nslM , FE mlbtt , D layer and Equation 3 represents the same.
  • the average line transmission delay is as follows:
  • N meanPathDelayA (A + 2 ) X 8 X GE ⁇ FE + 3 ⁇ 8 x FE ⁇ GE (Equation 8) Equation 6
  • Subtraction 4 calculates the delay error from Master to Slave and Slave to Master: r _ (J ⁇ o GE ⁇ FE FE ⁇ GE ( - Q
  • the time required to transmit one bit of data is Ins.
  • the time required to transmit one bit of data is 10 ns. Substituting 8 or 9 can be obtained,
  • the primary device is the 1000M physical network port rate
  • the secondary device is the 100M physical network port rate, which is subjected to the primary switching and the nine-level switching respectively.
  • the experimental results are shown in the table below. It can be seen from Table 2 that the increase of the number of switching stages has no effect on the asymmetry, which is caused by the rate mismatch between the primary and secondary physical network ports.
  • the invention proposes to solve the problem of delay asymmetry caused by the inconsistent rate of the physical network port between the master and the slave.
  • the method is as follows: The master device informs the slave device of the physical network port rate information of the master device; after the slave device learns the rate of the physical network port of the master device, compares the rate with the physical network port of the master device, and if not, the calculated average route The transmission delay is compensated, otherwise, no compensation is performed.
  • the master device may send an Announce message to the slave device, where the notification packet carries its own physical network port rate information.
  • the physical network port rate information may be located in a reserved byte between the domainNumber and the flag field, that is, the master device sends the notification message to the slave device before the master device sends the notification message to the slave device.
  • the physical network port rate information can be written into the reserved byte between the domainNumber and the flagField of the notification message.
  • 0001 indicates the physical network port rate of 10M
  • 0010 indicates the 100M physical network port rate
  • 0100 indicates the 1000M physical network port rate
  • 1000 indicates the 10000M physical network port rate.
  • the slave device compensates the clock offset by subtracting the delay error from the calculated average line transmission delay, where
  • ⁇ indicates the entire frame length except the frame preamble and check digit
  • J 2 indicates the check bit length
  • ⁇ indicates the frame preamble length
  • Sm indicates the time at which the physical network port of the master device forwards each bit of data
  • Ss indicates the physical network port of the slave device. The time to forward each bit of data.
  • the time synchronization system of the embodiment of the present invention includes a master device and one or more slave devices, wherein
  • the master device notifies the slave device of the physical network port rate information while implementing the function of the master device;
  • the device After the device performs the function of its master device, it learns the rate of the physical network port of the master device through the Announce packet and compares it with the rate of its physical network port. If not, the calculated average line transmission delay is performed. Compensation, otherwise, no compensation will be made.
  • the master device may be further configured to notify the slave device of the physical network port rate information by sending the notification message to the slave device, where the notification message carries its own physical network port rate information.
  • the master device is further configured to write the physical network port rate information of the notification message into the reserved byte between the domain number of the notification message and the domain identifier before sending the notification message to the slave device.
  • the slave device may be further configured to compensate the clock offset by subtracting a delay error from the calculated average line transmission delay, where
  • ⁇ indicates the entire frame length except the frame preamble and check digit
  • J 2 indicates the check bit length
  • ⁇ indicates the frame preamble length
  • Sm indicates the time at which the physical network port of the master device forwards each bit of data
  • Ss indicates the physical network port of the slave device. The time to forward each bit of data.
  • the present invention is further illustrated by an application example in which the rate of the physical network port of the primary device is increased in the Announce message header.
  • the model for time synchronization using 1588 is shown in Figure 2. There may be multiple switches, routers, etc. in the middle.
  • this example includes the following steps:
  • Step 301 The master device writes its own physical network port rate information into the reserved bytes between the domainNumber and the flagField of the Announce message, where 0001 indicates 10M, 0010 indicates 100M, 0100 indicates 1000M, and 1000 indicates 10000M;
  • Step 302 The master device sends the Announce text to the slave device.
  • Step 303 After receiving the Announce message, the slave device parses the physical network port rate of the master device.
  • Step 304 The slave device compares the rate of the physical network port of the master device with the rate of the physical network port of the slave device. If they are the same, the device does not perform compensation. If not, the length of the packet is parsed. The calculated value is compensated.
  • the delay asymmetry caused by the inconsistent rate of the primary and secondary physical network ports can be solved in the delay request response mechanism, resulting in phase unsynchronization.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

La présente invention concerne un procédé et un système de synchronisation temporelle. Ce procédé comprend les étapes suivantes : un dispositif maître transmet des informations concernant son propre débit de port de réseau physique à un dispositif esclave; après avoir obtenu le débit de port de réseau physique du dispositif maître, le dispositif esclave le compare avec son propre débit de port de réseau physique; s'ils sont différents, le dispositif esclave effectue une compensation de retard moyen de transmission sur ligne, obtenu au moyen d'un calcul, sinon, le dispositif esclave n'effectue pas de compensation. En appliquant les solutions techniques de la présente invention, le problème posé par le fait que les retards asymétriques provoqués par des débits de port de réseau physique maître/esclave incohérents entraînent des phases asynchrones peut être résolu dans un mécanisme de réponse aux requêtes de temporisation.
PCT/CN2011/074301 2010-11-26 2011-05-19 Procédé et système de synchronisation temporelle WO2012068845A1 (fr)

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CN201010561070.6A CN102006157B (zh) 2010-11-26 2010-11-26 一种时间同步的方法和系统
CN201010561070.6 2010-11-26

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3151471A1 (fr) * 2015-09-29 2017-04-05 Tektronix, Inc. Compensation adaptative pour délai asymétrique interne dans des systèmes de synchronisation à commande réseau
CN116915670A (zh) * 2023-09-14 2023-10-20 浙江国利信安科技有限公司 用于确定网络恢复时间的方法、设备和介质

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CN102006157B (zh) * 2010-11-26 2015-01-28 中兴通讯股份有限公司 一种时间同步的方法和系统
CN102932905B (zh) * 2011-08-10 2017-06-16 中兴通讯股份有限公司 自动补偿1588链路非对称性时延的实现方法及系统
CN102549951A (zh) * 2011-12-23 2012-07-04 华为技术有限公司 外时钟数据同步处理方法、设备和系统
CN102843293B (zh) * 2012-08-20 2018-01-26 中兴通讯股份有限公司 一种处理报文的方法和网元设备
CN102833062B (zh) * 2012-09-25 2015-08-12 广东电网公司珠海供电局 智能变电站ieee1588主从时钟同步报文对时方法及系统
CN103067113B (zh) * 2012-12-24 2015-08-12 中兴通讯股份有限公司 基于聚合链路实现ptp时间同步的方法及装置
CN103118029A (zh) * 2013-02-18 2013-05-22 中兴通讯股份有限公司 一种加密报文互传时间同步方法及装置
CN103457715A (zh) * 2013-08-20 2013-12-18 上海奇微通讯技术有限公司 一种基于网络链路状态变化的自动延时补偿装置及方法
CN104506268B (zh) * 2014-12-15 2017-07-14 飞天诚信科技股份有限公司 一种实现时间校准的方法
CN105939243B (zh) * 2016-04-14 2019-02-15 烽火通信科技股份有限公司 多端口ptp报文的处理系统
CN110149257A (zh) * 2018-12-20 2019-08-20 中铁十四局集团房桥有限公司 实时以太网总线主从站本地应用同步方法及装置
CN110061796B (zh) * 2019-04-25 2024-05-14 广东优力普物联科技有限公司 一种用于实现远距离poe传输的方法及系统
CN112636861A (zh) * 2020-12-31 2021-04-09 深圳市英特瑞半导体科技有限公司 一种时钟同步方法、装置、设备及存储介质
CN116300693B (zh) * 2023-02-17 2023-10-20 上海铼钠克数控科技有限公司 数控伺服系统的同步方法及应用

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Publication number Priority date Publication date Assignee Title
EP3151471A1 (fr) * 2015-09-29 2017-04-05 Tektronix, Inc. Compensation adaptative pour délai asymétrique interne dans des systèmes de synchronisation à commande réseau
CN116915670A (zh) * 2023-09-14 2023-10-20 浙江国利信安科技有限公司 用于确定网络恢复时间的方法、设备和介质
CN116915670B (zh) * 2023-09-14 2023-12-05 浙江国利信安科技有限公司 用于确定网络恢复时间的方法、设备和介质

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CN102006157B (zh) 2015-01-28

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