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WO2011070663A1 - Appareil d'inspection de substrat tft et procédé - Google Patents

Appareil d'inspection de substrat tft et procédé Download PDF

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Publication number
WO2011070663A1
WO2011070663A1 PCT/JP2009/070668 JP2009070668W WO2011070663A1 WO 2011070663 A1 WO2011070663 A1 WO 2011070663A1 JP 2009070668 W JP2009070668 W JP 2009070668W WO 2011070663 A1 WO2011070663 A1 WO 2011070663A1
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WIPO (PCT)
Prior art keywords
defect
short
detection
drive signal
substrate
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PCT/JP2009/070668
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English (en)
Japanese (ja)
Inventor
大輔 今井
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株式会社島津製作所
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Publication date
Application filed by 株式会社島津製作所 filed Critical 株式会社島津製作所
Priority to JP2011545022A priority Critical patent/JP5590043B2/ja
Priority to CN200980162866XA priority patent/CN102667507A/zh
Priority to PCT/JP2009/070668 priority patent/WO2011070663A1/fr
Publication of WO2011070663A1 publication Critical patent/WO2011070663A1/fr

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays

Definitions

  • the present invention relates to a TFT substrate inspection apparatus used for TFT substrate inspection in a manufacturing process of a TFT panel such as a liquid crystal substrate.
  • the present invention relates to a TFT substrate inspection apparatus suitable for short-circuit (short-circuit) defect inspection.
  • a TFT array inspection process is included in the manufacturing process, and the TFT array is inspected for defects in this TFT array inspection process.
  • the TFT array is used as a switching element for selecting a pixel (pixel electrode) of a liquid crystal display device, for example.
  • a substrate including a TFT array for example, a plurality of gate lines functioning as scanning lines are arranged in parallel, and a plurality of source lines described as signal lines are arranged orthogonal to the gate lines.
  • a TFT Thin film transistor
  • a TFT is disposed in the vicinity of the intersection of the lines, and a drive signal is supplied to the pixel (pixel electrode) through the TFT.
  • a liquid crystal display device is configured by sandwiching a liquid crystal layer between a substrate provided with the TFT array described above and a counter substrate, and a pixel capacitance is formed between a counter electrode and a pixel (pixel electrode) provided in the counter substrate. Is done.
  • an additional capacitance is connected to the pixel (pixel electrode).
  • One of the additional capacitors (Cs) is connected to a pixel (pixel electrode), and the other is connected to a common line or a gate line.
  • a TFT array configured to be connected to the common line is called a Cs on Com TFT array, and a TFT array configured to be connected to the gate line is called a Cs on Gate TFT array.
  • a scanning line (gate line) or a signal line (source line) is disconnected, a scanning line (gate line) and a signal line (source line) are short-circuited, or a pixel defect due to a characteristic defect of a TFT driving a pixel.
  • the counter electrode is grounded, a DC voltage of, for example, ⁇ 15 V to +15 V is applied to all or a part of the gate line at a predetermined interval, and a driving signal for inspection is applied to all or a part of the source line. Is performed by applying. (For example, the prior art of patent document 1 and patent document 2.)
  • the TFT substrate inspection apparatus can detect a defect by inputting a driving signal for inspection to the TFT array and detecting the voltage state at that time.
  • a pixel In a TFT substrate inspection apparatus using an electron beam, a pixel (pixel electrode) is irradiated with an electron beam, secondary electrons emitted by this electron beam irradiation are detected, and the intensity of the secondary electrons changes to change the pixel. Determine the presence or absence of defects in units.
  • the obtained secondary electron intensity signal is converted into an analog signal by a photomultiplier, etc., obtained by coordinate conversion, the data is allocated in units of pixels, defects are extracted by image processing, and the obtained defect data Perform defect inspection based on As the inspection signal used for this inspection, one type of inspection signal pattern is set for each substrate.
  • TFT array may have various defects during its manufacturing process.
  • the types of defects include, for example, a short-circuit defect (S-Dshort) between the pixel and the source line, a short-circuit defect between the pixel and the gate line (G-Dshort), and between the pixel and the common line (Cs line).
  • Short circuit defect (D-Cs short) line defect between source line and gate line, short circuit defect between source line and common line (Cs line), short circuit defect between gate line and common line (Cs line), etc. is there.
  • defects between the source line and the common line (Cs line), between the gate line and the common line (Cs line), and between the source line and the gate line are line defects, such as S-Dshort and G- Dshort and D-Cs short are known as point defects.
  • line defects can be detected by driving each panel using one type of inspection signal pattern set for the substrate.
  • FIG. 12 is a diagram for explaining line defects and point defects.
  • FIG. 12 shows a configuration example having a common line (Cs line).
  • the panel is provided with a TFT 35 in the vicinity of the intersection of the source line 31 and the gate line 32 arranged in a grid pattern, and a pixel electrode 34 is connected to the drain of the TFT 35.
  • the pixel electrode 34 is capacitively connected to the Cs line 33.
  • FIG. 12 (a) shows an example of a line defect.
  • a short defect may occur between the source line 31 and the Cs line (common line) 33, or between the gate line 32 and the Cs line (common line) 33, and appears as a line defect.
  • FIG. 12B shows an example of a point defect.
  • a short circuit defect (SD short) may occur between the pixel and the source line, a short circuit defect (GD short) between the pixel and the gate line may occur, and the pixel and Cs line.
  • D-Cs short short-circuit defect
  • short-circuit defects short-circuit defects between the source line and the common line (Cs line) or between the gate line and the common line (Cs line) are measured by changing the resistance value between the lines before scanning with the electron beam. Based on this resistance value, the presence / absence of a short circuit (short circuit) between the lines and which line is short-circuited are determined.
  • a prober is set on the board, and a short circuit is checked from the electrical continuity of the prober contacts.
  • This short check is performed depending on whether the resistance value between the pads is a small resistance, a large resistance, or an insulation.
  • the resistance value between the pads is a small resistance, it indicates the possibility of a large short-circuit between the lines connected to each pad, and the resistance value between the pads is within a predetermined resistance range. This case represents the possibility that a short defect (short circuit defect) exists between the lines to which the pads are connected.
  • a signal scan is performed by applying an inspection signal pattern to the panel, line defects are extracted by image processing from the voltage image obtained by the signal scan, and linked to the short check result.
  • defect information relating to the type and position of the defect is output (Patent Document 3).
  • the presence or absence of a defect can be detected in the defect inspection by the signal scan described above, but it may be difficult to determine the position of the line defect depending on the type of defect. For example, when the gate line and the Cs line are short-circuited, it is possible to determine which panel's gate line and the Cs line are short-circuited by a short check, and a defect occurs due to the signal image. It is possible to detect the lines that are present. It is possible to determine the short-circuit defect between the gate line and Cs line up to the occurrence range.
  • FIG. 13 is a diagram for explaining a line defect
  • FIG. 14 is a diagram showing a signal image due to the line defect.
  • FIG. 13A shows a case where the source line and the Cs line (common line) are short-circuited.
  • the pixels arranged along the source line are driven, so that they are displayed as the line 51 on the signal image. And determined as a line defect of the source line.
  • FIG. 13B shows a case where the gate line and the Cs line (common line) are short-circuited.
  • the pixels arranged along the gate line are driven, so that it is displayed as the line 52 on the signal image. And determined as a line defect of the gate line.
  • a method and a system for detecting an electrical short-circuit defect by applying a predetermined voltage to a plate structure of a flat display and obtaining a defect area from an infrared thermal map of a cathode has been proposed.
  • a defect region is determined by detecting a difference in radiance between a region including an electrical short-circuit defect of the cathode and a peripheral region by the first infrared array, and an infrared thermal map is formed by the first infrared array, A point is detected (Patent Document 4).
  • Patent Document 5 shows that in infrared thermography for defect detection and analysis, each part of a test target device is heated by a test vector, a thermograph image is acquired by an infrared device, and a defect position is specified.
  • defect detection can be performed as a line defect in units of lines, but the coordinates of the defect point are specified to identify which pixel is a defect. There is a problem that is difficult.
  • defect detection by heat detection it is possible to detect short defects that are difficult to detect by defect detection by electron beam irradiation.
  • the defect detection process by electron beam irradiation and the defect detection process by thermal detection can be performed in one processing process.
  • the detection time of the entire substrate is the time obtained by adding at least the detection time of each defect detection. There is a problem that the defect detection time becomes longer. As described above, when the defect detection time is increased, the time required for the manufacturing process of the TFT substrate is also increased.
  • the present invention solves the above-described problem and shortens the defect detection time of the entire substrate when performing defect detection by electron beam irradiation and short defect detection by thermal detection for a substrate on which a plurality of panels are formed. For the purpose.
  • the TFT substrate inspection when performing defect detection by electron beam irradiation and short-circuit defect detection by heat detection, a plurality of panels on the substrate are driven to detect the heat radiation of all the panels and the short-circuit defects are detected.
  • the defect detection time of the entire substrate is shortened by irradiating an electron beam to a panel sequentially selected from all the panels and detecting secondary electrons to detect defects.
  • the present invention can be configured as a TFT substrate inspection apparatus and a TFT substrate inspection method.
  • the TFT substrate inspection apparatus of the present invention includes a vacuum chamber for storing a substrate in a vacuum state, a drive signal supply unit for supplying a drive signal to the TFT array on the substrate, an electron beam source for irradiating the substrate with an electron beam, and an electron beam
  • a secondary electron detector for detecting secondary electrons emitted from the substrate by the irradiation of, a heat detector for detecting heat radiation emitted from the substrate to which the drive signal is supplied, a detection signal of the secondary electron detector, and
  • a defect detection unit that detects a defect of the TFT substrate based on a detection signal of the heat detector.
  • the defect detection unit includes a TFT array defect detection unit that detects a defect of the TFT array based on a scanning image obtained from the detection signal of the secondary electron detector, and a heat distribution image obtained from the detection signal of the heat detector. And a short defect detector for detecting a short defect.
  • the TFT array defect detection unit performs TFT array defect detection by sequentially selecting one panel from a plurality of panels included in the substrate.
  • the short defect detection unit simultaneously detects short defects for all the panels included in the substrate.
  • TFT array defect detection can be performed by comparing the signal intensity of the scanned image with a predetermined threshold value. This threshold value can be determined based on the signal intensity of the scanned image obtained when the TFT array has a defect.
  • short defect detection can be performed by comparing the signal intensity of the heat distribution image with a predetermined threshold value. This threshold value can be determined based on the signal intensity of the heat distribution image obtained when there is a short defect.
  • Detecting TFT array defects is sequentially performed for a plurality of panels, so that the detection time required to detect TFT array defects for all the panels is substantially the sum of the detection times of each panel.
  • the detection time required for detecting a short defect of each panel can be made the same by detecting the short defect simultaneously for all the panels.
  • secondary electron detection by electron beam scanning for TFT array defect detection and thermal detection for short defect detection can be performed independently without interfering with each other, so each of TFT array defect detection and short defect detection The time required for this can be arbitrarily determined according to the detection accuracy.
  • the detection time required for short defect detection can be set longer than the detection time required for TFT array defect detection, it can be determined according to the detection time required for TFT array defect detection for all panels.
  • the TFT array defect detection can be performed over the entire period.
  • the present invention by performing the TFT array defect detection and the short defect detection at the same time, the time required for the defect detection can be reduced as compared with the case where the TFT array defect detection and the short defect detection are sequentially performed.
  • the detection time for detecting the short defect of the present invention can be at least the detection time required for detecting the TFT array defects of all the panels, even if the amount of heat generated by the short defect portion is small and the temperature rise is small, By increasing the detection time, the detection accuracy can be increased.
  • the drive signal supply unit of the present invention applies a drive signal having a predetermined pattern for detecting a defect to a selected panel, and applies a drive signal having a predetermined pattern for detecting a short defect to a non-selected panel.
  • the predetermined pattern for performing defect detection can be set according to the defect type to be detected.
  • a panel for detecting a defect is selected, a drive signal of a predetermined pattern for detecting a defect is applied to this panel, and a panel for detecting a short defect for a panel not performing other defect detection.
  • a drive signal having a predetermined pattern is applied.
  • the detection time of the array defect detection is shorter than the detection time of the short defect detection, so even if there is a short defect in the array part to which the drive signal is supplied, The influence can be made negligible by not being heated at the time of defect detection.
  • the drive signal supply unit of the present invention interrupts the supply of the drive signal to the TFT array at the defect point of the short defect detected by the short defect detection unit during the defect detection of the short defect detection unit.
  • the short defect detection unit of the present invention evaluates the correctness of the detected short defect based on the detection signal of the heat detector after the supply of the drive signal is interrupted.
  • the heat generation at that point is stopped.
  • the location where the temperature has increased due to heat generation decreases after the heat generation stops after the heat generation stops.
  • This temperature change is detected based on the detection signal of the heat detector.
  • the drive signal supply unit of the present invention interrupts the supply of the drive signal to the TFT array at the defect point of the short defect detected by the short defect detection unit during the defect detection of the short defect detection unit, and after a predetermined time has elapsed.
  • the supply of drive signals to the TFT array is resumed.
  • the correctness of the detected short-circuit defect is evaluated based on the detection signal of the heat detector after the drive signal supply is reunited.
  • the temperature change at this time is detected based on the detection signal of the heat detector. If a rise in temperature is detected after the temperature has dropped, it can be confirmed that the detection position is a defect position of a short defect. On the other hand, when the temperature rise is not detected, it can be understood that the detection position is not the defect position of the short defect.
  • the TFT substrate inspection method of the present invention is a TFT substrate inspection method for inspecting a TFT substrate for a defect, and includes a drive signal supply step for supplying a drive signal to a TFT array of a substrate housed in a vacuum chamber, A TFT array defect that detects a defect of a TFT array based on a scanning image obtained from a detection signal of the secondary electron, by detecting secondary electrons emitted from the substrate by the electron beam irradiation. And a short defect detection step of detecting heat radiation radiated from the substrate supplied with the drive signal and detecting a short defect based on a heat distribution image obtained from the heat radiation detection signal.
  • one panel is sequentially selected from a plurality of panels included in the substrate to detect TFT array defects, and in the short defect detection step, short defect detection is performed simultaneously on all the panels included in the substrate.
  • a drive signal having a predetermined pattern for detecting a defect is applied to a selected panel, and a drive signal having a predetermined pattern for detecting a short defect is applied to a non-selected panel.
  • the supply of the drive signal to the TFT array at the defect point of the short defect detected in the short defect detection process is interrupted. This can prevent damage to the substrate due to heat generation.
  • the correctness of the detected short defect is evaluated based on the detection signal of heat dissipation after the supply of the drive signal is interrupted.
  • the supply of the drive signal to the TFT array at the defect point of the short defect detected by the short defect detection process is interrupted, and after the predetermined time has elapsed, the TFT The supply of the drive signal to the array is resumed, and the correctness of the detected short defect is evaluated based on the detection signal of the heat radiation after the drive signal supply is reunited.
  • the TFT substrate inspection method of the present invention it is possible to confirm whether or not the detected position of the detected short defect is correct.
  • the defect detection time of the entire substrate can be shortened.
  • FIG. 1 is a schematic view of a TFT substrate inspection apparatus of the present invention.
  • the TFT substrate inspection apparatus 1 detects an array defect and a short defect of the TFT substrate 20 placed on a stage 11 provided in a vacuum chamber (not shown).
  • an electron beam source 6 for irradiating the TFT substrate 20 with an electron beam, a stage 11 for moving the TFT substrate 20 in the x and y directions, an electron beam source 6 and the stage 11 are controlled to control the electron beam.
  • An array defect detection unit 2b for detecting defects is provided.
  • a heat detection unit 9 that detects heat radiation from the TFT substrate 20, a thermal frame image capturing unit 10 that forms a thermal frame image from a detection signal of the heat distribution detected by the heat detection unit 9, and a thermal image Are processed, and an image processing unit 2a for obtaining a coordinate position and a signal intensity at the position, and a short defect detecting unit 2c for detecting a short defect based on the obtained signal intensity are provided.
  • an infrared sensor or a thermography can be used for the heat detection unit.
  • an infrared sensor for example, an IR focal plane array thermal imaging camera using an InSb detector is known (Patent Document 5).
  • the defect detection unit 2 includes a defect position calibration unit 2d and a defect data storage unit 2e in addition to the image processing unit 2a, the array defect detection unit 2b, and the short defect detection unit 2c.
  • the defect position calibration unit 2d calibrates the coordinate position of the short defect at the same point based on the coordinate position of the array defect detected by the array defect detection unit 2b and the coordinate position of the short defect detected by the short defect detection unit 2c. .
  • the main control unit 3 and the scan control unit 5 include a CPU and storage means (not shown) such as a ROM for driving the CPU to execute a predetermined operation.
  • FIG. 1 shows an example of the configuration of the TFT substrate 20 shown in FIG.
  • a plurality of panels are provided on the TFT substrate 20, and a plurality of pixels 40 are arranged on each panel to form an array.
  • Each pixel 40 is provided with a source line 31, a gate line 32, and a common line 33.
  • the plurality of source lines 31 are connected to the source bar 21 and applied with the source signal supplied from the drive signal supply unit 4.
  • the plurality of gate lines 32 are connected to the gate bar 22 and a gate signal supplied from the drive signal supply unit 4 is applied thereto.
  • the plurality of common lines 33 are connected to the common bar 23, and a common signal supplied from the drive signal supply unit 4 is applied thereto.
  • the drive signal supply unit 43 generates and supplies a drive signal signal pattern for driving the TFT array formed on the TFT substrate 20.
  • the drive signal supply unit 4 can generate a plurality of types of drive patterns. For example, a signal pattern for supplying the same voltage to all pixels is generated as a signal pattern for detecting a point defect in the TFT array. Further, in order to determine the defect type of the TFT array, a signal pattern for supplying a voltage having a periodicity in pixel units is generated.
  • the image processing unit 2a converts the frame image into an image and forms a scanned image.
  • the array defect detection unit 2b compares with the potential state in the normal state based on the potential state of the pixel acquired by the image processing unit 2a, and a pixel in a potential state different from the potential in the normal state is connected to the pixel.
  • the TFT array is detected as defective. Further, the defect type of the detected defective pixel is determined.
  • the defect type determination stores at least two determination threshold values for determining the defect type of the defective pixel, and defect type data of the defective pixel in association with a plurality of intensity ranges set by the plurality of determination threshold values. .
  • the signal intensity of the scanned image obtained by applying the drive pattern is compared with the determination threshold value, and is classified into a plurality of intensity ranges based on the comparison result, and the defect type of the defective pixel is determined.
  • the position of the defective pixel is specified based on the position of the defective pixel detected by the point defect detection, the geometrical arrangement of the pixel detected by the defect type discrimination, the design position of the pixel formed on the substrate, and the like.
  • the short defect detection unit 2c compares the signal intensity representing the heat distribution acquired by the image processing unit 2a with the signal intensity of the heat distribution in the normal state. It is detected that the part has a short defect. In addition, the position of the short defect is specified based on the position of the detected short defect and the design position of the pixels and lines formed on the substrate.
  • the scanning control unit 5 controls the stage 11 and the electron beam source 6 in order to scan the inspection position of the TFT array on the TFT substrate 20.
  • the stage 11 moves the TFT substrate 20 to be placed in the XY direction, and the electron beam source 6 scans the irradiation position of the electron beam by shaking the electron beam irradiating the TFT substrate 20 in the XY direction.
  • the above-described configuration of the TFT array inspection apparatus is an example, and is not limited to this configuration.
  • FIGS. 2, 3 and 4 are a flowchart, a timing chart, and a panel operation diagram for explaining operations of array defect detection and short-circuit defect detection by the TFT substrate inspection apparatus.
  • Detecting array defects by irradiating and scanning an electron beam on a panel arranged on a TFT substrate.
  • a single panel is selected from a plurality of panels provided on the TFT substrate, and the selected panel is irradiated with an electron beam and scanned to detect secondary electrons, thereby detecting array defects.
  • Short defect detection is performed by detecting heat dissipation for all panels.
  • the timing chart of FIG. 3 shows the timing of performing array defect detection and the timing of performing short defect detection for each of the panels A to I arranged on the TFT substrate.
  • FIG. 3 (a) to 3 (i) show timings of array defect detection and short-circuit defect detection in panels A to I.
  • FIG. Here, an example in which array defect detection is performed in order from panel A is shown. Panel A performs array defect detection first in all panels (FIG. 3A), and panel B performs array defect detection second after the completion of array defect detection in panel A ( Similarly, as shown in FIG. 3B, array defect detection is performed in order for panels C to I. During this time, short defect detection is performed for all panels.
  • the time required for defect detection can be shortened by performing short defect detection for all the panels while performing array defect detection in order.
  • FIG. 4A shows panels A to I arranged on the TFT substrate. Array defect detection is performed in units of each panel, while short defect detection is performed simultaneously with array defects for all panels.
  • array defect detection is performed for panel A, and short defect detection is performed for all panels A to I.
  • array defect detection is performed for panel B, and short defect detection is performed for all panels A to I.
  • FIG. 4D array defect detection is performed for panel I, and short defect detection is performed for all panels A to I.
  • a panel for scanning an electron beam is selected (S2).
  • Array defect detection is performed for the selected panel (S3 to S7), and short defect detection is performed for the selected panel and the non-selected panel.
  • short defect detection a drive signal for detecting a short defect is applied to a non-selected panel, and a drive signal for detecting an array defect is supplied to the selected panel. Since the drive signal for detecting the array defect is applied to the selected panel instead of the drive signal for detecting the short defect, the drive signal may not be applied to the defective portion of the short defect depending on the signal pattern. .
  • the selected panel it is determined whether the selected panel is a panel that detects heat generation (S3). If the selected panel is a panel in which heat generation is being detected, application of a drive signal for detecting a short defect for measuring heat generation is interrupted, and it is determined in S5 whether or not the panel has already been selected. If the selected panel is not a panel for which heat generation is being detected, it is determined whether or not the panel has already been selected in S5.
  • step S5 If the selected panel is not already selected (S5), array defect detection processing by electron beam scanning is performed (S6). If the selected panel has already been selected (S5), the array defect detection process is skipped. Steps S3 to S6 are performed for all the panels, and array defect detection is performed for all the panels on the TFT substrate (S7).
  • Defective points detected by array defect detection may include defective points due to short-circuit defects depending on the drive signal pattern. Therefore, the coordinate position of the short defect detected by the array defect detection and the coordinate position of the short defect detected by the short defect detection process of S8 are collated (S9), and the coordinate position does not match for the same short defect To calibrate the coordinate position. Calibration of the coordinate position of the short defect can be performed based on the arrangement position information of the array and lines on the TFT substrate, the image image obtained by the array defect detection and the short defect detection, and the like (S10). The detected coordinate position of the short defect point is stored in the defect data storage unit 2e or the like (S11).
  • FIG. 5 is a flowchart for explaining the array defect detection operation by the TFT substrate inspection apparatus of the present invention.
  • the processing of this array defect detection operation corresponds to the step S6 in FIG.
  • the panel that irradiates the electron beam is selected (S101), and a drive signal for array defect detection is applied to the selected panel (S102).
  • the selected panel is scanned while being irradiated with an electron beam, and secondary electrons emitted from the TFT substrate are detected by a secondary electron detector (S103).
  • Image data related to the array defect is acquired from the detected secondary electron detection signal.
  • the image data includes the data of the detection signal intensity and the coordinate position (S104).
  • the defect detection can be performed by comparing the intensity of the detection signal with a predetermined threshold value (S105).
  • the coordinate position of the array defect point detected in step S105 is obtained (S106).
  • Steps S101 to S106 are performed for all the panels, and array defects are detected for all the panels on the TFT substrate (S107).
  • a drive signal for detecting a short defect is applied to all the panels on the TFT substrate.
  • a current flows through the defective point, and heat is generated by the electric resistance.
  • the amount of heat generation depends on the short state of the defect point.
  • the short defect is small, the amount of heat generated is small because of the high resistance.
  • the short-circuit defect is large, the amount of heat generation increases because of the low resistance.
  • the time from when the drive signal is applied to the TFT substrate until the short defect is detected is determined in advance, and the drive signal is continuously applied until the set time elapses (S202). After the set time has elapsed, the heat generation of all the panels on the TFT substrate is measured with a heat detector (S203).
  • the image data of the short defect is obtained from the detection signal measured by the thermal detector.
  • the image data includes the data of the detection signal intensity and the coordinate position (S204).
  • the defect detection can be performed by comparing the intensity of the detection signal with a predetermined threshold value (S205).
  • the coordinate position of the short defect point detected in step S205 is obtained (S206).
  • FIG. 7A shows the signal intensity and applied signal of a detection signal in a normal state without a short defect
  • FIGS. 7B and 7C show the signal intensity and applied signal of a detection signal in a state of a short defect
  • FIG. 7D shows the measurement timing.
  • FIG. 7B shows the case of a small short defect. In this case, since the short circuit current is small, the temperature increase rate is small.
  • FIG. 7C shows the case of a large short defect. In this case, since the short-circuit current is large, the rate of temperature rise increases.
  • the determination of the short defect can be performed by comparing the signal intensity of the detection signal with the threshold at the time of the measurement timing in FIG.
  • the application of the drive signal is interrupted to stop the temperature rise at the short defect point and prevent the damage due to heat at that point. Further, it can be evaluated whether or not the detection point of short defect detection is correctly detected.
  • a drive signal for detecting a short defect is applied to all the panels on the TFT substrate (S301).
  • heat generation is measured by the heat detector at the measurement timing (S302, S303).
  • Short defect image data is acquired from the detection signal of the thermal detector.
  • the image data includes data of the detection signal intensity and coordinate position (S304).
  • a short defect is detected using image data.
  • Defect detection can be performed by comparing the intensity of the detection signal with a predetermined threshold (S307).
  • the coordinate position of the short defect point detected in step S307 is obtained and recorded (S308).
  • S305 to S306 are processes for evaluating whether or not the position where the application of the drive signal is stopped is a short defect point.
  • the stop position is a short defect point
  • heat is not generated at the short defect point, and the temperature is lowered by heat dissipation.
  • it can be confirmed whether or not the detected point is a short defect point. If it is a correct short defect point, a temperature drop is detected, and if the detected point is incorrect, a temperature drop is not detected and heat generation is detected.
  • FIG. 8A shows the signal intensity and applied signal of a detection signal in a normal state without a short defect
  • FIG. 8B shows the signal intensity and applied signal of a detection signal in a state of a short defect
  • c) shows the measurement timing. 8 (a) and 8 (b), black dots indicate detection points measured at the measurement timing in FIG. 8 (c).
  • the intensity of the detection signal is determined in advance as a threshold for detecting a short defect, and the signal intensity of the detection signal is compared with the threshold. When the signal intensity of the detection signal exceeds the threshold value, the application of the drive signal corresponding to the position of the short defect is stopped.
  • the application of the drive signal is interrupted and then the drive signal is applied again to evaluate whether or not the short defect has been correctly detected. It is a form to do.
  • a drive signal for detecting a short defect is applied to all the panels on the TFT substrate (S401).
  • heat generation is measured by the heat detector at the measurement timing (S402, 403).
  • Short defect image data is acquired from the detection signal of the thermal detector.
  • the image data includes detection signal intensity and coordinate position data (S404).
  • a short defect is detected using image data.
  • the defect detection can be performed by comparing the intensity of the detection signal with a predetermined threshold value (S4052).
  • the coordinate position of the short defect point detected in step S405 is obtained and recorded (S406).
  • the drive signal is re-applied to the defective point where the application is stopped in S407, and the defective point is caused to generate heat (S409).
  • the temperature rises due to heat generation (S410), and then heat generation is measured by a heat detector (S411).
  • Short defect image data is acquired from the detection signal of the thermal detector.
  • the image data includes the data of the detection signal intensity and the coordinate position (S412).
  • the intensity of the defect point detection signal is compared with a predetermined threshold value (S413). If the detected signal intensity is greater than the threshold value, the detected position can be evaluated as a correct short defect detected position. On the other hand, if the detected signal intensity is less than the threshold value, the detected position is incorrect.
  • the detected position of the short defect is evaluated (S413), detected, and the coordinate position of the short defect position is deleted from the record (S414). The above steps S402 to S414 are repeated until the set time for short defect detection elapses (S415).
  • FIG. 11 (a) shows the signal intensity and applied signal of the detection signal in a state where there is a short defect
  • FIG. 11 (b) shows the measurement timing.
  • black dots indicate detection points measured at the measurement timing in FIG.
  • the intensity of the detection signal is determined in advance as a threshold for detecting a short defect, and the signal intensity of the detection signal is compared with the threshold. When the signal intensity of the detection signal exceeds the threshold value, the application of the drive signal corresponding to the position of the short defect is stopped.
  • the present invention can be applied not only to a TFT array inspection process in a liquid crystal manufacturing apparatus but also to a defect inspection of a TFT array provided in an organic EL or various semiconductor substrates.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Liquid Crystal (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Testing Electric Properties And Detecting Electric Faults (AREA)
  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)

Abstract

La présente invention concerne un appareil d'inspection de substrat TFT qui est équipé d'une unité de détection de défaut détectant un défaut sur un substrat TFT, sur la base de signaux de détection émis par un détecteur électronique secondaire et de signaux de détection émis par un détecteur de chaleur. L'unité de détection de défaut est équipée d'une unité de détection de défaut de matrice TFT qui détecte un défaut d'une matrice TFT sur la base des signaux de détection émis par le détecteur électronique secondaire ; et d'une unité de détection de défaut de court-circuit qui détecte un défaut de court-circuit sur la base des signaux de détection émis par un détecteur de chaleur. L'unité de détection de défaut de matrice TFT détecte un défaut de matrice TFT par la sélection séquentielle de chaque panneau d'une pluralité de panneaux disposés sur le substrat, et l'unité de détection de défaut de court-circuit effectue une détection de défaut de court-circuit à un moment pour tous les panneaux disposés sur le substrat. Au moment de la détection d'un défaut au moyen d'une exposition à un faisceau électronique et d'un défaut de court-circuit au moyen d'une détection de chaleur par rapport au substrat sur lequel sont disposés les panneaux, un temps de détection de défaut nécessaire pour la totalité du substrat est raccourci.
PCT/JP2009/070668 2009-12-10 2009-12-10 Appareil d'inspection de substrat tft et procédé WO2011070663A1 (fr)

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JP2011545022A JP5590043B2 (ja) 2009-12-10 2009-12-10 Ｔｆｔ基板検査装置およびｔｆｔ基板検査方法
CN200980162866XA CN102667507A (zh) 2009-12-10 2009-12-10 Tft基板检查装置以及tft基板检查方法
PCT/JP2009/070668 WO2011070663A1 (fr) 2009-12-10 2009-12-10 Appareil d'inspection de substrat tft et procédé

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CN104795339B (zh) * 2015-03-09 2017-10-20 昆山龙腾光电有限公司 薄膜晶体管阵列基板的检测装置及检测方法
CN106125357B (zh) * 2016-06-27 2019-06-25 京东方科技集团股份有限公司 一种阵列基板检测方法及检测系统
CN106067477B (zh) * 2016-06-27 2019-10-11 昆山国显光电有限公司 基板加工系统及基板检测方法
TWI633300B (zh) * 2017-03-06 2018-08-21 興城科技股份有限公司 薄膜電晶體面板缺陷之檢測方法及其裝置
CN108847182A (zh) * 2018-08-16 2018-11-20 北京蜃景光电科技有限公司 显示器控制单元以及显示器系统
CN110161729B (zh) * 2019-05-17 2021-08-03 深圳市华星光电半导体显示技术有限公司 显示面板测试方法及系统
CN113075230A (zh) * 2021-03-26 2021-07-06 重庆烯宇新材料科技有限公司 大尺寸点亮显示外观检验方法

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