+

WO2010139366A1 - A package resonator cavity - Google Patents

A package resonator cavity Download PDF

Info

Publication number
WO2010139366A1
WO2010139366A1 PCT/EP2009/056894 EP2009056894W WO2010139366A1 WO 2010139366 A1 WO2010139366 A1 WO 2010139366A1 EP 2009056894 W EP2009056894 W EP 2009056894W WO 2010139366 A1 WO2010139366 A1 WO 2010139366A1
Authority
WO
WIPO (PCT)
Prior art keywords
package
oscillator circuit
chip
cavity
supporting
Prior art date
Application number
PCT/EP2009/056894
Other languages
French (fr)
Inventor
Per Ligander
Mingquan Bao
Ola Tageman
Original Assignee
Telefonaktiebolaget L M Ericsson (Publ)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget L M Ericsson (Publ) filed Critical Telefonaktiebolaget L M Ericsson (Publ)
Priority to PCT/EP2009/056894 priority Critical patent/WO2010139366A1/en
Publication of WO2010139366A1 publication Critical patent/WO2010139366A1/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/18—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising distributed inductance and capacitance
    • H03B5/1817—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising distributed inductance and capacitance the frequency-determining element being a cavity resonator
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

Definitions

  • the present invention relates to an oscillator circuit comprising at least one cavity being arranged for supporting at least one predetermined resonance frequency for a signal that is input into said cavity.
  • the oscillator circuit is partly comprised in a package with a number of electrically conducting connecting means which are arranged for electrically connecting the package to a supporting planar structure.
  • the supporting planar structure has a first main side and a second main side.
  • the connecting means are arranged in such a way that they form at least one circumference around a corresponding at least one surface structure of a bottom side of the package.
  • An oscillator comprised in a chip such as a Voltage Controlled Oscillator (VCO) is an important component in a communication transceiver or a radar system.
  • VCO Voltage Controlled Oscillator
  • a low phase noise oscillator is often required in a transceiver or a radar system.
  • a low quality factor (Q value) of on-chip resonator is a considerable obstacle when a a low phase noise is desired.
  • An on-chip LC resonator at a frequency above 20GHz has relatively low Q value which typically is below 10.
  • a cavity may be etched in silicon and metalized.
  • a separate metal cavity may be attached to a chip's silicon. These cavities are normally slot-fed. The techniques to build such cavities are quite expensive and may not be compatible with material used in a motherboard.
  • the object of the present invention is to provide an oscillator circuit comprising a low-cost cavity resonator which is easily integrated into the design.
  • an oscillator circuit comprising at least one cavity being arranged for supporting at least one predetermined resonance frequency for a signal that is input into said cavity.
  • the oscillator circuit is partly comprised in a package with a number of electrically conducting connecting means which are arranged for electrically connecting the package to a supporting planar structure.
  • the supporting planar structure has a first main side and a second main side.
  • the connecting means are arranged in such a way that they form at least one circumference around a corresponding at least one surface structure of a bottom side of the package.
  • the package is arranged to be mounted on a metalized structure on the first main side of the supporting planar structure such that an inner volume defined by one circumference of connecting means, the metalized structure on the first main side of the supporting planar structure and said surface structure constitutes said cavity.
  • the oscillator circuit is partly comprised in an active planar structure which is in the form of a chip.
  • the chip comprises active circuits, and has a connection that is in electrical contact with a radiating element that is arranged for exciting the cavity.
  • the chip may constitute the package, alternatively the chip may be attached to a supporting package such that they together form the package.
  • the metalized structure on the first main side may be in the form of a ground plane lying in the planar extension of the first main side, and may according to a certain example comprise a depression.
  • the oscillator circuit including the cavity consists of a compact signal source; package together with the supporting planar structure;
  • Figure 1 shows a perspective view of a motherboard
  • Figure 2a shows a bottom view of a flip-chip package according to a first example
  • Figure 2b shows a side view of a mounted flip-chip package according to a first example
  • Figure 3 shows a sectional view of a mounted BGA package with a flip- chip according to a second example
  • Figure 4 shows a sectional view of a mounted package according to a third example
  • Figure 5 shows a sectional view of a mounted package according to a fourth example.
  • Figure 6 shows a sectional view of a mounted package according to a fifth example.
  • an oscillator circuit 1 is partly comprised in a so-called flip-chip package 2 that is positioned on a supporting planar structure 3 which here is in the form of an motherboard, i.e. a printed circuit board (PCB) which functions as an interface for the components mounted to it.
  • a supporting planar structure 3 which here is in the form of an motherboard, i.e. a printed circuit board (PCB) which functions as an interface for the components mounted to it.
  • PCB printed circuit board
  • the flip-chip package 2 comprises a number of electrically conducting connecting means 4 (only one is denoted with a reference sign for the sake of clarity).
  • the connecting means 4 are in the form of balls in an array and are arranged for electrically connecting the flip- chip package 2 to the supporting planar structure 3.
  • the supporting planar structure 3 has a first main side 5 and a second main side 6, which have corresponding planar extensions.
  • the connecting means 4 are arranged in such a way that they form a circumference around a corresponding at least one surface structure 7 of a bottom side 8 of the flip-chip package 2.
  • the flip-chip package 2 is arranged to be mounted on a metalized structure 9 on the first main side 5 of the supporting planar structure 3 such that an inner volume, defined by the circumference of connecting means 4, the metalized structure 9 on the first main side 5 of the supporting planar structure 3 and said surface structure 7, constitutes a cavity 10.
  • the cavity is excited by means of a radiating element R that is comprised in the surface structure 7, where the radiating element R is arranged for transferring a signal to and from the cavity 10.
  • the radiating element R is in the form of a patch element.
  • the cavity 10 is part of the oscillator circuit 1 , and is arranged for supporting at least one predetermined resonance frequency for an input signal.
  • the oscillator circuit comprises a low-cost cavity resonator which is easily integrated into the design.
  • the metalized structure 9 on the first main side 5 of the supporting planar structure 3 is in the form of a ground plane.
  • the surface structure 7 of the bottom side 8 of the flip-chip package 2 is at least partly in the form of a metal ization.
  • the flip-chip package 2 in Figure 2a and Figure 2b is constituted by a chip 11 , where the chip 11 may be made in many suitable materials such as GaAs (Gallium-Arsenide), SiGe (Silicon-Germanium) and CMOS (Complementary metal-oxide- semiconductor).
  • the chip may be in the form of an MMIC (Monolithic Microwave Integrated Circuit).
  • MMIC Monitoring Microwave Integrated Circuit
  • it is the existing connecting means 4 of the chip 11 , here in the form of balls in an array, that is a part of the electrical limitations for the cavity.
  • the chip 11 is here mounted on a motherboard as the one shown in Figure 1. It may also be mounted to any other suitable supporting planar structure 3.
  • the metalized structure 9 on the first main side 5 of the supporting planar structure 3 is in the form of a ground plane.
  • the oscillator circuit 1 ' comprises a chip that is a so-called flip-chip 12, where the flip-chip 12 is mounted to a first type of supporting package 13, where the flip-chip 12 and the first type of supporting package together form a package 14 that is mounted to the supporting planar structure 3.
  • the first type of supporting package 13 has connecting means in the form of a BGA 15 (only one ball is denoted with a reference sign for the sake of clarity), where the BGA 15 forms a part of the electrical limitations for a cavity 16 as in the previous example.
  • a radiating element (not shown) is used in the same way as in the previous example.
  • the surface structure T of the bottom side 8' of the package 14 is at least partly in the form of a metalization
  • the oscillator circuit 1 " comprises a chip that is in the form of a bonded chip 17, where the chip 17 is bonded to a second type of supporting package 18.
  • the chip 17 and the second type of supporting package 18 together form a package 19 that is mounted to the supporting planar structure 3.
  • the second type of supporting package 18 has connecting means in the form of solderable pads 20 (only one pad is denoted with a reference sign for the sake of clarity), which add a relatively small height to the package 19.
  • a depression 21 is formed in the second type of supporting package 18.
  • the surface structure 7" is thus not planar in this example, but comprises a bowl- shape.
  • a cavity 22 is thus formed as in the previous examples.
  • Figure 4 a first bond wire 23 that connects the chip 17 to one of the solderable pads 20 via an electrical connection 24 is shown. Furthermore, Figure 4 shows a second bond wire 25 that connects the chip 17 to a radiating element 26 which is in the form of a patch element. As described previously, the radiating element 26 is arranged for transferring a signal to and from the cavity 22.
  • the surface structure 7" of the bottom side 8" of the package 19 is at least partly in the form of a metalization
  • the oscillator circuit 1 ' comprises a chip that is in the form of a bonded chip 27, where the chip 27 is bonded to a third type of supporting package 28.
  • the chip 27 and the third type of supporting package 28 together form a package 29 that is mounted to the supporting planar structure 3.
  • the third type of supporting package 28 has connecting means 30 which comprises solderable pads 31 , which add a relatively small height to the package 29.
  • the connecting means 30 furthermore comprise an intermediate framework 32 mounted to the solderable pads 31 such that a distance between the first main side 5 of the supporting planar structure 3 and the surface structure 7'" when the package 29 is mounted.
  • a cavity 33 is thus formed as in the previous examples.
  • a first bond wire 34 connects the chip 27 to one of the solderable pads 31 via an electrical connection 35 that runs via the intermediate framework 32. Furthermore, a second bond wire 36 connects the chip 27 to a radiating element 37.
  • the surface structure 7'" of the bottom side 8'" of the package 29 is at least partly in the form of a metalization
  • the oscillator circuit 1 "" comprises a chip that is in the form of a bonded chip 38, where the chip 38 is bonded to a fourth type of supporting package 39.
  • the chip 38 and the fourth type of supporting package 39 together form a package 40 that is mounted to a depressed supporting planar structure 3'.
  • the fourth type of supporting package 39 has connecting means which comprises solderable pads 41 , which add a relatively small height to the package 40.
  • the metalized structure 9' on the first main side 5' comprises a depression 42.
  • the first main side 5' is thus not planar in this example, but comprises a bowl-shape.
  • a cavity 43 is thus formed as in the previous examples.
  • the surface structure 7"" of the bottom side 8"" of the package 40 is at least partly in the form of a metalization
  • a first bond wire 44 connects the chip 38 to one of the solderable pads 41 via an electrical connection 45. Furthermore, a second bond wire 46 connects the chip 38 to a radiating element 47.
  • the chip 17, 27, 38 and its bonding arrangement may be more or less identical.
  • the packages 29, 40 may be more or less identical.
  • the resonator frequency of the cavity is given by
  • m, n, and p are integers designating the current mode, and a, b and / are dimensions of the cavity.
  • m, n, and p integers designating the current mode
  • a, b and / are dimensions of the cavity.
  • a suitable resonator impedance is important for active circuits design; it is related to the oscillator signal's swing, and is limited by an oscillator transistor's breakdown voltage. Thus, the impedance has effect on a VCO's phase noise performance; a co-design of active and passive circuits is required.
  • the cavity can be used as a resonator to build a fixed frequency oscillator.
  • the cavity can be used to build a self-injection locked VCO.
  • This technique is in principle implemented by taking the fundamental oscillating signal, or its second harmonic, from the oscillator and then injecting it back after it has been reflected by a resonator. This technique is used to further reduce the phase noise of an oscillator
  • the connecting means may be in any suitable form such as solderable pads or balls in an array, where many rows may be placed at each side of the package. Other types of connecting means are also conceivable, which do not require soldering, but is attached in other suitable ways.
  • the connecting means should have such spacing between them, where applicable, that the cavity performance is not detrimentally affected.
  • the connecting means may form more than one circumference, such that more than one cavity may be formed.
  • the flip-chip package 2 in Figure 2 may alternatively be of a type that in itself comprises a chip, which is covered by a mould.
  • the radiating element may for example be in the form of a radiating patch element, a radiating bond wire or a radiating slot. More than one radiating element may be used.
  • the metalizations may be partial or continuous, where circuit elements and/or conductors may be placed between metalization parts. Where the metalization is partial, the metalized parts have such dimensions that the cavity performance is not detrimentally affected.
  • the second main side 6 of the supporting planar structure 3 may comprise a metalization, which in turn may be in the form of a ground plane 48 as shown in Figure 2b, Figure 3, Figure 4, Figure 5, and Figure 6.
  • the surface structure 7, T , 7", 7'", 7"" may comprise active circuits and at least one radiating element.

Landscapes

  • Oscillators With Electromechanical Resonators (AREA)
  • Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)

Abstract

The present invention relates to an oscillator circuit (1, 1', 1", 1'", 1"") comprising at least one cavity (10, 16, 22, 33, 43) being arranged for supporting at least one predetermined resonance frequency for a signal that is input into said cavity (10, 16, 22, 33, 43). The oscillator circuit (1, 1', 1", 1'", 1"") is partly comprised in a package (2, 14, 19, 29, 40) with a number of electrically conducting connecting means (4, 15, 20, 30, 41 ) for electrically connecting the package (2, 14, 19, 29, 40) to a supporting planar structure (3, 3') having a first main side (5, 5'). The connecting means (4, 15, 20, 30, 41 ) form at least one circumference around a corresponding at least one surface structure (7, 7', 7", 7"' 7"") of a bottom side (8, 8', 8", 8'", 8"") of the package (2, 14, 19, 29, 40). The package (2, 14, 19, 29, 40) is arranged to be mounted on a metal ized structure (9, 9') on the first main side (5, 5') of the supporting planar structure (3, 3') such that an inner volume defined by one circumference of connecting means (4, 15, 20, 30, 41 ), the metalized structure (9, 9') on the first main side (5, 5') of the supporting planar structure (3, 3') and said surface structure (7, 7', 7", 7'", 7"") constitutes said cavity (10, 16, 22, 33, 43).

Description

TITLE
A package resonator cavity
TECHNICAL FIELD The present invention relates to an oscillator circuit comprising at least one cavity being arranged for supporting at least one predetermined resonance frequency for a signal that is input into said cavity. The oscillator circuit is partly comprised in a package with a number of electrically conducting connecting means which are arranged for electrically connecting the package to a supporting planar structure. The supporting planar structure has a first main side and a second main side. The connecting means are arranged in such a way that they form at least one circumference around a corresponding at least one surface structure of a bottom side of the package.
BACKGROUND
An oscillator comprised in a chip, such as a Voltage Controlled Oscillator (VCO) is an important component in a communication transceiver or a radar system. A low phase noise oscillator is often required in a transceiver or a radar system. A low quality factor (Q value) of on-chip resonator is a considerable obstacle when a a low phase noise is desired. An on-chip LC resonator at a frequency above 20GHz has relatively low Q value which typically is below 10.
However, a cavity with high conductivity metal surface which operates as a resonator has much higher Q than the on-chip one. Therefore, utilizing such a cavity resonator, an oscillator's phase noise can be reduced dramatically, comparing with said on-chip LC resonator.
There is a number of approaches to build such a cavity resonator. For example, a cavity may be etched in silicon and metalized. Alternatively, a separate metal cavity may be attached to a chip's silicon. These cavities are normally slot-fed. The techniques to build such cavities are quite expensive and may not be compatible with material used in a motherboard.
There is thus a need for an oscillator circuit comprising a low-cost cavity resonator which is easily integrated into the design.
SUMMARY
The object of the present invention is to provide an oscillator circuit comprising a low-cost cavity resonator which is easily integrated into the design.
This object is achieved by means of an oscillator circuit comprising at least one cavity being arranged for supporting at least one predetermined resonance frequency for a signal that is input into said cavity. The oscillator circuit is partly comprised in a package with a number of electrically conducting connecting means which are arranged for electrically connecting the package to a supporting planar structure. The supporting planar structure has a first main side and a second main side. The connecting means are arranged in such a way that they form at least one circumference around a corresponding at least one surface structure of a bottom side of the package.
The package is arranged to be mounted on a metalized structure on the first main side of the supporting planar structure such that an inner volume defined by one circumference of connecting means, the metalized structure on the first main side of the supporting planar structure and said surface structure constitutes said cavity.
According to an example, the oscillator circuit is partly comprised in an active planar structure which is in the form of a chip. Preferably, the chip comprises active circuits, and has a connection that is in electrical contact with a radiating element that is arranged for exciting the cavity. The chip may constitute the package, alternatively the chip may be attached to a supporting package such that they together form the package.
According to another example, the metalized structure on the first main side may be in the form of a ground plane lying in the planar extension of the first main side, and may according to a certain example comprise a depression.
Other preferred embodiments are evident from the dependent claims.
A number of advantages is obtained by means of the present invention. For example:
- An oscillator with extremely low phase noise is obtained;
- The oscillator circuit including the cavity consists of a compact signal source; package together with the supporting planar structure;
- Assembly in an ordinary pick&place process is possible; and
- The manufacture cost to build a resonator cavity is minimized.
BRIEF DESCRIPTION OF THE DRAWINGS The present invention will now be described more in detail with reference to the appended drawings, where:
Figure 1 shows a perspective view of a motherboard;
Figure 2a shows a bottom view of a flip-chip package according to a first example;
Figure 2b shows a side view of a mounted flip-chip package according to a first example; Figure 3 shows a sectional view of a mounted BGA package with a flip- chip according to a second example;
Figure 4 shows a sectional view of a mounted package according to a third example;
Figure 5 shows a sectional view of a mounted package according to a fourth example; and
Figure 6 shows a sectional view of a mounted package according to a fifth example.
DETAILED DESCRIPTION
With reference to Figure 1 , an oscillator circuit 1 is partly comprised in a so- called flip-chip package 2 that is positioned on a supporting planar structure 3 which here is in the form of an motherboard, i.e. a printed circuit board (PCB) which functions as an interface for the components mounted to it. A number of other components and an electric layout are shown as a schematical example of a motherboard arrangement. In the following, the general term "supporting planar structure" will be used.
With reference to Figure 2a, showing a bottom view of the flip-chip package 2 and Figure 2b showing a side view of the flip-chip package 2 mounted to the supporting planar structure 3, the flip-chip package 2 comprises a number of electrically conducting connecting means 4 (only one is denoted with a reference sign for the sake of clarity). The connecting means 4 are in the form of balls in an array and are arranged for electrically connecting the flip- chip package 2 to the supporting planar structure 3. The supporting planar structure 3 has a first main side 5 and a second main side 6, which have corresponding planar extensions. The connecting means 4 are arranged in such a way that they form a circumference around a corresponding at least one surface structure 7 of a bottom side 8 of the flip-chip package 2.
According to the present invention, the flip-chip package 2 is arranged to be mounted on a metalized structure 9 on the first main side 5 of the supporting planar structure 3 such that an inner volume, defined by the circumference of connecting means 4, the metalized structure 9 on the first main side 5 of the supporting planar structure 3 and said surface structure 7, constitutes a cavity 10. The cavity is excited by means of a radiating element R that is comprised in the surface structure 7, where the radiating element R is arranged for transferring a signal to and from the cavity 10. The radiating element R is in the form of a patch element.
The cavity 10 is part of the oscillator circuit 1 , and is arranged for supporting at least one predetermined resonance frequency for an input signal. In this way, by using the existing connecting means 4 as part of the electrical limitations for the cavity, the oscillator circuit comprises a low-cost cavity resonator which is easily integrated into the design. The metalized structure 9 on the first main side 5 of the supporting planar structure 3 is in the form of a ground plane. The surface structure 7 of the bottom side 8 of the flip-chip package 2 is at least partly in the form of a metal ization.
According to a first example of the present invention, the flip-chip package 2 in Figure 2a and Figure 2b is constituted by a chip 11 , where the chip 11 may be made in many suitable materials such as GaAs (Gallium-Arsenide), SiGe (Silicon-Germanium) and CMOS (Complementary metal-oxide- semiconductor). The chip may be in the form of an MMIC (Monolithic Microwave Integrated Circuit). In this case, it is the existing connecting means 4 of the chip 11 , here in the form of balls in an array, that is a part of the electrical limitations for the cavity. The chip 11 is here mounted on a motherboard as the one shown in Figure 1. It may also be mounted to any other suitable supporting planar structure 3. The metalized structure 9 on the first main side 5 of the supporting planar structure 3 is in the form of a ground plane.
In a second example, with reference to Figure 3, showing a sectional side view, it is conceivable that the oscillator circuit 1 ' comprises a chip that is a so-called flip-chip 12, where the flip-chip 12 is mounted to a first type of supporting package 13, where the flip-chip 12 and the first type of supporting package together form a package 14 that is mounted to the supporting planar structure 3. The first type of supporting package 13 has connecting means in the form of a BGA 15 (only one ball is denoted with a reference sign for the sake of clarity), where the BGA 15 forms a part of the electrical limitations for a cavity 16 as in the previous example. Here, a radiating element (not shown) is used in the same way as in the previous example.
The surface structure T of the bottom side 8' of the package 14 is at least partly in the form of a metalization
In a third example, with reference to Figure 4, the oscillator circuit 1 " comprises a chip that is in the form of a bonded chip 17, where the chip 17 is bonded to a second type of supporting package 18. The chip 17 and the second type of supporting package 18 together form a package 19 that is mounted to the supporting planar structure 3. The second type of supporting package 18 has connecting means in the form of solderable pads 20 (only one pad is denoted with a reference sign for the sake of clarity), which add a relatively small height to the package 19. In order to obtain a cavity, a depression 21 is formed in the second type of supporting package 18. The surface structure 7" is thus not planar in this example, but comprises a bowl- shape. A cavity 22 is thus formed as in the previous examples.
In Figure 4, a first bond wire 23 that connects the chip 17 to one of the solderable pads 20 via an electrical connection 24 is shown. Furthermore, Figure 4 shows a second bond wire 25 that connects the chip 17 to a radiating element 26 which is in the form of a patch element. As described previously, the radiating element 26 is arranged for transferring a signal to and from the cavity 22.
The surface structure 7" of the bottom side 8" of the package 19 is at least partly in the form of a metalization
In a fourth example, with reference to Figure 5, the oscillator circuit 1 '" comprises a chip that is in the form of a bonded chip 27, where the chip 27 is bonded to a third type of supporting package 28. The chip 27 and the third type of supporting package 28 together form a package 29 that is mounted to the supporting planar structure 3. The third type of supporting package 28 has connecting means 30 which comprises solderable pads 31 , which add a relatively small height to the package 29. In order to obtain a cavity, the connecting means 30 furthermore comprise an intermediate framework 32 mounted to the solderable pads 31 such that a distance between the first main side 5 of the supporting planar structure 3 and the surface structure 7'" when the package 29 is mounted. A cavity 33 is thus formed as in the previous examples.
As in the third example, a first bond wire 34 connects the chip 27 to one of the solderable pads 31 via an electrical connection 35 that runs via the intermediate framework 32. Furthermore, a second bond wire 36 connects the chip 27 to a radiating element 37.
The surface structure 7'" of the bottom side 8'" of the package 29 is at least partly in the form of a metalization
In a fifth example, with reference to Figure 6, the oscillator circuit 1 "" comprises a chip that is in the form of a bonded chip 38, where the chip 38 is bonded to a fourth type of supporting package 39. The chip 38 and the fourth type of supporting package 39 together form a package 40 that is mounted to a depressed supporting planar structure 3'. The fourth type of supporting package 39 has connecting means which comprises solderable pads 41 , which add a relatively small height to the package 40. In order to obtain a cavity, the metalized structure 9' on the first main side 5' comprises a depression 42. The first main side 5' is thus not planar in this example, but comprises a bowl-shape. A cavity 43 is thus formed as in the previous examples.
The surface structure 7"" of the bottom side 8"" of the package 40 is at least partly in the form of a metalization
As in the previous two examples, a first bond wire 44 connects the chip 38 to one of the solderable pads 41 via an electrical connection 45. Furthermore, a second bond wire 46 connects the chip 38 to a radiating element 47.
In the last three examples, the chip 17, 27, 38 and its bonding arrangement may be more or less identical.
In the last two examples, the packages 29, 40 may be more or less identical.
The resonator frequency of the cavity is given by
'-ϊHfHfHf
Figure imgf000009_0001
where m, n, and p are integers designating the current mode, and a, b and / are dimensions of the cavity. In an example, for the TMn0 mode, m=n=1, and p=0, εr=1 , i.e., without under-filling, the size of a cavity being resonant at 20GHz is a=b=10.6 mm. If εr=3.9 for under-filling, the size of a cavity being resonant at 20GHz is a=b=2.7 mm.
A suitable resonator impedance is important for active circuits design; it is related to the oscillator signal's swing, and is limited by an oscillator transistor's breakdown voltage. Thus, the impedance has effect on a VCO's phase noise performance; a co-design of active and passive circuits is required.
In order to obtain a low phase noise oscillator circuit utilizing a cavity resonator according to the present invention, there is a number of approaches.
- The cavity can be used as a resonator to build a fixed frequency oscillator.
- The cavity can be used to build a self-injection locked VCO. This technique is in principle implemented by taking the fundamental oscillating signal, or its second harmonic, from the oscillator and then injecting it back after it has been reflected by a resonator. This technique is used to further reduce the phase noise of an oscillator
The connecting means may be in any suitable form such as solderable pads or balls in an array, where many rows may be placed at each side of the package. Other types of connecting means are also conceivable, which do not require soldering, but is attached in other suitable ways. The connecting means should have such spacing between them, where applicable, that the cavity performance is not detrimentally affected. The connecting means may form more than one circumference, such that more than one cavity may be formed. The flip-chip package 2 in Figure 2 may alternatively be of a type that in itself comprises a chip, which is covered by a mould.
The radiating element may for example be in the form of a radiating patch element, a radiating bond wire or a radiating slot. More than one radiating element may be used.
The metalizations may be partial or continuous, where circuit elements and/or conductors may be placed between metalization parts. Where the metalization is partial, the metalized parts have such dimensions that the cavity performance is not detrimentally affected.
The second main side 6 of the supporting planar structure 3 may comprise a metalization, which in turn may be in the form of a ground plane 48 as shown in Figure 2b, Figure 3, Figure 4, Figure 5, and Figure 6.
The surface structure 7, T , 7", 7'", 7"" may comprise active circuits and at least one radiating element.

Claims

1. An oscillator circuit (1 , 1 ', 1 ", 1 '", 1 "") comprising at least one cavity (10, 16, 22, 33, 43) being arranged for supporting at least one predetermined resonance frequency for a signal that is input into said cavity (10, 16, 22, 33, 43), where the oscillator circuit (1 , V, 1 ", 1 "\ 1 "") partly is comprised in a package (2, 14, 19, 29, 40) with a number of electrically conducting connecting means (4, 15, 20, 30, 41 ), the connecting means (4, 15, 20, 30, 41 ) being arranged for electrically connecting the package (2, 14, 19, 29, 40) to a supporting planar structure (3, 3') having a first main side (5, 5') and a second main side (6, 6'), where the connecting means (4, 15, 20, 30, 41 ) are arranged in such a way that they form at least one circumference around a corresponding at least one surface structure (7, T , 7", 7'", 7"") of a bottom side (8, 8', 8", 8'", 8"") of the package (2, 14, 19, 29, 40), characterized in that the package (2, 14, 19, 29, 40) is arranged to be mounted on a metalized structure (9, 9') on the first main side (5, 5') of the supporting planar structure (3, 3') such that an inner volume defined by one circumference of connecting means (4, 15, 20, 30, 41 ), the metalized structure (9, 9') on the first main side (5, 5') of the supporting planar structure (3, 3') and said surface structure (7, T, 7", 7'", 7"") constitutes said cavity (10, 16, 22, 33, 43).
2. An oscillator circuit according to claim 1 , characterized in that the oscillator circuit (1 , V, 1 ", 1 '", 1 "") partly is comprised in an active planar structure (11 , 12, 17, 27, 38).
3. An oscillator circuit according to any one of the claims 1 or 2, characterized in that the active planar structure (11 , 12, 17, 27, 38) is in the form of a chip.
4. An oscillator circuit according to claim 3, characterized in that the chip (11 , 12, 17, 27, 38) comprises active circuits, and where the chip (11 , 12, 17, 27, 38) has a connection (25, 36, 46) that is in electrical contact with a radiating element (R, 26, 37, 47) that is arranged for exciting the cavity (10, 16, 22, 33, 43).
5. An oscillator circuit according to claim 3, characterized in that the chip (11 ) constitutes the package.
6. An oscillator circuit according to claim 3, characterized in that the chip (12) is attached to a supporting package (13), together forming the package (14).
7. An oscillator circuit according to any one of the preceding claims, characterized in that the metalized structure on the first main side (5) is in the form of a ground plane (9) lying in the planar extension of the first main side (5).
8. An oscillator circuit according to claim 6, characterized in that the metalized structure on the first main side (5') comprises a depression (42).
9. An oscillator circuit according to claim 6, characterized in that the surface structure (7") comprises a depression (21 ).
10. An oscillator circuit according to any one of the claims 6-9, characterized in that the connecting means (30) comprise an intermediate framework (32) mounted to package connectors (31 ) such that the intermediate framework (32) creates a distance between the first main side (5) of the supporting planar structure (3) and said surface structure (7'") when the package (29) is mounted.
10. An oscillator circuit according to any one of the preceding claims, characterized in that the radiating element is in the form of a bond wire.
11. An oscillator circuit according to any one of the claims 1 -6, characterized in that the radiating element (R, 26, 37, 47) is in the form of a metal patch.
PCT/EP2009/056894 2009-06-04 2009-06-04 A package resonator cavity WO2010139366A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/EP2009/056894 WO2010139366A1 (en) 2009-06-04 2009-06-04 A package resonator cavity

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/EP2009/056894 WO2010139366A1 (en) 2009-06-04 2009-06-04 A package resonator cavity

Publications (1)

Publication Number Publication Date
WO2010139366A1 true WO2010139366A1 (en) 2010-12-09

Family

ID=40848838

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2009/056894 WO2010139366A1 (en) 2009-06-04 2009-06-04 A package resonator cavity

Country Status (1)

Country Link
WO (1) WO2010139366A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9443810B1 (en) 2015-09-14 2016-09-13 Qualcomm Incorporated Flip-chip employing integrated cavity filter, and related components, systems, and methods
DE102019102784A1 (en) * 2019-02-05 2020-08-06 Infineon Technologies Ag Semiconductor devices with radar semiconductor chip and associated manufacturing method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1041668A2 (en) * 1999-03-31 2000-10-04 Samsung Electronics Co., Ltd. Cavity resonator for reducing phase noise of voltage controlled oscillator
US6130483A (en) * 1997-03-05 2000-10-10 Kabushiki Kaisha Toshiba MMIC module using flip-chip mounting

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6130483A (en) * 1997-03-05 2000-10-10 Kabushiki Kaisha Toshiba MMIC module using flip-chip mounting
EP1041668A2 (en) * 1999-03-31 2000-10-04 Samsung Electronics Co., Ltd. Cavity resonator for reducing phase noise of voltage controlled oscillator

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9443810B1 (en) 2015-09-14 2016-09-13 Qualcomm Incorporated Flip-chip employing integrated cavity filter, and related components, systems, and methods
US9812752B2 (en) 2015-09-14 2017-11-07 Qualcomm Incorporated Flip-chip employing integrated cavity filter, and related components, systems, and methods
DE102019102784A1 (en) * 2019-02-05 2020-08-06 Infineon Technologies Ag Semiconductor devices with radar semiconductor chip and associated manufacturing method
US11658135B2 (en) 2019-02-05 2023-05-23 Infineon Technologies Ag Semiconductor devices comprising a radar semiconductor chip and associated production methods
US12014998B2 (en) 2019-02-05 2024-06-18 Infineon Technologies Ag Semiconductor devices comprising a radar semiconductor chip and associated production methods

Similar Documents

Publication Publication Date Title
CN108233876B (en) Doherty Amplifier and Amplifier Module with Parallel Inductor Circuit
US11205623B2 (en) Microwave device and antenna for improving heat dissipation
CN109818581B (en) Multi-path amplifier with series components of inverters along output terminals of the amplifier
US9819327B2 (en) Bulk acoustic wave resonator tuner circuits
EP2626897B1 (en) Transmission line transition having vertical structure and single chip package using land grid array joining
US20030060172A1 (en) Radio frequency module
US9245859B2 (en) Wireless module
US9520356B1 (en) Circuit with reduced noise and controlled frequency
JP2004214249A (en) Semiconductor module
JP5132054B2 (en) On-chip circuit pad structure
US10068857B2 (en) Semiconductor package assembly
KR20230037543A (en) A substrate including an inductor and a capacitor located in an encapsulation layer
US20190295968A1 (en) Semiconductor packages
US6507110B1 (en) Microwave device and method for making same
US20200411418A1 (en) Semiconductor package structures for broadband rf signal chain
WO2010139366A1 (en) A package resonator cavity
US20150021748A1 (en) Semiconductor device
EP4243065A2 (en) Microelectronic packages having coaxially-shielded radio frequency input/output interfaces
JP2003258152A (en) Monolithic microwave integrated circuit package having thermal via
JP5412372B2 (en) Semiconductor mounting equipment
JP2004014645A (en) Semiconductor device
US8039957B2 (en) System for improving flip chip performance
JP2001326319A (en) High frequency circuit module with integrated antenna element
US7221232B2 (en) Parallel arrangement for saw oscillator components
JP3916988B2 (en) High frequency module

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 09779635

Country of ref document: EP

Kind code of ref document: A1

DPE1 Request for preliminary examination filed after expiration of 19th month from priority date (pct application filed from 20040101)
NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 09779635

Country of ref document: EP

Kind code of ref document: A1

点击 这是indexloc提供的php浏览器服务，不要输入任何密码和下载