WO2009107567A1 - 窒化物半導体ウエハーの加工方法と窒化物半導体ウエハー及び窒化物半導体デバイスの製造方法並びに窒化物半導体デバイス - Google Patents
窒化物半導体ウエハーの加工方法と窒化物半導体ウエハー及び窒化物半導体デバイスの製造方法並びに窒化物半導体デバイス Download PDFInfo
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- WO2009107567A1 WO2009107567A1 PCT/JP2009/053112 JP2009053112W WO2009107567A1 WO 2009107567 A1 WO2009107567 A1 WO 2009107567A1 JP 2009053112 W JP2009053112 W JP 2009053112W WO 2009107567 A1 WO2009107567 A1 WO 2009107567A1
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- Prior art keywords
- wafer
- work
- nitride semiconductor
- affected layer
- grinding
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Links
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02021—Edge treatment, chamfering
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/40—AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
- C30B29/403—AIII-nitrides
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
- H10H20/013—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
- H10H20/0137—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials the light-emitting regions comprising nitride materials
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/928—Front and rear surface processing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/959—Mechanical polishing of wafer
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/977—Thinning or removal of substrate
Definitions
- TECHNICAL FIELD A processing method of a nitride semiconductor wafer, a method of manufacturing a nitride semiconductor wafer and a nitride semiconductor device, and a nitride semiconductor device technical field
- the present invention relates to a peripheral processing method (chamfer processing method) of a nitride semiconductor wafer.
- Group 3 nitride semiconductors such as gallium nitride (G a N) and aluminum nitride (A 1 N) have a wide band gap and have applications as light-emitting elements and electronic devices. Large G a N single crystals and A 1 N single crystals do not exist in nature.
- Vapor phase growth method in which raw material gas is flowed on the base substrate of different materials and synthesized by gas phase reaction, or sodium flux method in which nitrogen gas is dissolved in metal sodium and reacted with Ga, or superfluous method It is made by a liquid phase method called a monothermal method, which is synthesized by reacting NH 3 and Ga in a critical state.
- a free-standing wafer such as gallium nitride or aluminum nitride could not be obtained, so a group 3 nitride such as G a N, In G a N, or A 1 G a N thin film was formed on a sapphire wafer.
- Light-emitting elements were made by epitaxially growing semiconductor thin films. Since then, it has become possible to produce free-standing crystal substrates with wide G a N by vapor phase growth or liquid phase growth.
- 1 inch diameter (approx. 25 mm) and 2 inch diameter (approx. 50 mm) self-supporting G a N wafers, A 1 N wafers, A 1 G a N wafers, n G a N wafer is made.
- Crystals produced by vapor phase or liquid phase growth have uneven surfaces and varying thickness. This is ground and polished to smooth the surface to obtain a mirror wafer. Since a semiconductor wafer is a substrate on which various devices are made, the surface must be smooth and free from cracks and warpage.
- chamfer Since nitride semiconductor crystals such as G a N are brittle and hard, chamfer requires special contrivance.
- Circular substrates are often used for both silicon (Si) wafers and GaAs wafers for convenient handling. Circular wafers are also produced with nitride substrates such as G a N substrates. The surface of the semiconductor wafer is polished to make it a mirror wafer. Depending on the purpose, both sides may be mirrored or only one side may be mirrored.
- Chamfers are also made on S i wafers.
- nitride semiconductor wafers such as Si wafers and GaN wafers differ in hardness, brittleness, robustness, and chemical characteristics.
- Nitride crystals such as G a N are harder and more brittle than S i. ⁇ It is difficult to chemically etch 1 II group surfaces such as 0 3 surface of & 1 ⁇ .
- the chamfer technology used for Si wafers cannot be immediately converted to a chamfer for nitride semiconductor wafers such as GaN.
- the chamfer technology established for Si wafers cannot be used for nitride semiconductor wafers such as GaN.
- Patent Document 1 a self-supporting gallium nitride substrate, which did not exist before, could be made for the first time by ELO (Epitaxial Leveral Overgrowth), so the outer periphery was chamfered and an orientation flat (OF) was added. That's it.
- ELO adopts (1 1 1) Ga As wafer as the underlying substrate. With a S i ⁇ 2 mask with fine windows distributed in a honeycomb shape on the G a A s ⁇ Eha, a G a N thin film grown laterally by HV PE method thereon, reducing dislocations on the mask After crystal grains are coalesced, grow C-plane.
- Vapor growth is continued to form a G a N crystal having a thickness of 100 m or more, and the G a As base substrate is removed to obtain a self-supported G a N substrate. It is a single rectangular crystal, but can be rounded to form a circular wafer.
- O F O r i e n t a t i o n F l a t
- I F I d i t i fi t c iT i o n F l a t
- Patent Document 1 states that the side edge is chamfered at an inclination angle of 5 ° to 30 °, or a circular cross section is chamfered at a radius of 0.1 mm to 0.5 mm.
- a circular grindstone with a frustoconical surface is rotated, and the outer periphery of the G a N wafer is brought into contact (circumferentially) with the circular grindstone.
- the outer periphery is shaved so as to have an inclination of 5 ° to 30 °.
- a circular grindstone is a resin-bonded grindstone in which fixed abrasive grains are held on the base.
- a chamfer of a semi-circular cross-section can also be made by rotating a thread-shaped circular grindstone with a semicircular cross-section recess of ⁇ 0.5 mm and rotating it against the outer periphery of the GaN wafer (circumscribed). it can.
- a resin bond is a resin with a grindstone with abrasive grains fixed by grease.
- a GaN substrate formed by growing gallium nitride on a different substrate and removing the substrate to form a self-supporting GaN wafer has a difference in thermal expansion coefficient and lattice constant between the underlying substrate and GaN. Therefore, the problem is that warping is large.
- the difference in height between the wafer center and the periphery is ⁇ 40 ⁇ ! It can be as much as ⁇ ⁇ 100 ⁇ m.
- a work-affected layer is formed on the polished surface. It is said that when a work-affected layer is introduced by polishing, the work-affected layer has the effect of expanding the surface, thereby reducing the warpage. It is also said that if the work-affected layer is etched and thinned, the effect of expanding the surface is reduced. Then, the warpage of the gallium nitride wafer can be reduced by combining polishing and etching of the front and back surfaces.
- the back side nitrogen side
- polishing the back side creates a work-affected layer on the back side, which tends to widen the back side.
- the back side becomes convex and the direction of warping is reversed.
- the rear surface side is etched to remove the work-affected layer.
- the warp is reduced because the force to push the back surface is reduced.
- the surface side G a surface
- Etching is difficult on the surface side, but the surface (Ga surface) can be dry-etched with chlorine plasma.
- a work-affected layer may exist at a thickness of 10 m on the front side and 50 ⁇ m thickness on the back side after grinding and polishing.
- the work-affected layer can be adjusted to an appropriate value between 10 m / 50 m and 50 m by a combination of polishing and etching, so that the warpage can be considerably reduced.
- Example 1 of Patent Document 2 a GaN wafer having a concave warp with a depth of 50 ⁇ m in the surface direction is ground to a warp with a convex of 30 / m in the surface direction, and the surface is dried. Etching results in a warped wafer with a concave of 20 ⁇ on the front side, and grinding and dry etching of the back surface results in a wafer with less warpage with a concave of 5 ⁇ on the front side.
- Patent Document 2 claims that the warpage can be finally reduced from +30 m to -20 in terms of a 2-inch wafer by a combination of grinding and touching.
- Patent Document 2 states that, in a GaN wafer, it is possible to enter the range of surface warpage from 30 ⁇ m to surface warpage of 20 ⁇ m.
- Patent Document 3 when a resin bonded diamond grindstone is rotated around the edge of a GaN wafer to chamfer the GaN wafer, the edge is missing or the wafer is cracked because GaN is a brittle and hard material. Because it is not desirable.
- Patent Document 3 proposes a tape grinding wheel chamfering method in which a wafer is chamfered by rotating the wafer by bringing the grinding stone attached to the tape grinding wheel into contact with the longitudinal direction of the edge of the wafer.
- the tape can be fed little by little to bring out a new grinding surface so that edge polishing can be performed in the same state. Because the edge is inscribed in the tape The contact pressure is small and no impact is applied. It explains that the yield is improved compared to the method of circumscribing the resin bond grindstone.
- FIG. 11 of the present application is a perspective view of a tape chamfer apparatus proposed for the first time by Patent Document 3 (Japanese Patent Laid-Open No. 2 043- 3 1 9 5 51).
- Fig. 12 of the present application is a cross-sectional view of the contact portion between the tape grindstone and the edge.
- Wafer W is fixed to a rotating disk (not shown) with a vacuum chuck or the like.
- Edge S is inscribed in tape grinding wheel T.
- the central angle of the inscribed part is assumed to be 40 ° to 90 °. It states that it is possible to prevent the edge from being damaged or cracked because it is in contact with the elastic tape.
- Patent Document 1 Japanese Patent Laid-Open No. 2 0 0 2—3 5 6 3 9 8 “Gallium Nitride Wafer” (Japanese Patent Application No. 2 0 0 1-1 6 6 9 04)
- Patent Document 2 Japanese Unexamined Patent Application Publication No. 2 0 0 5 — 1 3 6 1 6 7 “Nitride Semiconductor Substrate Manufacturing Method and Nitride Semiconductor Substrate” (Japanese Patent Application No. 2 0 0 3— 3 7 04 3 0)
- Patent Document 3 Japanese Patent Application Laid-Open No. 20 04-3 1 9 9 5 1 “Edge-polished nitride semiconductor substrate and edge-polished GaN free-standing substrate and nitride semiconductor substrate edge processing method” (Japanese Patent Application No. 2 0 0 3 — 2 7 5 9 3 5)
- Nitride semiconductor free-standing crystals such as gallium nitride can be manufactured by vapor phase growth or liquid phase growth. It is difficult to obtain large crystals by the liquid phase growth method.
- a large free-standing crystal substrate of gallium nitride can be fabricated by depositing gallium nitride thickly on a wide base substrate by vapor deposition and cutting the gallium nitride portion with a wire saw. This is ground to a nitride semiconductor mirror wafer by back grinding, chamfering, surface grinding and polishing. Thick by grinding (1 0 ⁇ ⁇ 5 ⁇ ⁇ ⁇ ) process-induced degradation layer occurs on the contact portion.
- a work-affected layer is formed on the back surface, with outer periphery grinding on the outer periphery, and with surface grinding. Processing
- the altered layer is a surface layer with disordered crystal structure. It contains a large amount of dislocations. It does not contain impurities. Since the work-affected layer should not remain on the front and back surfaces, the work-affected layers on the front and back surfaces are almost removed by etching.
- the present invention has a problem of grinding the outer peripheral portion (chamber). For conventional semiconductor wafer chamfers such as Si and GaAs, resin bond whetstones with diamond abrasive grains fixed to the base with resin or metal have been used. They are sharp, hard and robust and require less chamfer time.
- Resin bond and metal bond grindstones are suitable because Si and Ga wafers are soft and tough. However, they cannot be diverted to G a N chamfers. It has been found that chamfering a GaN wafer with a resin bond grindstone or metal bond grindstone has a high rate of cracking (cracking), produces a thick work-affected layer, and causes large warpage. G a N is weak against impact because it has high hardness, low toughness and brittleness. The reason for the high crack generation rate is that resin-bonded and metal-bonded grindstones are rigidly fixed to the base and cannot absorb the contact impact between the abrasive and the wafer. Cracks frequently occur due to chamfering with resin bond and metal bond grindstones.
- a sixth object of the present invention to obtain a nitride semiconductor wafer having a high device surface yield.
- a region outside the plane of the front and back surfaces of the wafer is defined as a peripheral portion, corners of the plane and side surfaces are defined as side edges, and a peripheral portion including the peripheral portions and side surfaces of the plane is defined as peripheral portions. Disclosure of the invention
- the nitride semiconductor wafer of the present invention is obtained by grinding and etching the back surface of a substrate of azground, and grinding the outer periphery with a grindstone in which diamond or a mixed abrasive of diamond and oxide is fixed with a flexible bonding material.
- the thickness of the work-affected layer on the outer periphery is 0.5 ⁇ ! ⁇ 10 ⁇ m, especially preferably 1 ⁇ !
- the surface is ground, ground and etched.
- the flexible bonding material is rubber or foamed resin.
- the diameter of the diamond abrasive grains is fine to some extent, from 300 to 600.
- diamond abrasive grains are mixed with oxide abrasive grains and ground by the combined action of oxide chemical action and diamond mechanical action.
- Oxide abrasive grains and the like F e 2 0 3, C u O, M N_ ⁇ 2, C r 2 O 3, Z N_ ⁇ . Since it is chamfered with a flexible grinding stone, it may take a long time.
- the impact on the outer periphery of the wafer is reduced, and cracks are generated. Prevents life, reduces the thickness of the damaged layer, and suppresses warpage.
- the thickness d of the work-affected layer M generated at the outer peripheral portion also serves as a scale for measuring the impact received by the outer peripheral portion. If the diamond abrasive grains are rough and the bond material is rigid, the impact force is large. At that time, when the outer periphery is observed later, the thickness d of the work-affected layer becomes thicker. The impact force is small when the diamond abrasive grains are fine and the bond material is flexible. At that time, when the outer periphery is observed later, the thickness d of the work-affected layer is reduced.
- metal thickness d will be 20 ⁇ ! Up to 50 m. In this case, the impact is too strong and cracks occur.
- rubber and foamed resin are used as a bonding agent, and high-diamond diamond grains with a small particle size are used to mix oxides. It is possible to chamfer GaN wafers with few cracks and warpage.
- the outer peripherally processed layer thickness d is 0.5 ⁇ ! It becomes ⁇ ⁇ ⁇ ⁇ . Warping can be suppressed by the work-affected layer with this thickness, and the device yield can be improved.
- the outer periphery of the gallium nitride wafer is ground with a high-quality diamond abrasive, or a flexible grindstone in which diamond abrasive and oxide are bonded with rubber or foamed resin (C). Grinding the outer periphery of a wafer is called chamfering. The reason for chamfering is to prevent cracking and chipping of the wafer.
- the grindstone used for the chamfer of the GaN wafer is preferably a rubber grindstone.
- a rubber grindstone is one in which abrasive grains are fixed to a grindstone base using rubber as a bonding agent.
- the abrasive is a hard material such as diamond. Since rubber is used as a bonding agent, it should be called a rubber bonding grindstone or rubber bond grindstone, but here it is simply called a rubber grindstone. It does not mean that the abrasive is rubber.
- the present invention is the first to use a rubber grindstone for peripheral grinding of a GaN wafer.
- the wafer surface is ground (D) and polished (E). 10 ⁇ on the surface when grinding! A thick work-affected layer with a thickness of ⁇ 50 ⁇ m can be formed. 0.1 ⁇ on the surface when polishing! A work-affected layer of ⁇ 20 m can be formed.
- a substrate for epitaxial growth a substrate having a smooth surface roughness and having no work-affected layer M on the surface is desired. Therefore, the surface is smoothed in the polishing process after grinding. Further, it is removed by vapor phase etching (F) until the work-affected layer M on the surface disappears.
- Wafer processing consists of back grinding A, back etching B, chamfer C, surface grinding D * polishing E, and vapor phase etching (F).
- the invention of the present invention does not exist in back grinding A, surface grinding D and polishing E.
- the present invention improves the chamfer process C.
- the gist of the present invention is a rubber grindstone or foaming register in which a nitride semiconductor wafer outer peripheral portion is fixed with high count diamond abrasive grains or diamond abrasive grains and oxide abrasive grains with rubber or foam resin.
- Chamfered with a 1- bonded whetstone, the thickness of the work-affected layer on the outer periphery is 0.5 ' ⁇ !
- the thickness d of the work-affected layer M increases as the size of the fixed abrasive grains used for grinding increases, and increases as the processing load increases. Conversely, the smaller the fixed abrasive used for grinding and the weaker the processing load, the thinner the work-affected layer M becomes.
- wafer processing is performed in the order of back grinding A, back etching B, peripheral grinding (Chamfer) C, surface grinding D, polishing E, and surface etching F.
- back grinding A 10 n! A fairly thick work-affected layer M of ⁇ 50 Aim occurs on the back side. It is undesirable for the work-affected layer to remain thick.
- N and Ga sides have different chemical and physical properties.
- the back surface (nitrogen surface; N surface; 0 0 0–1 surface) is physically and chemically weaker than the surface and can be removed with aqueous KOH, Na OH, or H 3 PO 4 . Other alkalis and acids may be used as long as the back surface can be etched.
- the surface (G a surface; 0 0 0 1 surface) is chemically stronger and cannot be removed with KOH, NaOH, or H 3 P 0 4 aqueous solutions. Accordingly, the means for removing the work-affected layer differs between the back surface and the front surface.
- the outer periphery of the wafer 1 is chamfered.
- Rubber (bond) in which abrasive grains are hardened with rubber Rotate a foamed resin-bonded grindstone in which abrasive grains are hardened with a grindstone or foamed resin, and contact the wafer outer circumference to chamfer the outer circumference.
- the fixed abrasive is diamond abrasive or a mixed abrasive of diamond and oxide. Diamonds included in rubber bond wheels and foamed resin bond wheels
- the counts of the abrasive grains are, for example, from 600 to 300. Count is a term for the average diameter of abrasive grains. A larger number means finer abrasive grains.
- the outer periphery of the wafer is chamfered by the chamfer, but at the same time a work-affected layer is generated on the outer periphery.
- Diamond grain size is large (number is small) When chamfering with a grinding wheel, d is 2 0! ⁇ 50 zm, large warpage, often cracks during grinding (crack). If the grain size of the abrasive grains is reduced, d can be reduced, but that alone is not sufficient. It is also effective to reduce the mechanical action of diamond by adding oxide abrasive grains.
- the oxide can be used F e 2 O 3, C r 2 ⁇ 3, Mn0 2, Cu0, Z nO, chemically unstable oxides such as F e 3 O 4.
- the inventor has discovered for the first time that a metal oxide, some abrasive grains have a chemical action, which has the effect of promoting nitride grinding. This inventor named it Mechanocemikanore Kenji ij (me chanochemica 1 grinding).
- Mechanochemical grinding is a method that softens the surface of nitride by a reaction such as oxidation by oxide abrasive grains and reduces the load of grinding, and can suppress work-affected layers and cracks during grinding.
- Stable oxides such as S i 0 2 and A 1 2 0 3 are unsuitable for oxides, and these have no mechanochemical grinding action. Even when a stable oxide is added, it is difficult to reduce d to 10 ⁇ m or less.
- the bonding material that fixes the abrasive grains to the wheel base is made of flexible rubber or foamed resin. By complementarily combining the three conditions of increasing the diamond count, adding oxide abrasive grains, and softening the bond material, d can be reduced to 10 ⁇ or less.
- the present invention is the first rubber bond grindstone for nitride semiconductor wafer chamfers. The use of a foam resin bond grindstone is proposed.
- the present invention is the first to propose a mixed oxide abrasive wheel for a nitride semiconductor wafer chamfer.
- the surface is further ground.
- a work-affected layer enters the surface. Since the surface is the surface on which the device is made, it must be mirrored. Therefore, the surface is polished.
- rough polishing using coarse abrasive grains and finish polishing using fine abrasive grains can be performed.
- the particle size is 30!
- Abrasive grains of ⁇ 3 / m can be used, and abrasive grains of 3 / zm ⁇ 0.1 ⁇ can be used for finish polishing. Polishing affected layer on the surface of the wafer enters the c
- grinding is flattening, polishing is often phased in the surface for both productivity and surface quality, omitting either You can also.
- a grinding wheel with a count of 3 0 0 0 to 8 0 0 0 for grinding and 3 0 / zn for polishing! ⁇ 15; um abrasive can be used. Grinding can be omitted by using a high-quality grindstone in grinding, or grinding can be omitted by using coarse abrasive grains in grinding. In this case, a grindstone with a count of 300-800 can be used for grinding, and an abrasive grain of 30- ⁇ -15- // m can be used for polishing.
- the work-affected layer is present on the surface and the outer periphery at this stage.
- the process-affected layer is removed only on the surface by vapor phase etching. Removal of the work-affected layer may be performed by chemical mechanical polishing (CMP).
- CMP chemical mechanical polishing
- the outer periphery is 0.5 / m to 10 / m, more preferably 1 ⁇ !
- An alteration layer with a thickness of ⁇ 3 ⁇ m remains. Unlike the front and back surfaces, which are flat, it is difficult to control the thickness by removing the work-affected layer by etching.
- the wafer can be processed by slicing a nitride ingot to produce a substrate, and thereafter performing backside etching B, peripheral grinding C, surface polishing E, and vapor phase etching F. Since the thickness can be adjusted by slicing, back grinding A and surface grinding D can be omitted. slice Since a work-affected layer is sometimes generated, the back surface and the front surface are etched. In this case, for example, slicing ⁇ back surface etching B ⁇ vapor phase etching F ⁇ peripheral grinding C ⁇ surface polishing E ⁇ gas phase etching F. Vapor etching F may be performed once. The second etch can be replaced by CMP. In addition, outer periphery grinding C can be sliced after being performed in an ingot state.
- Nitride semiconductor wafers were chamfered with fine diamond abrasive grains, or rubber bond grindstones in which oxide was fixed to the base with a flexible bonding material in addition to diamond abrasive grains, and foamed resin bond grindstones. Can be suppressed.
- 0.5 ⁇ ⁇ to 1 ⁇ ⁇ ⁇ , more preferably 1! ⁇ 3 // m Thickness makes it possible to obtain nitride semiconductor wafers with low warpage.
- the crack production rate is low and the substrate manufacturing yield can be increased. Furthermore, the yield of devices fabricated on the nitride semiconductor substrate can be improved.
- the thickness d of the work-affected layer can also be used as a scale to determine the mechanical impact strength of the chamfer later. It is 0.5 ⁇ to 10 ⁇ , which means that the contact between the grindstone and the wafer periphery is flexible. It means that the impact was weak.
- FIG. 1 is a process diagram showing a process for manufacturing a mirror wafer from a circular crystal of az-grown nitride semiconductor obtained by vapor phase growth on an underlying substrate and removing the underlying substrate.
- Fig. 2 is a graph showing the experimental results of the relationship between the thickness d of the work-affected layer of wafer G and the warpage U of the wafer.
- the horizontal axis is the logarithmic thickness (d: ⁇ ⁇ ) of the outer peripheral work-affected layer and the vertical axis is the warp U m).
- Fig. 3 is a graph showing the measurement results of the thickness d of the work-affected layer on the outer periphery of the GaN wafer, the yield Y (solid line), and the crack generation rate C (dashed line).
- the horizontal axis is logarithmically expressed thickness (d: zm) of the outer peripheral work-affected layer, the right vertical axis is the crack generation rate C (%), and the left vertical axis is the substrate fabrication process yield Y (%).
- Fig. 4 is a graph showing the measurement results of the relationship between the thickness d of the outer peripherally affected layer of the GaN wafer d and the in-plane yield Q of the device fabricated on the wafer.
- the horizontal axis is the logarithmically expressed thickness (d; ⁇ ) of the outer peripherally affected layer, and the vertical axis is the device surface yield Q (%).
- FIG. 5 shows 0.5 ⁇ ! On the outer periphery manufactured by the method of the present invention. Sectional view of a GaN wafer having a work-affected layer with a thickness of ⁇ 10 ⁇ , more preferably 1 ⁇ m-3 ⁇ m.
- FIG. 6 shows that the outer peripheral portion manufactured by the method of the present invention has a work-affected layer having a thickness of 0.5 ⁇ to 10 ⁇ , more preferably 1 / m to 3 ⁇ m, and has a work-affected layer on the side.
- FIG. 7 shows that the outer periphery manufactured by the method of the present invention is 0.5 im to 10 m, more preferably 1 ⁇ II! Cross-sectional view of a GaN wafer having a work-affected layer with a thickness of ⁇ 3 m and with the work-affected layer on the side removed completely.
- FIG. 8 shows that 0.5 ⁇ to 1 0 ⁇ , more preferably 1! Sectional view of a GaN wafer with a work-affected layer with a thickness of ⁇ 3 m and a work-affected layer on the side.
- FIG. 9 is a cross-sectional view showing a chamfering process in which the outer peripheral portion (including the side surface) of the wafer is rounded with a rubber grindstone.
- FIG. 10 is a cross-sectional view showing a chamfering process in which an outer peripheral portion of a wafer is inclined with a rubber grindstone.
- Fig. 11 shows the GaN wafer in the longitudinal direction of the tape grindstone proposed by Japanese Patent Laid-Open No. 2000-0 3 1 9 9 5 1 (Japanese Patent Application No. 2 0 0 3-2 7 5 9 3 5).
- the perspective view which shows the chamfer processing apparatus which grind
- Fig. 1 2 shows a GaN wafer in the longitudinal direction of the tape grindstone proposed by Japanese Patent Application Laid-Open No. 2000-0 3 1 9 9 5 1 (Japanese Patent Application No. 2 0 0 3-2 7 5 9 3 5).
- Sectional drawing which shows the chamfer processing apparatus which grind
- Figure 13 is a cross-sectional view showing that the warp is defined by the height U of the center of a wafer W of diameter D placed on a horizontal plane.
- Fig. 14 is a graph showing the relationship between the work-affected layer thickness d ( ⁇ ⁇ ) and wafer warpage U ( ⁇ m) for Samples 1 to 11.
- the numbers are sample numbers.
- ⁇ is a pass sample
- X is a fail sample (the same applies below).
- Fig. 15 is a graph showing the relationship between the work-affected layer thickness d m) and the crack occurrence rate C (%) for Samples 1 to 11. The numbers are sample numbers.
- Fig. 16 is a graph showing the relationship between the work-affected layer thickness d ( ⁇ m) and device yield Q (%) for samples 1 to 11. The numbers are sample numbers.
- FIG. 18 is a graph showing the relationship between the oxide abrasive grain ratio (w t% ′) and the wafer outer peripheral portion affected layer thickness d ( ⁇ m) for Samples 12 to 18.
- Fig. 19 is a graph showing the relationship between the oxide abrasive grain ratio (wt%) and the chipping rate P (%) for Samples 12 to 18.
- Fig. 20 is a graph showing the relationship between the oxide abrasive grain ratio (wt%) and device yield Q (%) for Samples 12-18.
- Fig. 21 is a graph showing the relationship between the work-affected layer thickness d ( ⁇ m) and the wafer outer peripheral metal amount m (at%) for Samples 19-26.
- FIG. 22 is a graph showing the relationship between the work-affected layer thickness d m) and the chipping rate p (%) for Samples 19-26.
- Fig. 23 is a graph showing the relationship between the work-affected layer thickness d (m) and device yield Q (%) for Samples 19-26.
- FIG. 24 is a graph showing the relationship between the work-affected layer thickness d ( ⁇ ) and the outer peripheral surface roughness Ra ( ⁇ m) for Samples 1 to 26.
- FIG. 25 shows an n—GaN thin film, an n—A1GaN thin film, a light emitting layer, a p—AlGaN thin film, a p—on a gallium nitride wafer of the present invention to fabricate a light emitting device.
- FIG. 26 shows the epitaxial growth of a GaN thin film, an AlGaN thin film, and a GaInN thin film on the gallium nitride wafer of the present invention to fabricate a light emitting device, and p-side electrode and n-side Sectional drawing for one element of the device in which the electrode was formed.
- Fig. 27 shows a vertical cross-sectional view of a light-emitting device device in which the device chip is mounted on the package system with AuSn solder and the n-side electrode is connected to the lead bin with a wire (p-side down and n-side up) .
- FIG. 28 is a graph showing the relationship between the amount of oxygen at the wafer outer periphery 0 (at%) and the chipping occurrence rate P (%) for Samples 12 to 18.
- Figure 29 is a graph showing the relationship between the oxygen content O (at%) and the device yield Q (%) at the wafer outer periphery for Samples 12 to 18.
- FIG. 30 is a graph showing the relationship between the amount of metal m (at%) and the chipping occurrence rate p (%) at the wafer outer periphery of Samples 19 to 26.
- Figure 31 is a graph showing the relationship between the metal amount m (at%) and the device yield Q (%) at the wafer outer periphery of Samples 19 to 26.
- the nitride substrate is made of I I group I nitride (eg, G a N, A 1 N, In N, A 1 Ga N, In G a N).
- I I group I nitride eg, G a N, A 1 N, In N, A 1 Ga N, In G a N.
- G a N it is grown by the HVPE method or the flux method or the mono-monothermal method.
- a 1 N it is grown by HVPE method, sublimation method or flux method.
- n N is grown by the HVPE method. From the grown nitride ingot, a wire saw is sliced with a blade saw to obtain a substrate. Planar processing is performed by grinding and polishing. Etching is performed by wet etching or dry etching.
- Non-foamed resin bond wheels, metal bond wheels, and electrodeposition wheels are too hard to fit nitride semiconductor wafer chamfers.
- a bond material for rubber wheels chloroprene rubber (CR) was used from the viewpoint of elastic deformation and removal during processing.
- the rubber hardness is preferably as low as 40 to 60 from the viewpoint of suppressing cracks and damage during processing.
- the porosity of the porous resin bond grindstone was 20 to 50%.
- the raw material is mixed with carbonates such as calcium carbonate and gas is generated during firing.
- PVA polyvinyl alcohol
- phenol is used as the resin for fixing the abrasive grains.
- Diamond abrasive grains were used as the abrasive grains fixed to the grindstone.
- Alumina (A 1 2 0 3 ) abrasive grains, silicon carbide (SiC) abrasive grains, and boron nitride (BN) abrasive grains can be substituted for diamond abrasive grains. Since diamond, alumina, silicon carbide, and pollonite are almost the same in function, diamond will be described below as a representative example.
- the number (#) of the diamond abrasive grains was 2-20 to 6 0 0 0.
- the count is a scale representing the abrasive grain size. Higher count means finer grains, and lower count means coarser grains.
- the thickness d of the work-affected layer at the chamfered portion of the wafer outer periphery is 0.5 ⁇ ! ⁇ 1 ⁇ m is good.
- Work Warpage increases when the thickness d of the damaged layer is less than 0.5 ⁇ or greater than 10 ⁇ . In addition, the incidence of cracks increases.
- the work-affected layer is more preferably 1 to 3 ⁇ . Warpage is affected by the work-affected layer on the outer periphery, the internal stress of the crystal, and the work-affected layers on the front and back surfaces. Also, warpage is affected by the diameter and thickness of the wafer.
- the work-affected layer can be evaluated with C L (cathode luminescence) and ⁇ (transmission electron microscope) on the cleavage plane.
- the roughness of the chamfered portion on the outer periphery is preferably R a 0.07 im to Ra 3 / zm on the basis of R a (arithmetic average roughness).
- Ra is one of the expression methods of surface roughness, and is obtained by accumulating and averaging the absolute values of deviations from the average height of all measurement points.
- Rm s root mean square roughness
- R a and Rms do not match and are not proportional to each other due to irregularities in the surface irregularities.
- the roughness of the outer peripheral portion is more preferably R a O. 15 m to R a 1 ⁇ m.
- the roughness of the outer periphery was measured in the range of 30 ⁇ m mouth (30 ⁇ mX 30 ⁇ m) with a laser microscope using a semiconductor laser with a wavelength of 658 nm.
- a gallium nitride wafer can be chamfered with a grindstone that uses extremely high diamond abrasive grains.
- a chamfer with a diamond grindstone that is not too high in count is too strong for mechanical action and the outer periphery is rough.
- Select unstable oxide powders to induce chemical reactions. The chemical action of the oxide reduces the mechanical action of the required diamond abrasive and reduces the impact.
- Oxide abrasive grains the use of abrasive grains selected from F e 2 ⁇ 3, F e 3 ⁇ 4, C r 2 O 3, C u O, C o 3 0 4, Mn O 2, Z n O it can.
- Oxide abrasive grains have a mechanochemical effect consisting of chemical action and mechanical action.
- the mechanochemical effect of oxide abrasive grains facilitates surface removal, and chamfering (chamfer) can be carried out with only a small load (impact) of diamond abrasive grains. Therefore, a smooth and less damaged surface can be obtained.
- Silica (S I_ ⁇ 2), alumina (A 1 2 0 3), such as a stable oxide abrasive grains are not suitable.
- the (0 0 0 1) plane (Ga plane) of the nitride substrate is stable and has high chemical durability. For this reason, the efficiency of grinding by mechanochemical effect is low.
- the surface inclined from the (0 0 0 1) plane is targeted, so that chemical durability is low and efficient mechanochemical grinding can be realized.
- Oxygen is mixed into the outer periphery due to the influence of the grinding atmosphere and oxides.
- the amount of oxygen in the peripheral chamfer is preferably 3 at% to 20 at%. When the amount of oxygen is less than 3 at%, chipping is likely to occur. If it is greater than 20 at%, the failure rate of the peripheral element increases.
- the amount of oxygen in the outer peripheral portion can be controlled by the blending ratio of the oxide abrasive grains.
- the oxygen amount is preferably 5 at% to 15 at%.
- the composition of the outer periphery can be measured by AES (Auger Electron Spectroscopy).
- Various semiconductor devices can be formed using the substrate.
- the light emitting layer is 10 thick! ! ! ! ! of. and four layers of the barrier layer formed of a N layer, thickness 3 nm of G a 0. 85 I n 0. 15 multiple quantum well and three layers of well layers are alternately stacked is formed by N layer It shall be structured (Fig. 25).
- an n-side electrode is attached to the back surface of the n-type substrate ((0 0 0-1) surface), and a p-side electrode is attached to the upper surface of the p-GaN layer.
- a 2mm square LED chip is attached to the package stem.
- G a N is transparent, so light can be emitted from the G a N substrate side.
- the light emitting layer is close to the stem and travels through the stem metal, so that heat is dissipated, so heat dissipation is good.
- G a N heat Since the conductivity is good, heat dissipation proceeds from the G a N substrate. Since G a N has higher thermal conductivity than sapphire, the G a N substrate light emitting element is suitable for large output with a large chip.
- FIG. 1 shows the process diagram ( A. Back grinding,
- Back grinding is a process to make the thickness of the wafer W within a predetermined range.
- Backside (nitrogen side) Grinding reduces the wafer thickness.
- a work-affected layer M is generated on the back surface by grinding.
- the work-affected layer M cannot be visually observed with a scanning electron microscope (SEM). They can be identified by force sword luminescence (CL), fluorescence microscope, or transmission electron microscope (TEM). Near the surface, the part that does not emit light with CL or fluorescence microscope, or the TEM bright-field image, is a part that is slightly altered from the surroundings.
- the thickness d of the work-affected layer M can also be measured by CL, fluorescence microscope, or TEM.
- S EM and CL are the same Observe the position and evaluate from the thickness of the non-light emitting area near the surface affected by processing.
- B Since it is not desirable that the work-affected layer M remains, the work-affected layer M on the back surface is removed.
- the etching of B removes the work-affected layer M caused by back grinding.
- a 25% strength K 2 O 3 H solution is heated to 90 ° C. and etched for 10 minutes to 120 minutes. Change the amount of etching within the range of 1 ⁇ m to 50 ⁇ m by changing the time.
- Chamfer chamfers the outer periphery of the wafer W diagonally or roundly. If a resin bond grindstone is used for the chamfer, it will break or crack from the outer periphery as described above. Using the tape grindstone of Patent Document 3 takes time. In order to prevent cracks and cracks, the present invention uses a rubber grindstone.
- a rubber grindstone is a fixed abrasive grain fixed to a base with rubber.
- Fig. 9 shows a state where the outer peripheral portion (including the side surface) E of the wafer W is chamfered by the drum-shaped rubber grindstone G having a circular curved surface. This chamfers the outer periphery E including the sides round.
- Fig. 10 shows how the outer peripheral portion E of the wafer is changed by a frustoconical rubber grindstone H having an inclined conical surface. This chamfers the top and bottom edges twice. Chamfered into a square shape. In this case, the wafer side is not chamfered.
- the shape of the grindstone is not limited to the above-mentioned drum shape or frustoconical shape, and the chamfered shape of the outer peripheral portion of the wafer may be formed by displacing a small grindstone and performing the outer peripheral processing.
- the chamfer uses the 600th rubber wheel first. Next, use a 200th rubber grindstone.
- the surface roughness of the outer periphery E is Ra 0.3 It is about ⁇ m.
- the outer periphery of the wafer has a surface roughness of about Ra 0. As a result, the outer peripheral portion E becomes smooth. Due to the chamfer, a work-affected layer M occurs on the outer periphery E.
- the thickness of the wafer W which was approximately 60 to 5500 ⁇ m thick by surface grinding, is reduced to 5 0 0 At ⁇ ! ⁇ 5 20 ⁇ m or so.
- the amount of grinding can be changed with time. For example 5
- Polishing consists of rough surface polishing and final polishing. The surface becomes smooth by rough polishing and finish polishing.
- a work-affected layer M exists on the surface and outer periphery. The thickness d of the work-affected layer M is about 10 ⁇ m to 50 m, although it varies depending on the amount of grinding.
- Various processes such as mechanochemical polishing (MCP), electropolishing, liquid phase etching and gas phase etching can be used to remove the work-affected layer on the wafer surface, but this time using a gas containing chlorine at a high temperature.
- MCP mechanochemical polishing
- electropolishing liquid phase etching
- gas phase etching gas phase etching
- the altered layer M was removed by vapor phase etching.
- the surface (G a surface) is chemically and physically stronger than the back surface (N surface), and it is difficult to corrode the surface with alkali etching. Therefore, removal of the work-affected layer on the surface was performed by vapor phase etching.
- the horizontal axis is a logarithmic representation of the outer peripherally processed layer thickness d ( ⁇ m).
- the vertical axis is warpage U (i m).
- Warpage U is expressed by a nearly monovalent function of the outer peripherally deformed layer thickness d.
- FIG. 3 shows the results.
- the horizontal axis in Fig. 3 is the outer peripherally damaged layer thickness d
- the right vertical axis is the crack occurrence rate C (%).
- the broken line indicates the crack occurrence rate.
- the crack generation rate C (%) is 3 ⁇ ! It increases monotonically in the range of ⁇ 10 ⁇ m.
- the crack generation rate increases from 1 m to 0 ⁇ m.
- d 0.5 ⁇ !
- the crack generation rate can be reduced to 50% or less at ⁇ 10 Atm.
- the thickness d of the outer peripheral work-affected layer that minimizes the occurrence of cracks is 3 im or less.
- the solid curve in Fig. 3 shows the relationship between the yield of the substrate fabrication process and the thickness d of the damaged layer on the outer periphery.
- Substrate fabrication process yield Y decreases to about 75% when the outer peripheral work-affected layer thickness d is 1 ⁇ . When d decreases to 0 ⁇ ⁇ , the substrate fabrication process yield ⁇ decreases to about 60%. In order to maintain the substrate production process yield 7 at 72- 80%, the outer peripheral work-affected layer thickness d of about 5 / m to l 0 x m is suitable.
- Devices such as light emitting elements were fabricated on the wafer, and the in-plane yield Q of the device was also examined. It was found that the device surface yield Q is also strongly related to the thickness d of the processed layer M on the outer periphery of the wafer.
- Figure 4 shows the measurement results.
- the thickness d is about 1. ⁇ ⁇ m, which is about 80% of the maximum. If d exceeds 3 m, the in-device yield Q decreases. On the other hand, when the outer peripheral work-affected layer thickness d approaches 0 m, the device in-plane yield Q drops rapidly to 50% or less after 50%. In order to increase the device surface yield Q to 60% or more, the thickness d of the outer peripheral work-affected layer must be about 0.5 ⁇ m to 10 // m. In order to increase device in-plane yield Q to 70% or more, d must be set to about 1 ⁇ m to 5 ⁇ m.
- the thickness d of the outer peripheral work-affected layer M remaining on the surface should be 1 m to 3 Aim. I understand that.
- nitride wafers such as A 1 N, A 1 G a N, or In G a N.
- the present invention is based on the accumulation of such results, and when a vapor-grown nitride semiconductor wafer is processed into a mirror wafer by back grinding, chamfering, and surface grinding, a rubber grindstone or a foamed resin grindstone is used.
- a method of chamfering to leave 0.5 ⁇ m to l 0 // ⁇ , more preferably 1 ⁇ to 3 ⁇ .
- 5 to 8 show schematic cross-sectional views of a nitride semiconductor wafer W manufactured by such a method.
- Figure 5 shows a complete removal of the modified layer on the wafer surface that was chamfered with the drum-shaped rubber grindstone (G) with a circular polished surface, and 0.5 ⁇ i! ⁇ 10 ⁇ m, preferably 1 m to 3 ⁇ m, of the work-affected layer ⁇ remains.
- Figure 6 shows a complete removal of the modified layer M on the surface of the wafer chamfered with a drum-shaped rubber wheel (G) with a circular polished surface, and 0.5 ⁇ on the outer periphery (including side surfaces)! ⁇ 10 / m, preferably 1 m to 3 ⁇ m of the work-affected layer ⁇ remains.
- Fig. 7 shows the surface and side surface of the wafer chamfered with a frusto-conical rubber grindstone ( ⁇ ) with an inclined conical surface. ⁇ 10 ⁇ , preferably 1 m to 3 ⁇ m of the work-affected layer ⁇ remains.
- Figure 8 shows that the work-affected layer ⁇ on the surface of the wafer chamfered with a frustoconical rubber grindstone ( ⁇ ⁇ ⁇ ) with an inclined conical surface is completely removed, and 0.5 im to 1 0 on the outer periphery (including side surfaces). im Preferably, 1 ⁇ m to 3 ⁇ m of work-affected layer flaws remain.
- the chamfer becomes more difficult as the wafer becomes larger. Cracks and warpage are likely to occur, and the yield tends to decrease when semiconductor devices are formed. If the present invention is applicable to a large-diameter wafer, the usefulness is further increased.
- Examples 2 to 4 there will be described 26 examples in which a one-step chamfer is performed on a large-diameter and thick G a N wafer having a diameter of 5 inches and a thickness of 8500 ⁇ m.
- the 5-inch diameter G a N wafer is the first proposal of the present invention and is unparalleled.
- the sample numbers are marked with numbers in Figs. ⁇ is a pass sample and X is a fail sample.
- the steps common to all samples 1 to 2 6 are described here.
- the back surface grinding (A) of the GaN wafer is performed, and the work-affected layer formed on the back surface is removed with KOH (B), and the outer periphery is processed (C Chamfering: a type of grinding), grinding the surface (D), polishing the surface (E), and removing the work-affected layer on the surface by vapor phase etching (F).
- C Chamfering a type of grinding
- the present invention is characterized by C chamfers, but all processes A to F will be described.
- n-type GaN ingot (dopant: O) with a diameter of 5 inches (1 27 mm) grown by the HV PE method was cut with a wire saw in a plane parallel to the (0 0 0 1) plane, and the thickness was 8
- a substrate of 5 ⁇ ⁇ ⁇ was obtained.
- Back grinding was performed on the obtained substrate (Step A). Grinding was performed using a # 600 diamond diamond wheel. A work-affected layer was formed on the back surface by grinding. After grinding, etching was performed at 50 ° C with a 15% KOH aqueous solution to remove the work-affected layer (Step B).
- N a OH such as H 3 P 0 4
- other alkali can be used an aqueous solution of acid. It was also possible to remove the modified layer by dry etching. Using the grindstone shown in Table 1, chamfering of the GaN substrate (Process C) was performed on the etched substrate. The surface was then polished.
- the C plane (back side; (0 0 0-1) plane) on the N atom plane side of the GaN substrate (nitride crystal) was attached to a ceramic crystal holder with wax.
- By placing a weight on the crystal holder press the G a N substrate surface against the surface plate while holding the G a N substrate against the rotation axis of the crystal holder.
- the surface of the n-type G a N was rubbed.
- a copper surface plate and a tin surface plate were used as the surface plate.
- Three types of diamond abrasive grains (free abrasive grains) with a grain size of 9 / zm, 3 / m, and 2 ⁇ m were prepared, and the grain size was gradually reduced as lapping progressed.
- the polishing pressure was set to 100 gZcm 2 to 500 gZ cm 2, and the rotation speeds of the GaN substrate and the surface plate were set to 30 times Zmin to 60 times Zmin. By such rubbing, the surface of the GaN crystal substrate became a mirror surface.
- a polishing pad is installed on a surface plate having a diameter of 60 mm installed in the polishing apparatus, and the polishing pad is supplied around the rotation axis while supplying slurry in which abrasive grains are dispersed from the slurry liquid supply port to the polishing pad. And rotating the gan substrate around the rotation axis of the crystal holder while pressing the gan substrate against the polishing pad.
- CMP chemical mechanical polishing
- the A 1 2 0 3 particles having a particle size 2 mu m to A 1 2 ⁇ 3 content were dispersed in water and 5 wt% as abrasive grains, HN0 3 was added as a p H adjusting agent, It was made by adjusting ⁇ to 2-4.
- a polyurethane suede pad was used as the polishing pad.
- a stainless steel surface plate was used as the surface plate.
- the polishing pressure was 50 gZcm 2 to 600 gZcm 2 .
- the rotation speeds of the GaN substrate and the polishing pad were both 30 times Zm in to 70 times in.
- n-type G a N substrate specific resistance 1 X 1 0- 2 ⁇ cm, was used Kiyarya Density 3 X 1 0 18 Zc m 3 to be the.
- An n-type G a N substrate is installed in the MOC VD equipment, and the surface of the n-type G a N substrate ((0 0 0 1) surface) side is ⁇ type G a with a thickness of 1 ⁇ m by MOC VD method.
- N layer.. dopant DOO:, S i
- 11 type 1 0 thickness 1 5 0 11111 a 0 9 N layer dopant: S i
- the light-emitting layer the type eight 1 0 a thickness of 2 0 11111. .
- the first electrode on the other back surface ((0 0 0— 1) surface, N surface) of the n-type G a N crystal substrate, i layer with a thickness of 2 0 0 1 ⁇ 1, thickness l OOO nm A 1 layer, thickness 2 0 0 ⁇ ! !
- the n-side electrode having a diameter of 100 ⁇ m was formed by forming a laminated structure formed of the i-layer and the Au layer having a thickness of 200 nm and heating in a nitrogen atmosphere.
- a layered structure consisting of a 4 nm thick Ni layer and a 4 nm thick Au layer is formed as the second electrode on the p-type GaN layer and heated in an inert gas atmosphere.
- Figure 26 shows a cross-sectional view of a wafer for one element on which electrodes are formed. Chip the above semiconductor wafer into 2 mm square Then, the p-side electrode was bonded to the stem with a solder layer formed of AuSn. Further, the n-side electrode was bonded with a lead pin and a wire to obtain a semiconductor device having a configuration as an LED. (Fig. 27).
- G a N is about 5 times higher in thermal conductivity (2 10 W / mK) than sapphire substrate (40 WZmK), and heat dissipation is promoted from the top through the substrate.
- the excellent features of G a N substrates can be demonstrated without regret.
- the light output of the obtained LED was measured using an integrating sphere under the condition of an injection current of 4 A. When an electric current is passed, light is emitted from the light emitting layer of the element. Some light exits upward, passes through the board and exits.
- the light output of the light emitting element was measured as follows. A predetermined current (4 A) is injected into the light emitting element placed in the integrating sphere, almost all the light emitted from the light emitting element is collected by the integrating sphere, and the optical power focused on the detector placed at the condensing point. was measured. As an LED, a device with higher light output is a higher performance device. A light output of 2 W or more was judged as good, and a light output of less than 2 W was judged as bad. The above processing, device fabrication, and inspection are common to samples 1-26.
- Samples 1 to 11 were tested for warpage, cracks, and device yield by varying the thickness of the work-affected layer on the outer periphery by varying the diamond abrasive grain count, bond material, and oxide ratio.
- the top column of Table 1 is the sample number. Sample numbers range from 1 to 1 1.
- the substrate characteristics are values measured for each wafer. For each sample, the perimeter processing, substrate characteristics, and device characteristics are tabulated.
- the part marked as outer peripheral processing from the second line in Table 1 shows the physical properties of the grindstone used for processing.
- the outer periphery processing is grinding, which is performed by rotating a grindstone with fixed abrasive grains and bringing it into contact with the outer periphery.
- Bond is a material that fixes abrasive grains to the substrate.
- a resin bond, a metal bond grindstone, or an electrodeposited grindstone electrodeposited with abrasive grains is frequently used as the grindstone.
- the present invention does not use a resin bond grindstone, a metal bond grindstone, or an electrodeposition grindstone. These are not desirable because the abrasive grains are rigidly fixed to the base.
- outer periphery processing is performed by a rubber bond grindstone and a foamed resin bond grindstone.
- the outer periphery was also processed with a resin bond grindstone, metal bond grindstone, and electrodeposition grindstone.
- the material column indicates the material of the bond material.
- CR is chloroprene rubber (c h l o r o p r e n e r u b b e r).
- the hardness of the rubber bond is shown in the next column.
- Resin bonds and metal bonds have high hardness and different measurement methods.
- Resin (resin) itself has poor elasticity and cannot be used, so it is useful to increase the elasticity by foaming the resin. When foamed, it becomes a composite of resin and bubbles.
- the volume ratio of pores is called porosity (volume%). Flexibility can be evaluated by porosity.
- oxide abrasive grains The types of oxide abrasive grains and their weight percentages are shown in the table. The weight percentage of diamond abrasive grains minus 100% weight percentage of oxide abrasive grains.
- the substrate characteristics column shows the characteristics of the four substrates after peripheral processing.
- the first is the thickness ( ⁇ ⁇ ) of the work-affected layer on the outer periphery.
- the part of the work-affected layer can be distinguished from other parts by CL (forced sword luminescence).
- the thickness of the work-affected layer remaining on the outer periphery is measured by CL.
- the second column is the surface roughness (R a) where m is the unit.
- the third column is the warpage of the substrate. The warpage is expressed by the height H at the center when the wafer is placed so that the outer periphery touches the flat surface. Since the wafer has a large area (large diameter), the warp value expressed in height is large, but it is considerably small when expressed in curvature.
- the crack occurrence rate is the ratio of the number of sample wafers with the same conditions that had cracks during grinding to the total number.
- Samples 1-1 1 were subjected to peripheral grinding under various conditions and tested for subsequent wafer warpage, crack generation rate, and device yield. In the device column, the percentage of good elements from one GaN wafer is shown as the yield.
- the element is a large light-emitting diode, a 2 mm square chip (area 4 mm 2 ).
- General-purpose light-emitting diodes that are normally manufactured and sold are 300 ⁇ m! ⁇ 50 0 m square. It is a large light emitting diode with an area 15 to 40 times larger than them.
- the area of a wafer with a diameter of 1 2 7 mm is about 1 2 200 Omm 2 , there is an area equivalent to about 3 200 chips.
- the chips were sampled and placed in a package, and the yield was examined by conducting a current test. Probably the yield is lower than the chip of the normal area (0.3 to 0.5 mm square) because the area (2 mm square) is large, but still a good large light-emitting diode with a fairly high yield should be manufactured. I was able to.
- Fig. 14 is a graph showing the relationship between the work-affected layer thickness dm) and the wafer warpage U ( ⁇ m) for Samples 1 to 11.
- the numbers in the figure represent sample numbers.
- D 0.5 ⁇ m ⁇ 10 im is a range of d proposed in the present invention.
- D 1 to 3 ⁇ m indicated by an arrow is a particularly desirable range.
- Figure 15 shows the thickness of the work-affected layer for Samples 1-1 1
- FIG. 5 is a graph showing the relationship between ( ⁇ ) and crack occurrence rate C (%).
- Figure 16 is a graph showing the relationship between the work-affected layer thickness d (Aim) and the device yield Q (%) for Samples 1-11.
- a N wafer is back-ground (A), back-side etched (B), and then a rubber grindstone with chloroprene rubber (CR) as bonding material is used.
- the outer circumference was ground (Chamfer C).
- rubber is used as the bonding material to fix the abrasive grains to the substrate, it should be called a rubber bond grindstone, but simply called a rubber grindstone. Rather than grinding with rubber sometime, the abrasive material is mainly diamond abrasive grains. Since the rubber of the bonding material cannot be foamed, the porosity is 0% (in the case of a resin bond, foaming is possible).
- the hardness of rubber can be changed depending on the compounding ratio. The rubber hardness of this rubber grindstone is 40.
- the fixed abrasive grains are diamond abrasive grains and iron sesquioxide (F e 2 0 3 ) abrasive grains.
- the ratio of oxide (F e 2 0 3 ) abrasive grains is 20% by weight.
- the remaining 80% by weight is diamond abrasive.
- Diamond abrasive grains with a number of 600 were used.
- the count (#) indicates the size of the abrasive grains. The larger the number, the finer the particles.
- the 600th is diamond abrasive with an average particle size of about 2.5 m.
- the thickness of the work-affected layer on the outer periphery produced by peripheral grinding is 0.3 xm.
- the surface roughness of the outer periphery after peripheral grinding (after chamfering) was Ra 0 .03 / ⁇ 1.
- the surface is ground (D), the surface is polished (E), and the surface is etched (F) to remove the work-affected layer and smooth the surface. I made it.
- Wafer warpage is 20 ⁇ m. Cracks and irregularities mean one chip breakage during peripheral grinding.
- the crack occurrence rate C (%) is the number of wafers that were missing or cracked during peripheral grinding divided by the total number of wafers and multiplied by 100.
- a 5 inch diameter (1 2 7mm), 8500 ⁇ m thick circular GaN wafer is back grounded (A), back etched (B), and then used with a rubber grindstone made of chloroprene rubber (CR). Peripheral grinding (Chamfer C). The porosity of the rubber grindstone is 0%. The rubber hardness is 40.
- the fixed abrasive grains are 80 wt% diamond abrasive grains and 20 wt% ferric sesquioxide (F e 2 0 3 ) abrasive grains. Diamond abrasive grains that were slightly coarser than sample 1 were used. Diamond abrasive with an average particle size of about 5 / m.
- the surface roughness of the outer periphery after the outer periphery grinding was Ra 0.0. A rough grindstone was used, so the surface roughness increased.
- the surface is ground (D), the surface is polished (E), and the surface is etched (F) to remove the work-affected layer and smooth the surface. I made it.
- the warpage of the wafer (height U relative to the periphery of the center) is 10 m. Warpage is decreasing.
- Crack generation rate C is 4%. Less than half of Sample 1.
- a device yield of Q 72% was obtained by creating a large number of light emitting diodes on this substrate, mounting them on a chip separation stem, attaching electrodes, and conducting an energization test (4A) to examine the amount of light emitted. Excellent and high yield. Since it passes, sample 2 is indicated by ⁇ in the graph. The same applies to the X in the graph below.
- the roughness of the outer peripheral surface is Ra 0.07 / m, which is rougher than Sample 1, and the thickness of the work-affected layer at the outer periphery is 0.5 mm, which is thicker than Sample 1. The reason for the high yield is thought to be the roughness of the outer periphery and the thickness of the work-affected layer.
- the mechanical grinding action is large and the work-affected layer thickness d has increased.
- the surface roughness of the outer periphery after peripheral grinding was RaO.15 / zm. Since diamond is 100%, the mechanical action is large and the outer peripheral surface becomes rough.
- the surface was ground (D), the surface was polished (E), and the surface was etched (F) to remove the work-affected layer on the surface and smooth the surface.
- G a ⁇ wafer of the same size and shape (5 inch diameter, 8500 ⁇ thickness) is back ground (A) and back surface etched (B), and then a rubber grindstone made of chloroprene rubber (CR) is used. Peripheral grinding (Chamfer C). The porosity is 0%. Hardness is a little hard 4 5. The fixed abrasive is only diamond abrasive. Diamond abrasive is coarser than samples 1, 2, and 3
- a GaN wafer with a diameter of 5 inches and a thickness of 8500 ⁇ m was ground (A) and back-side etched (B), and then peripherally ground using a rubber grindstone made of chloroprene rubber (CR). )
- the porosity is 0%. Hardness is a little high 50.
- the fixed abrasive is only diamond abrasive. Diamond abrasive grains having a coarser particle size than samples 1 to 4 (average particle size 10 ⁇ m) were used.
- a N wafer of the same size and shape as before is back ground (A), back surface etched (B), and polyvinyl alcohol (PVA) is the bond material Peripheral grinding using a grinding wheel (Chamfer C).
- This is a resin bond grindstone rather than a rubber grindstone because resin is used as a bonding material.
- the PVA resin bonding material is foamed to reduce the hardness.
- the porosity is 40%. Because there are many holes, it is a flexible bond. Hardness cannot be measured with the same technique as rubber wheels.
- the fixed abrasive is just diamond abrasive There are four. A sample with a coarse particle size of 800 (average particle size: 19 m) was used.
- the diamond abrasive grains were coarser, so the mechanical grinding action was large and the work-affected layer thickness d was doubled.
- the surface roughness of the outer periphery after peripheral grinding was Ra 3 / m.
- the use of a coarse-grained diamond grinding wheel resulted in a rougher outer surface.
- the surface was ground (D), the surface was polished (E), and the surface was etched (F) to remove the work-affected layer on the surface and smooth the surface.
- GaN wafer is back-ground (A), back-side etched (B), and then externally ground using a grindstone with phenol resin as the bonding material (Chanfer C) Because it is a material, it is not a rubber wheel but a resin bond wheel. Unlike sample 6, phenol resin is used as the bonding material. Do not foam. The porosity is 0%. Hardness cannot be measured using the same method as rubber wheels.
- the fixed abrasive is only diamond abrasive. Diamond abrasive grains that were coarser than Samples 1 to 6 and had the same number as that of Sample 7 (number average particle size 25 m) were used.
- the diamond abrasive grains have the same count, but the bonding material that fixes the grindstone to the base is unfoamed phenolic resin, which is harder than sample 7.
- the mechanical grinding action is large and the work-affected layer thickness d is larger than Sample 7.
- the surface roughness of the outer periphery after the outer periphery grinding was Ra 7 ⁇ . Because the diamond abrasive grains and the harder bonding resin grindstone were used, the outer peripheral surface became rougher.
- the fixed abrasive is only diamond abrasive. Diamond abrasive grains having a coarser particle diameter than Samples 1 to 6 and having the same number as that of Samples 7 and 8 (number average particle size 25 ⁇ m) were used.
- the thickness of the work-affected layer on the outer periphery after chamfering is JP2009 / 053112
- a GaN wafer with a diameter of 5 inches and 8500 m thick was back ground (A), back side etched (B), and then peripherally ground using a grindstone with a copper-tin alloy (Cu-Sn) as bond material (Changer C). It is a metal bond grindstone.
- the porosity is 0%.
- Fixed abrasive grains are diamond grains and Fe 2 O 3 grains. Daiyamondo abrasive 8 0%, F e 2 O 3 abrasive grains 2 0% blend ratio
- the diamond abrasive grains were the same as the sample 2 and had a fine particle size of 300 (average particle size 5 ⁇ m). This ratio is the same as Sample 2. The difference from sample 2 is the bonding material. Sample 2 is chloroprene rubber (CR), and sample 10 is copper tin. TJP2009 / 053112
- d is lower (1 3 ⁇ ) due to fine diamond abrasive grains.
- sample 2 0.5 / m is due to the difference between rubber bonding and metal bonding.
- d is greatly different from 0.5 ⁇ to 1 3 ⁇ . It means that rubber bonding with high elasticity is good.
- the surface roughness of the outer peripheral part after peripheral grinding was Ra 1 ⁇ m.
- the surface roughness is small because fine diamond abrasive grains and oxide abrasive grains are used. Since this is a metal bond, the surface roughness is higher than that of Sample 2.
- the surface was ground (D), the surface was polished (E), and the surface was etched (F) to remove the work-affected layer on the surface and smooth the surface.
- Crack generation rate C is 14%. sample;! ⁇ 8 greater than sample 9, less. It can be seen that even with fine diamond abrasives, the metal bond wheel is too hard for peripheral grinding because the bond is too hard.
- the range of d is 1 m ⁇ d 3 m, and if it is 70% or more, the range of d is 0.5 m ⁇ d ⁇ 10 zm. 0 is rejected. If the required product yield is 50% or more, d in the range of 0.3; u m ⁇ d ⁇ 1 3 ⁇ is allowed.
- a GaN wafer with a 5-inch diameter of 8500 ⁇ m was ground (A), back-side etched (B), and then peripherally ground using a grindstone with electrodeposited diamond grains (Chamfer C). It is an electrodeposited whetstone.
- the porosity is 0%.
- the fixed abrasive grains are 100% fine diamond abrasive grains of 100%.
- the difference from Sample 10 is that it contains no oxide and the bonding material is different. 9 053112
- Crack generation rate C is 2 2%.
- the crack generation rate C is the second largest after Sample 9, suggesting that it has a strong correlation with the work-affected layer thickness d. It can be seen that even if fine diamond grains are used, the electrodeposition wheel is too hard to be used for peripheral grinding.
- the surface roughness of the outer periphery does not have an unequivocal correlation with the work-affected layer thickness d, and seems to strongly depend on the size and ratio of the diamond abrasive grains.
- Ra is smaller than diamond abrasive grains alone.
- the surface roughness is the lowest when the bonding agent is rubber, but there is not much difference between metal and electrodeposition. Furthermore, there seems to be no strong correlation between surface roughness Ra and warpage, crack incidence C, and yield.
- the thickness of the work-affected layer d increases as the ratio of diamond abrasive grains increases, and increases as the diamond abrasive grains become coarser.
- Resin bond foamed and flexible can be used (Sample 6).
- the diamond grindstones are in the order of 3 0 0 0 to 6 0 0. To further reduce d, it is effective to reduce the diamond ratio and increase the oxide abrasive grains.
- Oxide abrasive grains form a soft layer on the surface of the nitride by chemical action, so the load on peripheral grinding can be reduced and the work-affected layer can be suppressed.
- d 0.5 ⁇ n!
- the outer surface roughness corresponding to ⁇ 10 m is Ra 0. 0 7 ⁇ rr! ⁇ Ra5 / m.
- Example 3 Example 3; Sample 1 2 to: I 8: Table 2: Fig. 17, 18, 19, 20, 28, 28, 29 Sample 2-1 to 18 are diamond abrasive grains The rubber hardness of the rubber grindstone was fixed at 50. The outer periphery was ground with different oxides, and the oxygen content, chipping, and device yield at the outer periphery were tested. The wafer preparation, processing sequence, and device fabrication are the same as in Example 2. We investigated how the oxygen concentration at the outer periphery affects the quality of wafers and devices. Table 2 shows the results. Peripheral oxygen content is expressed in atomic ratio (at%).
- Chipping refers to chipping or cracking of the outer periphery of a wafer during planar processing (grinding or polishing).
- the device yield is evaluated by passing or failing when a 2 mm square light emitting diode is fabricated on the wafer and the light is emitted through an energization test.
- the abrasive grains may be 100% diamond, but may be a combination of diamond and oxide abrasive grains.
- Surface grinding, surface polishing, and surface etching were performed by grinding with a grindstone having a mixed abrasive grain of diamond abrasive grains and oxide abrasive grains of intermediate counts of Samples 5-6.
- a crack means a crack at the outer periphery of a wafer in peripheral grinding.
- Chipping means cracking of the outer periphery of the wafer during subsequent surface processing.
- Oxide abrasive grains form a soft layer on the nitride surface by chemical action, so the load on peripheral grinding can be reduced.
- FIG. 17 shows the ratio of diamond abrasive grains (100 to 40 wt%) and oxide abrasive grains (0 to 60 wt%) contained in the grindstone in Samples 1 to 1-8, and gallium nitride after chamfering.
- 3 is a graph showing the relationship between the oxygen amount on the outer periphery of a wafer.
- Fig. 9 Shows the ratio of diamond abrasive grains (100 to 40 wt%) and oxide abrasive grains (0 to 60 wt%) contained in the grindstone in Samples 1 to 1 to 8, and wafer planar processing after chamfering 6 is a graph showing the relationship of the chipping occurrence rate p in the case.
- Figure 20 shows the relationship between the device yield Q and the ratio of diamond abrasive grains (1 0 0 to 40 wt%) and oxide abrasive grains (0 to 60 wt%) contained in the grindstone of samples 1 2 to 18 It is a graph which shows.
- Fig. 28 is a graph showing the relationship between the amount of oxygen (at%) contained in the wafer outer periphery in samples 12 to 18 and the chipping rate P (%) in wafer flat surface processing after chamfering.
- FIG. 29 is a graph showing the relationship between the oxygen amount (at%) contained in the wafer outer peripheral portion and the device yield Q (%) in Samples 12 to 18.
- the same 5 inch diameter, 8500 m thick GaN wafer is back ground (A), back surface etched (B), and then the diamond diamonds of 100th are made with chloroprene rubber (CR).
- the surface was ground (D), the surface was polished ( ⁇ ), and the surface was etched (F) to remove the work-affected layer on the surface and smooth the surface.
- This oxygen may not have been mixed from the chamfer grindstone, but may have been oxidized naturally by etching, planar processing, cleaning oxidation, and atmosphere.
- the chipping rate p is 25%. 2 5% of the wafer is wasted.
- the yield after processing into a mirror wafer is high. However, it is not desirable that the occurrence rate of chipping at the time of planar processing in the previous stage is high. More ingenuity is needed.
- a mixture of 20 wt% of abrasive grains was peripherally ground using a grindstone fixed to the base with chloroprene rubber (CR) (Chamfer C).
- the porosity is 0%.
- the rubber hardness is 50.
- the outer peripheral surface roughness is also low.
- the outer peripheral surface became smoother due to the action of soft oxide abrasive grains.
- the surface was ground (D), the surface was polished (E), and the surface was etched (F) to remove the work-affected layer on the surface and smooth the surface.
- the chipping rate p is 5%. Compared to sample 12, the chipping rate is 1/5.
- the reason for the decrease in the occurrence of chipping is thought to be the presence of oxide on the outer periphery.
- the chemical action of the oxide abrasive grain reduced internal damage during chamfering, which suppressed chipping. The same is true for other oxygen-remaining samples. This is the advantage of using oxide abrasives.
- the chipping rate p is 2%. Compared with Sample 1 2 which does not use oxide abrasive grains, the chipping rate is 1 1 2. Compared with samples 13 and 14 using oxide abrasive grains, the chipping rate is low. This is because the peripheral oxygen concentration is higher. It can be seen from Samples 12 to 15 that it is the oxide contained in the outer periphery of the wafer that reduces the occurrence of chipping. This is an advantage of using oxide abrasive grains.
- the surface roughness Ra is the same as Samples 14 and 15. It can be seen that the surface roughness is determined by the diamond: oxide abrasive grain ratio and does not depend on the type of oxide.
- the surface was ground (D), the surface was polished (E), and the surface was etched (F) to remove the work-affected layer on the surface and smooth the surface.
- the chipping rate p is 3%.
- the diamond abrasive grain ratio decreases, the mechanical grinding action becomes weaker, and the work-affected layer thickness d decreases.
- the surface roughness Ra is the same as that of Samples 13 to 16.
- the surface was ground (D), the surface was polished (E), and the surface was etched (F) to remove the work-affected layer on the surface and smooth the surface.
- the chipping rate p is 5%.
- the mechanical grinding action becomes weaker and d decreases.
- the surface was ground (D), the surface was polished (E), and the surface was etched (F) to remove the work-affected layer on the surface and smooth the surface.
- the chipping rate p is 15%.
- Fig. 17 shows that the amount of oxygen on the outer periphery of the wafer increases as more oxide abrasive grains are applied to the chamfering wheel. From the comparison of samples 1 3 and 14 and the comparison of samples 1 5 and 16, it can be seen that Cr 2 0 3 has more residual oxygen than Fe 2 0 3 even at the same weight ratio. It is conceivable that chromium oxide is rich in iron oxide reaction, and chromium oxide is harder than iron oxide and has a greater influence during grinding. 5 Fig. 18 shows that the thickness d of the work-affected layer increases as the oxide ratio decreases (as the diamond ratio increases). The mechanical action of diamond increases and d increases. It can be seen that the oxide relaxes the mechanical destructive force of diamond.
- the chipping can be suppressed to 5% or less when the oxide ratio is 20 wt% to 40 wt%. In the case of only diamond abrasive grains (Sample 1 2), chipping occurs particularly frequently.
- the chipping can be suppressed to 5% or less when the oxygen amount is 3 at% to 20 at%.
- the oxygen amount is 3 at% to 20 at%.
- chipping occurs particularly frequently.
- FIG. 20 shows that the device yield can be increased to 78% or more when the oxide ratio is 2 O wt% to 4 O wt%.
- the device yield can be increased to 78% or more when the oxygen amount is 3 at% to 20 at%.
- Example 4 Samples 1 9 to 2 6; Table 3; Figures 2 1, 2 2, 2 3, 3 0, 3 1
- the amount of metal is the amount of metal in the outer periphery of the sample after chamfering.
- FIG. 21 is a graph showing the relationship between the outer peripheral work-affected layer thickness d and the outer peripheral metal amount m (at%) for Samples 19 to 26.
- FIG. 22 is a graph showing the relationship between the outer peripherally deteriorated layer thickness d and the chipping occurrence rate p (%) for Samples 19 to 26.
- FIG. 23 is a graph showing the relationship between the outer peripherally deteriorated layer thickness d and the device yield Q (%) for Samples 19 to 26.
- Fig. 30 is a graph showing the relationship between the metal amount m at the outer periphery and the chipping rate p (%) for samples 19 to 26.
- Fig. 31 is a graph showing the relationship between the metal amount m on the outer periphery and the device yield Q (%) for samples 19 to 26.
- the same 5 inch diameter, 8500 m thick GaN wafer was back-ground (A) and back-side etched (B).
- the 600th diamond abrasive grain was made of CR (chloroprene rubber).
- the outer periphery was ground using a grindstone fixed to (Chamfer C).
- the porosity is 0%. Go The hardness is 55.
- the surface was ground (D), the surface was polished (E), and the surface was etched (F) to remove the work-affected layer on the surface and smooth the surface.
- the chipping rate p is 2 2%. 2 2% of wafers are wasted.
- the diamond abrasive grains are relatively large in size, and mechanical impacts appear strongly, which can cause internal damage.
- the chipping rate p is 8%. This is an acceptable value.
- the chipping rate p is low and the yield Q is high. This is a pass. Since iron oxide is used, 0.1 at% iron (F e) remains on the outer periphery. The presence of metals and oxygen lowers d and lowers p. It is thought that metal, oxygen itself reinforces the crystal, and mitigates internal damage in chamfer.
- Abrasive grains made of wt% were ground with a grindstone fixed to the base with CR (chloroprene rubber) (Chamfer C).
- the porosity is 0%.
- the rubber hardness is 55.
- the surface was ground (D), the surface was polished (E), and the surface was etched (F) to remove the work-affected layer on the surface and smooth the surface.
- the chipping rate p is 4%. This is an acceptable value.
- Back grinding (A) and backside etching (B) of GaN wafer with 5 inch diameter and 8500 ⁇ thickness, and then 6 0 0th diamond abrasive grains, 80 wt% Z n O abrasive grains 2 0 wt Peripheral grinding was performed using a whetstone fixed to the substrate with CR (chloroprene rubber) with abrasive grains consisting of a mixture of% (Chamfer C). The porosity is 0%. The rubber hardness is 55. The thickness of the work-affected layer in the outer periphery after peripheral grinding was d 7 m, and the surface roughness was Ra 2 ⁇ m.
- the surface was ground (D), the surface was polished (E), and the surface was etched (F) to remove the work-affected layer on the surface and smooth the surface.
- the chipping rate p is 7%. This is an acceptable value.
- the product yield for the production of light-emitting diodes was Q 88%. Chipping rate p is low and yield Q is high This is a pass. Since zinc oxide is used, 3 at% zinc (Zn) remains on the outer periphery. The presence of zinc and oxygen lowers p and d. The presence of oxygen and metal can reinforce the crystal structure and mitigate internal damage in the chamber.
- Copper (C u) remains 5 at% on the outer periphery.
- the presence of metal and oxygen lowers p and reduces d.
- Oxygen and metal residues may reinforce the crystal structure and mitigate internal damage in the chamfer.
- the oxide ratio is 20 wt%, but the residual metal amount m is Cu (5 at%), Zn (3 at%), Cr (0. 2 at%) and F e (0.1 at%) in this order. This is influenced by the reactivity of the chemical reaction, the hardness of the abrasive grains, and the ease of removal by cleaning.
- the outer periphery was ground using a grindstone fixed to the base with CR (chloroprene rubber). The porosity is 0%. The rubber hardness is 55.
- the surface was ground (D), the surface was polished (E), and the surface was etched (F) to remove the work-affected layer on the surface and smooth the surface.
- the chipping rate p is 15%.
- the reason why the work-affected layer thickness d and surface roughness are large is that the ratio of diamond is high and the metal bond.
- the surface was ground (D), the surface was polished (E), and the surface was etched (F) to remove the work-affected layer on the surface and smooth the surface.
- the bonding material is iron, so 10 at% iron remains on the outer periphery.
- the chipping rate p is 25%.
- the surface was ground (D), the surface was polished (E), and the surface was etched (F) to remove the work-affected layer on the surface and smooth the surface.
- Fig. 24 shows the relationship between the work-affected layer thickness d ( ⁇ m) and the outer peripheral surface roughness R a ( ⁇ ⁇ ) for all samples 1 to 26.
- FIG. 30 shows the relationship between the metal content m (at%) and the chipping rate p (%) for samples 19 to 26. If the amount of metal is 0.1 at% to 5 at%, Bing rate p can be reduced to 15% or less.
- Figure 31 shows the relationship between the peripheral metal (at%) and device yield Q (%) for samples 19 to 26. If the amount of metal in the outer periphery is 0 to 5 at, the device yield Q can be 85% or more.
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Abstract
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EP09714856.3A EP2246877A4 (en) | 2008-02-27 | 2009-02-16 | METHOD FOR THE INDUSTRIAL MANUFACTURE OF A NITRIDE SEMICONDUCTOR WAFER, NITRIDE SEMICONDUCTOR WAFER, METHOD FOR PRODUCING A NITRIDE SEMICONDUCTOR DEVICE AND NITRIDE SEMICONDUCTOR DEVICE |
US12/812,697 US7872331B2 (en) | 2008-02-27 | 2009-02-16 | Nitride semiconductor wafer |
CN2009801012126A CN101884094B (zh) | 2008-02-27 | 2009-02-16 | 氮化物半导体晶片的加工方法和氮化物半导体晶片 |
US12/940,733 US8101523B2 (en) | 2008-02-27 | 2010-11-05 | Method of processing of nitride semiconductor wafer, nitride semiconductor wafer, method of producing nitride semiconductor device and nitride semiconductor device |
US13/287,670 US8183669B2 (en) | 2008-02-27 | 2011-11-02 | Nitride semiconductor wafer having a chamfered edge |
US13/437,221 US20120184108A1 (en) | 2008-02-27 | 2012-04-02 | Method of processing of nitride semiconductor wafer, nitride semiconductor wafer, method of producing nitride semiconductor device and nitride semiconductor device |
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US12/940,733 Continuation US8101523B2 (en) | 2008-02-27 | 2010-11-05 | Method of processing of nitride semiconductor wafer, nitride semiconductor wafer, method of producing nitride semiconductor device and nitride semiconductor device |
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EP2302113A1 (en) * | 2009-09-24 | 2011-03-30 | Sumitomo Electric Industries, Ltd. | Nitride semiconductor substrate, semiconductor device, and methods for manufacturing nitride semiconductor substrate and semiconductor device |
JP2011071180A (ja) * | 2009-09-24 | 2011-04-07 | Sumitomo Electric Ind Ltd | 窒化物半導体基板、半導体装置およびそれらの製造方法 |
CN102034853A (zh) * | 2009-09-24 | 2011-04-27 | 住友电气工业株式会社 | 氮化物半导体衬底、半导体器件及其制造方法 |
US8471365B2 (en) | 2009-09-24 | 2013-06-25 | Sumitomo Electric Industries, Ltd. | Nitride semiconductor substrate, semiconductor device, and methods for manufacturing nitride semiconductor substrate and semiconductor device |
TWI550903B (zh) * | 2009-09-24 | 2016-09-21 | 住友電氣工業股份有限公司 | 氮化物半導體基板、半導體裝置及彼等之製造方法 |
CN102576712A (zh) * | 2009-10-15 | 2012-07-11 | 住友电木株式会社 | 树脂组合物、半导体晶片接合体和半导体装置 |
JP2011129820A (ja) * | 2009-12-21 | 2011-06-30 | Disco Abrasive Syst Ltd | 光デバイスウエーハの加工方法 |
US20220220637A1 (en) * | 2019-05-17 | 2022-07-14 | Sumitomo Electric Industries, Ltd. | Silicon carbide substrate |
US12104278B2 (en) * | 2019-05-17 | 2024-10-01 | Sumitomo Electric Industries, Ltd. | Silicon carbide substrate |
TWI852112B (zh) * | 2022-06-27 | 2024-08-11 | 大陸商西安奕斯偉材料科技股份有限公司 | 矽片加工方法及矽片 |
Also Published As
Publication number | Publication date |
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DE202009002734U1 (de) | 2009-11-19 |
EP2246877A4 (en) | 2013-10-30 |
TWI433224B (zh) | 2014-04-01 |
US20120184108A1 (en) | 2012-07-19 |
US8101523B2 (en) | 2012-01-24 |
US20120043645A1 (en) | 2012-02-23 |
TW201001514A (en) | 2010-01-01 |
US8183669B2 (en) | 2012-05-22 |
CN101884094B (zh) | 2013-02-13 |
EP2246877A1 (en) | 2010-11-03 |
JP4395812B2 (ja) | 2010-01-13 |
KR20100123813A (ko) | 2010-11-25 |
US20100270649A1 (en) | 2010-10-28 |
CN101884094A (zh) | 2010-11-10 |
US20110049679A1 (en) | 2011-03-03 |
CN103122485A (zh) | 2013-05-29 |
US7872331B2 (en) | 2011-01-18 |
JP2009231814A (ja) | 2009-10-08 |
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