WO2009153965A1 - Gate drive technique for bidirectional switches and power converter that uses the same - Google Patents

Abstract

Disclosed is a low-loss gate drive technique that controls a bidirectional switch, which is equipped with a first gate terminal, a second gate terminal, a drain terminal, and a source terminal, and which possesses four operating modes in which the first gate terminal and second gate terminal are variously ON and/or OFF, so that the switch does not shift directly when shifting from a bidirectionally OFF state to a bidirectional ON state, whereby overcurrent and overvoltage incidences in the various components can be prevented from occurring in unintended transition periods.

Description

Bidirectional switch gate driving method and power converter using the same

The present invention relates to a gate drive method for a bidirectional switch having four states by controlling a gate signal, and a power converter using the same.

In recent years, the spread of electronic devices has tended to expand further, but at the same time, the power consumption of electronic devices has increased, and global warming has occurred, which is recognized as a social problem. Due to this social background, there is an increasing demand for lower power consumption of electronic devices. Standby power for operation such as actuators to realize the main functions of power supply circuits or electronic devices, and for operation Any power consumption of electric power is expected to be reduced by technological innovation.

Conventionally, as a technique for reducing power consumption of this type, depending on the voltage to be used, a semiconductor device is properly used as a field effect transistor (MOSFET) or an insulated gate bipolar transistor (IGBT), or as a new semiconductor device. For example, Patent Document 1 proposes a power conversion circuit using a bidirectional switch. Hereinafter, a driving method of the bidirectional switch described in Patent Document 1 will be described with reference to FIG.

FIG. 12 is an explanatory diagram of a bidirectional switch driving method in Patent Document 1. FIG. 12 shows driving of the gate electrode when the potential of the main electrode corresponding to the low voltage side is lower than the potential of the main electrode corresponding to the high voltage side. In the initial state, the element is non-conductive, and the gate electrode potential VG1 is lower than the gate threshold, and the gate electrode potential VG2 is higher than the gate threshold. Here, VG1 is set to the gate threshold value or more, and after the delay time τ1, VG2 is set to the gate threshold value or less to conduct the element. Next, VG2 is set to the gate threshold value or more, and after the delay time τ2, VG1 is set to the gate threshold value or less to put the element in the blocking state. In addition, when the potential of the main electrode corresponding to the low voltage side is higher than the potential of the main electrode corresponding to the high voltage side, the operation is performed in the same way by blocking the VG1 and VG2 of the gate electrode. The control which switches is performed.

Other than Patent Document 1, a general power conversion circuit (for example, an inverter device) combining a unidirectional switch and a diode is conceivable.

In such a conventional gate driving method in the element configuration, it is necessary to reverse the logic when a forward and reverse voltage is applied to the main electrode in the device. Therefore, in the power conversion circuit to which the element configuration and the gate driving method are applied, there is a problem in that overcurrent and overvoltage occur in each part in the transition period.

Also, when a load having an inductance component (for example, a motor) is connected to the output side of the power conversion circuit, it is difficult to form a closed loop for flowing a reflux current. For example, when the bidirectional switch is disposed on the upper and lower arms, a typical example of the unintended closed loop of the current described above is a configuration of an arm short circuit. However, in this case, it is necessary to provide a dead time for preventing a short circuit current due to an arm short circuit. Therefore, it is necessary to have a period in which the upper and lower bidirectional switches are simultaneously turned off.

Further, in general power conversion circuits (for example, inverter devices) other than Patent Document 1, a unidirectional switch is combined. Therefore, it can be realized by a simple gate driving method. However, when a load having an inductance component such as a motor is connected, the return current flows through the diode and returns, so that the loss in the conversion circuit increases. Therefore, there has been a problem that a device such as a cooling fin or a cooling fan is increased in size.

Japanese Patent No. 3183555

The present invention provides a gate drive method for a bidirectional switch with low loss while preventing unintentional overcurrent and overvoltage from occurring during control.

The gate switch driving method of the bidirectional switch according to the present invention is applied to a bidirectional switch having the following configuration. A semiconductor layer stack having a channel formed on a substrate, and a first ohmic electrode and a second ohmic electrode formed on the semiconductor layer stack at a distance from each other are provided. Furthermore, it has the 1st gate electrode and the 2nd gate electrode which were formed in order from the 1st ohmic electrode side between the 1st ohmic electrode and the said 2nd ohmic electrode. Further, a first p-type semiconductor layer formed between the semiconductor layer stack and the first gate electrode, and a second p-type formed between the semiconductor layer stack and the second gate electrode. A semiconductor. Furthermore, a gate drive signal is input between the first gate terminal that inputs a gate drive signal between the first ohmic electrode and the first gate electrode, and between the second ohmic electrode and the second gate electrode. And a second gate terminal. Furthermore, a drain terminal connected to the first ohmic electrode and a source terminal connected to the second ohmic electrode are provided. Further, when only the first gate terminal is turned on, the first mode operates as a semiconductor in which a bidirectional device and a reverse diode connected in series are connected in series from the drain terminal to the source terminal. Further, when only the second gate terminal is turned on, a forward diode and an on-state bidirectional device operate as a semiconductor connected in series from the drain terminal to the source terminal. Further, when the first gate terminal and the second gate terminal are turned on, there is a third mode that operates so as to conduct bidirectionally between the drain terminal and the source terminal. In addition, there is a fourth mode in which current is cut off in both forward and reverse directions when the first gate terminal and the second gate terminal are turned off. The present invention provides a gate drive method for a bidirectional switch having such a configuration, wherein the first mode or the third mode or the third mode is shifted to at least one of the fourth mode and the third mode. Control is performed so as to interpose at least one of the second modes.

With this method, the on / off time variation between the chips due to the signal circuit or the feedback capacitor to the bidirectional switch having four operation modes, and the response of the mutual gate drive circuits for driving the first gate terminal and the second gate terminal. Due to variation in characteristics, when the mode is shifted from the third mode to the fourth mode or from the fourth mode to the third mode, an unintended current flow mode (for example, either the second mode or the third mode) is passed. Thus, even if there is a delay in signal conveyance, control can be performed so as to pass through one of the intended modes.

FIG. 1 is a configuration diagram of a bidirectional switch according to Embodiment 1 of the present invention. FIG. 2A is a first equivalent circuit diagram of the bidirectional switch. FIG. 2B is a second equivalent circuit diagram of the bidirectional switch. FIG. 2C is a third equivalent circuit diagram of the bidirectional switch. FIG. 3A is a first voltage / current correlation diagram of the bidirectional switch. FIG. 3B is a second voltage / current correlation diagram of the bidirectional switch. FIG. 3C is a third voltage-current correlation diagram of the bidirectional switch. FIG. 4 is a diagram showing an operation mode of the bidirectional switch. FIG. 5 is an explanatory diagram of control means for performing gate drive of the bidirectional switch. FIG. 6 is a diagram showing an on / off table of the bidirectional switch. FIG. 7 is a configuration diagram of an inverter device using the bidirectional switch. FIG. 8 is a diagram showing a signal delay generation circuit of the inverter device. FIG. 9A is a first mode transition diagram of the bidirectional switch according to Embodiment 2 of the present invention. FIG. 9B is a second mode transition diagram of the bidirectional switch. FIG. 10 is a mode transition diagram of the bidirectional switch according to Embodiment 3 of the present invention. FIG. 11 is a mode transition diagram of the bidirectional switch according to Embodiment 4 of the present invention. FIG. 12 is an explanatory diagram of a conventional method for driving a bidirectional switch.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. The present invention is not limited to this.

(Embodiment 1)
FIG. 1 is a configuration diagram of a bidirectional switch according to Embodiment 1 of the present invention. In FIG. 1, the bidirectional switch 1 of the present embodiment includes a first gate terminal 2, a second gate terminal 3, a drain terminal 4, and a source terminal 5. The bidirectional switch 1 has a thickness of 1 μm in which aluminum nitride (AlN) having a thickness of 10 nm and gallium nitride (GaN) having a thickness of 10 nm are alternately stacked on a substrate 6 made of silicon (Si). The buffer layer 7 is formed. A semiconductor layer stack 8 is formed on the buffer layer 7. In the semiconductor layer stacked body 8, a first semiconductor layer and a second semiconductor layer having a band gap larger than that of the first semiconductor layer are sequentially stacked from the substrate side. The first semiconductor layer is an undoped gallium nitride (GaN) layer 9 having a thickness of 2 μm, and the second semiconductor layer is an n-type aluminum gallium nitride (AlGaN) layer 10 having a thickness of 20 nm. In the vicinity of the heterointerface between the GaN layer 9 and the AlGaN layer 10, charges are generated due to spontaneous polarization and piezoelectric polarization. As a result, a channel region which is a two-dimensional electron gas (2DEG) layer having a sheet carrier concentration of 1 × 10 13 cm ⁻² or more and a mobility of 1000 cm ² V / sec or more is generated.

On the semiconductor layer stack 8, a first ohmic electrode 11A and a second ohmic electrode 11B are formed at a distance from each other. In the first ohmic electrode 11A and the second ohmic electrode 11B, titanium (Ti) and aluminum (Al) are laminated. The first ohmic electrode 11A and the second ohmic electrode 11B form an ohmic junction with the channel region, respectively. In addition, in order to reduce the contact resistance, a part of the AlGaN layer 10 is removed and the GaN layer 9 is dug down by about 40 nm, and the first ohmic electrode 11A and the second ohmic electrode 11B are connected to the AlGaN layer 10, the GaN layer 9, and the like. It is formed so as to be in contact with the interface. Note that the first ohmic electrode 11 </ b> A and the second ohmic electrode 11 </ b> B may be formed on the AlGaN layer 10.

In the region between the first ohmic electrode 11A and the second ohmic electrode 11B on the n-type AlGaN layer 10, the first p-type semiconductor layer 12A and the second p-type semiconductor layer 12B are spaced from each other. And selectively formed. A first gate electrode 13A is formed on the first p-type semiconductor layer 12A, and a second gate electrode 13B is formed on the second p-type semiconductor layer 12B. The first gate electrode 13A and the second gate electrode 13B are formed by stacking palladium (Pd) and gold (Au), respectively. The first gate electrode 13A and the second gate electrode 13B are in ohmic contact with the first p-type semiconductor layer 12A and the second p-type semiconductor layer 12B, respectively.

A protective film 14 made of silicon nitride (SiN) is formed so as to cover the AlGaN layer 10, the first p-type semiconductor layer 12A, and the second p-type semiconductor layer 12B. By forming the protective film 14, it is possible to ensure a defect that causes so-called current collapse and to improve current collapse.

The first p-type semiconductor layer 12A and the second p-type semiconductor layer 12B each have a thickness of 300 nm and are made of p-type GaN doped with magnesium (Mg). The first p-type semiconductor layer 12A, the second p-type semiconductor layer 12B, and the AlGaN layer 10 form PN junctions. As a result, when the voltage between the first ohmic electrode 11A and the first gate electrode 13A is 0 V, for example, the depletion layer spreads from the first p-type GaN layer into the channel region, so that the current flowing through the channel is cut off. can do. Similarly, when the voltage between the second ohmic electrode 11B and the second gate electrode 13B is, for example, 0 V or less, a depletion layer spreads from the second p-type GaN layer into the channel region, so that the current flowing through the channel Can be cut off. The bidirectional switch 1 realizes a so-called normally-off semiconductor element.

The potential of the first ohmic electrode 11A is V1, the potential of the first gate electrode 13A is V2, the potential of the second gate electrode 13B is V3, and the potential of the second ohmic electrode 11B is V4. In this case, if V2 is higher than V1 by 1.5V or more, the depletion layer extending from the first p-type semiconductor layer 12A into the channel region is reduced, so that a current can flow in the channel region. Similarly, if V3 is higher than V4 by 1.5V or more, the depletion layer extending from the second p-type semiconductor layer 12B into the channel region is reduced, and current can flow through the channel region. That is, the so-called threshold voltage of the first gate electrode 13A and the so-called threshold voltage of the second gate electrode 13B are both 1.5V.

In the following, the threshold voltage of the first gate electrode 13A at which the depletion layer extending in the channel region below the first gate electrode 13A is reduced and current can flow through the channel region is set to the first threshold voltage. The threshold voltage is used. The depletion layer extending in the channel region below the second gate electrode 13B is reduced, and the threshold voltage of the second gate electrode 13B that allows current to flow through the channel region is reduced to the second threshold voltage. And The distance between the first p-type semiconductor layer 12A and the second p-type semiconductor layer 12B can withstand the maximum voltage applied to the first ohmic electrode 11A and the second ohmic electrode 11B. Constitute.

A gate drive signal (that is, a control signal to the first gate terminal 2) is input between the first ohmic electrode 11A and the first gate electrode 13A. Similarly, a gate drive signal (that is, a control signal to the second gate terminal 3) is input between the second ohmic electrode 11B and the second gate electrode 13B. The source terminal 5 is connected to the first ohmic electrode 11A, the drain terminal 4 is connected to the second ohmic electrode 11B, the first gate terminal 2 is connected to the first gate electrode 13A, and the second gate terminal. 3 is connected to the second gate electrode 13B. The drain terminal 4 and the source terminal 5 are connected to the power supply line.

Next, the operation of the bidirectional switch 1 of the present embodiment will be described. For the sake of explanation, the potential of the first ohmic electrode 11A is 0 V, the voltage applied to the first gate terminal 2 is Vg1, and the voltage applied to the second gate terminal 3 is Vg2. Further, the voltage between the second ohmic electrode 11B and the first ohmic electrode 11A is Vs2s1, and the current flowing between the second ohmic electrode 11B and the first ohmic electrode 11A is Is2s1.

When V4 is higher than V1, for example, when V4 is + 100V and V1 is 0V, the input voltages Vg1 and Vg2 of the first gate terminal 2 and the second gate terminal 3 are set to the first threshold voltage and the first threshold voltage, respectively. The voltage is equal to or lower than the threshold voltage of 2, for example, 0V. As a result, the depletion layer extending from the first p-type semiconductor layer 12A extends in the channel region toward the second p-type GaN layer, so that the current flowing through the channel can be blocked. Therefore, even when V4 is a positive high voltage, it is possible to realize a cut-off state in which a current flowing from the second ohmic electrode 11B to the first ohmic electrode 11A is cut off. On the other hand, when V4 is lower than V1, for example, even when V4 is −100 V and V1 is 0 V, the depletion layer extending from the second p-type semiconductor layer 12B is formed in the channel region in the first p-type semiconductor layer. The current spreads in the direction of 12A and can flow through the channel. For this reason, even when a negative high voltage is applied to the second ohmic electrode 11B, the current flowing from the first ohmic electrode 11A to the second ohmic electrode 11B can be blocked. That is, the bidirectional current of the bidirectional switch 1 can be cut off.

In the structure and operation as described above, the first gate electrode 13A and the second gate electrode 13B share a channel region for ensuring a withstand voltage. Therefore, this element can realize the bidirectional switch 1 with the area of the channel region for one element. Considering the bidirectional switch 1 as a whole, the chip area is smaller than when using a heterojunction field effect transistor (AlGaN / GaN-HFET) composed of two diodes and two normally-off AlGaN / GaN. can do. Therefore, the bidirectional switch 1 can be reduced in cost and size.

Next, when Vg1 and Vg2 which are input voltages of the first gate terminal 2 and the second gate terminal 3 are voltages higher than the first threshold voltage and the second threshold voltage, respectively, for example, 5V, the first voltage Both of the voltages applied to the gate electrode 13A and the second gate electrode 13B are higher than the threshold voltage. Accordingly, since the depletion layer does not extend from the first p-type semiconductor layer 12A and the second p-type semiconductor layer 12B to the channel region, the channel region is also formed below the first gate electrode 13A. It is not pinched off on the lower side of 13B. As a result, it is possible to realize a conductive state in which a current flows bidirectionally between the first ohmic electrode 11A and the second ohmic electrode 11B.

Next, the operation when Vg1 is higher than the first threshold voltage and Vg2 is equal to or lower than the second threshold voltage will be described. When the bidirectional switch 1 having the first gate terminal 2 and the second gate terminal 3 is represented by an equivalent circuit, a circuit in which a first transistor 15 and a second transistor 16 are connected in series as shown in FIG. 2A. Can be considered. In this case, the source (S) of the first transistor 15 corresponds to the first ohmic electrode 11A, the gate (G) of the first transistor 15 corresponds to the first gate electrode 13A, and the source ( S) corresponds to the second ohmic electrode 11B, and the gate (G) of the second transistor 16 corresponds to the second gate electrode 13B. In such a circuit, for example, when Vg1 is 5V and Vg2 is 0V, the fact that Vg2 is 0V is equivalent to the state where the gate and the source of the second transistor 16 are short-circuited. Can be regarded as a circuit as shown in FIG. 2B.

Further, description will be made assuming that the source (S) of the second transistor 16 shown in FIG. 2B is the A terminal, the drain (D) is the B terminal, and the gate (G) is the C terminal. When the potential of the B terminal shown in the drawing is higher than the potential of the A terminal, the transistor can be regarded as a transistor in which the A terminal is a source and the B terminal is a drain. In such a case, the voltage between the C terminal (gate) and the A terminal (source) is 0 V, which is equal to or lower than the threshold voltage, so that no current flows from the B terminal (drain) to the A terminal (source). On the other hand, when the potential of the A terminal is higher than the potential of the B terminal, the transistor can be regarded as a transistor in which the B terminal is a source and the A terminal is a drain. In such a case, since the potentials of the C terminal (gate) and the A terminal (drain) are the same, when the potential of the A terminal is equal to or lower than the threshold voltage with respect to the B terminal, the A terminal (drain) to the B terminal Do not supply current to the (source). When the potential of the A terminal becomes equal to or higher than the threshold voltage with reference to the B terminal, a voltage higher than the threshold voltage is applied to the gate with reference to the B terminal (source), and current flows from the A terminal (drain) to the B terminal (source). be able to. That is, when the gate and the source of the transistor are short-circuited, the drain functions as a diode and the source functions as an anode, and the forward rising voltage becomes the threshold voltage of the transistor. Therefore, the portion of the second transistor 16 shown in FIG. 2A can be regarded as a diode, and an equivalent circuit as shown in FIG. 2C is obtained.

In the equivalent circuit shown in FIG. 2C, when the potential of the drain terminal 4 of the bidirectional switch 1 is higher than the potential of the source terminal 5, or when 5 V is applied to the first gate terminal 2 of the first transistor 15. The first transistor 15 is in an on state, and a current can flow from S2 to S1. However, an on-voltage is generated due to the forward rising voltage of the diode. Further, when the potential of S1 of the bidirectional switch 1 is higher than the potential of S2, the voltage is carried by the diode composed of the second transistor 16, and the current flowing from S1 to S2 of the bidirectional switch 1 is blocked. That is, by applying a voltage equal to or higher than the threshold voltage to the first gate terminal 2 and applying a voltage equal to or lower than the threshold voltage to the second gate terminal 3, the so-called bidirectional device is turned on, and the cathode side of the diode is connected to the drain side. A switch that can be connected in series can be realized.

FIGS. 3A to 3C are first to third voltage / current correlation diagrams of the bidirectional switch of the present embodiment, and show the relationship between Vs2s1 and Is2s1 of the bidirectional switch 1. FIG. That is, FIG. 3A shows a case where Vg1 and Vg2 are changed simultaneously. FIG. 3B shows a case where Vg2 is set to 0 V that is equal to or lower than the second threshold voltage, and Vg1 is changed. FIG. 3C shows a case where Vg2 is changed by setting Vg1 to 0 V that is equal to or lower than the first threshold voltage. 3A to 3C, the voltage between S2 and S1 (Vs2s1) on the horizontal axis is a voltage with reference to the first ohmic electrode 11A. In addition, the current between S2 and S1 (Is2s1) on the vertical axis is positive for the current flowing from the second ohmic electrode 11B to the first ohmic electrode 11A.

As shown in FIG. 3A, when Vg1 and Vg2 are 0 V and 1 V, Is2s1 does not flow regardless of whether Vs2s1 is positive or negative, and the bidirectional switch 1 is cut off. Further, when both Vg1 and Vg2 become higher than the threshold voltage, a conductive state in which Is2s1 flows bidirectionally according to Vs2s1 is established.

On the other hand, as shown in FIG. 3B, when Vg2 is set to 0 V that is equal to or lower than the second threshold voltage and Vg1 is set to 0 V that is equal to or lower than the first threshold voltage, Is2s1 is blocked in both directions. However, when Vg1 is 2V to 5V, which is equal to or higher than the first threshold voltage, Is2s1 does not flow when Vs2s1 is less than 1.5V, but Is2s1 flows when Vs2s1 becomes 1.5V or more. That is, a reverse blocking state is reached in which current flows only from the second ohmic electrode 11B to the first ohmic electrode 11A, and no current flows from the first ohmic electrode 11A to the second ohmic electrode 11B.

As shown in FIG. 3C, when Vg1 is set to 0 V and Vg2 is changed, current flows only from the first ohmic electrode 11A to the second ohmic electrode 11B, and from the second ohmic electrode 11B. The first ohmic electrode 11A is in a reverse blocking state where no current flows.

As described above, the bidirectional switch 1 has a function of interrupting and energizing the bidirectional current according to the gate bias condition, and can also operate as a diode, and the direction in which the current of the diode is energized can be switched. As described above, 4 shown in FIG. 4 according to the ON (denoted as ON) or OFF (denoted as OFF in the figure) conditions of the first gate terminal 2 and the second gate terminal 3 of the bidirectional switch 1. It can operate in one mode of operation. That is, when only the first gate terminal (G1) 2 is turned on, the first mode in which the bidirectional device that is turned on from the drain terminal 4 to the source terminal 5 and the semiconductor in which the reverse diode is connected in series is operated. can get. When only the second gate terminal (G2) 3 is turned on, a second mode in which a forward diode and an on-state bidirectional device operate as a semiconductor connected in series from the drain terminal 4 to the source terminal 5 is obtained. When the first gate terminal (G1) 2 and the second gate terminal (G2) 3 are turned on, a third mode is obtained that operates so as to conduct in a bidirectional manner between the drain terminal 4 and the source terminal 5 without using a diode. When the first gate terminal (G1) 2 and the second gate terminal (G2) 3 are turned off, a fourth mode in which current is interrupted in both forward and reverse directions is obtained.

The structure of the present embodiment is similar to a junction field effect transistor (JFET), but is completely different from a JFET that performs carrier modulation in a channel region by a gate electric field in that carrier injection is intentionally performed. Operates according to the operating principle. Specifically, it operates as a JFET up to a gate voltage of 3V. However, when a gate voltage of 3 V or more exceeding the built-in potential of the pn junction is applied, holes are injected into the gate, the current increases due to the mechanism described above, and a large current and low on-resistance operation is possible. Become.

In the bidirectional switch 1 of the present embodiment, the first gate electrode 13A is formed on the first p-type semiconductor layer 12A having p-type conductivity, and the second gate electrode 13B is p-type. It is formed on the second p-type semiconductor layer 12B having the above conductivity. For this reason, the first gate electrode 13A and the second gate electrode are formed with respect to the channel region generated in the interface region between the first semiconductor layer (GaN layer 9) and the second semiconductor layer (AlGaN layer 10). By applying a forward bias from 13B, holes can be injected into the channel region. In a nitride semiconductor, the mobility of holes is much lower than the mobility of electrons, so that holes injected into the channel region hardly contribute as carriers for passing current. For this reason, holes injected from the first gate electrode 13A and the second gate electrode 13B generate the same amount of electrons in the channel region, so that the effect of generating electrons in the channel region is increased, and the donor is increased. It functions like an ion. That is, since the carrier concentration can be modulated in the channel region, it is possible to realize a normally-off type nitride semiconductor layer bidirectional switch having a large operating current.

Next, the control unit 17 that performs gate driving of the bidirectional switch 1 of the present embodiment will be described with reference to FIG. FIG. 5 is an explanatory diagram of the control unit 17 that performs gate driving of the bidirectional switch 1.

As shown in FIG. 5, the control part 17 is arrange | positioned at the 1st gate terminal 2 and the 2nd gate terminal 3 via the gate drive circuits 19A and 19B, respectively. The internal configuration of the control unit 17 is created in correspondence with the four operation modes shown in FIG. 4 so as not to directly shift between the fourth mode in the bidirectional off state and the third mode in the bidirectional on state. It is configured to output with reference to the on / off table shown in FIG.

Hereinafter, the inverter device 18 as a power conversion device when output with reference to this on / off table will be described with reference to FIG. FIG. 7 is a configuration diagram of an inverter device using the bidirectional switch 1. In FIG. 7, the power conversion device of the present embodiment includes a power source 23 as an input unit and an inverter device 18 as a power conversion unit. In FIG. 7, the bidirectional circuit 1a to 1f constitutes the main circuit. That is, the bidirectional switches 1a, 1c, and 1e constitute the upper arm of the inverter circuit, and the bidirectional switches 1b, 1d, and 1f constitute the lower arm of the inverter circuit. The bidirectional switches 1a to 1f output a drive signal referring to the on / off table from the control unit 17 to the first gate terminals 2a to 2f and the second gate terminals 3a to 3f, respectively. Transition between two modes. That is, when the upper arm bidirectional switches 1a, 1c, and 1e shift from the fourth mode to the third mode, the third mode is changed from the bidirectionally blocked state of the fourth mode of the on / off table of FIG. When shifting to the energized state in both directions, or the reverse operation, that is, when moving from the energized state in both directions in the third mode to the disconnected state in both directions in the fourth mode For example, if the intended current flow direction is from the drain terminal 4 to the source terminal 5, the second mode is interposed. In the second mode, a diode is formed in the forward direction with respect to the intended conduction direction, and the bidirectional switch 1 forms a conduction path having a diode that is turned on only in the forward direction. .

In addition, when the bidirectional switches 1b, 1d, and 1f of the lower arm shift to the cut-off state, the first gate terminals 2b, 2d, and 2f, and the second gate terminals 3b and 3d of the bidirectional switches 1b, 1d, and 1f, respectively. The state in which current can be supplied in the intended direction is maintained until the moment when both terminals 3f are turned off.

First, when the control unit 17 shifts from the fourth mode in which current is interrupted in both directions to the third mode in which current is supplied in both directions, the control unit 17 changes from the state in which the table is in the fourth mode to the third mode. A mode in which a reverse diode is formed with respect to the intended conduction direction (for example, if the intended current flow direction is the direction from the drain terminal 4 to the source terminal 5) Control is performed to shift to the third mode with the first mode) interposed.

On the contrary, when shifting from the third mode in which current is passed in both directions to the fourth mode in which current is cut off in both directions, the mode is similarly shifted from the third mode to the fourth mode via the first mode. To control. However, in this control, for example, when an inductive load is connected to the load side of the inverter device 18 as shown in FIG. 7, the mode of the bidirectional switch 1a of the first arm 18a is changed. A mode change of the bidirectional switch 1b is performed, and a reflux current can be supplied from the negative side of the direct current portion. Furthermore, the bidirectional switch 1a and the bidirectional switch 1b are controlled to perform mode transition with reference to the second mode so that the upper and lower arms are not short-circuited. In this case, the bidirectional switch 1b operates with a diode interposed therebetween, and the bidirectional switch 1a does not generate an energizing operation with a diode interposed.

As described above, the bidirectional switch 1 of the present embodiment includes the first gate terminal 2, the second gate terminal 3, the drain terminal 4, and the source terminal 5. When only the first gate terminal 2 is turned on, it operates as a semiconductor in which the on-state of the bidirectional device and the cathode side of the reverse diode are connected in series between the drain terminal 4 and the source terminal 5. When only the second gate terminal 3 is turned on, it operates as a semiconductor in which the forward diode and the cathode side of the forward diode are connected in series between the drain terminal 4 and the source terminal 5. When the first gate terminal 2 and the second gate terminal 3 are turned on, they operate so as to conduct in a bidirectional manner between the drain terminal 4 and the source terminal 5 without using a diode. When the first gate terminal 2 and the second gate terminal 3 are turned off, the operation is performed to cut off the current in both forward and reverse directions. In the gate drive of the bidirectional switch 1 having such characteristics, a current is passed in the intended direction so as not to make a direct transition from the bidirectional OFF state to the bidirectional ON state or the reverse transition. It is possible to turn on only one of the forward and reverse directions.

In general, a bidirectional switch having four operation modes has a variation in on-off time between chips due to a signal circuit or feedback capacitance to the bidirectional switch, and mutual mutual driving for driving the first gate terminal 2 and the second gate terminal 3. There is a variation in response of the gate drive circuit. Due to such variations, an unintended current flow mode (for example, the second mode (in which the intended current flow direction is the source) is set when the mode is shifted from the third mode to the fourth mode or from the fourth mode to the third mode. In the case of the terminal 5 to the drain terminal 4, there are cases where either the first mode) or the third mode) is passed. However, since the bidirectional switch 1 of the present embodiment has the above-described characteristics, it is possible to avoid going through an unintended current flow mode. Therefore, even if there is a delay in signal conveyance, the intended other mode (for example, when the intended current flow direction is from the source terminal 5 to the drain terminal 4, the second mode is changed to the “intended other mode”. It is possible to control the gate drive of the bidirectional switch 1 so as to go through.

Further, in the example of the inverter device 18, the bidirectional switch 1 b passes through the first mode in which a forward diode is formed with respect to the intended conduction direction at the time of the state transition from the fourth mode to the third mode. Is controlling. Therefore, when transitioning from the bi-directional off state to the bi-directional on state, it is possible to control so that the current between the drain terminal 4 and the source terminal 5 becomes the intended flow direction. That is, even when an inductive load such as a motor is connected to the output side as in the present embodiment, power conversion can be performed with a simple circuit configuration without requiring a clamp circuit or the like. Note that the number and arrangement of the bidirectional switches 1 may be changed according to the modulation method of the inverter device 18.

The on / off table is a logic circuit 20 as a delay generation unit as shown in FIG. 8 for any one of the output terminals of the control unit 17 (for example, to realize a signal propagation time of 1 ns or more). This can also be realized by adding a logic IC having a signal propagation time of 10 ns. For example, the logic circuit 20 can generate a delay time by controlling switching of the first gate terminal 2 and the second gate terminal 3 from OFF to ON, or from ON to OFF at different timings. Further, the delay time can be generated using the response speed of the logic circuit. The delay time generated by the delay generator is 1 ns or greater than 1 ns. As a result, both of the four operation modes are provided due to variations in the on / off time between chips due to semiconductor input / output or feedback capacitance, and variations in the responsiveness of the gate drive circuits that drive the first gate terminal and the second gate terminal. It is possible to prevent the operation mode transition of the direction switch from going through an unintended operation mode.

As described above, the delay generation unit such as the logic circuit 20 does not directly shift from the fourth mode to the third mode or from the third mode to the fourth mode, but is driven by a signal delayed by the delay time of the logic circuit 20. It is good also as composition to do.

Further, the drive signal for the first gate terminal 2 and the drive signal for the second gate terminal 3 are shared, and the first gate terminal 2 and the second gate terminal 3 are controlled to be turned on and off with the only gate drive signal via the control unit 17. It is good also as a structure like FIG. In FIG. 8, the drive signal directly supplied from the control unit 17 to one gate drive circuit 19C is supplied via the logic circuit 20 to the other gate drive circuit 19D. The logic circuit 20 forcibly and temporarily fixes the mode.

Thereby, it is not necessary to output two signals per one element from the microprocessor as gate driving signals, and simplification can be achieved and a more inexpensive configuration can be achieved.

As described above, according to the configuration shown in FIG. 8, without using the first mode and the second mode of FIG. 4, the timing for driving the first gate terminal 2 and the second gate terminal 3 is simply shifted. Directly, the transition between the third mode and the fourth mode can be prevented.

(Embodiment 2)
Hereinafter, a gate driving method of the bidirectional switch 1 according to the second embodiment of the present invention will be described with reference to FIGS. 9A and 9B. 9A and 9B are first and second mode transition diagrams of the bidirectional switch according to the present embodiment. In addition, what has the same function as Embodiment 1 attaches | subjects the same code | symbol, and abbreviate | omits detailed description.

As shown in FIG. 9A, when the control unit 17 shifts from the fourth mode in which the bidirectional switch 1a is bi-directionally interrupted to the third mode in which current is bi-directionally passed, In the case of this form, control is performed so as to shift to the third mode by interposing a mode in which a reverse diode is formed (in the direction in which current is passed from the drain terminal 4 to the source terminal 5). In the case of the bidirectional switch 1a, the on / off table at this time is shifted from the fourth mode shown in FIG. 6 to the third mode via the first mode, and is opposite to the intended conduction direction. This corresponds to controlling to shift to the third mode with a mode in which a diode is formed in the direction.

On the contrary, when the bidirectional switch 1a shifts from the third mode in which current is supplied bidirectionally to the fourth mode in which current is bidirectionally interrupted, as shown in FIG. Then, control is performed so as to shift to the third mode through a mode in which a reverse diode is formed. In the case of the bidirectional switch 1a, the on / off at this time is shifted from the third mode shown in FIG. 6 to the fourth mode via the first mode, and the intended conduction direction (in this embodiment) Corresponding to the control to shift to the fourth mode by interposing a mode in which a diode is formed in the opposite direction with respect to the direction in which current flows from the drain end element 4 to the source terminal 5). Yes. However, in this control, for example, when the inductive load is connected to the load side of the inverter device 18 and the bidirectional switch 1a of the first arm 18a is shifted to the mode, the mode shift of the bidirectional switch 1b of the first arm 18a is performed. Thus, a reflux current can be supplied from the negative side of the DC part. Further, in order to prevent the bidirectional switch 1a and the bidirectional switch 1b from causing a short circuit between the upper and lower arms, the second gate terminal 3b is kept off at the time T1, and both the bidirectional switch 1b at the time T2. After the second gate terminal 3a of the direction switch 1a shifts to the off state, control is performed to shift the mode to the on state at time T3. In this case, the bidirectional switch 1b operates with a diode, and the bidirectional switch 1a does not generate an energizing operation with a diode.

As described above, in FIG. 9A of the second embodiment, when the intended flow direction is from the drain terminal 4 to the source terminal 5, the bidirectional switch 1a is switched from the fourth mode to the third mode via the first mode. And migrate. Thereafter, the mode is shifted to the fourth mode via the first mode. The bidirectional switch 1b shifts from the third mode to the fourth mode via the first mode. Thereafter, the mode is shifted to the third mode via the first mode.

As described above, the control unit 17 shifts from the fourth mode in which current is cut off in both directions to the third mode in which current is supplied in both directions, or from the third mode in which current is supplied in both directions. When shifting to the fourth mode in which the current is interrupted, control is performed so as to shift to the third mode by interposing a mode in which a reverse diode is formed with respect to the intended conduction direction. As a result, even when the bidirectional switch 1b passes through the first or second mode, no conduction current is generated at that time, and loss due to the forward voltage of the diode can be prevented.

(Embodiment 3)
Hereinafter, the gate driving method of the bidirectional switch 1 will be described with reference to FIG. 10 for the third embodiment of the present invention. FIG. 10 is a mode transition diagram of the bidirectional switch in the present embodiment. In addition, what has the same function as Embodiment 1, 2 attaches | subjects the same code | symbol, and abbreviate | omits detailed description.

As shown in FIG. 10, in the inverter device 18 as the power conversion device of the present invention, the control unit 17 sets the bidirectional switch 1 a in the intended conduction direction when the state transition from the third mode to the fourth mode occurs. On the other hand, control is performed so as to pass through the first mode in which a reverse diode is formed. This reduces the loss due to the forward current of the forward diode. In addition, the first gate terminal passes through the first mode in which the forward diode is formed with respect to the intended conduction direction (the direction of the return current) during the state transition from the fourth mode to the third mode. 2a and the second gate terminal 3a are controlled. That is, the bidirectional switch 1a and the bidirectional switch 1b transition from the state in which the bidirectional switch 1b is conducted by the combination (1) to the state in which the bidirectional switch 1a is conducted by the combination (2). Is controlled to flow to the bidirectional switch 1a. In the bidirectional switch 1a of the combination (2), a forward diode is formed with respect to the intended conduction direction (the direction of the return current), so that conduction is possible. Here, the solid line arrow portion in FIG. 10 indicates the current direction at the time of steady state, the dotted line arrow indicates the current direction at the time of transition, and the cross symbol attached to the arrow means that the diode does not conduct. .

On the other hand, the bidirectional switch 1b performs control so as to secure a current route at the timing when the bidirectional switch 1a enters the current cutoff state with respect to the intended current direction. That is, the bidirectional switch 1a is controlled so as to cause the return current to flow through the bidirectional switch 1b via the first mode at the time of the state transition from the third mode to the fourth mode. For example, in FIG. 10, when switching from the combination (3) to the combination (1) via the combination (4), the first gate terminal 2b is turned on in the combination (4) so that both the return currents are supplied. It is made to flow to the direction switch 1b. Similarly, the bidirectional switch 1b is controlled so as to secure a current route for the state transition of the bidirectional switch 1b. That is, when the bidirectional switch 1b makes a state transition from the third mode to the fourth mode, control is performed so that a reflux current flows through the bidirectional switch 1b via the second mode. In this case, the transition is made from the combination (1) to the combination (3) via the combination (2), and in the combination (2), the first gate terminal 2a is turned on so that the return current is bidirectional. It is made to flow through the switch 1a.

As described above, the bidirectional switch 1b and the bidirectional switch 1a are combined (2) and (4) when the bidirectional switches 1a and 1b transition from the conduction state (third mode) to the cutoff state (fourth mode). ), The current flows through the diode one by one. Since the bidirectional switch 1a and the bidirectional switch 1b go through the timing of passing the diode once as shown by the arrows in the figure, the losses are averaged with each other.

Thus, in the present embodiment, when the intended flow direction is from the drain terminal 4 to the source terminal 5, the bidirectional switch 1a is switched from the fourth mode to the first mode through the first mode and the third mode. Transition to mode. Thereafter, the mode shifts to the fourth mode again. The bidirectional switch 1b shifts from the third mode to the first mode via the first mode and the fourth mode. After that, the mode again shifts to the third mode.

As described above, according to the present embodiment, it is possible to equalize the time ratio for forming the current route with respect to the bidirectional switches 1a and 1b via the diodes. That is, the loss of the bidirectional switches 1a and 1b when the bridge circuit is formed can be averaged. Therefore, it is not necessary to perform a heat radiation design that matches the lossy bidirectional switch 1a or 1b, and a small and lightweight power conversion device can be configured.

(Embodiment 4)
Hereinafter, a gate driving method of the bidirectional switch 1 according to the fourth embodiment of the present invention will be described with reference to FIG. FIG. 11 is a mode transition diagram of the bidirectional switch in the present embodiment. Components having the same functions as those in the first to third embodiments are denoted by the same reference numerals and detailed description thereof is omitted.

As shown in FIG. 11, the control unit 17 forms a forward diode with respect to the intended conduction direction when the bidirectional switch 1a in the inverter device 18 undergoes a state transition from the third mode to the fourth mode. Control is performed so as to pass through the second mode (when the intended flow direction is from the drain terminal 4 to the source terminal 5). That is, control is performed by transitioning from the combination (7) to the combination (5) via the combination (8). Further, in the state transition from the fourth mode to the third mode, the first mode in which a reverse diode is formed with respect to the intended conduction direction (when the intended flow direction is from the drain to the source) is passed. So that it is controlled. That is, control is performed by making a transition from the combination (5) to the combination (7) via the combination (6). This reduces the loss due to the forward current of the forward diode and averages the losses of the bidirectional switches 1a and 1b when the bridge circuit is formed.

Specifically, the first gate terminals 2a and 2b and the second gate terminals 3a and 3b are sequentially turned on and off as in combination (5) to combination (8). In the bidirectional switch 1a of the combination (6), the current direction indicated by the broken line does not flow. However, in the transition period at the moment of transition of the combination, the bidirectional switch 1b does not flow but flows through the bidirectional switch 1a. However, the direction in which a cross mark is given to the broken line portion means that the path of the other bidirectional switch 1a or bidirectional switch 1b is given priority. Therefore, the bidirectional switch 1a and the bidirectional switch 1b generate a path that passes through the forward diode with respect to each other mainly once. In addition, control is performed so that the number of times is the same for the bidirectional on state and the bidirectional off state.

Thus, in this embodiment, when the intended flow direction is from the drain terminal 5 to the source terminal 4, the bidirectional switch 1a is switched from the fourth mode to the second mode via the first mode and the third mode. Enter mode. The bidirectional switch 1b shifts from the third mode to the first mode via the second mode and the fourth mode.

As described above, the time ratio for forming the current route through the diodes can be made uniform for the bidirectional switches 1a and 1b. That is, the loss of the bidirectional switches 1a and 1b when the bridge circuit is formed can be averaged. Therefore, it is not necessary to perform a heat radiation design that matches the lossy bidirectional switch 1a or 1b, and a small and lightweight power conversion device can be configured.

As described above, the bidirectional switch to which the present invention is applied includes the semiconductor layer stack having a channel formed on the substrate and the first switch formed on the semiconductor layer stack at a distance from each other. One ohmic electrode and a second ohmic electrode. Furthermore, it has the 1st gate electrode and the 2nd gate electrode which were formed in order from the 1st ohmic electrode side between the 1st ohmic electrode and the 2nd ohmic electrode. Further, a first p-type semiconductor layer formed between the semiconductor layer stack and the first gate electrode, and a second p-type formed between the semiconductor layer stack and the second gate electrode. A semiconductor. Furthermore, a gate drive signal is input between the first gate terminal that inputs a gate drive signal between the first ohmic electrode and the first gate electrode, and between the second ohmic electrode and the second gate electrode. And a second gate terminal. Furthermore, a drain terminal connected to the first ohmic electrode and a source terminal connected to the second ohmic electrode are provided. Further, when only the first gate terminal is turned on, the first mode operates as a semiconductor in which a bidirectional device and a reverse diode connected in series are connected in series from the drain terminal to the source terminal. Further, when only the second gate terminal is turned on, a forward diode and an on-state bidirectional device operate as a semiconductor connected in series from the drain terminal to the source terminal. Furthermore, when the first gate terminal and the second gate terminal are turned on, the semiconductor device has a third mode in which it operates as a semiconductor that conducts bidirectionally between the drain terminal and the source terminal. Further, when the first gate terminal and the second gate terminal are turned off, there is a fourth mode which operates as a semiconductor that cuts off current in both forward and reverse directions. The present invention provides a gate drive method for such a bidirectional switch, wherein the first mode or the second mode is used when shifting from the fourth mode to the third mode, or from the third mode to the fourth mode. It controls to interpose at least one of these.

In general, a bidirectional switch having such four operation modes has a variation in on / off time between chips due to a signal circuit or a feedback capacitor to the bidirectional switch, and a mutual operation for driving the first gate terminal and the second gate terminal. Variation in response of the gate drive circuit occurs. Due to these variations, an unintended current flow mode (for example, either the second mode or the third mode) is passed when the mode is shifted from the third mode to the fourth mode or from the fourth mode to the third mode. That happens.

However, according to the above-described driving method of the present invention, it is possible to avoid passing through an unintended current flow mode when shifting from the third mode to the fourth mode or from the fourth mode to the third mode. Therefore, even if there is a delay in signal conveyance, control can be performed so as to pass through one of the intended other modes.

Further, the present invention passes through the first mode or the second mode in which the forward diode is formed so as to conduct in the intended conduction direction in the state transition from the fourth mode to the third mode. To control.

This method makes it possible to control the current between the drain terminal and the source terminal to have the intended flow direction when transitioning from the bidirectional off state to the bidirectional on state. Therefore, even when an inductive load is connected to the output side, a power conversion can be performed with a simple circuit configuration without requiring a clamp circuit or the like.

Furthermore, the present invention passes through the first mode or the second mode in which the forward diode is formed to conduct in the intended conduction direction at the time of the state transition from the third mode to the fourth mode. To control.

This method makes it possible to control the current between the drain terminal and the source terminal to be in the intended flow direction when transitioning from the bidirectional on state to the bidirectional off state. Therefore, even when an inductive load is connected to the output side, power conversion can be performed with a simple circuit configuration without interrupting the current.

Further, the present invention passes through the first mode or the second mode in which the reverse diode is formed so as to cut off the intended conduction direction at the time of the state transition from the fourth mode to the third mode. To control.

This method can reduce the loss due to the forward current of the forward diode. Therefore, when switching from a bi-directional off state to a bi-directional on state, the entire circuit is configured to be low loss without interposing a mode through which a diode that exists equivalently in the first or second mode flows. can do. Therefore, power conversion can be performed with a smaller circuit configuration.

Further, according to the present invention, when the state transition from the third mode to the fourth mode is performed, the reverse diode is formed so as to be cut off with respect to the intended conduction direction. To control.

This method can reduce the loss due to the forward current of the forward diode. Therefore, when switching from the bi-directional on state to the bi-directional off state, the entire circuit is configured to have a low loss without interposing a mode for passing a diode that exists equivalently in the first or second mode. can do. Therefore, power conversion can be performed with a smaller circuit configuration.

In the present invention, the drive signal for the first gate terminal and the drive signal for the second gate terminal are shared, and the first gate terminal and the second gate terminal are controlled to be turned on / off by one gate drive signal.

With this method, it is not necessary to output two signals per one element from the microprocessor as gate driving signals, and simplification can be achieved and a more inexpensive configuration can be achieved.

In addition, the present invention includes a bridge circuit using a bidirectional switch, and a reverse diode is formed so as to cut off the intended conduction direction at the time of state transition from the third mode to the fourth mode. A forward diode is formed so as to be controlled to pass through the first mode or the second mode, and to conduct in the intended conduction direction during the state transition from the fourth mode to the third mode. Control is performed so as to pass through the mode or the second mode.

This method can reduce the loss due to the forward current of the forward diode, and can average the loss of the bidirectional switch. That is, when the bidirectional switches are connected in series or in parallel, the amount of generated heat is equalized. Therefore, there is no need to select a heat radiating plate based on a bidirectional switch that generates a large amount of heat, and a small and lightweight power conversion device can be configured.

The present invention also includes a bridge circuit using a bidirectional switch, and a forward diode is formed so as to conduct in the intended conduction direction at the time of transition from the third mode to the fourth mode. A reverse diode is formed so as to be controlled so as to pass through the first mode or the second mode, and cut off with respect to the intended conduction direction at the time of the state transition from the fourth mode to the third mode. Control is performed so as to pass through the mode or the second mode.

This method can reduce the loss due to the forward current of the forward diode and average the loss of the bidirectional switch. That is, when the bidirectional switches are connected in series or in parallel, the amount of generated heat is equalized. Therefore, there is no need to select a heat radiating plate based on a bidirectional switch that generates a large amount of heat, and a small and lightweight power conversion device can be configured.

Further, the present invention includes a delay generation unit, and switches the first gate terminal and the second gate terminal from off to on or from on to off at different timings.

By this method, since the signal is switched with a delay time, the bidirectional switch can be prevented from directly shifting from the third mode to the fourth mode or from the fourth mode to the third mode with a simpler configuration.

In the present invention, the delay time generated by the delay generation unit is 1 ns or longer than 1 ns. According to this method, there are four operation modes due to variations in on / off time between chips due to semiconductor input / output or feedback capacitance, and variations in responsiveness of mutual gate drive circuits for driving the first gate terminal and the second gate terminal. It is possible to prevent the operation mode transition of the bidirectional switch from passing through an unintended operation mode.

The delay generation unit generates a delay time using the response speed of the logic circuit. By this method, the generation of the delay time can be realized with a simple and inexpensive circuit.

A bidirectional switch to which the present invention is applied includes a semiconductor layer stack having a channel formed on a substrate, a first ohmic electrode formed on the semiconductor layer stack at a distance from each other, and And a second ohmic electrode. Furthermore, it has the 1st gate electrode and the 2nd gate electrode which were formed in order from the 1st ohmic electrode side between the 1st ohmic electrode and the 2nd ohmic electrode. Further, a first p-type semiconductor layer formed between the semiconductor layer stack and the first gate electrode, and a second p-type formed between the semiconductor layer stack and the second gate electrode. A semiconductor. Furthermore, a gate drive signal is input between the first gate terminal that inputs a gate drive signal between the first ohmic electrode and the first gate electrode, and between the second ohmic electrode and the second gate electrode. And a second gate terminal. Furthermore, a drain terminal connected to the first ohmic electrode and a source terminal connected to the second ohmic electrode are provided. Further, when only the first gate terminal is turned on, the first mode operates as a semiconductor in which a bidirectional device and a reverse diode connected in series are connected in series from the drain terminal to the source terminal. Further, when only the second gate terminal is turned on, a forward diode and an on-state bidirectional device operate as a semiconductor connected in series from the drain terminal to the source terminal. Furthermore, when the first gate terminal and the second gate terminal are turned on, the semiconductor device has a third mode in which it operates as a semiconductor that conducts bidirectionally between the drain terminal and the source terminal. Further, when the first gate terminal and the second gate terminal are turned off, there is a fourth mode which operates as a semiconductor that cuts off current in both forward and reverse directions. The present invention is a gate drive method for such a bidirectional switch, and controls so as not to directly shift from at least one of the fourth mode to the third mode or from the third mode to the fourth mode.

This method makes it possible to avoid unintended current flow mode when shifting from the third mode to the fourth mode or from the fourth mode to the third mode. Therefore, even if there is a delay in signal conveyance, control can be performed so as to pass through one of the intended other modes.

Furthermore, the present invention constitutes a power conversion device (for example, an inverter device) using a bidirectional switch gate drive method.

With this configuration, the bidirectional switch can be applied to the power conversion device with a simpler configuration, and a low-loss and inexpensive device can be configured.

Since the present invention does not directly shift from the fourth mode to the third mode, or from the third mode to the fourth mode, and is low loss and low cost, it is applied to a DC-DC converter device, an AC-DC converter device, an inverter device, etc. it can.

DESCRIPTION OF SYMBOLS 1,1a-1f Bidirectional switch 2,2a-2f 1st gate terminal 3,3a-3f 2nd gate terminal 4 Drain terminal 5 Source terminal 6 Substrate 7 Buffer layer 8 Semiconductor layer laminated body 9 GaN layer 10 AlGaN layer 11A 1st 1 ohmic electrode 11B second ohmic electrode 12A first p-type semiconductor layer 12B second p-type semiconductor layer 13A first gate electrode 13B second gate electrode 14 protective film 15 first transistor 16 second transistor Transistor 17 Control unit 18 Inverter device 18a First arm 19A, 19B, 19C, 19D Gate drive circuit 20 Logic circuit (delay generation unit)
23 Power supply

Claims (13)

1. A semiconductor layer stack having a channel formed on a substrate; a first ohmic electrode and a second ohmic electrode formed on the semiconductor layer stack spaced apart from each other; and the first ohmic electrode. A first gate electrode and a second gate electrode, which are formed in order from the first ohmic electrode side, between the electrode and the second ohmic electrode, the semiconductor layer stack, and the first gate; A first p-type semiconductor layer formed between the electrode, a second p-type semiconductor formed between the semiconductor layer stack and the second gate electrode, and the first ohmic electrode. And a first gate terminal for inputting a gate drive signal between the first gate electrode and a second gate terminal for inputting a gate drive signal between the second ohmic electrode and the second gate electrode And the first option A drain terminal connected to the mic electrode and a source terminal connected to the second ohmic electrode. When only the first gate terminal is turned on, the drain terminal is turned on between the source terminal and the source terminal. A first mode in which a bidirectional device and a reverse diode operate as a semiconductor connected in series, and when only the second gate terminal is turned on, the forward diode and the on state are turned on between the drain terminal and the source terminal. A second mode in which a bidirectional device operates as a semiconductor connected in series, and when the first gate terminal and the second gate terminal are turned on, it operates as a semiconductor that conducts bidirectionally from the drain terminal to the source terminal. When the third mode and the first gate terminal and the second gate terminal are turned off, the current is interrupted in both forward and reverse directions. A bidirectional switch gate driving method having a fourth mode operating as a semiconductor, wherein the mode is shifted from the fourth mode to the third mode, or from the third mode to the fourth mode. And a bidirectional switch gate drive method for controlling to intervene at least one of the first mode and the second mode.
2. When the state transition from the fourth mode to the third mode passes through the first mode or the second mode in which the forward diode is formed to conduct in the intended conduction direction. 2. The method for driving a gate of a bidirectional switch according to claim 1, which is controlled.
3. In the state transition from the third mode to the fourth mode, the forward diode is formed so as to conduct with respect to the intended conduction direction so as to pass through the first mode or the second mode. The bidirectional switch gate drive method according to claim 1, wherein the bidirectional switch is controlled.
4. In the state transition from the fourth mode to the third mode, the reverse diode is formed so as to be cut off with respect to the intended conduction direction so as to pass through the first mode or the second mode. The bidirectional switch gate drive method according to claim 1, wherein the bidirectional switch is controlled.
5. In the state transition from the third mode to the fourth mode, the reverse diode is formed so as to be cut off with respect to the intended conduction direction so as to pass through the first mode or the second mode. The bidirectional switch gate drive method according to claim 1, wherein the bidirectional switch is controlled.
6. 6. The drive signal for the first gate terminal and the drive signal for the second gate terminal are shared, and the first gate terminal and the second gate terminal are controlled to be turned on / off by one gate drive signal. 2. A gate drive method for a bidirectional switch according to item 1.
7. The circuit further comprises a bridge circuit using the bidirectional switch, and the reverse diode is formed so as to cut off with respect to the intended conduction direction at the time of the state transition from the third mode to the fourth mode. The forward diode is controlled so as to pass through the first mode or the second mode, and conducts in the intended conduction direction during the state transition from the fourth mode to the third mode. The bidirectional switch gate driving method according to claim 1, wherein control is performed so as to pass through the first mode or the second mode.
8. The bridge circuit using the bidirectional switch is further provided, and the forward diode is formed to conduct in the intended conduction direction at the time of transition from the third mode to the fourth mode. The first direction or the second mode is controlled, and the reverse direction is cut off with respect to the intended conduction direction during the state transition from the fourth mode to the third mode. 2. The bidirectional switch gate drive method according to claim 1, wherein control is performed so as to pass through the first mode or the second mode in which a diode is formed.
9. The bidirectional switch gate driving method according to claim 1, further comprising a delay generation unit, wherein the first gate terminal and the second gate terminal are switched from off to on, or from on to off.
10. The bidirectional switch gate driving method according to claim 9, wherein a delay time generated by the delay generation unit is 1 ns or greater than 1 ns.
11. The bidirectional switch gate driving method according to claim 9, wherein the delay generation unit generates a delay time using a response speed of a logic circuit.
12. A semiconductor layer stack having a channel formed on a substrate; a first ohmic electrode and a second ohmic electrode formed on the semiconductor layer stack spaced apart from each other; and the first ohmic electrode. A first gate electrode and a second gate electrode, which are formed in order from the first ohmic electrode side, between the electrode and the second ohmic electrode, the semiconductor layer stack, and the first gate; A first p-type semiconductor layer formed between the electrode, a second p-type semiconductor formed between the semiconductor layer stack and the second gate electrode, and the first ohmic electrode. And a first gate terminal for inputting a gate drive signal between the first gate electrode and a second gate terminal for inputting a gate drive signal between the second ohmic electrode and the second gate electrode And the first option A drain terminal connected to the mic electrode and a source terminal connected to the second ohmic electrode. When only the first gate terminal is turned on, the drain terminal is turned on between the source terminal and the source terminal. A first mode in which a bidirectional device and a reverse diode operate as a semiconductor connected in series, and when only the second gate terminal is turned on, the forward diode and the on state are turned on between the drain terminal and the source terminal. A second mode in which a bidirectional device operates as a semiconductor connected in series, and when the first gate terminal and the second gate terminal are turned on, conduction between the drain terminal and the source terminal in a bidirectional manner without a diode. When the third mode operating as a semiconductor and the first gate terminal and the second gate terminal are turned off, the order A bidirectional switch gate driving method having a fourth mode that operates as a semiconductor that cuts off current in both directions, wherein the fourth mode is changed to the third mode, or the third mode is changed to the fourth mode. A gate drive method for a bidirectional switch that is controlled so that it does not shift directly to at least one.
13. A power converter using the bidirectional switch gate drive method according to any one of claims 1 to 12.

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