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WO2009066765A1 - Signal delaying apparatus - Google Patents

Signal delaying apparatus Download PDF

Info

Publication number
WO2009066765A1
WO2009066765A1 PCT/JP2008/071231 JP2008071231W WO2009066765A1 WO 2009066765 A1 WO2009066765 A1 WO 2009066765A1 JP 2008071231 W JP2008071231 W JP 2008071231W WO 2009066765 A1 WO2009066765 A1 WO 2009066765A1
Authority
WO
WIPO (PCT)
Prior art keywords
falls
signal generating
signal
pulse
timing
Prior art date
Application number
PCT/JP2008/071231
Other languages
French (fr)
Japanese (ja)
Inventor
Koichi Nose
Masayuki Mizuno
Original Assignee
Nec Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corporation filed Critical Nec Corporation
Publication of WO2009066765A1 publication Critical patent/WO2009066765A1/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/03—Astable circuits
    • H03K3/0315—Ring oscillators
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/133—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/135—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Pulse Circuits (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

To generate a pulse signal having a desired pulse width. There are included a ring oscillator circuit including a plurality of series-connected delay circuits; rising and falling signal generating parts each of which is connected to a respective one of the outputs of the plurality of delay circuits; and a clock edge combining circuit for generating an output signal that rises at a timing when an output pulse of the rising signal generating part rises or falls and that falls at a timing when an output pulse of the falling signal generating part rises or falls.
PCT/JP2008/071231 2007-11-21 2008-11-21 Signal delaying apparatus WO2009066765A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-301128 2007-11-21
JP2007301128 2007-11-21

Publications (1)

Publication Number Publication Date
WO2009066765A1 true WO2009066765A1 (en) 2009-05-28

Family

ID=40667587

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/071231 WO2009066765A1 (en) 2007-11-21 2008-11-21 Signal delaying apparatus

Country Status (1)

Country Link
WO (1) WO2009066765A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180116323A (en) * 2016-03-10 2018-10-24 아나로그 디바이시즈 인코포레이티드 A timing generator for generating high resolution pulses of arbitrary width
EP4283871A4 (en) * 2021-03-09 2024-08-21 Changxin Memory Technologies, Inc. PULSE GENERATING CIRCUIT AND STAGGERED PULSE GENERATING CIRCUIT

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11355109A (en) * 1998-11-27 1999-12-24 Denso Corp Pulse generating device
JP2000232346A (en) * 1998-08-11 2000-08-22 Toshiba Corp Pulse width modulation waveform generation circuit
JP2000236241A (en) * 1999-02-16 2000-08-29 Kawasaki Steel Corp Semiconductor integrated circuit
JP2004343395A (en) * 2003-05-15 2004-12-02 Fuji Electric Device Technology Co Ltd Pulse width modulation circuit

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000232346A (en) * 1998-08-11 2000-08-22 Toshiba Corp Pulse width modulation waveform generation circuit
JPH11355109A (en) * 1998-11-27 1999-12-24 Denso Corp Pulse generating device
JP2000236241A (en) * 1999-02-16 2000-08-29 Kawasaki Steel Corp Semiconductor integrated circuit
JP2004343395A (en) * 2003-05-15 2004-12-02 Fuji Electric Device Technology Co Ltd Pulse width modulation circuit

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180116323A (en) * 2016-03-10 2018-10-24 아나로그 디바이시즈 인코포레이티드 A timing generator for generating high resolution pulses of arbitrary width
CN108886356A (en) * 2016-03-10 2018-11-23 美国亚德诺半导体公司 Timing generator for generating high-resolution pulses of arbitrary width
JP2019512941A (en) * 2016-03-10 2019-05-16 アナログ ディヴァイスィズ インク Timing generator for generating high resolution pulses having arbitrary width
KR102120573B1 (en) * 2016-03-10 2020-06-08 아나로그 디바이시즈 인코포레이티드 Timing generator for generating high resolution pulses of arbitrary width
CN108886356B (en) * 2016-03-10 2022-03-29 美国亚德诺半导体公司 Timing generator for generating high resolution pulses with arbitrary width
EP4283871A4 (en) * 2021-03-09 2024-08-21 Changxin Memory Technologies, Inc. PULSE GENERATING CIRCUIT AND STAGGERED PULSE GENERATING CIRCUIT

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