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WO2008126365A1 - 不揮発性記憶装置、不揮発性記憶素子および不揮発性記憶素子アレイ - Google Patents

不揮発性記憶装置、不揮発性記憶素子および不揮発性記憶素子アレイ Download PDF

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Publication number
WO2008126365A1
WO2008126365A1 PCT/JP2008/000766 JP2008000766W WO2008126365A1 WO 2008126365 A1 WO2008126365 A1 WO 2008126365A1 JP 2008000766 W JP2008000766 W JP 2008000766W WO 2008126365 A1 WO2008126365 A1 WO 2008126365A1
Authority
WO
WIPO (PCT)
Prior art keywords
nonvolatile memory
electrode
memory element
electrodes
terminal
Prior art date
Application number
PCT/JP2008/000766
Other languages
English (en)
French (fr)
Inventor
Koichi Osano
Satoru Fujii
Shunsaku Muraoka
Original Assignee
Panasonic Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corporation filed Critical Panasonic Corporation
Priority to US12/302,468 priority Critical patent/US8058636B2/en
Priority to JP2008535812A priority patent/JP4252110B2/ja
Publication of WO2008126365A1 publication Critical patent/WO2008126365A1/ja
Priority to US13/246,483 priority patent/US8217489B2/en
Priority to US13/483,808 priority patent/US8492875B2/en

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/003—Cell access
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/20—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H10N70/021—Formation of switching materials, e.g. deposition of layers
    • H10N70/026—Formation of switching materials, e.g. deposition of layers by physical vapor deposition, e.g. sputtering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/821—Device geometry
    • H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/883—Oxides or nitrides
    • H10N70/8833—Binary metal oxides, e.g. TaOx
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/30—Resistive cell, memory material aspects
    • G11C2213/32—Material having simple binary metal oxide structure
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/74—Array wherein each memory cell has more than one access device
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/76—Array using an access device for each cell which being not a transistor and not a diode
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/79—Array wherein the access device being a transistor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/903—FET configuration adapted for use as static memory cell
    • Y10S257/904—FET configuration adapted for use as static memory cell with passive components,, e.g. polysilicon resistors
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/924—Active solid-state devices, e.g. transistors, solid-state diodes with passive device, e.g. capacitor, or battery, as integral part of housing or housing element, e.g. cap

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)

Abstract

第１電極（１１１）と、第２電極（１１２）と、電極間に介在されて電極間に与えられる電気的信号に基づいて複数の抵抗状態の間で可逆的に抵抗値が変化する可変抵抗層（１１３）と、第１電極と接続された第１端子（１０３）と、第２電極と接続された第２端子（１０４）とを備え、可変抵抗層は、少なくともタンタル酸化物を含み、タンタル酸化物をＴａＯｘと表した場合に、０＜ｘ＜２．５を満足するように構成され、低抵抗状態にあるときの電極間の抵抗値をＲＬとし、高抵抗状態にあるときの電極間の抵抗値をＲＨとし、第１端子から第１電極と可変抵抗層と第２電極とを経由して第２端子に至る電流経路のうち、可変抵抗層を除いた部分の抵抗値をＲ０とするとき、Ｒ０がＲＬ＜Ｒ０を満たす不揮発性記憶装置とする。
PCT/JP2008/000766 2007-03-29 2008-03-27 不揮発性記憶装置、不揮発性記憶素子および不揮発性記憶素子アレイ WO2008126365A1 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
US12/302,468 US8058636B2 (en) 2007-03-29 2008-03-27 Variable resistance nonvolatile memory apparatus
JP2008535812A JP4252110B2 (ja) 2007-03-29 2008-03-27 不揮発性記憶装置、不揮発性記憶素子および不揮発性記憶素子アレイ
US13/246,483 US8217489B2 (en) 2007-03-29 2011-09-27 Nonvolatile memory element having a tantalum oxide variable resistance layer
US13/483,808 US8492875B2 (en) 2007-03-29 2012-05-30 Nonvolatile memory element having a tantalum oxide variable resistance layer

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-086514 2007-03-29
JP2007086514 2007-03-29

Related Child Applications (2)

Application Number Title Priority Date Filing Date
US12/302,468 A-371-Of-International US8058636B2 (en) 2007-03-29 2008-03-27 Variable resistance nonvolatile memory apparatus
US13/246,483 Division US8217489B2 (en) 2007-03-29 2011-09-27 Nonvolatile memory element having a tantalum oxide variable resistance layer

Publications (1)

Publication Number Publication Date
WO2008126365A1 true WO2008126365A1 (ja) 2008-10-23

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Country Status (3)

Country Link
US (3) US8058636B2 (ja)
JP (1) JP4252110B2 (ja)
WO (1) WO2008126365A1 (ja)

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WO2009041041A1 (ja) * 2007-09-28 2009-04-02 Panasonic Corporation 不揮発性記憶素子及び不揮発性半導体記憶装置、並びにそれらの読み出し方法及び書き込み方法
WO2010029645A1 (ja) * 2008-09-12 2010-03-18 株式会社 東芝 不揮発性記憶装置及びその製造方法
WO2010064444A1 (ja) * 2008-12-05 2010-06-10 パナソニック株式会社 不揮発性記憶素子及びその製造方法
JP4555397B2 (ja) * 2008-08-20 2010-09-29 パナソニック株式会社 抵抗変化型不揮発性記憶装置
CN102047423A (zh) * 2009-04-30 2011-05-04 松下电器产业株式会社 非易失性存储元件及非易失性存储装置
WO2011118185A1 (ja) * 2010-03-25 2011-09-29 パナソニック株式会社 不揮発性記憶素子の駆動方法および不揮発性記憶装置
WO2012090404A1 (ja) * 2010-12-27 2012-07-05 パナソニック株式会社 不揮発性記憶素子、その製造方法
CN102592656A (zh) * 2011-01-13 2012-07-18 索尼公司 存储装置和其操作方法
US8350245B2 (en) 2008-12-10 2013-01-08 Panasonic Corporation Variable resistance element and nonvolatile semiconductor memory device using the same
JP2014053522A (ja) * 2012-09-10 2014-03-20 Toshiba Corp 記憶装置
US9042158B2 (en) 2013-05-21 2015-05-26 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device with protective resistance film
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