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WO2008013888A3 - Telecommunication and computing platforms with seria packet switched integrated memory access technolog - Google Patents

Telecommunication and computing platforms with seria packet switched integrated memory access technolog Download PDF

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Publication number
WO2008013888A3
WO2008013888A3 PCT/US2007/016797 US2007016797W WO2008013888A3 WO 2008013888 A3 WO2008013888 A3 WO 2008013888A3 US 2007016797 W US2007016797 W US 2007016797W WO 2008013888 A3 WO2008013888 A3 WO 2008013888A3
Authority
WO
WIPO (PCT)
Prior art keywords
circuit cards
seria
telecommunication
memory access
packet switched
Prior art date
Application number
PCT/US2007/016797
Other languages
French (fr)
Other versions
WO2008013888A2 (en
Inventor
William Chu
Yi-Chang Chou
Ching-Tai Hu
Barton W Stuck
Viswa Sharma
Original Assignee
Slt Logic Llc
William Chu
Yi-Chang Chou
Ching-Tai Hu
Barton W Stuck
Viswa Sharma
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Slt Logic Llc, William Chu, Yi-Chang Chou, Ching-Tai Hu, Barton W Stuck, Viswa Sharma filed Critical Slt Logic Llc
Publication of WO2008013888A2 publication Critical patent/WO2008013888A2/en
Publication of WO2008013888A3 publication Critical patent/WO2008013888A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/40—Constructional details, e.g. power supply, mechanical construction or backplane
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/35—Switches specially adapted for specific applications
    • H04L49/351—Switches specially adapted for specific applications for local area network [LAN], e.g. Ethernet switches
    • H04L49/352—Gigabit ethernet switching [GBPS]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

A computing and communication architecture utilizes a serial protocol based switched fabric among circuit cards housed in packaging arrangement. In one embodiment, each circuit card connected to the serial protocol based switched fabric in the packaging arrangement is provided with a protocol processor that enables all of the circuit cards to efficiently provide packet-based serial self-clocked communications at line speed. As a result, it is not necessary to arrange the circuit cards in a hierarchical manner in order to address the problems of switch blocking and related traffic congestion issues that would otherwise limit the implementation of the serial protocol based backplane arrangement for housing circuit cards.
PCT/US2007/016797 2006-07-25 2007-07-25 Telecommunication and computing platforms with seria packet switched integrated memory access technolog WO2008013888A2 (en)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
US82024306P 2006-07-25 2006-07-25
US60/820,243 2006-07-25
US82217106P 2006-08-11 2006-08-11
US60/822,171 2006-08-11
US88798907P 2007-02-02 2007-02-02
US60/887,989 2007-02-02

Publications (2)

Publication Number Publication Date
WO2008013888A2 WO2008013888A2 (en) 2008-01-31
WO2008013888A3 true WO2008013888A3 (en) 2008-11-13

Family

ID=38982069

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2007/016797 WO2008013888A2 (en) 2006-07-25 2007-07-25 Telecommunication and computing platforms with seria packet switched integrated memory access technolog

Country Status (1)

Country Link
WO (1) WO2008013888A2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108415866A (en) * 2018-02-27 2018-08-17 深圳市风云实业有限公司 Intelligent platform management controller

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8189599B2 (en) 2005-08-23 2012-05-29 Rpx Corporation Omni-protocol engine for reconfigurable bit-stream processing in high-speed networks

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4754398A (en) * 1985-06-28 1988-06-28 Cray Research, Inc. System for multiprocessor communication using local and common semaphore and information registers
US20020097742A1 (en) * 2001-01-22 2002-07-25 Viagate Technologies, Inc. Methods and apparatus for multimedia broadband telecommunication
US20060206647A1 (en) * 2005-03-14 2006-09-14 Intel Corporation Advanced mezzanine card adapter

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4754398A (en) * 1985-06-28 1988-06-28 Cray Research, Inc. System for multiprocessor communication using local and common semaphore and information registers
US20020097742A1 (en) * 2001-01-22 2002-07-25 Viagate Technologies, Inc. Methods and apparatus for multimedia broadband telecommunication
US20060206647A1 (en) * 2005-03-14 2006-09-14 Intel Corporation Advanced mezzanine card adapter

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
GUSTAVSON, D.B ET AL.: "The Scalable Coherent Interface (SCI", IEEE COMMUNICAIONS MAGAZINE, August 1996 (1996-08-01), pages 52 - 63 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108415866A (en) * 2018-02-27 2018-08-17 深圳市风云实业有限公司 Intelligent platform management controller

Also Published As

Publication number Publication date
WO2008013888A2 (en) 2008-01-31

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