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WO2007036849A1 - Oscillateur sans varactor a capacite d'accord amelioree - Google Patents

Oscillateur sans varactor a capacite d'accord amelioree Download PDF

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Publication number
WO2007036849A1
WO2007036849A1 PCT/IB2006/053403 IB2006053403W WO2007036849A1 WO 2007036849 A1 WO2007036849 A1 WO 2007036849A1 IB 2006053403 W IB2006053403 W IB 2006053403W WO 2007036849 A1 WO2007036849 A1 WO 2007036849A1
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WO
WIPO (PCT)
Prior art keywords
differential
oscillator circuit
differential oscillator
tuning
transistor
Prior art date
Application number
PCT/IB2006/053403
Other languages
English (en)
Inventor
Mihai A. T. Sanduleanu
Eduard F. Stikvoort
Razvan-Adrian Ionita
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Koninklijke Philips Electronics N.V.
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Application filed by Koninklijke Philips Electronics N.V. filed Critical Koninklijke Philips Electronics N.V.
Publication of WO2007036849A1 publication Critical patent/WO2007036849A1/fr

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B27/00—Generation of oscillations providing a plurality of outputs of the same frequency but differing in phase, other than merely two anti-phase outputs
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
    • H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
    • H03B5/1206—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification
    • H03B5/1212—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification the amplifier comprising a pair of transistors, wherein an output terminal of each being connected to an input terminal of the other, e.g. a cross coupled pair
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
    • H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
    • H03B5/1206—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification
    • H03B5/1218—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification the generator being of the balanced type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
    • H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
    • H03B5/1228—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device the amplifier comprising one or more field effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
    • H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
    • H03B5/1237—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator
    • H03B5/1262—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator the means comprising switched elements
    • H03B5/1265—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator the means comprising switched elements switched capacitors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
    • H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
    • H03B5/1237—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator
    • H03B5/1271—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator the frequency being controlled by a control current, i.e. current controlled oscillators
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B2200/00—Indexing scheme relating to details of oscillators covered by H03B
    • H03B2200/006—Functional aspects of oscillators
    • H03B2200/0074—Locking of an oscillator by injecting an input signal directly into the oscillator

Definitions

  • the present invention relates to a differential oscillator circuit having a frequency control mechanism and a method of controlling frequency of an oscillator signal.
  • Fig. 1 shows a conventional differential Colpitts oscillator, as disclosed for example in John Rogers et al, "Radio Frequency Integrated Circuit Design", Artech House, 2003, which consists of two single-ended Colpitts oscillators comprising a respective differential transistor pair or stage Ml and M2 and placed back to back. Respective feedback loops which relate to the Colpitts behavior are obtained by first and second feedback capacitors Cl and C2. Differential oscillator signals can be obtained at respective output terminals out- and out+. A common point between the two first feedback capacitors Cl functions as a virtual ground.
  • the middle tap of a buffer coil L is connected to a power supply voltage V DD - Additionally, respective current sources for generating bias currents I bd are provided at the bottom of the differential branches.
  • V DD power supply voltage
  • the ripple on the supply will generate an extra noise source that converts to phase-noise due to AM-PM (amplitude modulation - phase modulation) mechanism.
  • the buffer coil(s) L will provide some isolation at RF (radio frequency) but not at low frequencies.
  • High-frequency voltage controlled oscillators (VCOs) are widely used in integrated circuits, ranging from clock recovery in high data-rate optical communications to frequency synthesizers in wireless communications.
  • Frequency tuning for these VCOs can be achieved by using varactor diodes.
  • a problem encountered at high frequency is the quality factor of the varactor diodes and the associated parasitic capacitances, which diminish the effective tuning range. Ensuring tenability at this frequencies is a difficult task. Any solution based on varactor diodes will suffer from these impairments. It is therefore an object of the present invention to provide a varactor-less differential oscillator circuit with enhanced tuning capability.
  • the proposed solution is based on an improved tuning mechanism where a first kind of tuning can be performed by controlling the threshold voltage of the load transistors, and a second kind of tuning can be performed by controlling the value of a current source or voltage source for transistor biasing.
  • the oscillator thus requires no varactor diodes and/or switched capacitors, so that total integration can be achieved for operation at very high frequencies.
  • the first frequency control circuitry may be provided for coarse tuning, while the second frequency control circuitry may be provided for fine tuning.
  • the tuning mechanism can be adapted to work as a "gear-box" by stepping coarsely with the threshold voltage control of the first frequency control circuitry through fine intervals generated by the second frequency control circuitry.
  • the differential oscillator circuit may comprises a differential Colpitts type oscillator.
  • the first frequency control circuitry may be configured to apply a tuning voltage to respective bulk terminals of said load transistors. Due to the fact that the controlled load transistors are not located in the main RF signal path, the differential oscillator itself is less sensitive to noise or parasitic effects introduced by the first frequency control circuitry.
  • current generating circuitry responsive to said first frequency control circuitry may be connected between a power supply of the differential oscillator circuit and an inductor tap of a coil buffer of the differential oscillator circuit.
  • a galvanic isolation of the differential oscillator circuit from the power supply variation can be provided which substantially diminishes the effects of low-frequency variations of the power supply voltage.
  • the current generating source is preferably controlled to provide a current value equal to the sum of branch currents generated by respective bottom current sources.
  • An additional feedback circuit may be provided which comprises a first transistor having its gate connected to the drain of one transistor of the differential transistor stage and having its source connected to the gate of one of the respective load transistors, and a second transistor having its gate connected to the drain of the other transistor of the differential transistor stage and having its source connected to the gate of the other of the respective load transistors.
  • This additional feedback circuit provides a second positive DC feedback loop which enhances the oscillator part and provides a DC path for the common- mode current source.
  • tail current generating circuitry may be connected to the source of the first and second transistors, and responsive to the second frequency control circuitry for generating the tail current. Thereby, a very efficient tuning mechanism is obtained by controlling the tail current and the threshold voltage.
  • Additional output buffer transistor circuitry may be connected to the output of the differential transistor stage, wherein the first frequency control circuitry may be arranged to control the threshold of the output buffer transistor circuitry, so that the characteristic of the output buffer transistor circuitry is adapted to the characteristic of the load transistors.
  • a coil buffer connected to the output buffer transistor circuitry may be selected to have substantially the same inductivity value as a coil buffer connected to the differential transistor stage. Thereby, design and layout of the circuit can be simplified.
  • the differential oscillator circuit may be implemented in a triple-well or silicon-on- insulator technology which enables threshold voltage control.
  • a quadrature or IQ (in-phase/quadrature) oscillator circuit may be provided by coupling two of the above proposed differential oscillator circuits.
  • Fig. 1 shows a schematic circuit diagram of a conventional differential Colpitts oscillator circuit
  • Fig. 2 shows a schematic circuit diagram of an improved differential Colpitts oscillator circuit with supply noise suppression
  • Fig. 3 shows a schematic circuit diagram of an improved differential Colpitts oscillator circuit with supply noise suppression and additional DC feedback loop
  • Fig. 4 shows a schematic circuit diagram of an improved differential Colpitts oscillator according to a first preferred embodiment
  • Fig. 5 shows a schematic circuit diagram of an improved differential Colpitts oscillator according to a second preferred embodiment
  • Fig. 6 shows a schematic diagram indicating tuning ranges as a function of tuning current, for different back-biasing voltages
  • Fig. 7 shows a schematic block diagram of an IQ oscillator according to a third preferred embodiment
  • Fig. 8 shows a schematic block diagram of an IQ oscillator according to a fourth preferred embodiment
  • Fig. 9 shows a schematic diagram indicating a tuning range as a function of tuning current
  • Fig. 10 shows a schematic diagram indicating oscillation frequency as a function of back-biasing voltage
  • Fig. 11 shows a schematic diagram indicating tuning ranges of the IQ oscillator as a function of tuning current, for different back-biasing voltages
  • Fig. 12 shows a schematic signal diagram of output differential signals for different back-biasing voltages
  • Fig. 13 shows a schematic diagram indicating phase noise as a function of back-biasing voltage
  • Fig. 14 shows a schematic diagram indicating phase noise as a function of tuning current
  • Fig. 15 shows a schematic diagram indicating phase noise as a function of biasing current
  • Fig. 16 shows a schematic diagram indicating oscillation frequency as a function of tuning current for different biasing currents
  • Fig. 17 shows a schematic circuit diagram of a conventional differential Colpitts oscillator with modified topology
  • Fig. 18 shows a schematic circuit diagram of an improved differential Colpitts oscillator with modified topology according to a fifth preferred embodiment
  • Fig. 19 shows a schematic diagram indicating tuning ranges of the fifth preferred embodiment as a function of tuning current, for different back-biasing voltages.
  • the preferred embodiments will now be described in connection with an oscillator of the differential Colpitts type (differential Colpitts oscillator), which can be used e.g. in transceiver circuits for wireless applications, such as WLAN (Wireless Local Area Network) or WPAN (Wireless Personal Area Network).
  • Fig. 2 shows a schematic circuit diagram of an improved differential Colpitts oscillator circuit based on the conventional circuit of Fig.
  • a control mechanism of controlling the bottom current sources in the differential branches should preferably be provided (as indicated by the dotted lines in Fig. 2). This can be achieved by controlling all the current sources from a single source.
  • the top source (I BIAS ) should provide a current equal to the sum of the bottom current sources (IBIA S /2).
  • Fig. 3 shows a schematic circuit diagram of an improved differential Colpitts oscillator circuit with supply noise suppression and an additional DC feedback loop.
  • the proposed enhancement of Fig. 3 represents an additional cross-coupled positive feedback circuit.
  • This second positive feedback is provided from the drain of one transistor M2 of the differential transistor stage via the gate of a new first feedback transistor M5 which has its source connected to the gate of a first load transistor M3, and the drain of the load transistor M3 is tied to the source of the other transistor Ml of the differential transistor stage.
  • the second positive feedback is provided from the drain of the other transistor Ml of the differential transistor stage through a new second feedback transistor M6 and a second load transistor M4 to the source of the one transistor M2 of the differential transistor stage.
  • all transistors Ml to M6 are NMOS type transistors. Furthermore, similar to the circuit of Fig. 2, a galvanic isolation of the oscillator circuit from power supply variations is achieved by using the I BIAS current source at the "top" of the circuit. Additionally, a filtering capacitor C L is connected to the current source to reduce the ripple on the bias voltage at the common nodes of the circuit.
  • the current I BIAS will flow in the first and second load transistors M3 and M4 due to the mechanism of the second positive feedback on DC signals. The increase of the current I BIAS produces an increase of the DC voltage at the gates of the first and second feedback transistors M5 and M6.
  • the gates of the first and second load transistors M3 and M4 go up and the sources of the differential transistor stage Ml and M2 go down. Therefore, the bias current flows through transistors Ml and M2 of the differential transistor stage.
  • the same mechanism applies to differential signals in the LC tank. Let's suppose that the voltage at the drain of the transistor Ml increases. Caused by the differential Colpitts oscillator, the voltage at the drain of the other transistor M2 will have an opposite tendency and will decrease. Consequently, the voltage at the source of the first feedback transistor M5 and at the gate of the first load transistor M3 will also decrease. As a consequence the channel of the first load transistor M3 will get smaller and its channel resistance will increase so that its drain voltage increases.
  • the differential oscillator has two positive feedback loops, one related to the Colpitts behavior caused by the feedback capacitors C 1 and C 2 and the other related to the DC feedback loop that enhances the Colpitts part and provides a DC path for the common-mode current source IBIA S -
  • variablecaps varactor diodes
  • a differential varicap was conventionally provided as a tunable version of the first feedback capacitor C 1 .
  • those varicaps have poor quality iactors at mm- wave frequencies. Moreover, they are difficult to control with process variations.
  • This first tuning circuitry or function is accompanied by a second tuning circuitry or iunction achieved by controlling the threshold voltage of the first and second load transistors M3 and M4, e.g. controlling their bulk voltage.
  • Fig. 4 shows a schematic circuit diagram of an improved differential Colpitts oscillator according to the first preferred embodiment.
  • an efficient tuning mechanism is introduced by controlling the I TUNE current source and a bulk signal BULK , e.g. bulk voltage, applied to the load transistors M3 and M4.
  • BULK bulk signal
  • the oscillation frequency is tuned by controlling the threshold voltage V T of the bottom load transistors M3 and M4 via a back-biasing technique.
  • This additional control provides a coarse tuning of the oscillation frequency, while fine-tuning is obtained in the first preferred embodiment by changing the value of I TUNE by applying a suitable control signal (not shown) to the respective bottom current sources.
  • This method of tuning the oscillation frequency by controlling the threshold voltage V T represents a good choice for tuning the frequency of the differential Colpitts oscillator to obtain a VCO.
  • the feasibility of the method is given by the fact that the NMOS transistors M3 and M4, where the threshold voltage is controlled, are not in the main RF signal path. Indeed, in Fig. 4 it can be seen that the load transistors M3 and M4 represent active loads of the core of the Colpitts oscillator, formed by the transistors Ml and M2, the feedback capacitors C 1 and C 2 and the inductor L.
  • That circuitry that the oscillator itself is made less sensitive to noise induced in the circuit by variations or changes of the back- biasing voltages at the bulks of the first and second load transistors M3 and M4, and to the parasitic effects given by the physical connections of the bulk DC signals BULK.
  • the other transistors Ml, M2, M5 and M6 in the differential oscillator circuit have their bulk (P-well) connected to their source. This feature of connecting the P-well to a different potential than ground can be provided in triple-well CMOS or SOI technologies.
  • the present differential oscillator circuit can thus be implemented in CMOS090 LP, a triple- well CMOS technology, e.g., in two versions: with differential outputs and with IQ output signals.
  • Fig. 5 shows a schematic circuit diagram of an improved differential Colpitts oscillator according to the second preferred embodiment.
  • the differential oscillator circuit with threshold voltage control has two output buffer stages.
  • the output buffer stages are designed to transmit the differential output signals out- and out+ from the oscillator. They drive an external load R (e.g. 50 ⁇ ) at the oscillator outputs, for a wide frequency range centered at a predetermined frequency of e.g. 30GHz.
  • a first buffer transistor M7 with a load resistor R and a shunt inductor L 2 form the first output buffer stage with buffered signal Buff out-, wherein the shunt inductor L 2 is connected to the power supply.
  • a similar second output buffer stage is provided, where the drain of a second buffer transistor M8 provides an inverted buffered signal Buff_out+.
  • the back-biasing DC voltage for the threshold voltage control is also applied to the first and second buffer transistors M7 and M8 in the output buffers.
  • the buffer transistors M7 and M8 drive the same signals in their gates as the output load transistors M3 and M4 of the differential oscillator.
  • the bulks can be connected to the same biasing point.
  • the output signals Buff out- andBuff_out+ can be changed at the output of the buffer stages by modifying the value of the shunt inductors L 2 .
  • the shunt inductors L 2 can have different values than the buffer coils L 1 used in the Colpitts oscillator core.
  • the buffer coils L 1 can be used as for the shunt inductors L 2 .
  • the middle point of the coil can be connected to V DD -
  • the same type of the coil e.g. 30OpH
  • the value of the first feedback capacitor C 1 can be set three times the value of the second feedback capacitor C 2 . This assures the Colpitts oscillation condition.
  • the second feedback capacitors C 2 can be realized with metal capacitors.
  • the capacitance of the ecoupling capacitor C L may correspond to that of the first feedback capacitor C 1 .
  • the metal capacitors are available in the standard CMOS090 LP process and no additional masks or manufacturing steps are needed, which otherwise would lead to increased manufacturing costs.
  • the power supply, V DD may be 1.2V.
  • the biasing current I BIAS and the tuning current I TUNE may both be set to 6mA;, while the bulk is tied to the ground. Then, an oscillation frequency of 33.365GHz is obtained at 27°C and 33.430GHz is obtained at 90°C.
  • the amplitude of the output signals for each channel (out+, out-) may vary between -0.1V and 1.1 V. Due to the differential configuration, the variation of one output signal is opposite to the other.
  • Fig. 6 shows a schematic diagram indicating tuning ranges as a function of the tuning current I TUNE , for different back-biasing voltages.
  • the effect of the coarse and fine tuning mechanism can be seen for the differential oscillator according to the first and second preferred embodiment.
  • different fine tuning ranges 32.5GHz and 34GHz are obtained for a tuning current I TUNE in the range between 6mA and 8mA, at a bias current IBIA S of 6mA.
  • Fig. 7 shows a schematic block diagram of a coupled IQ oscillator according to a third preferred embodiment.
  • the principle of this IQ oscillator is based on the coupling of two differential oscillator sections as depicted in Fig. 4 or 5.
  • the coupling between a first (left) oscillator and a second (right) oscillator is a direct coupling, while the coupling between the second oscillator and the first oscillator is a crossed coupling.
  • the total phase-shift within the loop must be equal to 2 ⁇ (e.g. 360°).
  • the crossed coupling introduces a phase-shift of ⁇ (e.g. 180°), so that the phase-shift introduced by the two oscillators must be equal to ⁇ (e.g. 180°).
  • ⁇ e.g. 180°
  • the proposed tuning mechanism with threshold voltage control and current tuning is implemented in the IQ oscillator of the third preferred embodiment.
  • the threshold voltage control provides the coarse tuning of the oscillation frequency.
  • a biasing signal BULK is applied to the bulk terminal of the load transistors provided in the first and second oscillators. Additionally, fine tuning is achieved by changing the value of the tuning current IT UN E-
  • Fig. 8 shows a schematic block diagram of an IQ oscillator according to a fourth preferred embodiment.
  • a buffered IQ oscillator with V T control and current tuning is provided.
  • the back-biasing signal BULK is also applied to the NMOS transistors in output buffers Buff which are providing the I and Q signals and which basically correspond to the buffer stages of the second preferred embodiment.
  • the buffer transistors of the output buffer stage for the in-phase channel /, and the buffer transistors for quadrature channel Q have their bulk (p-well) connected to the same BULK signal as the transistors of the intrinsic IQ oscillator.
  • Fig. 9 shows a schematic diagram indicating a tuning range as a function of tuning current.
  • the current tuning range (for I TUNE ) of the buffered IQ oscillator according to the fourth preferred embodiment is shown.
  • the bias current is 6mA
  • VB u Ik OV
  • the temperature is 90°C.
  • the diagram thus represents one fine tuning range of the oscillation frequency.
  • the I TUNE current is varied between 6mA and 8mA, the oscillation frequency will change in a range of about 160MHz around 32.45GHz.
  • the oscillation frequency is also tuned by controlling the threshold voltage of the NMOS transistors by using the back- biasing technique. This is applied only to the bottom load NMOS transistors, as explained in connection with the differential oscillator circuits of Figs. 4 and 5, which correspond to the first and second oscillators of Figs. 7 and 8, respectively.
  • the same principle for the coarse frequency tuning as explained in connection with the differential oscillator circuits of Figs. 4 and 5 are applicable to the IQ oscillator circuits of Figs. 7 and 8.
  • the back- biasing voltage source controls only the bulk of the load transistors M3 and M4 of the differential oscillator of Figs. 4 and 5 and corresponding load transistors provided in the IQ oscillator versions of Figs. 7 and 8.
  • Fig. 10 shows a schematic diagram indicating oscillation frequency (vertical axis) as a function of back-biasing voltage (horizontal axis). This diagram indicates the tuning range as function of the back-biasing voltage. According to a specific example, a total variation of 1.2V, from -0.6V to 0.6V, in the back-biasing or bulk voltage leads to a nonlinear variation of the oscillation frequency by almost 2GHz, from 32.7GHz to 30.85GHz.
  • Fig. 11 shows a schematic diagram indicating tuning ranges of the IQ oscillator as a function of tuning current, for different back-biasing voltages. Again, the effect of the coarse and fine tuning mechanism can be seen. The tuning mechanism works as a "gear-box" by stepping coarsely with threshold voltage (back-biasing) control through fine intervals generated by the tuning current IT UN E-
  • Fig. 12 shows a schematic signal diagram of output differential signals out+ or out- for different back-biasing voltages.
  • the amplitude of the differential output signals out+ and out- is not strongly influenced by the biasing level of the transistor bulk.
  • the variation of the amplitude may be around 20OmV, when the bulk supply is modified from -0.6V (Reverse Back-Biasing (RBB)) to 0.6V (Forward Back-Biasing (FBB)).
  • RBM Reverse Back-Biasing
  • FBB Forward Back-Biasing
  • Fig. 13 shows a schematic diagram indicating phase noise (in dBc) as a function of back-biasing voltage (in V).
  • the biasing current (I BIAS ) and the tuning current (I TUNE ) have been set to 6mA, for an operating temperature of 90°C.
  • the phase noise increases by 9dBc.
  • the phase noise at IMHz has a nonlinear variation.
  • V bu ik between -0.6V and 0.3V
  • the phase noise increases linearly with only 3dBc. The phase noise thus increases with the back-bias voltage.
  • the threshold voltage is thus very effective for coarse tuning of the oscillation frequency, especially in the FBB mode, where the oscillation frequency is controlled within e.g. 1.2GHz (Fig. 10), but has a drawback of increasing the phase noise.
  • the coarse tuning conversion voltage steps should be set to 20OmV for RBB, and iteratively decreasing from 20OmV at 10OmV, and finally 5OmV, in order to cover all the FBB range, as it is presented in Fig. 11.
  • Fig. 14 shows a schematic diagram indicating phase noise (in dBc) as a function of tuning current I TUNE (in mA).
  • the phase noise has an optimum at a tuning current I TUNE of 4-5mA and after that starts to increase.
  • I TUNE the phase noise will decrease, but with the disadvantage of strongly increased power consumption.
  • the amplitudes of the output signal out+ or out- are small, which is not interesting for the concerned applications.
  • Fig. 15 shows a schematic diagram indicating phase noise (in dBc) as a function of biasing current IBIA S (in mA).
  • IBIA S biasing current
  • Fig. 16 shows a schematic diagram indicating oscillation frequency as a function of tuning current for different biasing currents I BIAS , while the bulk is tied to ground.
  • the range of the tuning current I TUNE is chosen between 6mA and 8mA. Changing the tuning current with 2mA increases the frequency by 160MHz. As can be seen here, the effect of increasing the biasing current I BIAS of the oscillator is not very important.
  • the most effective one is the coarse tuning by the threshold voltage control via back biasing.
  • the fine tuning can be obtained by changing the tuning current between 6mA and 8mA.
  • the bias current will be kept at 6mA or can be used as an alternative for fine tuning.
  • Fig. 17 shows a schematic circuit diagram of a conventional differential Colpitts oscillator with modified topology.
  • This modified second topology of an enhanced differential Colpitts oscillator has a modified structure where the gate voltages of the differential transistor stage are output via buffer transistors M5 and M6. The output signals out+ and out- are fed back (cross-coupled) via load transistors M3 and M4 to the differential transistor stage Ml, M2.
  • Fig. 18 shows a schematic circuit diagram of an improved differential Colpitts oscillator with modified topology according to a fifth preferred embodiment.
  • the threshold voltage of the modified load transistors M3 and M4 represents the main or coarse tuning mechanism. It is again achieved by biasing their P-wells (bulk) with a DC voltage source.
  • Another way of tuning of the oscillation frequency is obtained by supplying the middle point of a buffer coil L with a voltage e.g. between 0.9V and 1.2V, or by changing a DC bias current, I BIAS , in the lateral or differential branches.
  • the bulk control is applied only to the bottom NMOS transistors, M3 and M4.
  • the other NMOS transistors (Ml, M2, M5 and M6) have their bulks connected to their sources, due to the triple-well CMOS technology, which incorporate an deep-N-well which separates the P-wells, on which the NMOS transistors are built, from the die substrate.
  • an IQ oscillator can be obtained following the principle presented in Fig. 7.
  • Fig. 19 shows a schematic diagram indicating tuning ranges of the fifth preferred embodiment as a function of tuning current, for different back-biasing voltages. The effect of the above mentioned coarse and fine tuning mechanisms can be seen for the enhanced differential Colpitts oscillator as depicted in Fig. 18.
  • the proposed differential oscillators and IQ oscillators according to the first to fifth preferred embodiments may be adapted to be operated at 30GHz, for example, and may be designed and implemented in a triple-well CMOS (CMOS090 LP) process.
  • the transistor feature size may be 0.1 ⁇ m.
  • scaling the value of the tapped inductor can easily scale the oscillation frequency to other operation frequencies.
  • a coarse tuning may performed by changing the threshold voltage of the NMOS transistors, and a fine-tuning may be achieved by changing the value of the tuning current.
  • the proposed individual tuning mechanisms may be combined in any way and used other control strategies which differ from the described exemplary coarse and fine tuning mechanisms.
  • the frequency tuning mechanism comprises first frequency control circuitry for controlling the threshold voltage of respective load transistors of the differential oscillator circuit, and second frequency control circuitry for controlling at least one of a common-mode current flowing through branches of said differential oscillator circuit, a tail current of an additional feedback circuit cross-coupled between the drains of a differential transistor stage of said differential oscillator and respective gates of said load transistors, and a voltage applied at a middle point of a tapped coil of a resonating circuit of the differential oscillator circuit.
  • the tuning mechanism may for example work as a "gear-box" by stepping coarsely with the first frequency control circuitry through fine intervals generated by the second frequency control circuitry.
  • the first and second oscillator circuitry may be any kind of differential oscillator circuit.
  • any suitable control circuitry may be used for varying the threshold voltage, tuning current, biasing current and/or tap voltage in order to provide a suitable frequency control mechanism. The preferred embodiment may thus vary within the scope of the attached claims.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)

Abstract

La présente invention concerne un circuit oscillateur différentiel et un procédé permettant de contrôler la fréquence d'un signal oscillateur. Un mécanisme d'accord en fréquence amélioré est fourni pour contrôler la fréquence du signal oscillateur. Ce mécanisme d'accord en fréquence comprend un premier circuit de contrôle de fréquence permettant de contrôler la tension seuil de transistors de charge (M3, M4) respectifs du circuit oscillateur différentiel, ainsi qu'un second circuit de contrôle de fréquence permettant de contrôler un courant en mode commun (IBIAS) traversant des branches dudit circuit oscillateur différentiel et/ou un courant de queue (ITUNE) d'un circuit de réaction supplémentaire (M5, M6) couplé de manière transversale entre les drains d'un étage transistor différentiel (M1, M2) dudit oscillateur différentiel et les grilles respectives desdits transistors de charge (M3, M4) et/ou une tension appliquée en un point médian d'un enroulement à prises d'un circuit résonant du circuit oscillateur différentiel. Ainsi, une caractéristique d'accord fin linéaire peut être obtenue, le mécanisme d'accord pouvant, par exemple, fonctionner comme « boîte à vitesse » par modification grossière du premier circuit de contrôle de fréquence par intervalles fins générés par le second circuit de contrôle de fréquence.
PCT/IB2006/053403 2005-09-27 2006-09-20 Oscillateur sans varactor a capacite d'accord amelioree WO2007036849A1 (fr)

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EP05108911.8 2005-09-27

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103107811A (zh) * 2012-12-07 2013-05-15 南京邮电大学 一种低相位噪声电感电容压控振荡器

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0942531A2 (fr) * 1998-03-10 1999-09-15 Lucent Technologies Inc. Circuit oscillateur en CMOS commandé en tension

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0942531A2 (fr) * 1998-03-10 1999-09-15 Lucent Technologies Inc. Circuit oscillateur en CMOS commandé en tension

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
RAZAVI B: "SP 23.6: A 1.8GHZ CMOS VOLTAGE-CONTROLLED OSCILLATOR", IEEE INTERNATIONAL SOLID STATE CIRCUITS CONFERENCE, IEEE SERVICE CENTER, NEW YORK, NY, US, vol. 40, February 1997 (1997-02-01), pages 388 - 389, XP000753146, ISSN: 0193-6530 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103107811A (zh) * 2012-12-07 2013-05-15 南京邮电大学 一种低相位噪声电感电容压控振荡器
CN103107811B (zh) * 2012-12-07 2015-09-16 南京邮电大学 一种低相位噪声电感电容压控振荡器

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