WO2007010595A1 - Semiconductor device and method for manufacturing same - Google Patents
Semiconductor device and method for manufacturing same Download PDFInfo
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- WO2007010595A1 WO2007010595A1 PCT/JP2005/013238 JP2005013238W WO2007010595A1 WO 2007010595 A1 WO2007010595 A1 WO 2007010595A1 JP 2005013238 W JP2005013238 W JP 2005013238W WO 2007010595 A1 WO2007010595 A1 WO 2007010595A1
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- semiconductor device
- module substrate
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- substrate
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
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- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09127—PCB or component having an integral separable or breakable part
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/10598—Means for fastening a component, a casing or a heat sink whereby a pressure is exerted on the component towards the PCB
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0147—Carriers and holders
- H05K2203/0169—Using a temporary frame during processing
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/15—Position of the PCB during processing
- H05K2203/1545—Continuous processing, i.e. involving rolls moving a band-like or solid carrier along a continuous production path
Definitions
- the present invention relates to a semiconductor device and a manufacturing technique thereof, and particularly to a technique effective when applied to the manufacture of an IC card.
- Card-type information media such as IC cards and memory cards are small, thin, and lightweight, and thus are excellent in portability, portability, and convenience, and are widely used in various fields.
- An IC card is a card-type information medium in which an IC card chip is embedded in a cash card-sized plastic thin plate and information can be recorded, and is excellent in authenticity and tamper resistance.
- IC cards are, for example, credit cards, cash cards, ETC (Electronic Toll Collection system) system cards, commuter passes, mobile phone card or authentication cards, etc., such as finance, transportation, communication, distribution and authentication. It is becoming increasingly popular in fields where high security is required.
- FIG. 9 of Japanese Patent Laid-Open No. 2001-357376 has a configuration in which a SIM (Subscriber Identify Module) type card is fixed by providing a bridge at the opening of the frame card. It is disclosed.
- SIM Subscriber Identify Module
- a memory card is a card type information medium that employs a non-volatile memory (EEPROM, flash memory, etc.) as a storage medium, and is smaller than an IC card and writes large-capacity information at high speed. Can be read.
- memory cards are widely used as recording media for portable information devices that require portability such as digital cameras, notebook personal computers, portable music players, and portable telephones.
- Typical memory card standards include SD (Secure Digital) memory cards (standardized by the SD card association), miniSD, MMC (registered trademark of Multi Media Card, Infineon Technologies AG), RS — MMC (Reduced Size MMC).
- a memory card is described in, for example, International Publication No. 02Z099742A1 (Patent Document 2).
- Patent Document 2 For the purpose of improving security, a nonvolatile memory chip and a security card are described.
- a configuration of a memory card is disclosed that includes an IC card chip that can execute processing and a controller chip that controls the circuit operation of these chips.
- Patent Document 1 Japanese Patent Laid-Open No. 2001-357376
- Patent Document 2 Pamphlet of International Publication No. 02Z099742A1
- the present inventors have studied to improve the function of the IC card by mounting a nonvolatile memory chip on the IC card. As a result, the present inventors have found that how to efficiently manufacture an IC card is an important issue in the manufacturing process of an IC force loaded with a non-volatile memory chip! .
- An object of the present invention is to provide a technique capable of efficiently manufacturing an IC card on which a nonvolatile memory chip is mounted.
- a method of manufacturing a semiconductor device includes: (a) preparing a sheet-like multilayer printed circuit board (Print Circuit Board) in which a plurality of module boards are integrated; and (b) A step of mounting a semiconductor chip on a module substrate, (c) a step of electrically connecting the module substrate and the semiconductor chip, and (d) an individual module including the sheet-like laminated printed wiring board And a step of dividing the substrate into individual pieces.
- the step (d) is characterized in that the module substrate force is divided into pieces including the protruding holding portion.
- the module substrate divided into pieces is held on a tape substrate.
- a semiconductor device includes (a) a module substrate, (b) a semiconductor chip mounted on the module substrate, and (c) a holding portion protruding from the module substrate cover.
- the semiconductor chips mounted on the module substrate are connected in a tape shape.
- An IC card equipped with a nonvolatile memory chip can be efficiently manufactured.
- FIG. 1 is a plan view showing a manufacturing process of an IC card mounted with a nonvolatile memory chip in an embodiment of the present invention.
- FIG. 2 is a plan view showing the manufacturing process of the IC card on which the nonvolatile memory chip is mounted following FIG. 1.
- FIG. 3 is a plan view showing the manufacturing process of the IC card on which the nonvolatile memory chip is mounted following FIG. 2.
- FIG. 4 is a plan view showing the manufacturing process of the IC card on which the nonvolatile memory chip is mounted following FIG. 3.
- FIG. 5 is a plan view showing a module substrate provided with a holding portion.
- FIG. 6A is a plan view showing one surface of a module substrate provided with a holding portion
- FIG. 6B is a plan view showing the other surface of the module substrate provided with a holding portion.
- FIG. 7 is a perspective view showing a module substrate provided with a holding portion.
- FIG. 8 is a plan view showing a manufacturing process of the IC card on which the nonvolatile memory chip is mounted in the embodiment.
- FIG. 9 is a perspective view showing the manufacturing process of the IC card on which the nonvolatile memory chip is mounted following FIG. 8.
- FIG. 10 is a perspective view showing the manufacturing process of the IC card on which the nonvolatile memory chip is mounted following FIG. 9.
- FIG. 11 is a perspective view showing a manufacturing process of the IC card on which the nonvolatile memory chip is mounted following FIG. 10.
- FIG. 12 is a perspective view showing a manufacturing process of the IC card on which the nonvolatile memory chip is mounted following FIG. 11.
- FIG. 13 is a perspective view showing the manufacturing process of the IC card on which the nonvolatile memory chip is mounted following FIG. 12.
- FIG. 14 is a plan view showing one surface of an IC card on which a nonvolatile memory chip is mounted.
- FIG. 15 is a plan view showing the other surface of the IC card on which the nonvolatile memory chip is mounted.
- FIG. 16 is a diagram showing an example of a circuit configuration of an IC card chip.
- FIG. 17 is a diagram showing an example of a circuit configuration of a controller chip.
- FIG. 18 is a diagram for explaining an example in which the method for connecting the separated module substrate and the tape substrate is changed.
- FIG. 19 is a diagram illustrating an example in which the shape of the holding portion provided on the separated module substrate is a T-shape.
- FIG. 20 is a cross-sectional view showing a cross section taken along line AA in FIG.
- FIG. 21 (a) is a cross-sectional view showing one process for realizing the connection shown in FIG. 19, and (b) is a cross-sectional view showing a process following (a).
- FIG. 22 is a perspective view showing an example in which a step (offset) is provided in the holding portion of the tape substrate.
- FIG. 23 is a perspective view showing another connection method of the module substrate holding unit and the tape substrate holding unit.
- the number of elements when referring to the number of elements (including the number, numerical value, quantity, range, etc.), it is particularly limited to a specific number when clearly indicated and in principle. Except in some cases, the number is not limited to the specific number, and may be a specific number or more.
- a rigid substrate 2 is prepared in which a plurality of module substrates 1 (hatched /!) Are integrated.
- a laminated printed circuit board is referred to as a rigid board.
- the rigid substrate 2 is excellent in the formation of multilayer wiring and fine wiring, and is formed of, for example, glass epoxy resin.
- the nonvolatile memory chip 3 and the controller chip 4 are stacked and mounted on the individual module substrates 1 formed on the rigid substrate 2.
- the non-volatile memory chip 3 is formed with a rewritable non-volatile memory such as a flash memory
- the controller chip 4 is formed with a circuit for controlling a write operation and a read operation of the non-volatile memory. Yes.
- the nonvolatile memory chip 3 and the controller chip 4 are mounted at a position according to one side of the module substrate 1 that is not in the center of the module substrate 1. This is because the IC card chip is also efficiently mounted on the module substrate 1 as described later. For example, as shown in FIG.
- the nonvolatile memory chip 3 and the controller chip 4 are mounted in a region opposite to the region where the corner portion chamfered with respect to the center of the module substrate 1 is provided.
- the area for mounting the IC card chip is secured on the top. By securing an area for mounting an IC card chip in this way, a large-sized nonvolatile memory chip can be efficiently arranged.
- the nonvolatile memory chip 3 and the module substrate 1 are electrically connected using a bonding wire 5.
- the controller chip 4 and the module substrate 1 are electrically connected using the bonding wires 5.
- the nonvolatile memory chip 3 and the controller chip 4 are electrically connected using bonding wires 5.
- bonding pads are formed on the non-volatile memory chip 3, the controller chip 4 and the module substrate 1, and the bonding wires 5 are connected to these bonding pads.
- the non-volatile memory chip 3 disposed in the lower layer does not use the bonding wire 5 but uses, for example, a bump substrate to form the module substrate 1 You may make it electrically connect with.
- the bonding wire 5 is made of, for example, a gold wire.
- the nonvolatile memory chip 3 and the controller chip 4 mounted on the module substrate 1 are sealed with a resin 6.
- the minimum area required for sealing the nonvolatile memory chip 3, the controller chip 4 and the bonding wire 5 is not limited to forming the resin 6 so as to cover the entire module substrate 1. Sealed with 6. That is, the module substrate 1 is partially sealed by the resin 6.
- components different from the nonvolatile memory chip 3 and the controller chip 4 such as an IC card chip are mounted on the module substrate 1, so that the IC card chip mounting area is sealed with the resin 6. This is because it is necessary to ensure it.
- an IC card chip is exemplified as a component different from the nonvolatile memory chip 3 and the controller chip 4.
- the present invention is not limited to this, and a passive element such as a capacitor may be provided as appropriate.
- a plurality of module substrates 1 formed integrally with the rigid substrate 2 are separated into individual module substrates 1.
- each module substrate 1 is cut so that the protruding holding portions 7 remain.
- one feature is that the module board 1 is separated into pieces including the projecting holding portions 7 at the upper and lower portions of the module board 1 rather than the individual module board 1 alone. is there.
- a rigid substrate with an integrated module substrate is used. And after mounting a non-volatile memory chip on each module substrate of a rigid substrate, it seals and separates into each module substrate.
- the separated module board is shipped as a product to the IC card manufacturer. In this way, when using the existing non-volatile memory production line, it is desirable to ship individual module boards.
- an IC card is manufactured using a tape-shaped substrate.
- the IC card production line has a COT (Chip On Tape) structure in which an IC card chip is mounted on the continuous tape substrate.
- COT Chip On Tape
- the existing IC card production line even if an individual module board is carried in, an IC card chip cannot be mounted on the individual module board. In other words, it is desirable not to divide the module board into individual IC card production lines. Thus, the product form of the product delivered between the manufacturing companies becomes a problem.
- the module substrate 1 on which the nonvolatile memory chip 3 is mounted when the module substrate 1 on which the nonvolatile memory chip 3 is mounted is separated, the module substrate 1 including the protruding holding portions 7 at the upper and lower portions is separated. Like to do. By doing so, as will be described later, it is possible to solve the problem of the product form of the product delivered between the manufacturing companies. For this reason, it is possible to efficiently manufacture an IC card equipped with the nonvolatile memory chip 3 using an existing manufacturing line at each manufacturing company.
- FIG. 6 is a diagram showing the external appearance of the module substrate 1 that is separated into pieces including the holding unit 7. Fig 6
- FIG. 6 (a) is a view of the surface of the module substrate 1 in the present embodiment.
- a mold region covered with a resin 6 and an electrode (IC card chip mounting pattern) 8 are formed on the surface of the module substrate 1 in the present embodiment.
- IC card chip mounting area on the surface of the module substrate 1 in the present embodiment.
- FIG. 6B is a view of the back surface of the module substrate 1 in the present embodiment.
- an IC card back electrode (ISO electrode 9) connected to the electrode 8 is formed on the back surface of the module substrate 1 in the present embodiment.
- an extended electrode 10 connected to the nonvolatile memory chip 3 and the controller chip 4 covered with the resin 6 is formed.
- FIG. 7 is a perspective view showing the module substrate 1 singulated including the holding unit 7. As shown in FIG.
- a non-volatile memory chip 3 is mounted on the module substrate 1, and a controller chip 4 is mounted on the non-volatile memory chip 3.
- the nonvolatile memory chip 3 and the controller chip 4 are connected to the module substrate 1 via bonding wires 5.
- a resin 6 is formed so as to cover the nonvolatile memory chip 3 and the controller chip 4.
- an electrode 8 is formed in a region not covered with the resin 6.
- An IC card chip mounting area 11 is formed between the electrodes 8.
- a conductor pattern 12 made of a conductor film is formed on the holding portion 7 on the IC card chip mounting area 11 side.
- the conductor pattern 12 is formed of, for example, a gold film, and is formed to improve the releasability of the resin formed on the gate when the IC card chip described later is molded. Further, the conductor pattern 12 is provided so as to extend to the inner side (center side of the module substrate 1) than the outer periphery of the module substrate 1 excluding the holding portion 7. By forming the conductor pattern 12 in this way, the above-described exfoliation of the resin can be further prevented.
- the electrical characteristic inspection of the nonvolatile memory chip 3 and the like takes a long test time, but by processing a plurality of separated module substrates 1 in parallel, the non-defective product or defective product is selected. This improves the efficiency of the inspection of physical characteristics.
- the holding unit 7 is provided on the singulated module substrate 1.
- the holding unit 7 is provided, and an existing characteristic test for inspecting the electrical characteristics of the module substrate is performed.
- the electrical characteristics of the module substrate 1 provided with the holding portion 7 can be inspected by using a handler or test socket for transferring the module substrate in common or by making small changes. For this reason, the electrical property inspection can be efficiently performed using the existing production line.
- a heat-resistant tape substrate 13 such as stainless steel is prepared.
- the tape substrate 13 is provided with a plurality of module substrate mounting areas, for example, by punching a hoop material to provide a space.
- a holding portion 14 is provided so as to protrude into the module substrate mounting area of the tape substrate 13.
- the separated module substrate 1 is connected to the tape substrate 13 configured as described above.
- the holding portion 7 provided on the module substrate 1 is disposed on the holding portion 14 provided on the tape substrate 13, and the holding portion 14 is bent (see FIG. 9).
- the holding part 7 and the holding part 14 are mechanically connected by caulking. As a result, a plurality of individual module substrates 1 can be connected to the tape substrate 13.
- a plurality of individual module substrates 1 can be mounted on one tape substrate 13. That is, by providing the holding portion 7 on the module substrate 1 that has been separated, the module substrate 1 that has been separated once can be easily mounted on the tape substrate 13 again.
- the steps up to here are performed on a manufacturing line of a manufacturing company that manufactures a nonvolatile memory. In a production line in which the nonvolatile memory chip 3 is mounted on the module substrate 1, the module substrate 1 is separated into individual pieces, and then the module is mounted on the tape substrate 13 again using the holding portion 7 provided on the module substrate 1. Board 1 is connected.
- the module substrate 1 By mounting the module substrate 1 on the tape substrate 13 in this manner, the module substrate 1 can be shipped in the form of a tape to the production line of the manufacturer that manufactures the IC card. As a result, the problem of the product form of the product delivered between the manufacturing companies can be solved.
- the module substrate 1 is connected to the tape substrate 13 so that the module substrate 1 is separated into individual pieces and then shipped again in a tape form. Therefore, in the nonvolatile memory production line, it is conceivable that the module substrate 1 is not separated into individual pieces, but is shipped after the process is performed integrally with the rigid substrate 2.
- the following inconvenience arises if the module substrate 1 is not separated. That is, the electrical characteristic inspection of the nonvolatile memory basically has many test items and a long test time. For this reason, the module substrate 1 is separated into pieces, and a plurality of nonvolatile memories are simultaneously inspected in parallel. According to this method, when a defective product is found, the defective product is removed at that time, and a new module substrate 1 can be set in the vacant test socket by removing the defective product. For this reason, the electrical characteristic inspection can be performed efficiently.
- the electrical characteristics can be inspected only in series for the nonvolatile memories arranged in a tape shape. Inefficient with memory.
- the electrical property inspection is performed in the state of the individual module substrate 1! /, So the electrical property inspection is performed in the state of the integrated rigid substrate 2. To implement it, it is necessary to change the configuration to be different from the existing production line. For this reason, it is necessary to divide the module substrate 1 into pieces in the nonvolatile memory production line.
- the present invention is not limited to this.
- the structure of a heat-resistant resin sheet or heat-resistant paper paper is used. You may do it.
- Heat resistance is required for the material of the tape substrate 13 because the tape substrate 13 must withstand the heating when sealing the IC card chip mounted on the module substrate 1 in the IC card manufacturing line described later. There is also some power. Therefore, the material of the tape substrate 13 is required to have heat resistance enough to withstand the heating when sealing the IC card chip.
- a resin sheet, heat-resistant paper or non-woven cloth is used as the tape substrate 13, the connection between the tape substrate 13 and the separated module substrate 1 is not a mechanical connection.
- an adhesive is used. It can be a connection. Further, instead of an adhesive, a tape-like substrate can be fused and connected.
- IC force chip 15 is mounted on each module substrate 1 connected to tape substrate 13.
- the IC card chip 15 is mounted in the IC card chip mounting area of the module substrate 1.
- the IC card chip 15 and the electrode 8 are electrically connected using a bonding wire 16.
- the bonding wire 16 is made of, for example, a gold wire.
- the IC card chip 15 and the bonding wire 16 are sealed with a resin 17.
- Sealing with the resin 17 can use, for example, a transfer molding method.
- the runner Z gate portion into which the resin 17 flows can be formed in the holding portion 7 of the module substrate 1.
- the conductor pattern 12 made of a gold film is formed on the holding portion 7, the releasability of the resin 17 formed on the runner Z gate portion of the holding portion 7 is improved.
- the resin 17 is, for example, injected into the runner Z gate portion formed in the holding portion 7 from the upper direction of the module substrate 1. It is formed so as to cover the IC card chip 15 mounted on the module substrate 1 from the cover part cover.
- the individual module substrates 1 are separated from the tape substrate 13 to which the module substrate 1 is connected. At this time, the module substrate 1 is cut at the connection portion between the holding unit 7 and the module substrate 1.
- a cutting method for cutting both the module substrate 1 and the resin 17 for example, a method using a mold, a water jet method, or a cutting method using a diamond saw can be used.
- FIGS. 14 and 15 an IC card as shown in FIGS. 14 and 15 can be manufactured by embedding the module substrate 1 singulated into a plastic card substrate 18.
- FIG. 14 is a view showing one side of the completed IC card
- FIG. 15 is a view showing the side opposite to FIG.
- the sealing portion in the region where the nonvolatile memory chip and its controller are mounted is separated from the sealing portion in the region where the IC card chip is mounted.
- a nonvolatile memory chip is mounted on a module substrate on a nonvolatile memory production line, and the module substrate is separated into pieces.
- the module substrate is provided with a holding portion, and after the electrical characteristic inspection is performed, the module substrate is connected to the tape substrate using the holding portion.
- the module board integrated in a tape shape is shipped to the IC card production line.
- the IC card is manufactured using a module substrate integrated in a tape shape. Therefore, since existing facilities can be used in both the nonvolatile memory production line and the IC card production line, an IC card equipped with the nonvolatile memory can be efficiently produced. Ie
- the existing nonvolatile memory production line individual module boards are shipped, and in the existing IC card production line, a module board integrated in a tape shape is used. IC card is manufactured. At this time, when transferring the module substrate from the nonvolatile memory production line to the IC card production line, it is desirable to deliver the module substrate with a tape substrate in which the module substrate is integrated, but the module substrate is separated into pieces. Because It becomes a problem. However, in the present embodiment, the separated module substrate is integrated with the tape substrate by the holding portion. Therefore, after performing the process by the non-volatile memory production line, a plurality of module substrates are provided. The module board can be delivered to the IC card production line in a tape-like state.
- IC card chip 20 (corresponding to IC card chip 15 in FIG. 10), nonvolatile memory chip 21 (corresponding to nonvolatile memory chip 3 in FIG. 7), and controller chip 22 (controller chip in FIG. 7) 4) will be described.
- a nonvolatile memory circuit such as a flash memory capable of electrically erasing and writing data is formed on the main surface of the nonvolatile memory chip 21, for example.
- the storage capacity of the nonvolatile memory chip 21 is larger than that of the memory parts of the other IC card chip 20 and controller chip 22.
- the bonding node on the main surface of the nonvolatile memory chip 21 is electrically connected to the module substrate through bonding wires.
- the bonding wire also has, for example, gold (Au) fine wire equal force.
- a plurality of memory cells constituting the memory circuit of the non-volatile memory chip 21 increase the threshold voltage when electrons are injected into, for example, the floating gate of the memory cell, and also pull out the electrons at the floating gate.
- the memory cell stores information corresponding to the level of the threshold voltage with respect to the word line voltage for reading data.
- the threshold voltage of the memory cell transistor is low, the state is the erase state, and the state is the high state.
- an IC card microcomputer circuit On the main surface of the IC card chip 20, for example, an IC card microcomputer circuit is formed.
- This IC card microcomputer circuit has a function as a security controller. For example, it is an ISOZIEC 15408 evaluation / certification body that can be used for electronic payment services. Authenticated function by is realized.
- This IC card microcomputer circuit is, for example, CPU (Central Processing Unit), Mask ROM (Read Only Memory), RAM (Random Access Memory), EEPROM (Electrically Erasable Programmable ROM) and other arithmetic circuits It has the integrated circuit like.
- the mask ROM stores, for example, execution programs and encryption algorithms.
- the RAM has a function as a memory for data processing, for example.
- the EEPROM also functions as a data storage memory.
- the IC card on which this IC card chip 20 is mounted sends a predetermined authentication certificate stored in the EEPROM and is subject to subsequent authentication on the condition that authentication is obtained. Communication processing is now possible.
- Such a security processing operation program is owned by Mask ROM!
- FIG. 16 shows an example of an IC card microcomputer circuit in the IC card chip 20.
- IC card microcomputer circuit is CPU20a, RAM20b as work RAM, timer 20c, EEPRO M20d, coprocessor unit 20e, mask ROM20f, system control logic 20g, I / O port (IZO port) 20h, data bus 20i and address bus 20j have.
- the mask ROM 20f is used to store an operation program (encryption program, decryption program, interface control program, etc.) and data of the CPU 20a.
- the RAM 20b is a work area of the CPU 20a or a temporary storage area for data, and is composed of, for example, SRAM or DRAM.
- the system control logic 20g decodes this and causes the CPU 20a to execute a processing program necessary for executing the command. That is, the CPU 20a fetches an instruction by accessing the mask ROM 20f at an address instructed by the system control logic 20g, decodes the fetched instruction, and performs operand fetch and data operation based on the decoding result.
- the coprocessor unit 20e performs a remainder calculation process in RSA or elliptic curve cryptography according to the control of the CPU 20a.
- the IZO port 20h has a 1-bit input / output terminal IZO, and is also used for data input / output and external interrupt signal input.
- the I / O port 20h is coupled to the data bus 20i and is connected to the data bus 20i.
- CPU 20a, RAM 20b, timer 20c, EEPROM 20d and coprocessor The subunit 20e etc. are electrically connected.
- the system control logic 20g controls the operation mode and interrupt of the IC card microcomputer circuit, and further includes a random number generation logic used to generate an encryption key.
- the IC card microcomputer circuit is initialized, and the CPU 20a starts executing the instruction from the start address of the program in the EEPROM 20d.
- the IC card microcomputer circuit operates in synchronization with the clock signal CLK.
- the EEPROM 20d is electrically erasable and writable, and is used as an area for storing data such as ID (Identification) information and an authentication certificate used for identifying an individual.
- a flash memory or a ferroelectric memory may be used instead of the EEPRPM20d.
- the IC card microcomputer circuit supports a contact interface that uses an external terminal to interface with the outside.
- an interface controller circuit is formed on the main surface of the controller chip 22.
- the interface controller circuit has a function of controlling an external interface operation and a memory interface operation in accordance with a control mode according to an instruction from the outside or a setting determined in advance inside.
- the function of the interface controller circuit recognizes the memory card interface control mode according to the state of commands and buses exchanged with external devices via the external connection terminals. It also switches the bus width according to the recognized memory card interface control mode and converts the data format according to the recognized memory card interface control mode. Furthermore, it performs a power-on reset function, interface control with the IC card microcomputer circuit in the IC card chip 20, interface control with the memory circuit in the nonvolatile memory chip 21, power supply voltage conversion, and the like. These operations may be performed in whole or in part depending on the purpose of use.
- FIG. 17 shows an example of the interface controller circuit 22.
- a memory circuit 21a in FIG. 17 indicates a memory circuit formed in the nonvolatile memory chip 21.
- the interface controller circuit 22 has a host interface circuit 22a, a micro computer 22b, a flash controller 22c, a buffer controller 22d, a buffer memory 22e, and an IC card interface circuit 22f.
- the buffer memory 22e is composed of DRAM or SRAM.
- IC card interface circuit 22f has IC card microcomputer Circuit 20 is electrically connected.
- the microcomputer 22b has a CPU (central processing unit) 2 2b 1, a program memory (PGM) 22b2 that holds an operation program for the CPU 22bl, a work memory (WRAM) 22b3 used for a work area of the CPU 22bl, and the like.
- the host interface circuit 22a detects the issuance of a memory card initialize command or the like, the host interface circuit 22a makes it possible to execute an interface control mode control program corresponding to the microcomputer 22b by an interrupt.
- the microcomputer 22b controls the external interface operation by the host interface circuit 22a by executing its control program. It also controls access (write, erase and read operations) and data management to the memory circuit 21a by the flash controller 22c, and the data format specific to the memory card by the buffer controller 22d and the common data format for the memory. Controls format conversion between.
- the data read from the memory circuit 21a or the data written to the memory circuit 21a is temporarily stored in the nother memory 22e.
- the flash controller 22c can operate the memory circuit 21a as a hard disk compatible file memory and manage data in units of sectors.
- the flash controller 22c includes an ECC circuit (not shown), adds an ECC code when storing data in the memory circuit 21a, and performs error detection and correction processing using the ECC code on the read data. It is also possible to omit the IC card interface 22f according to the purpose of use.
- FIG. 18 is a diagram for explaining an example in which the method of connecting the separated module substrate 1 and the tape substrate 13 is changed.
- FIG. 9 shows an example in which the holding portion 7 provided on the module substrate 1 is connected to the upper portion of the holding portion 14 provided on the tape substrate 13.
- the holding part 7 provided on the module substrate 1 is connected so as to be covered with the holding part 14 provided on the tape substrate 13.
- the tape substrate 13 is made of a metal material such as stainless steel, for example, it is possible to prevent grease leakage even if a runner Z-gate is formed on the tape substrate 13 with high processing accuracy. It is. Note that, since the holding portion 7 formed on the module substrate 1 is made of, for example, a resin, the variation in the thickness becomes large. For this reason, when sealing with grease, it is necessary to prevent leakage of grease by suppressing it with a movable plate that absorbs variations in thickness from the back side of the holding portion 7.
- FIG. 19 is a diagram for explaining an example in which the shape of the holding portion 7 provided on the separated module substrate 1 is a letter shape.
- through-holes 26 are provided in a T-shaped holding portion 7, and individual module substrates 1 are connected by passing connection members 27 through the through-holes 26. Even with this configuration, it is possible to force the module substrate 1 together.
- the configuration shown in FIG. 19 has an advantage that it is not necessary to prepare a new tape substrate because the holding unit 7 itself has a role as a tape substrate in which the holding unit 7 is integrated.
- the connecting member 27 can also constitute a metal material force, for example.
- the holding portion 7 is provided with a transport hole 26a.
- FIG. 20 is a cross-sectional view showing a cross section taken along line AA in FIG. As shown in FIG. 20, it can be seen that the connecting member 27 is inserted into the through hole 26 provided in the holding portion 7 and is pressed. A method of connecting the holding portion 7 provided with the through hole 26 with the connecting member 27 will be described with reference to FIG. As shown in FIG. 21 (a), a U-shaped connecting member 27 is inserted into through holes 26 formed in different holding portions 7. Then, as shown in FIG. 21 (b), the upper part of the inserted connecting member 27 is bent to caulk the connecting member 27. In this way, a plurality of module substrates can be connected using the T-shaped holding portion 7.
- FIG. 22 is a view showing an example in which a step (offset) 28 is provided in the holding portion 14 of the tape substrate 13.
- a step (offset) 28 is provided in the holding portion 14 of the tape substrate 13.
- the step 28 increases the thickness of the holding portion of the module substrate when the holding portion of the module substrate and the holding portion 14 of the tape substrate 13 are connected. Since absorption is possible, the surface of the module substrate and the height of the tape substrate 13 can be aligned.
- FIG. 23 is a diagram showing another method of connecting the holding unit 7 of the module substrate 1 and the holding unit 14 of the tape substrate 13. As shown in FIG. 23, a through hole 29 is provided in the holding portion 7 provided in the module substrate 1. Then, the protruding holding portion 14 is inserted into the through hole 29. Then, the holding part 7 and the holding part 14 are connected by bending. With this configuration, a plurality of module substrates 1 can be connected to the tape substrate 13.
- the present invention can be widely used in the manufacturing industry for manufacturing IC cards equipped with nonvolatile memory chips.
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Abstract
A technology for efficiently manufacturing an IC card having a nonvolatile memory chip mounted thereon. A nonvolatile memory chip is mounted on a module substrate (1) on a nonvolatile memory manufacturing line, and the memory chip is sealed with a resin (6). Then, the module substrate (1) is separated into each piece. At this time, the module substrate (1) is provided with a holding section (7), and after electrical characteristic inspection is performed, the module substrate (1) is connected to a tape board (13) by using the holding section (7). Then, the module substrates (1) integrated in a tape-shape are shipped to the IC card manufacturing line. On the IC card manufacturing line, the IC cards are manufactured by using the module substrates (1) integrated in the tape-shape.
Description
明 細 書 Specification
半導体装置およびその製造方法 Semiconductor device and manufacturing method thereof
技術分野 Technical field
[0001] 本発明は、半導体装置およびその製造技術に関し、特に、 ICカードの製造に適用 して有効な技術に関するものである。 TECHNICAL FIELD [0001] The present invention relates to a semiconductor device and a manufacturing technique thereof, and particularly to a technique effective when applied to the manufacture of an IC card.
背景技術 Background art
[0002] ICカードやメモリカードなどのようなカード型情報媒体は、小型で薄く軽量なため、 携帯性、可搬性および利便性に優れ、様々な分野での普及が進められている。 [0002] Card-type information media such as IC cards and memory cards are small, thin, and lightweight, and thus are excellent in portability, portability, and convenience, and are widely used in various fields.
[0003] ICカードは、キャッシュカードサイズのプラスチック製薄板に ICカードチップを埋め 込み、情報を記録可能にしたカード型情報媒体であり、認証性および耐タンパ一性 に優れている。このため、 ICカードは、例えば、クレジットカード、キャッシュカード、 E TC (Electronic Toll Collection system)システム用カード、定期券、携帯電話機用力 ードまたは認証カードなど、金融、交通、通信、流通および認証などの高いセキユリテ ィ性が要求される分野での普及が進んで 、る。 [0003] An IC card is a card-type information medium in which an IC card chip is embedded in a cash card-sized plastic thin plate and information can be recorded, and is excellent in authenticity and tamper resistance. For this reason, IC cards are, for example, credit cards, cash cards, ETC (Electronic Toll Collection system) system cards, commuter passes, mobile phone card or authentication cards, etc., such as finance, transportation, communication, distribution and authentication. It is becoming increasingly popular in fields where high security is required.
[0004] ICカードについて、例えば、特開 2001— 357376号公報(特許文献 1)の図 9には 、枠カードの開口部にブリッジを設けて SIM (Subscriber Identify Module)型カードを 固定した構成が開示されている。 Regarding the IC card, for example, FIG. 9 of Japanese Patent Laid-Open No. 2001-357376 (Patent Document 1) has a configuration in which a SIM (Subscriber Identify Module) type card is fixed by providing a bridge at the opening of the frame card. It is disclosed.
[0005] 一方、メモリカードは、記憶媒体として不揮発性メモリ(EEPROM、フラッシュメモリ 等)を採用するカード型情報媒体であり、 ICカードよりも小型で、かつ、大容量の情報 を高速で書き込みあるいは読み出しすることができる。このため、メモリカードは、例え ば、デジタルカメラ、ノート型パーソナルコンピュータ、携帯型音楽プレーヤ、携帯電 話機などのような可搬性が要求される携帯型情報機器の記録メディアとして普及して いる。代表的なメモリカード規格には、 SD (Secure Digital)メモリカード(SDカード協 会で規格化された規格がある)、 miniSD、 MMC (Multi Media Card, Infineon Te chnologiesAGの登録商標である)、 RS— MMC (Reduced Size MMC)などがある。 [0005] On the other hand, a memory card is a card type information medium that employs a non-volatile memory (EEPROM, flash memory, etc.) as a storage medium, and is smaller than an IC card and writes large-capacity information at high speed. Can be read. For this reason, memory cards are widely used as recording media for portable information devices that require portability such as digital cameras, notebook personal computers, portable music players, and portable telephones. Typical memory card standards include SD (Secure Digital) memory cards (standardized by the SD card association), miniSD, MMC (registered trademark of Multi Media Card, Infineon Technologies AG), RS — MMC (Reduced Size MMC).
[0006] メモリカードについては、例えば、国際公開第 02Z099742A1号 (特許文献 2)に 記載があり、セキュリティ性の向上を目的として、不揮発性メモリチップと、セキュリティ
処理を実行可能な ICカードチップと、これらのチップの回路動作を制御するコント口 ーラチップとを備えるメモリカードの構成が開示されている。 [0006] A memory card is described in, for example, International Publication No. 02Z099742A1 (Patent Document 2). For the purpose of improving security, a nonvolatile memory chip and a security card are described. A configuration of a memory card is disclosed that includes an IC card chip that can execute processing and a controller chip that controls the circuit operation of these chips.
特許文献 1:特開 2001— 357376号公報 Patent Document 1: Japanese Patent Laid-Open No. 2001-357376
特許文献 2:国際公開第 02Z099742A1号パンフレット Patent Document 2: Pamphlet of International Publication No. 02Z099742A1
発明の開示 Disclosure of the invention
発明が解決しょうとする課題 Problems to be solved by the invention
[0007] ここで、本発明者らは、 ICカードに不揮発性メモリチップを搭載することで、 ICカー ドの機能向上を図ることを検討した。その結果、不揮発性メモリチップを搭載した IC力 ードの製造工程にお!/、て、如何に効率よく ICカードを製造するかが重要な課題であ ることを本発明者らは見出した。 Here, the present inventors have studied to improve the function of the IC card by mounting a nonvolatile memory chip on the IC card. As a result, the present inventors have found that how to efficiently manufacture an IC card is an important issue in the manufacturing process of an IC force loaded with a non-volatile memory chip! .
[0008] 本発明の目的は、不揮発性メモリチップを搭載した ICカードを効率よく製造できる 技術を提供することにある。 [0008] An object of the present invention is to provide a technique capable of efficiently manufacturing an IC card on which a nonvolatile memory chip is mounted.
[0009] 本発明の前記ならびにその他の目的と新規な特徴は、本明細書の記述および添 付図面から明らかになるであろう。 [0009] The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.
課題を解決するための手段 Means for solving the problem
[0010] 本願において開示される発明のうち、代表的なものの概要を簡単に説明すれば、 次のとおりである。 [0010] Among the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.
[0011] 本発明による半導体装置の製造方法は、 (a)複数のモジュール基板を一体ィ匕した シート状の積層のプリント配線基板 (Print Circuit Board)を用意する工程と、(b)個々 の前記モジュール基板上に半導体チップを搭載する工程と、(c)前記モジュール基 板と前記半導体チップとを電気接続する工程と、 (d)前記シート状の積層のプリント 配線基板カゝら個々の前記モジュール基板を個片化する工程とを備える。そして、前 記 (d)工程は、前記モジュール基板力も突出した保持部も含めて個片化することを特 徴とするちのである。 [0011] A method of manufacturing a semiconductor device according to the present invention includes: (a) preparing a sheet-like multilayer printed circuit board (Print Circuit Board) in which a plurality of module boards are integrated; and (b) A step of mounting a semiconductor chip on a module substrate, (c) a step of electrically connecting the module substrate and the semiconductor chip, and (d) an individual module including the sheet-like laminated printed wiring board And a step of dividing the substrate into individual pieces. The step (d) is characterized in that the module substrate force is divided into pieces including the protruding holding portion.
[0012] 更に必要に応じて、(e)個片化した前記モジュール基板をテープ基板に保持するこ とを特徴とするものである。 [0012] Further, according to need, (e) the module substrate divided into pieces is held on a tape substrate.
[0013] また、本発明による半導体装置は、 (a)モジュール基板と、 (b)前記モジュール基板 上に搭載された半導体チップと、 (c)前記モジュール基板カゝら突出した保持部とを備
えるものである。 [0013] Further, a semiconductor device according to the present invention includes (a) a module substrate, (b) a semiconductor chip mounted on the module substrate, and (c) a holding portion protruding from the module substrate cover. It is what
[0014] 更に必要に応じて、前記モジュール基板に搭載された半導体チップがテープ状に 連結されたものであることを特徴とするものである。 [0014] Further, if necessary, the semiconductor chips mounted on the module substrate are connected in a tape shape.
発明の効果 The invention's effect
[0015] 本願において開示される発明のうち、代表的なものによって得られる効果を簡単に 説明すれば以下のとおりである。 [0015] The effects obtained by typical ones of the inventions disclosed in the present application will be briefly described as follows.
[0016] 不揮発性メモリチップを搭載した ICカードを効率よく製造できる。 [0016] An IC card equipped with a nonvolatile memory chip can be efficiently manufactured.
図面の簡単な説明 Brief Description of Drawings
[0017] [図 1]本発明の実施の形態における不揮発性メモリチップを搭載した ICカードの製造 工程を示した平面図である。 FIG. 1 is a plan view showing a manufacturing process of an IC card mounted with a nonvolatile memory chip in an embodiment of the present invention.
[図 2]図 1に続く不揮発性メモリチップを搭載した ICカードの製造工程を示した平面 図である。 FIG. 2 is a plan view showing the manufacturing process of the IC card on which the nonvolatile memory chip is mounted following FIG. 1.
[図 3]図 2に続く不揮発性メモリチップを搭載した ICカードの製造工程を示した平面 図である。 FIG. 3 is a plan view showing the manufacturing process of the IC card on which the nonvolatile memory chip is mounted following FIG. 2.
[図 4]図 3に続く不揮発性メモリチップを搭載した ICカードの製造工程を示した平面 図である。 FIG. 4 is a plan view showing the manufacturing process of the IC card on which the nonvolatile memory chip is mounted following FIG. 3.
[図 5]保持部を設けたモジュール基板を示す平面図である。 FIG. 5 is a plan view showing a module substrate provided with a holding portion.
[図 6] (a)は、保持部を設けたモジュール基板の一面を示した平面図であり、 (b)は、 保持部を設けたモジュール基板の他面を示した平面図である。 FIG. 6A is a plan view showing one surface of a module substrate provided with a holding portion, and FIG. 6B is a plan view showing the other surface of the module substrate provided with a holding portion.
[図 7]保持部を設けたモジュール基板を示す斜視図である。 FIG. 7 is a perspective view showing a module substrate provided with a holding portion.
[図 8]実施の形態における不揮発性メモリチップを搭載した ICカードの製造工程を示 す平面図である。 FIG. 8 is a plan view showing a manufacturing process of the IC card on which the nonvolatile memory chip is mounted in the embodiment.
[図 9]図 8に続く不揮発性メモリチップを搭載した ICカードの製造工程を示した斜視 図である。 FIG. 9 is a perspective view showing the manufacturing process of the IC card on which the nonvolatile memory chip is mounted following FIG. 8.
[図 10]図 9に続く不揮発性メモリチップを搭載した ICカードの製造工程を示した斜視 図である。 FIG. 10 is a perspective view showing the manufacturing process of the IC card on which the nonvolatile memory chip is mounted following FIG. 9.
[図 11]図 10に続く不揮発性メモリチップを搭載した ICカードの製造工程を示した斜 視図である。
[図 12]図 11に続く不揮発性メモリチップを搭載した ICカードの製造工程を示した斜 視図である。 FIG. 11 is a perspective view showing a manufacturing process of the IC card on which the nonvolatile memory chip is mounted following FIG. 10. FIG. 12 is a perspective view showing a manufacturing process of the IC card on which the nonvolatile memory chip is mounted following FIG. 11.
[図 13]図 12に続く不揮発性メモリチップを搭載した ICカードの製造工程を示した斜 視図である。 FIG. 13 is a perspective view showing the manufacturing process of the IC card on which the nonvolatile memory chip is mounted following FIG. 12.
[図 14]不揮発性メモリチップを搭載した ICカードの一面を示す平面図である。 FIG. 14 is a plan view showing one surface of an IC card on which a nonvolatile memory chip is mounted.
[図 15]不揮発性メモリチップを搭載した ICカードの他面を示す平面図である。 FIG. 15 is a plan view showing the other surface of the IC card on which the nonvolatile memory chip is mounted.
[図 16]ICカードチップの回路構成の一例を示した図である。 FIG. 16 is a diagram showing an example of a circuit configuration of an IC card chip.
[図 17]コントローラチップの回路構成の一例を示した図である。 FIG. 17 is a diagram showing an example of a circuit configuration of a controller chip.
[図 18]個片化されたモジュール基板とテープ基板との接続方法を変えた例について 説明した図である。 FIG. 18 is a diagram for explaining an example in which the method for connecting the separated module substrate and the tape substrate is changed.
[図 19]個片化されたモジュール基板に設けられている保持部の形状を T字形状にし た例にっ 、て説明した図である。 FIG. 19 is a diagram illustrating an example in which the shape of the holding portion provided on the separated module substrate is a T-shape.
[図 20]図 19の A— A線で切断した断面を示した断面図である。 FIG. 20 is a cross-sectional view showing a cross section taken along line AA in FIG.
[図 21] (a)は、図 19に示した接続を実現する一工程を示した断面図であり、(b)は、( a)に続く工程を示した断面図である。 FIG. 21 (a) is a cross-sectional view showing one process for realizing the connection shown in FIG. 19, and (b) is a cross-sectional view showing a process following (a).
[図 22]テープ基板の保持部に段差 (オフセット)を設けた例を示した斜視図である。 FIG. 22 is a perspective view showing an example in which a step (offset) is provided in the holding portion of the tape substrate.
[図 23]モジュール基板の保持部とテープ基板の保持部との他の接続方法を示した斜 視図である。 FIG. 23 is a perspective view showing another connection method of the module substrate holding unit and the tape substrate holding unit.
発明を実施するための最良の形態 BEST MODE FOR CARRYING OUT THE INVENTION
[0018] 以下の実施の形態においては便宜上その必要があるときは、複数のセクションまた は実施の形態に分割して説明するが、特に明示した場合を除き、それらはお互いに 無関係なものではなぐ一方は他方の一部または全部の変形例、詳細、補足説明等 の関係にある。 [0018] In the following embodiment, when necessary for the sake of convenience, the description will be divided into a plurality of sections or embodiments, but they are not independent of each other unless otherwise specified. One is related to some or all of the other modification, details, supplementary explanation, etc.
[0019] また、以下の実施の形態において、要素の数等 (個数、数値、量、範囲等を含む) に言及する場合、特に明示した場合および原理的に明らかに特定の数に限定される 場合等を除き、その特定の数に限定されるものではなぐ特定の数以上でも以下でも よい。 [0019] In the following embodiments, when referring to the number of elements (including the number, numerical value, quantity, range, etc.), it is particularly limited to a specific number when clearly indicated and in principle. Except in some cases, the number is not limited to the specific number, and may be a specific number or more.
[0020] さらに、以下の実施の形態において、その構成要素(要素ステップ等も含む)は、特
に明示した場合および原理的に明らかに必須であると考えられる場合等を除き、必 ずしも必須のものではな 、ことは言うまでもな 、。 [0020] Furthermore, in the following embodiments, the components (including element steps and the like) are special features. Needless to say, this is not absolutely necessary except in cases where it is clearly stated in principle and where it is clearly considered essential in principle.
[0021] 同様に、以下の実施の形態において、構成要素等の形状、位置関係等に言及す るときは、特に明示した場合および原理的に明らかにそうではないと考えられる場合 等を除き、実質的にその形状等に近似または類似するもの等を含むものとする。この ことは、上記数値および範囲についても同様である。 [0021] Similarly, in the following embodiments, when referring to the shape, positional relationship, and the like of components, etc., unless specifically stated or otherwise considered to be clearly not in principle, Those substantially including or similar to the shape or the like are included. The same applies to the above numerical values and ranges.
[0022] 本発明の実施の形態を図面に基づいて詳細に説明する。なお、実施の形態を説 明するための全図において、同一の部材には原則として同一の符号を付し、その繰 り返しの説明は省略する。なお、図を見やすくするため、平面図であってもハッチング を付す場合がある。 Embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted. In order to make the figure easier to see, even a plan view may be hatched.
[0023] 本実施の形態における ICカード (半導体装置)の製造方法について、図面を参照 しながら説明する。 A method for manufacturing an IC card (semiconductor device) in the present embodiment will be described with reference to the drawings.
[0024] まず、図 1に示すように、複数のモジュール基板 1 (斜線を付して!/、る)を一体化した リジッド基板 2を用意する。また、本実施の形態においては、積層のプリント配線基板 (Print Circuit Board)をリジット基板と表記する。リジッド基板 2は、多層配線や微細 配線の形成に優れており、例えば、ガラスエポキシ榭脂より形成されている。 First, as shown in FIG. 1, a rigid substrate 2 is prepared in which a plurality of module substrates 1 (hatched /!) Are integrated. In the present embodiment, a laminated printed circuit board is referred to as a rigid board. The rigid substrate 2 is excellent in the formation of multilayer wiring and fine wiring, and is formed of, for example, glass epoxy resin.
[0025] 続いて、図 2に示すように、リジッド基板 2に形成されている個々のモジュール基板 1 に不揮発性メモリチップ 3およびコントローラチップ 4を積層して搭載する。不揮発性メ モリチップ 3には、フラッシュメモリのように書き換え可能な不揮発性メモリが形成され ており、コントローラチップ 4には、不揮発性メモリの書き込み動作や読出し動作を制 御する回路などが形成されている。この不揮発性メモリチップ 3およびコントローラチ ップ 4は、モジュール基板 1の中央部ではなぐモジュール基板 1の片側によった位置 に搭載される。これは、後述するように、モジュール基板 1上に ICカードチップも効率 的に搭載するためである。例えば、不揮発性メモリチップ 3およびコントローラチップ 4 は、図 2に示すように、モジュール基板 1の中心に対して面取りされている角部がある 領域とは反対側の領域に搭載され、モジュール基板 1上に ICカードチップを搭載す る領域が確保されて ヽる。このように ICカードチップを搭載する領域を確保することで 、大型の不揮発性メモリチップを効率的に配置することができる。
[0026] 次に、図 3に示すように、不揮発性メモリチップ 3とモジュール基板 1とをボンディン グワイヤ 5を使用して電気接続する。同様に、コントローラチップ 4とモジュール基板 1 とをボンディングワイヤ 5を使用して電気接続する。さらに、必要に応じて、不揮発性 メモリチップ 3とコントローラチップ 4とをボンディングワイヤ 5を用いて電気接続する。 ここで、図示はしていないが、不揮発性メモリチップ 3、コントローラチップ 4およびモ ジュール基板 1には、ボンディングパッドがそれぞれ形成されており、これらのボンデ イングパッド上にボンディングワイヤ 5が接続される。なお、積層された不揮発性メモリ チップ 3とコントローラチップ 4のうち、下層に配置される不揮発性メモリチップ 3にお いては、ボンディングワイヤ 5を使用せずに、例えばバンプ電極を用いてモジュール 基板 1と電気接続するようにしてもよい。ボンディングワイヤ 5は、例えば金線などから 構成されている。 Subsequently, as shown in FIG. 2, the nonvolatile memory chip 3 and the controller chip 4 are stacked and mounted on the individual module substrates 1 formed on the rigid substrate 2. The non-volatile memory chip 3 is formed with a rewritable non-volatile memory such as a flash memory, and the controller chip 4 is formed with a circuit for controlling a write operation and a read operation of the non-volatile memory. Yes. The nonvolatile memory chip 3 and the controller chip 4 are mounted at a position according to one side of the module substrate 1 that is not in the center of the module substrate 1. This is because the IC card chip is also efficiently mounted on the module substrate 1 as described later. For example, as shown in FIG. 2, the nonvolatile memory chip 3 and the controller chip 4 are mounted in a region opposite to the region where the corner portion chamfered with respect to the center of the module substrate 1 is provided. The area for mounting the IC card chip is secured on the top. By securing an area for mounting an IC card chip in this way, a large-sized nonvolatile memory chip can be efficiently arranged. Next, as shown in FIG. 3, the nonvolatile memory chip 3 and the module substrate 1 are electrically connected using a bonding wire 5. Similarly, the controller chip 4 and the module substrate 1 are electrically connected using the bonding wires 5. Furthermore, if necessary, the nonvolatile memory chip 3 and the controller chip 4 are electrically connected using bonding wires 5. Here, although not shown, bonding pads are formed on the non-volatile memory chip 3, the controller chip 4 and the module substrate 1, and the bonding wires 5 are connected to these bonding pads. . Of the stacked non-volatile memory chip 3 and controller chip 4, the non-volatile memory chip 3 disposed in the lower layer does not use the bonding wire 5 but uses, for example, a bump substrate to form the module substrate 1 You may make it electrically connect with. The bonding wire 5 is made of, for example, a gold wire.
[0027] 続 、て、図 4に示すように、モジュール基板 1に搭載した不揮発性メモリチップ 3およ びコントローラチップ 4を榭脂 6で封止する。このとき、モジュール基板 1の全体を覆う ように榭脂 6を形成するのではなぐ不揮発性メモリチップ 3、コントローラチップ 4およ びボンディングワイヤ 5を封止するのに必要最小限の領域が榭脂 6で封止される。す なわち、榭脂 6によって、モジュール基板 1が部分的に封止される。これは、後述する ように、モジュール基板 1上に、不揮発性メモリチップ 3およびコントローラチップ 4とは 異なる部品、たとえば、 ICカードチップを搭載するので、 ICカードチップ搭載領域は 榭脂 6で封止せずに確保しておく必要があるからである。本実施の形態においては、 不揮発性メモリチップ 3およびコントローラチップ 4とは異なる部品として ICカードチッ プを例示するが、特にこれに限られるものではなぐコンデンサ等の受動素子を適宜 設けることちでさる。 Subsequently, as shown in FIG. 4, the nonvolatile memory chip 3 and the controller chip 4 mounted on the module substrate 1 are sealed with a resin 6. At this time, the minimum area required for sealing the nonvolatile memory chip 3, the controller chip 4 and the bonding wire 5 is not limited to forming the resin 6 so as to cover the entire module substrate 1. Sealed with 6. That is, the module substrate 1 is partially sealed by the resin 6. As will be described later, components different from the nonvolatile memory chip 3 and the controller chip 4 such as an IC card chip are mounted on the module substrate 1, so that the IC card chip mounting area is sealed with the resin 6. This is because it is necessary to ensure it. In the present embodiment, an IC card chip is exemplified as a component different from the nonvolatile memory chip 3 and the controller chip 4. However, the present invention is not limited to this, and a passive element such as a capacitor may be provided as appropriate.
[0028] 次に、リジッド基板 2に一体ィ匕して形成された複数のモジュール基板 1を個々のモジ ユール基板 1に個片化する。モジュール基板 1を個片化する際、個々のモジュール基 板 1には、突出した保持部 7が残るように切断される。このように、本実施の形態では 、個々のモジュール基板 1だけを個片化するのではなぐモジュール基板 1の上下部 にある突出した保持部 7も含めて個片化することに一つの特徴がある。 Next, a plurality of module substrates 1 formed integrally with the rigid substrate 2 are separated into individual module substrates 1. When the module substrate 1 is separated into pieces, each module substrate 1 is cut so that the protruding holding portions 7 remain. As described above, in the present embodiment, one feature is that the module board 1 is separated into pieces including the projecting holding portions 7 at the upper and lower portions of the module board 1 rather than the individual module board 1 alone. is there.
[0029] 従来、 ICカードには、 ICカードチップだけが搭載されていた力 近年、 ICカードの
高機能化および多機能化の要望が高まってきている。このため、 ICカードチップの他 に、大容量の不揮発性メモリチップを ICカードに搭載することが検討されている。この ように ICカードチップと不揮発性メモリチップとを搭載する ICカードを製造するには、 モジュール基板に不揮発性メモリチップと ICカードチップを搭載する必要がある。 [0029] Conventionally, an IC card has only been equipped with an IC card chip. There is an increasing demand for higher functionality and multifunction. For this reason, in addition to the IC card chip, mounting a large-capacity nonvolatile memory chip on the IC card is being studied. Thus, in order to manufacture an IC card on which an IC card chip and a nonvolatile memory chip are mounted, it is necessary to mount the nonvolatile memory chip and the IC card chip on a module substrate.
[0030] ここで、モジュール基板に不揮発性メモリチップと ICカードチップとを搭載する製造 ラインを新たに作り上げることが考えられる。しかし、このような新しい製造ラインを作り 上げるには、コストがかかり効率的ではない。つまり、できるだけ既存の製造ラインを 使用することで、効率的に不揮発性メモリチップを搭載した ICカードを製造できるの である。また、不揮発性メモリと ICカードは、製品自体が異なるので、異なる製造会社 で製造する要求がある。したがって、既存の製造ラインを使用する観点からは、不揮 発性メモリチップを搭載した ICカードを、それぞれ異なる製造会社で分業して ICカー ドを製造することが効率的である。しかし、 ICカードを、それぞれ異なる製造会社で分 業して製造する場合、製造会社間で受け渡す製品の製品形態が問題となる。すなわ ち、まず、不揮発性メモリを製造する製造会社の製造ラインでは、モジュール基板を 一体化したリジッド基板を使用する。そして、リジッド基板の個々のモジュール基板に 不揮発性メモリチップを搭載した後、封止して個々のモジュール基板に個片化する。 そして、個片化したモジュール基板を製品として ICカードの製造会社へ出荷する。こ のように既存の不揮発性メモリの製造ラインを使用する場合、個片化したモジュール 基板を出荷することが望まし 、。 [0030] Here, it is conceivable to newly build a production line in which the nonvolatile memory chip and the IC card chip are mounted on the module substrate. However, creating such a new production line is costly and inefficient. In other words, by using an existing production line as much as possible, an IC card equipped with a nonvolatile memory chip can be produced efficiently. In addition, the non-volatile memory and the IC card are different products, so there is a need to manufacture them by different manufacturers. Therefore, from the viewpoint of using an existing production line, it is efficient to produce IC cards by dividing the work of IC cards equipped with non-volatile memory chips by different manufacturers. However, when IC cards are manufactured separately by different manufacturers, the product form of products delivered between manufacturers becomes a problem. In other words, first, in the production line of a manufacturing company that manufactures non-volatile memory, a rigid substrate with an integrated module substrate is used. And after mounting a non-volatile memory chip on each module substrate of a rigid substrate, it seals and separates into each module substrate. The separated module board is shipped as a product to the IC card manufacturer. In this way, when using the existing non-volatile memory production line, it is desirable to ship individual module boards.
[0031] これに対し、 ICカードを製造する製造会社の製造ラインでは、テープ状の基板を用 いて ICカードを製造するようになっている。すなわち、 ICカードの製造ラインでは、連 続した前述のテープ基板に ICカードチップを搭載する COT (Chip On Tape)構造に なっている。このため、既存の ICカードの製造ラインでは、個片化したモジュール基 板を搬入しても、この個片化したモジュール基板に ICカードチップを搭載することが できない。すなわち、 ICカードの製造ラインでは、モジュール基板を個片化しない方 が望ましい。このように、製造会社間で受け渡す製品の製品形態が問題となる。 [0031] On the other hand, in a manufacturing line of a manufacturing company that manufactures an IC card, an IC card is manufactured using a tape-shaped substrate. In other words, the IC card production line has a COT (Chip On Tape) structure in which an IC card chip is mounted on the continuous tape substrate. For this reason, in the existing IC card production line, even if an individual module board is carried in, an IC card chip cannot be mounted on the individual module board. In other words, it is desirable not to divide the module board into individual IC card production lines. Thus, the product form of the product delivered between the manufacturing companies becomes a problem.
[0032] そこで、本実施の形態では、不揮発性メモリチップ 3を搭載したモジュール基板 1を 個片化する際、モジュール基板 1の上下部にある突出した保持部 7も含めて個片化
するようにしている。このようにすることで、後述するように、製造会社間で受け渡す製 品の製品形態の問題を解決することができる。このため、各製造会社にある既存の製 造ラインを使用して、不揮発性メモリチップ 3を搭載した ICカードを効率よく製造する ことができる。 Therefore, in the present embodiment, when the module substrate 1 on which the nonvolatile memory chip 3 is mounted is separated, the module substrate 1 including the protruding holding portions 7 at the upper and lower portions is separated. Like to do. By doing so, as will be described later, it is possible to solve the problem of the product form of the product delivered between the manufacturing companies. For this reason, it is possible to efficiently manufacture an IC card equipped with the nonvolatile memory chip 3 using an existing manufacturing line at each manufacturing company.
[0033] 図 6は、保持部 7も含めて個片化したモジュール基板 1の外観を示す図である。図 6 FIG. 6 is a diagram showing the external appearance of the module substrate 1 that is separated into pieces including the holding unit 7. Fig 6
(a)は、本実施の形態におけるモジュール基板 1の表面を見た図である。図 6 (a)に 示すように、本実施の形態におけるモジュール基板 1の表面には、榭脂 6で覆われた モールド領域と、電極 (ICカードチップ搭載用パターン) 8が形成されて 、る ICカード チップ搭載領域がある。図 6 (b)は、本実施の形態におけるモジュール基板 1の裏面 を見た図である。図 6 (b)に示すように、本実施の形態におけるモジュール基板 1の 裏面には、電極 8と接続する ICカード用裏面電極 (ISO電極 9と 、う)が形成されて!ヽ る。また、榭脂 6で覆われた不揮発性メモリチップ 3およびコントローラチップ 4と接続 する拡張電極 10が形成されている。図 7は、保持部 7も含めて個片化したモジュール 基板 1を示す斜視図である。図 7に示すように、モジュール基板 1には、不揮発性メモ リチップ 3が搭載されており、この不揮発性メモリチップ 3上にコントローラチップ 4が搭 載されている。そして、不揮発性メモリチップ 3やコントローラチップ 4は、ボンディング ワイヤ 5を介してモジュール基板 1と接続されている。そして、不揮発性メモリチップ 3 およびコントローラチップ 4を覆うように榭脂 6が形成されている。一方、榭脂 6で覆わ れていない領域には、電極 8が形成されている。この電極 8の間には、 ICカードチッ プ搭載領域 11が形成されている。また、 ICカードチップ搭載領域 11側の保持部 7に は、導体膜による導体パターン 12が形成されている。この導体パターン 12は、例え ば金膜から形成されており、後述する ICカードチップのモールド時において、ゲート に形成される榭脂の剥離性を向上させるために形成される。また、この導体パターン 12は、保持部 7を除くモジュール基板 1の外周よりも内側(モジュール基板 1の中心 側)に延長されて設けられている。このようにこの導体パターン 12を形成することで、 上述の榭脂の剥離を更に防止することができる。 (a) is a view of the surface of the module substrate 1 in the present embodiment. As shown in FIG. 6 (a), on the surface of the module substrate 1 in the present embodiment, a mold region covered with a resin 6 and an electrode (IC card chip mounting pattern) 8 are formed. IC card chip mounting area. FIG. 6B is a view of the back surface of the module substrate 1 in the present embodiment. As shown in FIG. 6B, an IC card back electrode (ISO electrode 9) connected to the electrode 8 is formed on the back surface of the module substrate 1 in the present embodiment. Further, an extended electrode 10 connected to the nonvolatile memory chip 3 and the controller chip 4 covered with the resin 6 is formed. FIG. 7 is a perspective view showing the module substrate 1 singulated including the holding unit 7. As shown in FIG. 7, a non-volatile memory chip 3 is mounted on the module substrate 1, and a controller chip 4 is mounted on the non-volatile memory chip 3. The nonvolatile memory chip 3 and the controller chip 4 are connected to the module substrate 1 via bonding wires 5. A resin 6 is formed so as to cover the nonvolatile memory chip 3 and the controller chip 4. On the other hand, an electrode 8 is formed in a region not covered with the resin 6. An IC card chip mounting area 11 is formed between the electrodes 8. Also, a conductor pattern 12 made of a conductor film is formed on the holding portion 7 on the IC card chip mounting area 11 side. The conductor pattern 12 is formed of, for example, a gold film, and is formed to improve the releasability of the resin formed on the gate when the IC card chip described later is molded. Further, the conductor pattern 12 is provided so as to extend to the inner side (center side of the module substrate 1) than the outer periphery of the module substrate 1 excluding the holding portion 7. By forming the conductor pattern 12 in this way, the above-described exfoliation of the resin can be further prevented.
[0034] このように構成された個片化したモジュール基板 1に対して、次に、不揮発性メモリ チップ 3およびコントローラチップ 4の電気的特性検査が実施される。電気的特性検
查は、図 6 (b)に示した拡張電極 10を使用して実施される。個片化したモジュール基 板 1は、テスト時間が長ぐテスト項目の多い不揮発性メモリチップ 3およびコントロー ラチップ 4の電気的特性検査において、判定、選別および振り分けが容易である。不 揮発性メモリチップ 3などの電気的特性検査は、個片化したモジュール基板 1をテスト 用ソケットに入れることにより行なわれる。テスト用ソケットは、複数並列して配置され、 個片化した複数のモジュール基板 1を並列的に処理することができるので、電気的特 性検査の効率を向上させることができる。つまり、不揮発性メモリチップ 3などの電気 的特性検査はテスト時間が長 、が、個片化した複数のモジュール基板 1を並列に処 理しながら、良品または不良品の選別をすることにより、電気的特性検査の効率を向 上させている。 [0034] Next, electrical property inspection of the nonvolatile memory chip 3 and the controller chip 4 is performed on the module substrate 1 thus configured. Electrical characteristics test The dredging is performed using the extended electrode 10 shown in FIG. 6 (b). The separated module substrate 1 is easy to determine, sort and distribute in the electrical characteristic inspection of the nonvolatile memory chip 3 and the controller chip 4 which have a long test time and many test items. The electrical characteristics of the nonvolatile memory chip 3 and the like are inspected by placing the singulated module substrate 1 into a test socket. Since a plurality of test sockets are arranged in parallel and a plurality of separated module substrates 1 can be processed in parallel, the efficiency of electrical property inspection can be improved. In other words, the electrical characteristic inspection of the nonvolatile memory chip 3 and the like takes a long test time, but by processing a plurality of separated module substrates 1 in parallel, the non-defective product or defective product is selected. This improves the efficiency of the inspection of physical characteristics.
[0035] 本実施の形態では、個片化したモジュール基板 1に保持部 7が設けられて 、るが、 保持部 7が設けられて 、な 、モジュール基板の電気的特性検査を実施する既存の 製造ラインにぉ 、て、モジュール基板を移送するハンドラーやテストソケットなどを共 用または小変更することにより、保持部 7が設けられているモジュール基板 1の電気 的特性検査を実施できる。このため、既存の製造ラインを使用して効率よく電気的特 性検査を実施することができる。 [0035] In the present embodiment, the holding unit 7 is provided on the singulated module substrate 1. However, the holding unit 7 is provided, and an existing characteristic test for inspecting the electrical characteristics of the module substrate is performed. In the production line, the electrical characteristics of the module substrate 1 provided with the holding portion 7 can be inspected by using a handler or test socket for transferring the module substrate in common or by making small changes. For this reason, the electrical property inspection can be efficiently performed using the existing production line.
[0036] 次に、図 8に示すように、例えばステンレスなどの耐熱性を有するテープ基板 13を 用意する。このテープ基板 13は、例えばフープ材をパンチングして空間を設けること により、複数のモジュール基板搭載領域が確保されている。そして、テープ基板 13の モジュール基板搭載領域に突き出すように保持部 14が設けられている。このように構 成されたテープ基板 13に対して、図 9に示すように、個片化したモジュール基板 1を 接続する。接続方法は、例えば図 9に示すように、テープ基板 13に設けられている保 持部 14にモジュール基板 1に設けられて 、る保持部 7を配置し、保持部 14を折り曲 げる(かしめる)ことにより、保持部 7と保持部 14とを機械的に接続する。これにより、テ ープ基板 13に複数の個片化したモジュール基板 1を接続することができる。このよう にして、個片化した複数のモジュール基板 1を一つのテープ基板 13に搭載すること ができる。すなわち、個片化したモジュール基板 1に保持部 7を設けることにより、一 度個片化したモジュール基板 1を再びテープ基板 13に容易に搭載することができる
[0037] ここまでの工程が、不揮発性メモリを製造する製造会社の製造ラインで実施される。 不揮発性メモリチップ 3をモジュール基板 1に搭載する製造ラインでは、モジュール基 板 1を個片化した後、再びモジュール基板 1に設けられている保持部 7を使用してテ ープ基板 13にモジュール基板 1を接続している。このようにモジュール基板 1をテー プ基板 13に搭載することで、 ICカードを製造する製造会社の製造ラインにモジユー ル基板 1をテープ状にして出荷することができる。これにより、製造会社間で受け渡す 製品の製品形態の問題を解決することができる。 Next, as shown in FIG. 8, a heat-resistant tape substrate 13 such as stainless steel is prepared. The tape substrate 13 is provided with a plurality of module substrate mounting areas, for example, by punching a hoop material to provide a space. A holding portion 14 is provided so as to protrude into the module substrate mounting area of the tape substrate 13. As shown in FIG. 9, the separated module substrate 1 is connected to the tape substrate 13 configured as described above. For example, as shown in FIG. 9, the holding portion 7 provided on the module substrate 1 is disposed on the holding portion 14 provided on the tape substrate 13, and the holding portion 14 is bent (see FIG. 9). The holding part 7 and the holding part 14 are mechanically connected by caulking. As a result, a plurality of individual module substrates 1 can be connected to the tape substrate 13. In this way, a plurality of individual module substrates 1 can be mounted on one tape substrate 13. That is, by providing the holding portion 7 on the module substrate 1 that has been separated, the module substrate 1 that has been separated once can be easily mounted on the tape substrate 13 again. [0037] The steps up to here are performed on a manufacturing line of a manufacturing company that manufactures a nonvolatile memory. In a production line in which the nonvolatile memory chip 3 is mounted on the module substrate 1, the module substrate 1 is separated into individual pieces, and then the module is mounted on the tape substrate 13 again using the holding portion 7 provided on the module substrate 1. Board 1 is connected. By mounting the module substrate 1 on the tape substrate 13 in this manner, the module substrate 1 can be shipped in the form of a tape to the production line of the manufacturer that manufactures the IC card. As a result, the problem of the product form of the product delivered between the manufacturing companies can be solved.
[0038] ここで、不揮発性メモリの製造ラインでは、モジュール基板 1を個片化し、その後再 び出荷する製品形態をテープ状とするため、テープ基板 13にモジュール基板 1を接 続している。したがって、不揮発性メモリの製造ラインでは、モジュール基板 1を個片 化せずにリジッド基板 2に一体ィ匕した状態で工程を実施して出荷することが考えられ る。しかし、モジュール基板 1を個片化しないと以下に示す不都合が生じる。すなわち 、不揮発性メモリの電気的特性検査は、基本的にテスト項目が多くテスト時間が長く なる。このため、モジュール基板 1を個片化して、同時に複数の不揮発性メモリを並 列的に検査している。この方法によれば、不良品が発見された場合、その時点で不 良品を除去し、不良品を除去することにより空いたテストソケットに新たなモジュール 基板 1をセットして検査を実施できる。このため、効率よく電気的特性検査を実施でき るのである。 Here, in the non-volatile memory production line, the module substrate 1 is connected to the tape substrate 13 so that the module substrate 1 is separated into individual pieces and then shipped again in a tape form. Therefore, in the nonvolatile memory production line, it is conceivable that the module substrate 1 is not separated into individual pieces, but is shipped after the process is performed integrally with the rigid substrate 2. However, the following inconvenience arises if the module substrate 1 is not separated. That is, the electrical characteristic inspection of the nonvolatile memory basically has many test items and a long test time. For this reason, the module substrate 1 is separated into pieces, and a plurality of nonvolatile memories are simultaneously inspected in parallel. According to this method, when a defective product is found, the defective product is removed at that time, and a new module substrate 1 can be set in the vacant test socket by removing the defective product. For this reason, the electrical characteristic inspection can be performed efficiently.
[0039] 一方、モジュール基板 1がリジッド基板 2に一体ィ匕した状態では、テープ状に並ん だ不揮発性メモリを直列的にしか電気的特性検査が実施できな 、ので、テスト時間 の長い不揮発性メモリでは効率が悪くなる。また、電気的特性検査の結果、不良品が 発見されても、一体ィ匕したリジッド基板 2から除去することができず、不良品が接続さ れたまま製品として出荷されることになつてしまう。さらに、既存の製造ラインでは、個 片化したモジュール基板 1の状態で電気的特性検査を実施するようになって!/、るの で、一体化したリジッド基板 2の状態で電気的特性検査を実施するには、既存の製造 ラインとは異なる構成に変更する必要がある。このような理由で、不揮発性メモリの製 造ラインでは、モジュール基板 1を個片化する必要がある。したがって、 ICカードを製
造する製造会社に受け渡す製品の製品形態をテープ状にするには、本実施の形態 で説明しているように、個片化したモジュール基板 1の保持部 7を使用して、再びテ ープ基板 13に個片化したモジュール基板 1を搭載する必要がある。 [0039] On the other hand, in the state where the module substrate 1 is integrated with the rigid substrate 2, the electrical characteristics can be inspected only in series for the nonvolatile memories arranged in a tape shape. Inefficient with memory. In addition, even if a defective product is found as a result of the electrical characteristic inspection, it cannot be removed from the integrated rigid board 2, and the defective product is shipped as a connected product. . Furthermore, in the existing production line, the electrical property inspection is performed in the state of the individual module substrate 1! /, So the electrical property inspection is performed in the state of the integrated rigid substrate 2. To implement it, it is necessary to change the configuration to be different from the existing production line. For this reason, it is necessary to divide the module substrate 1 into pieces in the nonvolatile memory production line. Therefore, make an IC card In order to make the product form of the product delivered to the manufacturing company into a tape shape, as described in the present embodiment, using the holding part 7 of the separated module substrate 1, the tape is again formed. It is necessary to mount the module substrate 1 singulated on the circuit board 13.
[0040] なお、本実施の形態では、テープ基板 13の材料としてステンレスカゝら構成される例 を示したが、これに限らず、例えば耐熱性を有する榭脂シートや耐熱紙カゝら構成して もよい。テープ基板 13の材料に耐熱性が必要とされるのは、後述する ICカードの製 造ラインでモジュール基板 1に搭載する ICカードチップを封止する際の加熱にテー プ基板 13が耐える必要がある力もである。したがって、テープ基板 13の材料には、 I Cカードチップを封止する際の加熱に耐えられる程度の耐熱性が要求される。ここで 、テープ基板 13として、榭脂シートや耐熱紙や不繊布を使用する場合、テープ基板 13と個片化されたモジュール基板 1との接続は、機械的接続ではなぐ例えば接着 剤を用いた接続とすることができる。また、接着剤の代わりに、テープ状の基板を融 着させて接続することも可能である。 [0040] In the present embodiment, an example in which the material of the tape substrate 13 is made of stainless steel is shown. However, the present invention is not limited to this. For example, the structure of a heat-resistant resin sheet or heat-resistant paper paper is used. You may do it. Heat resistance is required for the material of the tape substrate 13 because the tape substrate 13 must withstand the heating when sealing the IC card chip mounted on the module substrate 1 in the IC card manufacturing line described later. There is also some power. Therefore, the material of the tape substrate 13 is required to have heat resistance enough to withstand the heating when sealing the IC card chip. Here, when a resin sheet, heat-resistant paper or non-woven cloth is used as the tape substrate 13, the connection between the tape substrate 13 and the separated module substrate 1 is not a mechanical connection. For example, an adhesive is used. It can be a connection. Further, instead of an adhesive, a tape-like substrate can be fused and connected.
[0041] 次に、複数のモジュール基板 1を接続したテープ基板 13を用いて ICカードを製造 する工程について説明する。ここ力もの工程は、 ICカードを製造する製造会社の製 造ラインで実施される。 Next, a process for manufacturing an IC card using the tape substrate 13 to which a plurality of module substrates 1 are connected will be described. This powerful process is carried out on the production line of the manufacturer that manufactures IC cards.
[0042] 図 10に示すように、テープ基板 13に接続された個々のモジュール基板 1上に IC力 ードチップ 15を搭載する。この ICカードチップ 15は、モジュール基板 1の ICカードチ ップ搭載領域に搭載される。そして、図 11に示すように、 ICカードチップ 15と電極 8と をボンディングワイヤ 16を用いて電気接続する。ボンディングワイヤ 16は、例えば、 金線から構成されている。 As shown in FIG. 10, IC force chip 15 is mounted on each module substrate 1 connected to tape substrate 13. The IC card chip 15 is mounted in the IC card chip mounting area of the module substrate 1. Then, as shown in FIG. 11, the IC card chip 15 and the electrode 8 are electrically connected using a bonding wire 16. The bonding wire 16 is made of, for example, a gold wire.
[0043] 次に、図 12に示すように、 ICカードチップ 15およびボンディングワイヤ 16を榭脂 17 で封止する。榭脂 17による封止は、例えばトランスファモールド方法を使用すること ができる。このとき、榭脂 17を流入するランナ Zゲート部分は、モジュール基板 1の保 持部 7に形成することができる。この保持部 7には、図 7に示すように、金膜による導 体パターン 12が形成されているため、保持部 7のランナ Zゲート部分に形成された 榭脂 17の剥離性を向上させることができる。榭脂 17は、例えば、モジュール基板 1の 上部方向から保持部 7に形成されたランナ Zゲート部分に注入され、このランナ Zゲ
ート部分カゝらモジュール基板 1に搭載された ICカードチップ 15を覆うように形成され る。 Next, as shown in FIG. 12, the IC card chip 15 and the bonding wire 16 are sealed with a resin 17. Sealing with the resin 17 can use, for example, a transfer molding method. At this time, the runner Z gate portion into which the resin 17 flows can be formed in the holding portion 7 of the module substrate 1. As shown in FIG. 7, since the conductor pattern 12 made of a gold film is formed on the holding portion 7, the releasability of the resin 17 formed on the runner Z gate portion of the holding portion 7 is improved. Can do. The resin 17 is, for example, injected into the runner Z gate portion formed in the holding portion 7 from the upper direction of the module substrate 1. It is formed so as to cover the IC card chip 15 mounted on the module substrate 1 from the cover part cover.
[0044] 続いて、図 13に示すように、モジュール基板 1を接続したテープ基板 13から個々の モジュール基板 1を分離する。このとき、モジュール基板 1は、保持部 7とモジュール 基板 1の接続部分で切断される。モジュール基板 1と榭脂 17を両方切断する切断方 法としては、例えば、金型を使用する方式、ウォータジェット方式あるいはダイアモン ドソーを用いた切断方式を使用することができる。 Subsequently, as shown in FIG. 13, the individual module substrates 1 are separated from the tape substrate 13 to which the module substrate 1 is connected. At this time, the module substrate 1 is cut at the connection portion between the holding unit 7 and the module substrate 1. As a cutting method for cutting both the module substrate 1 and the resin 17, for example, a method using a mold, a water jet method, or a cutting method using a diamond saw can be used.
[0045] 次に、個片化したモジュール基板 1をプラスチック製のカード基板 18に埋め込むこ とにより、図 14および図 15に示すような ICカードを製造することができる。図 14は完 成した ICカードの一面を示した図であり、図 15は図 14とは反対側の面を示した図で ある。 Next, an IC card as shown in FIGS. 14 and 15 can be manufactured by embedding the module substrate 1 singulated into a plastic card substrate 18. FIG. 14 is a view showing one side of the completed IC card, and FIG. 15 is a view showing the side opposite to FIG.
[0046] また、本実施の形態のモジュールの構造は、不揮発性メモリチップとそのコントロー ラを搭載した領域の封止部と、 ICカードチップを搭載した領域の封止部が分離され ている。これにより、カードの曲げに対する柔軟性を向上させることができるという特性 を有する。 In the module structure of the present embodiment, the sealing portion in the region where the nonvolatile memory chip and its controller are mounted is separated from the sealing portion in the region where the IC card chip is mounted. Thereby, it has the characteristic that the softness | flexibility with respect to the bending of a card | curd can be improved.
[0047] 本実施の形態によれば、不揮発性メモリの製造ラインでモジュール基板に不揮発 性メモリチップを搭載して、モジュール基板を個片化する。このとき、モジュール基板 には、保持部が設けられており、電気的特性検査を実施した後、保持部を用いてテ ープ基板に接続される。そして、テープ状に一体ィ匕されたモジュール基板が ICカー ドの製造ラインへ出荷される。その後、 ICカードの製造ラインでは、テープ状に一体 化されたモジュール基板を使用して、 ICカードが製造される。したがって、不揮発性 メモリの製造ラインおよび ICカードの製造ラインの両方で、既存の設備を利用できる ので、不揮発性メモリを搭載した ICカードを効率よく製造することができる。すなわち [0047] According to the present embodiment, a nonvolatile memory chip is mounted on a module substrate on a nonvolatile memory production line, and the module substrate is separated into pieces. At this time, the module substrate is provided with a holding portion, and after the electrical characteristic inspection is performed, the module substrate is connected to the tape substrate using the holding portion. Then, the module board integrated in a tape shape is shipped to the IC card production line. After that, in the IC card production line, the IC card is manufactured using a module substrate integrated in a tape shape. Therefore, since existing facilities can be used in both the nonvolatile memory production line and the IC card production line, an IC card equipped with the nonvolatile memory can be efficiently produced. Ie
、既存の不揮発性メモリの製造ラインでは、個片化したモジュール基板を出荷する形 態となつており、既存の ICカードの製造ラインでは、テープ状に一体ィ匕したモジユー ル基板を使用して ICカードが製造される。このとき、不揮発性メモリの製造ラインから I Cカードの製造ラインへモジュール基板を受け渡す際、モジュール基板を一体ィ匕した テープ基板で受け渡すことが望まし 、が、モジュール基板は個片化されて 、るので
問題となる。しかし、本実施の形態では、個片化したモジュール基板を保持部によつ てテープ基板に一体ィ匕して 、るので、不揮発性メモリの製造ラインによる工程を実施 した後、複数のモジュール基板をテープ状にした状態で、 ICカードの製造ラインへモ ジュール基板を受け渡すことができる。 In the existing nonvolatile memory production line, individual module boards are shipped, and in the existing IC card production line, a module board integrated in a tape shape is used. IC card is manufactured. At this time, when transferring the module substrate from the nonvolatile memory production line to the IC card production line, it is desirable to deliver the module substrate with a tape substrate in which the module substrate is integrated, but the module substrate is separated into pieces. Because It becomes a problem. However, in the present embodiment, the separated module substrate is integrated with the tape substrate by the holding portion. Therefore, after performing the process by the non-volatile memory production line, a plurality of module substrates are provided. The module board can be delivered to the IC card production line in a tape-like state.
[0048] なお、本実施の形態では、不揮発性メモリの製造ラインで、モジュール基板を保持 部でテープ基板に接続する工程まで実施するように記載している。しかし、不揮発性 メモリの製造ラインでは、不揮発性メモリの電気的特性検査までを実施し、個片化し たモジュール基板を保持部でテープ基板に接続する工程を ICカードの製造ラインで 実施するよう〖こしてもよい。この不揮発性メモリの電気的特性検査は、必要によっては 省略することができる。 [0048] In the present embodiment, it is described that the process up to the step of connecting the module substrate to the tape substrate by the holding unit in the production line of the nonvolatile memory is described. However, in the non-volatile memory production line, the electrical characteristics of the non-volatile memory are also inspected, and the process of connecting the separated module board to the tape board with the holding part is performed on the IC card production line. You may rub. This non-volatile memory electrical characteristic test can be omitted if necessary.
[0049] 次に、 ICカードチップ 20 (図 10の ICカードチップ 15に対応)、不揮発性メモリチッ プ 21 (図 7の不揮発性メモリチップ 3に対応)およびコントローラチップ 22 (図 7のコン トローラチップ 4に対応)の回路構成について説明する。 [0049] Next, IC card chip 20 (corresponding to IC card chip 15 in FIG. 10), nonvolatile memory chip 21 (corresponding to nonvolatile memory chip 3 in FIG. 7), and controller chip 22 (controller chip in FIG. 7) 4) will be described.
[0050] 不揮発性メモリチップ 21の主面には、例えば、電気的にデータの消去及び書き込 み可能なフラッシュメモリ等のような不揮発性のメモリ回路が形成されている。不揮発 性メモリチップ 21の記憶容量は、他の ICカードチップ 20やコントローラチップ 22のメ モリ部に比べて大容量ィ匕されている。不揮発性メモリチップ 21の主面のボンディング ノ ッドは、ボンディングワイヤを通じてモジュール基板と電気的に接続されている。ボ ンデイングワイヤは、例えば金 (Au)細線等力もなる。不揮発性メモリチップ 21のメモ リ回路を構成する複数個のメモリセルは、例えばメモリセルのフローティングゲート等 に電子が注入されると閾値電圧が上昇し、また、フローティングゲート等力 電子を引 き抜くと閾値電圧が低下するようになっている。メモリセルは、データ読み出しのため のワード線電圧に対する閾値電圧の高低に応じた情報を記憶することになる。特に 制限されな 、が、例えばメモリセルトランジスタの閾値電圧が低 、状態を消去状態、 高 、状態を書き込み状態とする。 On the main surface of the nonvolatile memory chip 21, for example, a nonvolatile memory circuit such as a flash memory capable of electrically erasing and writing data is formed. The storage capacity of the nonvolatile memory chip 21 is larger than that of the memory parts of the other IC card chip 20 and controller chip 22. The bonding node on the main surface of the nonvolatile memory chip 21 is electrically connected to the module substrate through bonding wires. The bonding wire also has, for example, gold (Au) fine wire equal force. A plurality of memory cells constituting the memory circuit of the non-volatile memory chip 21 increase the threshold voltage when electrons are injected into, for example, the floating gate of the memory cell, and also pull out the electrons at the floating gate. And the threshold voltage is lowered. The memory cell stores information corresponding to the level of the threshold voltage with respect to the word line voltage for reading data. Although not particularly limited, for example, the threshold voltage of the memory cell transistor is low, the state is the erase state, and the state is the high state.
[0051] ICカードチップ 20の主面には、例えば ICカードマイコン回路が形成されている。こ の ICカードマイコン回路は、セキュリティコントローラとしての機能を有する回路であり 、例えば電子決済サービスなどに利用可能な ISOZIEC 15408の評価 ·認証機関
による認証済み機能を実現している。この ICカードマイコン回路は、例えば CPU (Ce ntral Processing Unit:中央演算処理装置)、マスク ROM (Read Only Memory)、 RA M (Random Access Memory)、 EEPROM (Electrically Erasable Programmable ROM )およびその他の演算回路等のような集積回路を有している。マスク ROMには、例え ば実行プログラムや暗号アルゴリズム等が格納されている。また、 RAMは、例えばデ ータ処理用のメモリとしての機能を有している。また、 EEPROMは、データ格納用の メモリとしての機能を有している。この ICカードチップ 20が搭載された ICカードは、ホ ストから認証要求が有ったとき、 EEPROMに保有された所定の認証証明書を送り、 これに対して認証を得ることを条件に、後続の通信処理が可能にされるようになって V、る。このようなセキュリティ処理の動作プログラムはマスク ROMが保有して!/、る。 [0051] On the main surface of the IC card chip 20, for example, an IC card microcomputer circuit is formed. This IC card microcomputer circuit has a function as a security controller. For example, it is an ISOZIEC 15408 evaluation / certification body that can be used for electronic payment services. Authenticated function by is realized. This IC card microcomputer circuit is, for example, CPU (Central Processing Unit), Mask ROM (Read Only Memory), RAM (Random Access Memory), EEPROM (Electrically Erasable Programmable ROM) and other arithmetic circuits It has the integrated circuit like. The mask ROM stores, for example, execution programs and encryption algorithms. The RAM has a function as a memory for data processing, for example. The EEPROM also functions as a data storage memory. When an authentication request is received from the host, the IC card on which this IC card chip 20 is mounted sends a predetermined authentication certificate stored in the EEPROM and is subject to subsequent authentication on the condition that authentication is obtained. Communication processing is now possible. Such a security processing operation program is owned by Mask ROM!
[0052] 図 16は ICカードチップ 20内の ICカードマイコン回路の一例を示している。 ICカー ドマイコン回路は、 CPU20a、ワーク RAMとしての RAM20b、タイマ 20c、 EEPRO M20d、コプロセッサユニット 20e、マスク ROM20f、システムコントロールロジック 20 g、入出力ポート(IZOポート) 20h、データバス 20iおよびアドレスバス 20jを有してい る。 FIG. 16 shows an example of an IC card microcomputer circuit in the IC card chip 20. IC card microcomputer circuit is CPU20a, RAM20b as work RAM, timer 20c, EEPRO M20d, coprocessor unit 20e, mask ROM20f, system control logic 20g, I / O port (IZO port) 20h, data bus 20i and address bus 20j have.
[0053] マスク ROM20fは CPU20aの動作プログラム(暗号化プログラム、復号プログラム、 インタフェース制御プログラム等)およびデータを格納するのに利用される。 RAM20 bは CPU20aのワーク領域またはデータの一時記憶領域とされ、例えば SRAM若し くは DRAMからなる。 IZOポート 20hに ICカードコマンドが供給されると、システムコ ントロールロジック 20gがこれをデコードし、当該コマンドの実行に必要な処理プログ ラムを CPU20aに実行させる。すなわち、 CPU20aは、システムコントロールロジック 20gから指示されるアドレスでマスク ROM20fをアクセスして命令をフェッチし、フェツ チした命令をデコードし、デコード結果に基づ 、てオペランドフェッチやデータ演算 を行う。コプロセッサユニット 20eは CPU20aの制御に従って RSAや楕円曲線暗号 演算における剰余演算処理などを行う。 The mask ROM 20f is used to store an operation program (encryption program, decryption program, interface control program, etc.) and data of the CPU 20a. The RAM 20b is a work area of the CPU 20a or a temporary storage area for data, and is composed of, for example, SRAM or DRAM. When an IC card command is supplied to the IZO port 20h, the system control logic 20g decodes this and causes the CPU 20a to execute a processing program necessary for executing the command. That is, the CPU 20a fetches an instruction by accessing the mask ROM 20f at an address instructed by the system control logic 20g, decodes the fetched instruction, and performs operand fetch and data operation based on the decoding result. The coprocessor unit 20e performs a remainder calculation process in RSA or elliptic curve cryptography according to the control of the CPU 20a.
[0054] IZOポート 20hは 1ビットの入出力端子 IZOを有し、データの入出力と外部割り 込み信号の入力に兼用される。 I/Oポート 20hはデータバス 20iに結合され、デー タノくス 20 こ ίま CPU20a、 RAM20b、タイマ 20c、 EEPROM20dおよびコプロセッ
サユニット 20e等が電気的に接続される。 [0054] The IZO port 20h has a 1-bit input / output terminal IZO, and is also used for data input / output and external interrupt signal input. The I / O port 20h is coupled to the data bus 20i and is connected to the data bus 20i. CPU 20a, RAM 20b, timer 20c, EEPROM 20d and coprocessor The subunit 20e etc. are electrically connected.
[0055] システムコントロールロジック 20gは、 ICカードマイコン回路の動作モードの制御お よび割り込み制御を行 、、更に暗号鍵の生成に利用する乱数発生ロジック等を有す る。 ICカードマイコン回路はリセット信号 ZRESによってリセット動作が指示されると、 内部が初期化され、 CPU20aは EEPROM20dのプログラムの先頭番地から命令実 行を開始する。 ICカードマイコン回路はクロック信号 CLKに同期して動作する。 [0055] The system control logic 20g controls the operation mode and interrupt of the IC card microcomputer circuit, and further includes a random number generation logic used to generate an encryption key. When the reset operation is instructed by the reset signal ZRES, the IC card microcomputer circuit is initialized, and the CPU 20a starts executing the instruction from the start address of the program in the EEPROM 20d. The IC card microcomputer circuit operates in synchronization with the clock signal CLK.
[0056] EEPROM20dは、電気的に消去処理及び書込み処理が可能にされ、個人を特定 するために用いられる ID (Identification)情報や認証証明書などのデータを格納する 領域として用いられる。 EEPRPM20dに代えてフラッシュメモリあるいは強誘電体メ モリなどを採用しても良い。 ICカードマイコン回路は外部とのインタフェースに外部端 子を用いる接触インタフェースをサポートする。 The EEPROM 20d is electrically erasable and writable, and is used as an area for storing data such as ID (Identification) information and an authentication certificate used for identifying an individual. A flash memory or a ferroelectric memory may be used instead of the EEPRPM20d. The IC card microcomputer circuit supports a contact interface that uses an external terminal to interface with the outside.
[0057] 次に、コントローラチップ 22の主面には、例えばインタフェースコントローラ回路が 形成されている。インタフェースコントローラ回路は、外部からの指示に従った制御態 様、あるいは内部であら力じめ決定された設定に従って外部インタフェース動作とメ モリインタフェース動作を制御する機能を有して 、る。インタフェースコントローラ回路 の機能は、外部接続端子を介して外部とやりとりするコマンドやバスの状態に応ずる メモリカードインタフェース制御態様の認識を行なう。また、認識したメモリカードイン タフ ース制御態様に応ずるバス幅の切替え、認識したメモリカードインタフ ース制 御態様に応ずるデータフォーマット変換も行なう。さらに、パワーオンリセット機能、 IC カードチップ 20内の ICカードマイコン回路とのインタフェース制御、不揮発性メモリチ ップ 21内のメモリ回路とのインタフェース制御、及び電源電圧変換等を行なう。また、 これらの動作は、使用目的に応じてそれらの全て、または一部を行っても良い。 Next, for example, an interface controller circuit is formed on the main surface of the controller chip 22. The interface controller circuit has a function of controlling an external interface operation and a memory interface operation in accordance with a control mode according to an instruction from the outside or a setting determined in advance inside. The function of the interface controller circuit recognizes the memory card interface control mode according to the state of commands and buses exchanged with external devices via the external connection terminals. It also switches the bus width according to the recognized memory card interface control mode and converts the data format according to the recognized memory card interface control mode. Furthermore, it performs a power-on reset function, interface control with the IC card microcomputer circuit in the IC card chip 20, interface control with the memory circuit in the nonvolatile memory chip 21, power supply voltage conversion, and the like. These operations may be performed in whole or in part depending on the purpose of use.
[0058] 図 17はインタフェースコントローラ回路 22の一例を示している。なお、図 17中のメ モリ回路 21aは、不揮発性メモリチップ 21に形成されたメモリ回路を示している。 FIG. 17 shows an example of the interface controller circuit 22. A memory circuit 21a in FIG. 17 indicates a memory circuit formed in the nonvolatile memory chip 21.
[0059] インタフェースコントローラ回路 22は、ホストインタフェース回路 22a、マイクロコンビ ユータ 22b、フラッシュコントローラ 22c、バッファコントローラ 22d、バッファメモリ 22e および ICカード用インタフェース回路 22fを有して!/、る。バッファメモリ 22eは DRAM または SRAM等から成る。 ICカード用インタフェース回路 22fには ICカードマイコン
回路 20が電気的に接続される。マイクロコンピュータ 22bは CPU (中央処理装置) 2 2b 1、 CPU22blの動作プログラムを保有するプログラムメモリ(PGM) 22b2および CPU22blのワーク領域に利用されるワークメモリ(WRAM) 22b3等を有している。 [0059] The interface controller circuit 22 has a host interface circuit 22a, a micro computer 22b, a flash controller 22c, a buffer controller 22d, a buffer memory 22e, and an IC card interface circuit 22f. The buffer memory 22e is composed of DRAM or SRAM. IC card interface circuit 22f has IC card microcomputer Circuit 20 is electrically connected. The microcomputer 22b has a CPU (central processing unit) 2 2b 1, a program memory (PGM) 22b2 that holds an operation program for the CPU 22bl, a work memory (WRAM) 22b3 used for a work area of the CPU 22bl, and the like.
[0060] ホストインタフェース回路 22aは、メモリカードイニシャライズコマンドの発行等を検 出すると、割込みによってマイクロコンピュータ 22bに対応するインタフェース制御態 様の制御プログラムを実行可能にする。マイクロコンピュータ 22bはその制御プロダラ ムを実行する事によってホストインタフェース回路 22aによる外部インタフェース動作 を制御する。また、フラッシュコントローラ 22cによるメモリ回路 21aに対するアクセス( 書き込み、消去および読み出し動作)とデータ管理を制御し、ノ ッファコントローラ 22 dによるメモリカード固有のデータフォーマットとメモリに対する共通のデータフォーマ ットとの間のフォーマット変換を制御する。ノッファメモリ 22eには、メモリ回路 21aから 読み出されたデータまたはメモリ回路 21aに書き込まれるデータが一時的に保持され る。フラッシュコントローラ 22cはメモリ回路 21aをハードディスク互換のファイルメモリ として動作させ、データをセクタ単位で管理することもできる。なお、フラッシュコント口 ーラ 22cは図示を省略する ECC回路を備え、メモリ回路 21aへのデータ格納に際し て ECCコードを付加し、読み出しデータに対して ECCコードによるエラー検出'訂正 処理を行う。また、使用目的に応じて ICカード用のインタフェース 22fを省略すること も可能である。 [0060] When the host interface circuit 22a detects the issuance of a memory card initialize command or the like, the host interface circuit 22a makes it possible to execute an interface control mode control program corresponding to the microcomputer 22b by an interrupt. The microcomputer 22b controls the external interface operation by the host interface circuit 22a by executing its control program. It also controls access (write, erase and read operations) and data management to the memory circuit 21a by the flash controller 22c, and the data format specific to the memory card by the buffer controller 22d and the common data format for the memory. Controls format conversion between. The data read from the memory circuit 21a or the data written to the memory circuit 21a is temporarily stored in the nother memory 22e. The flash controller 22c can operate the memory circuit 21a as a hard disk compatible file memory and manage data in units of sectors. The flash controller 22c includes an ECC circuit (not shown), adds an ECC code when storing data in the memory circuit 21a, and performs error detection and correction processing using the ECC code on the read data. It is also possible to omit the IC card interface 22f according to the purpose of use.
[0061] 次に、本実施の形態における変形例について説明する。 Next, a modification of the present embodiment will be described.
[0062] 図 18は、個片化されたモジュール基板 1とテープ基板 13との接続方法を変えた例 について説明した図である。図 9では、モジュール基板 1に設けられた保持部 7をテ ープ基板 13に設けられた保持部 14の上部に接続して 、る例を示して 、る。これに対 し、図 18では、モジュール基板 1に設けられた保持部 7をテープ基板 13に設けられ た保持部 14で覆うように接続している。このように接続することで、モジュール基板 1 に搭載された ICカードチップを榭脂封止する際、榭脂を流入するランナ Zゲートをテ ープ基板 13に沿った水平方向に形成することができる。テープ基板 13は、例えば、 ステンレスのような金属材料力 形成されているので、加工精度がよぐこのテープ基 板 13上にランナ Zゲートを形成しても榭脂漏れを防止することができる力もである。
なお、モジュール基板 1に形成されている保持部 7は、例えば榭脂から形成されてい るので、その厚さのばらつきは大きくなる。このため、榭脂封止する際は、保持部 7の 裏面側から厚みのばらつきを吸収する可動プレートで抑えて榭脂漏れを防止する必 要がある。 FIG. 18 is a diagram for explaining an example in which the method of connecting the separated module substrate 1 and the tape substrate 13 is changed. FIG. 9 shows an example in which the holding portion 7 provided on the module substrate 1 is connected to the upper portion of the holding portion 14 provided on the tape substrate 13. On the other hand, in FIG. 18, the holding part 7 provided on the module substrate 1 is connected so as to be covered with the holding part 14 provided on the tape substrate 13. By connecting in this way, when the IC card chip mounted on the module substrate 1 is sealed with a resin, a runner Z gate into which the resin flows can be formed in a horizontal direction along the tape substrate 13. it can. Since the tape substrate 13 is made of a metal material such as stainless steel, for example, it is possible to prevent grease leakage even if a runner Z-gate is formed on the tape substrate 13 with high processing accuracy. It is. Note that, since the holding portion 7 formed on the module substrate 1 is made of, for example, a resin, the variation in the thickness becomes large. For this reason, when sealing with grease, it is necessary to prevent leakage of grease by suppressing it with a movable plate that absorbs variations in thickness from the back side of the holding portion 7.
[0063] 図 19は、個片化されたモジュール基板 1に設けられている保持部 7の形状を丁字形 状にした例について説明した図である。図 19に示すように、 T字形状にした保持部 7 に貫通孔 26を設け、この貫通孔 26に接続部材 27を通すことにより、個々のモジユー ル基板 1を接続している。このように構成しても、モジュール基板 1を一体ィ匕すること 力 Sできる。図 19に示した構成によれば、保持部 7自体が一体ィ匕するテープ基板とし ての役割を有するので、新たにテープ基板を用意する必要がない利点がある。接続 部材 27は、例えば金属材料力も構成することができる。また、保持部 7には前述の貫 通孔 26の他に搬送用の孔 26aが設けられている。 FIG. 19 is a diagram for explaining an example in which the shape of the holding portion 7 provided on the separated module substrate 1 is a letter shape. As shown in FIG. 19, through-holes 26 are provided in a T-shaped holding portion 7, and individual module substrates 1 are connected by passing connection members 27 through the through-holes 26. Even with this configuration, it is possible to force the module substrate 1 together. The configuration shown in FIG. 19 has an advantage that it is not necessary to prepare a new tape substrate because the holding unit 7 itself has a role as a tape substrate in which the holding unit 7 is integrated. The connecting member 27 can also constitute a metal material force, for example. In addition to the through hole 26 described above, the holding portion 7 is provided with a transport hole 26a.
[0064] 図 20は、図 19の A— A線で切断した断面を示した断面図である。図 20に示すよう に、保持部 7に設けられた貫通孔 26に接続部材 27が挿入されて力しめられているこ とがわかる。このように貫通孔 26を設けた保持部 7を接続部材 27で接続する方法に ついて図 21を参照しながら説明する。図 21 (a)に示すように、それぞれ異なる保持 部 7に形成された貫通孔 26にコの字形状をした接続部材 27を挿入する。そして、図 21 (b)に示すように、挿入した接続部材 27の上部を折り曲げることにより、接続部材 27をかしめる。このようにして、 T字形状をした保持部 7を用いて複数のモジュール基 板を接続することができる。 FIG. 20 is a cross-sectional view showing a cross section taken along line AA in FIG. As shown in FIG. 20, it can be seen that the connecting member 27 is inserted into the through hole 26 provided in the holding portion 7 and is pressed. A method of connecting the holding portion 7 provided with the through hole 26 with the connecting member 27 will be described with reference to FIG. As shown in FIG. 21 (a), a U-shaped connecting member 27 is inserted into through holes 26 formed in different holding portions 7. Then, as shown in FIG. 21 (b), the upper part of the inserted connecting member 27 is bent to caulk the connecting member 27. In this way, a plurality of module substrates can be connected using the T-shaped holding portion 7.
[0065] 図 22は、テープ基板 13の保持部 14に段差 (オフセット) 28を設けた例を示した図 である。図 22に示すように、保持部 14に段差 28を設けることにより、モジュール基板 の保持部とテープ基板 13の保持部 14とを接続する際、段差 28が、モジュール基板 の保持部の厚さを吸収できるので、モジュール基板の表面とテープ基板 13の高さを 揃えることができる。 FIG. 22 is a view showing an example in which a step (offset) 28 is provided in the holding portion 14 of the tape substrate 13. As shown in FIG. 22, when the holding portion 14 is provided with a step 28, the step 28 increases the thickness of the holding portion of the module substrate when the holding portion of the module substrate and the holding portion 14 of the tape substrate 13 are connected. Since absorption is possible, the surface of the module substrate and the height of the tape substrate 13 can be aligned.
[0066] 図 23は、モジュール基板 1の保持部 7とテープ基板 13の保持部 14との他の接続方 法を示した図である。図 23に示すように、モジュール基板 1に設けられている保持部 7に貫通孔 29が設けられている。そして、この貫通孔 29に突起状の保持部 14を挿入
し、折り曲げることによって保持部 7と保持部 14が接続されている。このように構成す ることによつても、複数のモジュール基板 1をテープ基板 13に接続することができる。 FIG. 23 is a diagram showing another method of connecting the holding unit 7 of the module substrate 1 and the holding unit 14 of the tape substrate 13. As shown in FIG. 23, a through hole 29 is provided in the holding portion 7 provided in the module substrate 1. Then, the protruding holding portion 14 is inserted into the through hole 29. Then, the holding part 7 and the holding part 14 are connected by bending. With this configuration, a plurality of module substrates 1 can be connected to the tape substrate 13.
[0067] 以上、本発明者によってなされた発明を実施の形態に基づき具体的に説明したが 、本発明は前記実施の形態に限定されるものではなぐその要旨を逸脱しない範囲 で種々変更可能であることは 、うまでもな!/、。 [0067] While the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the invention. There's nothing wrong!
[0068] 前記実施の形態では、別会社における不揮発性メモリの製造ラインと ICカードの製 造ラインとを使用する例について説明したが、例えば同じ会社内の不揮発性メモリの 製造ラインと ICカードの製造ラインとを使用する場合にも適用することができる。 産業上の利用可能性 In the above-described embodiment, an example in which a non-volatile memory production line and an IC card production line in another company are used has been described. For example, a non-volatile memory production line and an IC card in the same company are used. The present invention can also be applied when using a production line. Industrial applicability
[0069] 本発明は、不揮発性メモリチップを搭載した ICカードを製造する製造業に幅広く利 用することができる。
[0069] The present invention can be widely used in the manufacturing industry for manufacturing IC cards equipped with nonvolatile memory chips.
Claims
請求の範囲 The scope of the claims
[I] (a)複数のモジュール基板を一体ィ匕した配線基板を用意する工程と、 [I] (a) preparing a wiring board in which a plurality of module boards are integrated;
(b)個々の前記モジュール基板上に半導体チップを搭載する工程と、 (b) mounting a semiconductor chip on each of the module substrates;
(c)前記モジュール基板と前記半導体チップとを電気接続する工程と、(c) electrically connecting the module substrate and the semiconductor chip;
(d)前記配線基板カゝら個々の前記モジュール基板を個片化する工程とを備え、 前記 (d)工程は、前記モジュール基板力も突出した保持部も含めて個片化すること を特徴とする半導体装置の製造方法。 (d) a step of dividing the module substrate into individual pieces of the module substrate, and the step (d) is divided into pieces including the module substrate force and the holding portion protruding. A method for manufacturing a semiconductor device.
[2] さらに、前記半導体チップを封止する工程を備えることを特徴とする請求項 1記載 の半導体装置の製造方法。 2. The method for manufacturing a semiconductor device according to claim 1, further comprising a step of sealing the semiconductor chip.
[3] さらに、個片化した前記モジュール基板に搭載されている前記半導体チップの電 気的特性検査を実施する工程を備えることを特徴とする請求項 1記載の半導体装置 の製造方法。 [3] The method for manufacturing a semiconductor device according to [1], further comprising a step of performing an electrical characteristic inspection of the semiconductor chip mounted on the individual module substrate.
[4] さらに、個片化した前記モジュール基板にある前記保持部を使用して、複数の前記 モジュール基板をテープ基板に接続する工程を備えることを特徴とする請求項 1記 載の半導体装置の製造方法。 [4] The semiconductor device according to claim 1, further comprising a step of connecting a plurality of the module substrates to a tape substrate using the holding portion in the module substrate separated into pieces. Production method.
[5] 前記テープ基板は、フープ材をパンチングして前記モジュール基板の搭載領域に 空間を設けていることを特徴とする請求項 4記載の半導体装置の製造方法。 5. The method of manufacturing a semiconductor device according to claim 4, wherein the tape substrate is provided with a space in a mounting region of the module substrate by punching a hoop material.
[6] 前記テープ基板は、 ICカードの製造工程で使用されるものであることを特徴とする 請求項 4記載の半導体装置の製造方法。 6. The method of manufacturing a semiconductor device according to claim 4, wherein the tape substrate is used in an IC card manufacturing process.
[7] 前記テープ基板は、耐熱性を有することを特徴とする請求項 4記載の半導体装置 の製造方法。 7. The method for manufacturing a semiconductor device according to claim 4, wherein the tape substrate has heat resistance.
[8] 前記モジュール基板と前記テープ基板とは機械的に接続されていることを特徴とす る請求項 4記載の半導体装置の製造方法。 8. The method for manufacturing a semiconductor device according to claim 4, wherein the module substrate and the tape substrate are mechanically connected.
[9] 前記モジュール基板と前記テープ基板とは接着剤または融着によって接続されて いることを特徴とする請求項 4記載の半導体装置の製造方法。 9. The method of manufacturing a semiconductor device according to claim 4, wherein the module substrate and the tape substrate are connected by an adhesive or fusion.
[10] 前記テープ基板は、金属から構成されて ヽることを特徴とする請求項 4記載の半導 体装置の製造方法。 10. The method for manufacturing a semiconductor device according to claim 4, wherein the tape substrate is made of metal.
[II] 前記テープ基板は、榭脂シートから構成されていることを特徴とする請求項 4記載
の半導体装置の製造方法。 [II] The tape substrate according to claim 4, wherein the tape substrate comprises a resin sheet. Semiconductor device manufacturing method.
[12] 前記テープ基板は、耐熱性の紙または不繊布から構成されて ヽることを特徴とする 請求項 4記載の半導体装置の製造方法。 12. The method for manufacturing a semiconductor device according to claim 4, wherein the tape substrate is made of heat-resistant paper or non-woven cloth.
[13] 前記半導体チップは、不揮発メモリチップと前記不揮発性メモリチップを制御するコ ントローラチップとを搭載したものであることを特徴とする請求項 1記載の半導体装置 の製造方法。 13. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor chip includes a nonvolatile memory chip and a controller chip that controls the nonvolatile memory chip.
[14] 前記モジュール基板を部分的に封止して 、ることを特徴とする請求項 2記載の半導 体装置の製造方法。 14. The method for manufacturing a semiconductor device according to claim 2, wherein the module substrate is partially sealed.
[15] 前記半導体チップは、前記モジュール基板の片側によった位置に搭載されることを 特徴とする請求項 1記載の半導体装置の製造方法。 15. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor chip is mounted at a position according to one side of the module substrate.
[16] 前記モジュール基板にある一つの角部は面取りが施されており、前記半導体チッ プは、前記モジュール基板の中心に対して面取りされている前記角部がある領域と は反対側の領域に搭載されることを特徴とする請求項 1記載の半導体装置の製造方 法。 [16] One corner of the module substrate is chamfered, and the semiconductor chip is a region opposite to a region where the corner is chamfered with respect to the center of the module substrate. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the method is mounted on a semiconductor device.
[17] 前記モジュール基板には、前記半導体チップとは異なる ICカードチップを搭載する 領域が確保されていることを特徴とする請求項 1記載の半導体装置の製造方法。 17. The method for manufacturing a semiconductor device according to claim 1, wherein an area for mounting an IC card chip different from the semiconductor chip is secured on the module substrate.
[18] 前記モジュール基板には、前記 ICカードチップ搭載用のパターンが形成されてい ることを特徴とする請求項 17記載の半導体装置の製造方法。 18. The method for manufacturing a semiconductor device according to claim 17, wherein a pattern for mounting the IC card chip is formed on the module substrate.
[19] 前記保持部には、導体パターンが形成されていることを特徴とする請求項 1記載の 半導体装置の製造方法。 19. The method for manufacturing a semiconductor device according to claim 1, wherein a conductor pattern is formed in the holding portion.
[20] 前記導体パターンは、金膜より形成されていることを特徴とする請求項 19記載の半 導体装置の製造方法。 20. The method for manufacturing a semiconductor device according to claim 19, wherein the conductor pattern is formed of a gold film.
[21] 複数の前記モジュール基板を前記テープ基板に接続した状態で、前記モジュール 基板に前記半導体チップとは異なる ICカードチップを搭載する工程を備えることを特 徴とする請求項 4記載の半導体装置の製造方法。 21. The semiconductor device according to claim 4, further comprising a step of mounting an IC card chip different from the semiconductor chip on the module substrate in a state where a plurality of the module substrates are connected to the tape substrate. Manufacturing method.
[22] 前記 ICカードチップを榭脂で封止する工程を備えることを特徴とする請求項 21記 載の半導体装置の製造方法。 22. The method for manufacturing a semiconductor device according to claim 21, further comprising a step of sealing the IC card chip with a resin.
[23] 前記モジュール基板と前記保持部との間を切断して前記モジュール基板を個片化
する工程を備えることを特徴とする請求項 22記載の半導体装置の製造方法。 [23] The module substrate is separated into pieces by cutting between the module substrate and the holding portion. 23. The method of manufacturing a semiconductor device according to claim 22, further comprising a step of:
[24] 前記モジュール基板と前記保持部との切断には、金型を用いた方式、ウォータジ ット方式あるいはダイアモンドソーを用いた切断方式を使用することを特徴とする請求 項 23記載の半導体装置の製造方法。 24. The semiconductor device according to claim 23, wherein a cutting method using a mold, a water jet method, or a cutting method using a diamond saw is used for cutting the module substrate and the holding portion. Manufacturing method.
[25] (a)モジュール基板と、 [25] (a) a module substrate;
(b)前記モジュール基板上に搭載された半導体チップと、 (b) a semiconductor chip mounted on the module substrate;
(c)前記モジュール基板力 突出した保持部とを備えることを特徴とする半導体装 置。 (c) A semiconductor device comprising a holding portion protruding from the module substrate force.
[26] 前記半導体チップは封止されていることを特徴とする請求項 25記載の半導体装置 26. The semiconductor device according to claim 25, wherein the semiconductor chip is sealed.
[27] 前記半導体チップは、不揮発性メモリチップと前記不揮発性メモリチップを制御す るコントローラチップを搭載したものであることを特徴とする請求項 26記載の半導体 装置。 27. The semiconductor device according to claim 26, wherein the semiconductor chip includes a non-volatile memory chip and a controller chip that controls the non-volatile memory chip.
[28] 前記保持部には、貫通孔が形成されていることを特徴とする請求項 25記載の半導 体装置。 28. The semiconductor device according to claim 25, wherein the holding portion is formed with a through hole.
[29] 前記保持部は、 T字形状をして 、ることを特徴とする請求項 28記載の半導体装置。 29. The semiconductor device according to claim 28, wherein the holding portion has a T shape.
[30] 前記半導体装置は更に、 [30] The semiconductor device further includes:
(d)前記半導体チップが搭載された領域とは異なる領域の前記モジュール基板上に 搭載された ICチップを備えることを特徴とする請求項 25記載の半導体装置。
26. The semiconductor device according to claim 25, further comprising: an IC chip mounted on the module substrate in a region different from a region where the semiconductor chip is mounted.
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