WO2007000745A1 - Procede et appareil de decodage de canal spatial - Google Patents
Procede et appareil de decodage de canal spatial Download PDFInfo
- Publication number
- WO2007000745A1 WO2007000745A1 PCT/IB2006/052145 IB2006052145W WO2007000745A1 WO 2007000745 A1 WO2007000745 A1 WO 2007000745A1 IB 2006052145 W IB2006052145 W IB 2006052145W WO 2007000745 A1 WO2007000745 A1 WO 2007000745A1
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- scc
- signal
- error
- inverse
- encoded signal
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- 238000000034 method Methods 0.000 title claims abstract description 50
- 230000003111 delayed effect Effects 0.000 claims description 2
- 230000000875 corresponding effect Effects 0.000 description 12
- 238000005516 engineering process Methods 0.000 description 12
- 238000006243 chemical reaction Methods 0.000 description 9
- 230000005540 biological transmission Effects 0.000 description 6
- 238000004364 calculation method Methods 0.000 description 6
- 238000004891 communication Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 6
- 239000011159 matrix material Substances 0.000 description 5
- 238000004088 simulation Methods 0.000 description 5
- 238000013507 mapping Methods 0.000 description 3
- 238000010295 mobile communication Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 230000002596 correlated effect Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000005562 fading Methods 0.000 description 1
- 238000007781 pre-processing Methods 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/02—Arrangements for detecting or preventing errors in the information received by diversity reception
- H04L1/06—Arrangements for detecting or preventing errors in the information received by diversity reception using space diversity
- H04L1/0618—Space-time coding
- H04L1/0631—Receiver arrangements
Definitions
- the present invention relates to a method and apparatus for decoding in wireless communication system, and more particularly, to a method and apparatus for spatial channel decoding.
- High Speed Downlink Packet Access which can support high speed data transmission, especially provide the downlink from a base-station to a user equipment, has become one of the main goals for future wireless communication system.
- MIMO Multiple Input Multiple Output
- BLAST Bell Lab Layered Space Time
- PARC Per Antenna Rate Control
- R MPD Rate Control Multipath Diversity
- DSTTD-SGRC Double Space Time Transmit Diversity - Sub-Group Rate Control
- the channel coding is combined with multi-channel parallel architecture, by adding some redundant information into multi-channel parallel signals, so that there is spatial correlation between multi-channel parallel signals, which helps the UE at the receiving side to demodulate the multi-channel parallel signals.
- SCC Spatial Channel Coding
- Fig.l shows the block diagram of the architecture for the transmitter (such as base station) and the receiver (such as UE) adopting the spatial channel coding method proposed in accordance with above patent application.
- the data to be transmitted is first fed into SCC architecture 510 for SCC encoding and transferred into multi-channel parallel coded signals.
- the coded signal from each parallel channel is interleaved in interleaving unit 102, spread by orthogonal variable spreading frequency (OVSF) code in OVSF spreading unit 103, scrambled in scrambling unit 104, added with signals from multiple code channels in multiplexer unit 105, then the overlapped signals are pulse shaped in pulse shaping unit 106 and modulated into multi-channel RF signals in radio frequency (RF) unit 107.
- RF radio frequency
- Multi-channel parallel RF signals arrive at the receiver 600 of UE via wireless channel.
- Fig.l illustrates the case that receiver 600 has only one receive antenna.
- the signals received by this receive antenna are the superimposition of all paths of signals transmitted via multiple parallel spatial channels.
- the multi-channel RF signals received from this receive antenna are transformed into baseband signals in RF unit 208 and send into RRC filter and over- sampling unit 206, so that the analog signals are converted into discrete signals.
- the discrete signals are sent into SCC decoding architecture 610, after being de-spread in de-spreading and detecting unit 204 and de-interleaved in de-interleaving unit 202. While, the channel characteristics of multiple parallel spatial channels are estimated according to the received pilot signal in channel estimation unit 220.
- SCC decoding architecture 610 utilizes the channel characteristics of multiple channels estimated by channel estimation unit 220 to perform Soft Decision Space-Time Viterbi Decode on the de-interleaved superimposed signals according to the SCC encode architecture 510 adopted by transmitter 500. In this way, the added multi-channel parallel signals are decoded and transformed into single-channel serial data, which are the user data.
- An object of the present invention is to provide a method and apparatus for SCC decoding, with which the decoding complexity at UE side can be reduced.
- a spatial channel decoding method comprises the steps of: (a) performing inverse spatial channel code (SCC) encoding process on received SCC signal to obtain inverse SCC encoded signal;
- SCC inverse spatial channel code
- a spatial channel decoder comprises: a inverse encoding apparatus for performing inverse spatial channel code (SCC) encoding on received SCC signal to obtain inverse SCC encoded signal; a re-encoding apparatus for performing SCC re-encoding process on the inverse SCC encoded signal output from the inverse encoding apparatus to obtain SCC re-encoded signal; an error calculating apparatus for calculating error between the received SCC signal and the SCC re-encoded signal; and an output apparatus for outputting corresponding decoded signal based on the inverse SCC encoded signal and the error, according to the measured channel quality.
- SCC inverse spatial channel code
- the structure of SCC decoding solution provided by the present invention is simpler than that of the pure space-time Viterbi decode solution, and the decoding complexity can be reduced greatly under the condition of keeping the system performance,.
- Fig. l is a block diagram of the structure of the transmitter and receiver adopting SCC encoding/decoding technology, in which the transmitter has multiple transmit antenna and the receiver has only one receive antenna;
- Fig.2 is the flow chart for the SCC decoding method of the present invention
- Fig. 3 is a block diagram of the SCC architecture according to the SCC decoding method of the present invention
- Fig.4 is a block diagram of the SCC re-encoding architecture according to an embodiment of present invention in Fig.3;
- Fig.5 a block diagram of the SCC inverse encoding architecture according to an embodiment of present invention in Fig.3;
- Fig.6 is a graph of FER (Frame Error Rate) varying with SNR (Signal to Noise Ratio) of received signal measured in simulation; and Fig.7 is a graph of saved decoding complexity varying with SNR in the case of adopting the SCC decoding method of the present invention.
- FER Fre Error Rate
- SNR Signal to Noise Ratio
- the SCC decoding method according to the present invention utilizes Inverse Spatial Channel Code (Inverse SCC) technology to encode the received signal when channel quality is good.
- Inverse SCC Inverse Spatial Channel Code
- This method is also called Pre-Processing SCC Decode (PPSD), and the details are shown in Fig.2.
- Fig.2 is the flow chart of PPSD method provided by the present invention.
- the serial/parallel conversion is performed on the signal r received by the receiver, which is to be decoded, so that the received signal is converted into multi-channel parallel signals (Step SlO);
- Step SIl the inverse SCC encoding is performed on the multi-channel parallel signals.
- the detailed description for this inverse SCC encoding method will be given later in conjunction with Fig.4 and Fig.5;
- Step S 13 The multi-channel parallel signals obtained in Step S 13 are SCC re-encoded to obtain signal r ' (Step S 14);
- a variation of the error signal e i.e. the difference between each error signal e is calculated to obtain the variation ev ar of e (Step S 17);
- the variation eva r of e is compared with a pre-defined threshold T g (Step S 18);
- Step S20 If eva r ⁇ T g , it indicates that system noise is within an acceptable range of the receiver, in other word, the SNR (signal to noise ratio) meets certain requirement at that time. Then signal s is output directly as the final decoded signal (Step S20).
- Fig. 3 is a block diagram of a PPSD decoding structure of present invention designed according to the PPSD method shown in Fig.2.
- the received signal r to be decoded is serial/parallel converted into multi-channel parallel signals in the first serial/parallel conversion unit 601.
- inverse SCC encoding unit 602 the inverse SCC encoding process is performed on the multi-channel parallel signals output from the first serial/parallel conversion unit 601.
- the multi-channel parallel signals output from the inverse SCC encoding unit 602, which is inverse SCC encoded, are added in modulus 2 in first summing unit 604, so as to obtain signal s.
- the signal s is serial/parallel converted again in second serial/parallel conversion unit 605, so as to obtain the corresponding multi-channel parallel signals.
- the multi-channel parallel signals output from the second serial/parallel conversion unit 605 are SCC re-encoded in SCC re-encoding unit 606, so as to obtain signal r '.
- the output result of the error signal calculating unit 607 is parallel/serial converted in the parallel/serial conversion unit 608, so as to obtain error signal e.
- Error signal e is sent into evar calculation control unit 609 to calculated the variation of the error signal e, so that the variation e Var of the error signal e is calculated.
- the e Var calculation control unit 609 can also be used to compare the variation e Var with a predefined threshold T g .
- eva r calculation control unit 609 judges eva r >T g , eva r calculation control unit 609 makes the control switch 611 to connect with space-time Viterbi decoder 612, so that error signal e is processed by using the space -time Viterbi decoding method in the space-time Viterbi decoder 612.
- the decoded result and the signal s are added in modulus 2 in the second summation unit 613, so as to output the final decoded signal.
- evar calculation control unit 609 judges evar ⁇ T g , evar calculation control unit 609 makes space-time Viterbi decoder 612 not work anymore.
- the second summation unit 613 outputs signal s as the final decoded signal.
- a SCC structure under the condition that two transmit antenna and one receive antenna are used, is formed as shown in Fig.4.
- serial data bit bl is shifted into the registers of four parallel encoding branches, each of which has nine D registers.
- Each processing branch implements the encoding process according to the predefined encoding rules. For example, the generated code Go of the first channel encoding branch is 111110111 and the generated code Gi of the second channel encoding branch is 100100010, wherein each bit of the generated code is corresponding to one D register.
- the detailed encoding process is that: in each branch, the bit status stored in each register, of which the corresponding bit of the generated code is 1, is extracted and added in modulus 2, so that the encoded bit signal is obtained; then, the encoded bits of the first and second branches are combined and processed by BPSK mapping unit 621, so that the symbol CiC 2 to be transmitted via the first antenna is obtained. In a similar way, the encoded bits of the third and fourth branches are processed by BPSK mapping unit 622, so that the symbol C3C 4 to be transmitted via the second antenna is obtained.
- a single-channel serial data are coded and mapped into two-channel parallel signals being channel encoded and the obtained two-channel parallel signals are spatially correlated with each other.
- the code generation matrix G " of the inverse SCC encoding structure corresponding to the above code generation matrix G is:
- the inverse SCC encoding structure is designed according to the code generation matrix G "1 , as shown in Fig.5.
- the received signal is processed by BPSK de-mapping unit 620 and sent into the D registers of each encoding branch respectively, wherein each bit of the code generation matrix G " is corresponding to one D register.
- the bit status stored in each D register, of which the corresponding bit is 1, is extracted and added in modulus 2, so that the encoded bit signal is obtained.
- Fig.5 is corresponding to one embodied structure for the dashed part of Fig.3 (including SCC encoding unit 602, the first serial/parallel conversion unit 601 and the first summation unit 604).
- SCC re-encoding unit 606 in Fig.3 is same as the SCC encoding structure in transmitter. Therefore, Fig.4 can be treated as one embodied structure corresponding to SCC re-encoding unit 606.
- transmitter has two transmit antennas and receiver has one receive antenna.
- present patent is not limited to this. It can also be used in the case where more transmit antennas can be used, or the receiver has more receive antennas.
- Other parameters of the simulation experiment is set according to 3GPP
- Fig.6 is the graphs for the FER of received signal varying with SNR, in the case that
- PPSD decoding solution of present invention and the SCC decoding solution with space-time Viterbi decoding are adopted respectively.
- the abscissa is SNR of the received signal and ordinate is FER. From fig.6, it can be seen easily that the performance is nearly same for the two decoding solutions.
- equation (3) is used to measure the saved complexity of PPSD decode solution:
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- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Error Detection And Correction (AREA)
- Radio Transmission System (AREA)
Abstract
L'invention concerne un procédé et un appareil de décodage de canal spatial. Le procédé consiste à: a) accomplir un processus de codage d'un code de canal spatial (SCC) inverse sur un signal SCC reçu afin d'obtenir un signal SCC inverse codé; b) accomplir un processus de codage SCC sur le signal SCC inverse codé afin d'obtenir un signal SCC recodé; c) calculer une erreur entre le signal SCC reçu et le signal SCC recodé; et d) obtenir un signal décodé correspondant basé sur le signal SCC inverse codé et l'erreur, selon la qualité du canal mesurée. La mise en oeuvre du procédé et de l'appareil de l'invention permet de réduire la complexité du décodage du canal spatial tout en conservant un meilleur rendement du système.
Applications Claiming Priority (2)
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CN200510081081.3 | 2005-06-29 | ||
CN200510081081 | 2005-06-29 |
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WO2007000745A1 true WO2007000745A1 (fr) | 2007-01-04 |
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PCT/IB2006/052145 WO2007000745A1 (fr) | 2005-06-29 | 2006-06-28 | Procede et appareil de decodage de canal spatial |
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Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20040028121A1 (en) * | 2002-01-25 | 2004-02-12 | Kabushiki Kaisha Toshiba | Receiver processing systems |
EP1404047A2 (fr) * | 2002-09-27 | 2004-03-31 | NTT DoCoMo, Inc. | Egalisation itérative pour la transmission à plusieurs entrées et sorties |
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- 2006-06-28 WO PCT/IB2006/052145 patent/WO2007000745A1/fr active Application Filing
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
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US20040028121A1 (en) * | 2002-01-25 | 2004-02-12 | Kabushiki Kaisha Toshiba | Receiver processing systems |
EP1404047A2 (fr) * | 2002-09-27 | 2004-03-31 | NTT DoCoMo, Inc. | Egalisation itérative pour la transmission à plusieurs entrées et sorties |
Non-Patent Citations (1)
Title |
---|
MASAAKI FUJII: "Path Diversity Reception Employing Steering Vector Arrays and Sequence Estimation Techniques for ISI Channels", IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS, IEEE SERVICE CENTER, PISCATAWAY, US, vol. 17, no. 10, October 1999 (1999-10-01), XP011055021, ISSN: 0733-8716 * |
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