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WO2007071435A1 - Commutateur optique non bloquant - Google Patents

Commutateur optique non bloquant Download PDF

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Publication number
WO2007071435A1
WO2007071435A1 PCT/EP2006/012450 EP2006012450W WO2007071435A1 WO 2007071435 A1 WO2007071435 A1 WO 2007071435A1 EP 2006012450 W EP2006012450 W EP 2006012450W WO 2007071435 A1 WO2007071435 A1 WO 2007071435A1
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WIPO (PCT)
Prior art keywords
stage
array
signals
arrays
signal
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PCT/EP2006/012450
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English (en)
Inventor
Yuri Panarin
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Dublin Institute Of Technology
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Publication of WO2007071435A1 publication Critical patent/WO2007071435A1/fr

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/0001—Selecting arrangements for multiplex systems using optical switching
    • H04Q11/0005—Switch and router aspects
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/0001—Selecting arrangements for multiplex systems using optical switching
    • H04Q11/0005—Switch and router aspects
    • H04Q2011/0007—Construction
    • H04Q2011/0024—Construction using space switching
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/0001—Selecting arrangements for multiplex systems using optical switching
    • H04Q11/0005—Switch and router aspects
    • H04Q2011/0007—Construction
    • H04Q2011/0035—Construction using miscellaneous components, e.g. circulator, polarisation, acousto/thermo optical
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/0001—Selecting arrangements for multiplex systems using optical switching
    • H04Q11/0005—Switch and router aspects
    • H04Q2011/0037—Operation
    • H04Q2011/0039—Electrical control
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/0001—Selecting arrangements for multiplex systems using optical switching
    • H04Q11/0005—Switch and router aspects
    • H04Q2011/0052—Interconnection of switches

Definitions

  • This invention relates to the field of optical switching and in particular to multi-channel optical switches capable of switching multiple input channels to multiple output channels.
  • optical signals rather than electrical signals provides significant benefits in certain respects (for example, signal speed, reduction of heat), it imposes its own unique set of problems which need to be addressed in a different way from traditional electronic solutions.
  • a telecommunications switch may require that any one of N input signals be switched to any one of N output channels. This is usually accomplished using what is known as a matrix switch.
  • a typical crossbar switch can contain perhaps several hundred individual Switching Elements (SE).
  • SE Switching Elements
  • N 2 switching elements Each is placed on the crossbar of input and output channels.
  • the signal from input channel 1 would pass through 16 separate switches, any one of which can be activated to direct the channel 1 input signal to one of the 16 output channels.
  • Each of the other 15 input channels would have 16 dedicated switches, one for each output channel, for a total of 256 switching elements.
  • This crossbar architecture offers simple control and strict-sense non-blocking (see below) switching which allows routing of any input to any unused output without disturbing other connections.
  • a switch architecture is said to be "blocking” if it is not possible to route every input to every output, i.e. some interconnection pattern cannot be realised.
  • a non-blocking switch is one in which every pattern can be realised.
  • N x N crossbar matrix switches are wide-sense non-blocking.
  • Spanke-Strict-sense non-blocking switches can use any valid path at any time to connect any unused input / to any unused outputy.
  • the Spanke architecture is strict sense non-blocking, but it requires 2N(N -1) switching elements of the type 1x2 (i.e. a 16 x 16 switch will require 480 1x2 switching elements, even more than the 256 required by a crossbar matrix switch).
  • An object of the present invention is to provide an optical switch which is strict sense non- blocking and which provides an alternative architecture to existing switches.
  • switch types There are several alternative switch technologies which can be employed for optical switching. Such switch types include:
  • MEMs Micro-electro mechanical machines which are a subcategory of optomechanical switches. MEMs use tiny reflective surfaces to redirect light beams to ports or to one another.
  • Thermo-optical switches use temperature control to change the refractive index of a waveguide through which the signal passes, thereby changing the signal path.
  • Bubble switches which are a subcategory of thermo-optical switches. Bubble switches employ inkjet technology to change the refractive index of a liquid by heating to create a bubble, which influences the path of a signal in a waveguide.
  • Liquid crystal switches process the polarisation state of light and employ polarisation-dependent optics to steer the polarised signals.
  • Electro-optical switches use directional couplers whose coupling ratio is changed by employing a voltage to vary the refractive index of a substrate, and thereby redirect a signal.
  • Acousto-optic switches use the interaction between sound and light to redirect the path of the light signal passing through a waveguide.
  • the present invention is directed to providing a generalised switching architecture usable with all types of switches, and one which, in particular, achieves significant economies with liquid crystal switches.
  • the core of a liquid crystal (LC) switch is a liquid crystal matrix (LCM).
  • An LCM comprises two glass plates with transparent electrodes and an LC layer between them. (Such a matrix placed between two cross polarisers forms a conventional LCD screen.)
  • the LC matrix may perform parallel and independent switching of all input optical channels, where one pixel of the matrix performs 1x2 (or 2x2) switching in one (or two) channels.
  • the optical switch can be arranged using several different schemes through a combination of birefringent beam splitters (BS), the LC cell, and either a grating or wave-plate.
  • BS birefringent beam splitters
  • LC switch mechanisms incorporates multiple switching elements in a single low cost assembly.
  • the expense of the device arises mainly from the associated optical elements, in particular the beam splitters.
  • FIG. 1 An example of a basic switching array, for use as a building block for an optical switch, is shown in Fig. 1. This scheme is a blocking scheme and therefore is provided for ease of understanding only.
  • each switching array (SA) 10 comprises two beam splitters (BS) 12,14 and one LCM 16 which is shown with two pixels 18,20.
  • the switching array carries out 2 x 2 switching on two signals 22,24 using one of the pixels 18.
  • Pixel 20 could operate independently on two further signals (not shown), and in practice, additional pixels would be likely to be included in the LCM.
  • the signals 22,24 start with the same polarisation. For ease of illustration, vertical polarisation is shown with an "up" arrow and horizontal polarisation shown with a “down” arrow.
  • a half wave plate 26 in the path of signal 24 rotates its polarisation through 90 degrees from vertical to horizontal (represented by the polarisation arrowhead flipping).
  • signals 22 and 24 enter the first beam splitter 12, they are oppositely polarised.
  • the birefringent beam splitter operates to allow a signal having one polarisation to pass straight through unaffected, but if the signal is oppositely polarised, operates to deflect the signal so that it emerges parallel with the straight-through path.
  • Signal 22 thus passes directly through the beam splitter and signal 24 is deflected upwards to emerge parallel with and collinear with signal 22, so that both signals enter the LCM 16 overlapping one another. Note that the separation distance between the incident parallel signals 22 and 24 is carefully chosen to be equal to the deflection distance of the beam splitter used.
  • both signals 22 and 24 emerge from the SA 10 in the same direction and along the same line and with the same polarisation as they entered the SA 10, as Fig. IA shows.
  • a single SA of the type shown in Figs. IA and IB performs just N/2 parallel 2x2 switching. To switch larger numbers of beams with one another, one must combine several switching arrays.
  • Fig. 2 shows how one would switch 4 beams, denoted as Al, Bl, Cl and Dl into an arbitrary output order (e.g. starting with beams Al, B 1, Cl and Dl in input channels 1,2,3 and 4, respectively, beam Al is directed to the fourth output channel, beam Bl to the second output channel, beam Cl to the first output channel, and beam Dl to the third output channel).
  • Fig. 2 the switching arrays are shown in a simplified view, with only the various switching arrays 30a,30b,30c,30d,30e and 30f being shown simply as pixels in the four successive liquid crystal arrays 16a, 16b, 16c and 16d. It should be understood, though, that each pixel position represents a full switching array of the type shown in Figs. IA and IB, i.e. with beam splitters and half wave plates before and after the LCM 16.
  • switching arrays 30a,30c,30d and 30e are each in the unenergised state, causing the incident beams to be switched with one another (as in Fig. IB).
  • the pixels of SA 30b and 30f are energised such that the beams pass emerge unswitched with one another.
  • the four input signals Al, Bl, Cl, Dl can be switched in any desired order.
  • the architecture is rearrangeably non-blocking, meaning that if it were desired to rearrange the output order from [Cl, Bl, Dl, Al] to [Cl, Dl, Bl, Al], it would be necessary to re-route all four signals.
  • the input beams are arranged in 4 x 4 square fashion with four columns (1-4) and four rows (A-D) as shown in Figure 3A.
  • Each column of four positions ⁇ A1,B1,C1,D1 ⁇ , ⁇ A2,B2,C2,D2 ⁇ , ⁇ A3,B3,C3,D3 ⁇ , ⁇ A4,B4,C4,D4 ⁇ can be switched into any arbitrary arrangement of output positions (so, for example the third column of signals in Fig. 3A, namely ⁇ A3,B3,C3,D3 ⁇ can be switched to the order ⁇ A3,C3,D3,B3 ⁇ ).
  • Fig. 3B represents an arbitrary possible arrangement of the 4x4 matrix of input signals after the vertical position of the signals in each column have been rearranged using (for each column) an arrangement such as was shown in Fig. 2. Note that in moving from Fig. 3A to Fig. 3B, only vertical positions have been switched. All of the signals labelled with a "1" (denoting that they were in the left-most column) are still in the same leftmost column at this point, and so on.
  • Fig. 3D shows the sequential ordering of switching arrays (again using the schematic notation of successive liquid crystal arrays 16a,16b,16c,16d, ... in which one pixel 30 represents a complete switching array for switching a pair of signals 38).
  • Fig. 3D shows four further liquid crystal arrays 16e,16f,16g,16h in which each pixel 30 (representing a complete switch of course) is arranged to switch a pair of signals 38 horizontally.
  • any input row of signals e.g. the top row in Fig. 3B, namely ⁇ C1,A2,A3,D4 ⁇ , or any other row
  • any input row of signals can be switched into any arbitrary order such as ⁇ A3,D4,C1,A2 ⁇ as seen in the top row of Fig. 3C.
  • Fig. 3C thus represents an arbitrary 4x4 output achievable using the eight successive arrays of Fig. 3D, when starting from the input of Fig. 3 A.
  • the above device has an essential drawback, namely a blocking feature. This means that the input channels from the same column (say Al and Bl) cannot be switched into the same output row (the top row of Fig. 3C). Furthermore, it is impossible to switch two input signals into the same output position or channel.
  • 8 SAs are involved, i.e. 8 liquid crystal matrices and (if each switching array uses a common beam splitter for all of the signals before and after the LCM) a total of 16 beam splitters.
  • the invention provides an optical switch for switching a plurality of up to N optical signals along independent non-blocking paths, said switch comprising: a plurality of switching stages arranged to serially direct said optical signals between a first of said stages and a last of said stages; the first of said stages comprising an ordered array which comprises N active switching elements; each stage subsequent to the first stage comprising double the number of ordered arrays of the preceding stage, each array also comprising N active switching elements arranged such that each active switching element in the first stage array is identifiable with a counterpart active switching element in each array of each subsequent stage, each stage subsequent to the first stage having the spatial arrangement of duplicate adjacent copies of the arrays of the stage immediately before it; each active switching element, other than in the last stage, being controllable to direct a received optical signal towards one of the two counterparts of that switching element respectively located in one of the duplicate copies of the subsequent stage; whereby a signal received by a given active switching element in the first stage array may traverse along a set of diverging paths to the last stage, each path being defined by one counterpart
  • the switch further comprises a plurality of signal collectors each adapted to receive and collect a plurality of said optical signals output from the last of said stages.
  • each collector may receive a number of outputs from the last stage and collect them into a single output channel, whereby the spatial grouping of the switching elements of the last stage provides the basis for grouping outputs together in a signal collector.
  • the collectors can be positioned to receive signals from different areas of the two dimensional arrangement of last-stage arrays.
  • all of the optical signals output from all of the switching elements of that array are directed to one or more of said signal collectors exclusively associated with that array, whereby each of said signal collectors is associated with and receives its signals exclusively from one array in the final stage.
  • each final stage array can be the target for one input signal.
  • each input signal By routing each input signal to a unique target array in the final stage, and by then associating individual collectors with arrays of the final stage, the need for a convergence switch is avoided.
  • the prior art typically employs switches having a divergent half, which will typically expand N signals to one of N 2 channels at a halfway point and then a convergent half which recombines those N2 channels into N output channels (usually with an equal number of resources for both halves).
  • the routing of signals in the present invention to individual target arrays allows for simple collection without the need for convergent switching.
  • a preferred convergent switch will be composed of a plurality of parallel switches, one for each switching direction of each array of the final stage. Each such switch will collapse the output paths from that array's switching paths into a single signal preferably correcting the polarization to a uniform polarization.
  • the number of ordered arrays in the final stage is greater than or equal to N.
  • each array of active switching elements is a two-dimensional regular matrix of N switching elements arranged in I rows and J columns, and the arrays of the last stage are arranged in a two-dimensional regular matrix of N/2 arrays arranged in I rows and J/2 columns, whereby each switching element position in one half of the matrix of a single array has a corresponding array position in the matrix of the last stage arrangement.
  • rows and columns is arbitrary and does not imply any orientation or position relative to any frame of reference, so that the arrays of the last stage could equally be regarded as a matrix of N/2 arrays arranged in 1/2 rows and J columns.
  • a six stage 64 x 64 switch can be created as follows.
  • the second stage has duplicate copies, i.e. two adjacent 8 x 8 matrices or arrays or a 1 x 2 arrangement of arrays.
  • the third stage has a 2 x 2 arrangement of arrays, the fourth stage has a 2 x 4 arrangement of arrays and the fifth stage has a 4 x 4 arrangement of arrays.
  • the final sixth switching stage has 4 x 8 arrays, each of 8 x 8 pixels, and each pixel of the final stage can switch its signal to one of two unique directions (i.e. there are 4096 or 64 2 possible output channels).
  • the 8 x 8 input matrix or array of switching elements is expanded out to a 4 x 8 (or 8 x 4) matrix of arrays.
  • each successive stage alternates the direction of duplication of the arrangement of arrays.
  • each of said arrays is substantially identical, whereby each switching element associated with a given set of diverging paths shares the same spatial position within its array as each other switching element associated with the same set of diverging paths.
  • each switching element is a 1 x 2 element
  • that signal hits the &th switching element in the chosen array in the final stage, and that switching element can be controlled to output the signal to one of two output channels. Since there are 8 final stage arrays and two output channels per array, 16 output channels are catered for.
  • 8 final stage arrays must be fed by 4 arrays in the previous stage, which in turn are fed by 2 outputs in the stage before that, which is the second stage.
  • the number of arrays is therefore 1 + 2 + 4 + 8 (four stages) for a total of 15 arrays (or more generally (N-I) arrays).
  • each switching element can independently control (i.e. independently from each other switching element) a received optical signal causing it to be directed between a plurality of predetermined directions.
  • each switching element comprises a liquid crystal pixel which can control the polarisation of an optical signal passing therethrough, whereby the direction of the signal is dependent on the polarisation.
  • each stage comprises one or more polarisation-dependent optical elements adapted to direct signals issuing from the switching elements in different ones of said plurality of predetermined directions based on the polarity of the signals.
  • each switching element has a dedicated polarisation-dependent optical element adapted to direct signals issuing from that switching element alone.
  • a plurality of switching elements share a polarisation-dependent optical element adapted to simultaneously direct a plurality of signals issuing from said plurality of switching elements, with each signal being directed in a direction determined by its polarisation.
  • all of the switching elements in a single array share a single polarisation-dependent optical element.
  • At least some of the arrays in a stage share a single polarisation-dependent optical element.
  • the or each single polarisation-dependent optical element is a polarisation-selective beam splitter.
  • the or each beam splitter is a lateral displacement beam splitter which directs an incident beam in one of two parallel directions separated by a predefined distance (the displacement distance of the beam splitter) depending on the polarisation of the incident beam.
  • said lateral displacement beam splitter is dimensioned and positioned to receive as inputs the outputs of each switching element in an array, whereby each switching element can control a received signal, in conjunction with the beam splitter, to be directed onto a first array in the next stage directly in a line with the beam splitter or onto a second array in the next stage displaced laterally from the first array by a distance equal to the displacement distance of the beam splitter.
  • a "single strength" beam splitter is one which either allows all of the signals from an Nth stage single array having a first polarity to pass straight through to a (N+l)th stage first array, or displaces sideways all of the signals from that same Nth stage array onto an (N+l)th stage second array, with the displacement distance of the beam splitter being equal to the distance between like switching elements in the adjacent first and second arrays in the (N+l)th stage.
  • Double strength beam splitters can also be used to economise on the number of optical components in the switch (particularly considering the relative expense of beam splitters when compared to liquid crystal matrices).
  • a double strength beam splitter can be described as follows.
  • a "double strength" beam splitter is one which either allows all of the signals from an Nth stage array having a first polarity to pass straight through to a (N+l)th stage first array, or displaces sideways all of the signals from that same Nth stage array onto an (N+l)th stage third array, with the displacement distance of the beam splitter being equal to the distance between like switching elements in the non-adjacent first and third arrays in the (N+l)th stage, and with the first and third arrays being separated by a second array.
  • the final stage includes uniform polarisation means for ensuring that all valid optical signals output from the final stage are of a uniform polarisation. 5
  • Cross talk signals also called “residual” or “parasitic” signals
  • Cross talk components occur when a portion of the light energy is incorrectly directed by a polarisation dependent optical element on the basis of its polarisation.
  • an ideal l o beam splitter "should" deflect horizontally polarized light while allowing vertically polarized light to pass through undeflected
  • a signal composed purely of horizontally polarized light is decomposed by a real beam splitter into a major component which is correctly deflected and a minor component (cross talk component) which passes straight through. This residual component adds to the noise of the switch.
  • CTi is the crosstalk of a single stage
  • CT N the overall cross-talk of the N-channels optical switch
  • a polarizing filter is provided between the final stage and the signal collectors, said polarizing filter being chosen to allow all valid signals emerging from the final stage with said uniform polarization and to block residual signals having a different polarization state.
  • said uniform polarization means comprises a wave plate positioned to intercept and alter the polarization state of a first set of output signals which have been directed by the final stage according to a first polarization state, but not to intercept or alter the polarization state of a second set of output signals which have been directed by the final stage according to a second polarization state.
  • wave plate includes any optical device that alters the polarization state of light travelling through it, and includes without limitation half-wave plates and quarter- wave plates.
  • said wave plate is positioned to intercept signals emitted in said first output direction from the or each beam splitter.
  • the optical switch further comprises a control mechanism for conveying control signals to said switching elements and thereby control the direction of said received optical signals.
  • each of the N switching elements in any of said switching arrays is indexed according to a common scheme, whereby a received optical signal at any indexed switching element of the first stage array is directed, according to control signals issued with said control mechanism, to a switching element having the same index within one of the switching arrays of each subsequent stage.
  • each array of pixels is indexed with number kl which uniquely identifies the arrays in that stage, and where each pixel in an array is uniquely indexed within that array by a two digit index mn.
  • a 4 x 4 switch in which each pixel allows an optical signal to be directed to two corresponding pixels in the arrays of subsequent stages, will have a first stage array with an array index kl of 00, two second stage arrays with indices kl of 00 and 01, and will have four groups of output channels with indices kl of 00, 01, 10 and 11.
  • each pixel within a stage will have a unique index klmn.
  • an optical signal is switched from the first stage to the second stage and from there to the output channels, it is always directed to a switching element with the same mn index.
  • the signal entering the switch at (say) first stage pixel 0010 can end up in any of the four output channels 0010, 0110, 1010 or 1110. This signal can never pass through a pixel numbered (say) 0011, and nor can it end up in (say) output channel 1101.
  • the output channels are collected by one of four collectors which are positioned to collect a group of four outputs.
  • Each collector has an index kl and collects the output channels bearing that same kl identifier.
  • any input signal OOmn can end up in any collector kl with appropriate control signals being applied to the switching elements indexed with the same mn value.
  • said control mechanism conveys a total of N control signals, each signal controlling a plurality of commonly controlled switching elements wherein each of said plurality of commonly controlled switching elements is located in a different one of said arrays and shares the same index within its array.
  • the second stage pixels 0000 and 0100 can share a common control line, since they are mutually redundant with respect to each other.
  • second stage pixel 0100 will not receive any optical signal and so it is immaterial what control signal is applied to second stage pixel 0100.
  • second stage pixel 0000 becomes temporarily redundant. At all times, therefore, only one of these two pixels needs to be actively controlled and a single addressing or control line can be used to control both simultaneously.
  • a 64 x 64 switch for example, will have 64 input channels which enter an 8 x 8 matrix or array of switching elements indexed as 0000, 0001, ... 0076, 0077 (i.e. OOmn where m and n can each be any value from 0 to 7).
  • the number of control lines is reduced from 2048 to 64.
  • the common addressing scheme allows for the number of control lines in the final stage to be reduced from N 2 /2 control lines to just N control lines.
  • the first stage array comprises N switching elements and that each such element has an identifiable counterpart in each later stage array
  • this does not exclude the possibility that a variation on this design may use more switching elements in some arrays than in others, or that the first array may be bigger than some of the later arrays.
  • the first array is used as the input in a switch for N signals, then it has a minimum of N switching elements and each of those elements must have the identifiable counterpart in later arrays. Any other switching elements that may be present in the first array or in later arrays are redundant and may be ignored for the purposes of this definition.
  • a 64 x 64 switch may require a 2048 pixel element for the final stage (since 2048 signals can be switched using the final stage into 4096 or 64 x 64 directions).
  • These 2048 pixels may be embodied as a pair of adjacent 1024 (32 x 32) pixel elements.
  • the preceding stage will require only a single 1024 pixel element.
  • the stages before that, however, require respectively 512, 256, 128 and 64 pixels, but for reasons of economics the same 1024 pixel element may be used for each earlier stage.
  • the array of active switching elements might be taken as the upper left corner 8 x 8 group of pixels.
  • the upper left 8 x 16 pixel group would constitute two adjacent arrays of active switching elements.
  • the third stage would employ the upper left 16 x 16 quadrant, then the fourth stage would employ the top half of 16 x 32 pixels. In this way, the same physical component would be employed by the first five stages but only the active pixels (the ones which could receive signals) would be taken into consideration.
  • Figs. IA and IB show a known 2x2 switching element in schematic layout, respectively illustrating the element operating in bypass mode and in switching (exchange) mode;
  • Fig. 2 is a schematic diagram of a known arrangement for rearranging a linear group of four signals using a set of the switching elements of Fig. 1;
  • Figs. 3 A, 3B and 3C represent the arrangement of a group of 16 signals in 4x4 configuration before, during and after (respectively) being switched by a known switching arrangement based on the architecture of Fig. 2;
  • Fig. 3D is a schematic architecture of the known switching arrangement used to switch the signals of Fig. 3A into the ordering shown successively in Figs. 3B and 3C;
  • Fig. 4 is a side view of a switching element
  • Fig. 5 is a perspective view of a known beam splitter
  • Fig. 6 is a side view of an array of switching elements
  • Fig. 7 is a perspective view of a 4 x 4 optical switch, with a sample routing path shown;
  • Fig. 8 is a perspective view of the optical switch of Fig. 7, illustrating a different possible routing path
  • Fig. 9 is a perspective view of a 16 x 16 optical switch
  • Fig. 10 is a table showing all the possible switching paths for the 4 x 4 optical switch of
  • Fig. 11 is a table showing a representative part of the full switching paths of the 16 x 16 optical switch of Fig. 9.
  • Fig. 4 shows a part of an array of switching elements, indicated generally at 40, comprising a liquid crystal matrix (LCM) 42 and a beam splitter 44.
  • Beam splitter 44 is a birefringent beam splitter which operates as previously described, i.e. allowing a signal such as signal 46 either to pass straight through if polarised with a first polarisation (as shown by the vertical arrows) or displacing a signal such as signal 48 by a fixed distance D if polarised with a second polarisation (as shown by the crossed circle on beam 48 immediately before and after beam splitter 44.
  • Liquid crystal matrix 42 has a number of pixels 50a,50b,50c,50d which can be energised to allow a signal to pass through unaffected (as in the case of pixel 50b) or unenergised to change the polarisation of a signal passing through (as in the case of pixel 50c).
  • Beam splitters of this type are sold under the trade mark "Tech Spec” by Edmunds Optics, Inc. of Barrington, New Jersey, USA.
  • a beam splitter 44 is shown having a displacement distance D.
  • Three incident beams 52a,52b,52c can be acted on simultaneously to be passed straight through or to be displaced by the distance D.
  • the beam splitter is a passive optical element it will of course selectively operate on any number of incident beams based on the individual polarisation of each beam.
  • array 40 (comprising four switching elements namely pixels 50a,50b,50c,50d) is shown acting on a set of four parallel incident signals 54,56,58,60.
  • An input polarizer (not shown) ensures that each incident signal initially has a "vertical" polarisation but signals 54 and 58 then pass through unenergised pixels 50a and 50c, causing their polarisations to be switched.
  • Beam splitter 44 the vertically polarised beams 56,60 by a distance D and allows horizontally polarised beams 54,58 to pass straight through.
  • Each switching element or pixel 50a,50b,50c,50d is thus adapted to independently control a received optical signal (by acting on its polarisation or leaving it unaffected) causing the signal to be directed by the beam splitter between one of two predetermined directions.
  • the directions in which the signals are switched are towards like switching elements in a pair of ordered arrays 61,63 in a next stage.
  • Each of the two next-stage ordered arrays 61,63 comprises a set of four pixels, effectively identical to array 40.
  • array 61 comprises pixels 62a,62b,62c,62d
  • array 63 comprises pixels 64a,64b,64c,64d.
  • Fig. 6 shows beam or signal 54 being directed to next-stage pixel 62a in array 61, but if pixel 50a were energised, the polarity of beam 54 would have caused beam splitter 44 to deflect the beam to pixel 64a rather than 62a.
  • the identical arrays 61 ,63 can thus be seen to be displaced from one another by the distance D.
  • beam 56 could be directed (depending on the state of pixel 50b) to either of next-stage pixels 62b or 64b (though in fact it is shown as directed to pixel 64b).
  • Beam 58 could be directed (depending on the state of pixel 50c) to either of next-stage pixels 62c or 64c (though in fact it is shown as directed to pixel 62c).
  • beam 60 could be directed (depending on the state of pixel 5Od) to either of next-stage pixels 62d or 64d (though in fact it is shown as directed to pixel 64d).
  • defined channels exist between like switching elements in successive stages. For example, a defined channel exists between element 50a and element 62a. Another channel exists between element 50a and element 64a. Other such channels exist between the following pairs of elements: (50b,62b), (50b,64b), (50c,62c), (50c,64c), (50d,62d), (50d,64d).
  • the number of outputs available from the last stage is determined by the number of stages.
  • the number of outputs is also determined by the number of predetermined directions available at each stage (in the case of the 1x2 switches shown, there are two directions at each stage, but one can envisage embodiments with more directions available at each stage).
  • first-stage array 70 of four switching elements (pixels) 72 arranged in a 2 x 2 square.
  • pixels 72 switching elements
  • Beam splitter 74 is oriented horizontally (i.e. the displacement distance D between the straight-through path and the displaced path for a given beam is measured in a horizontal direction from the point of view of the incident beams).
  • Signals 12 and 14 are allowed to pass straight through to a second-stage first array 76 (which is positioned directly in line with array 70, so that beam 12 passes through the upper right-hand pixel of both arrays 70,76, and beam 14 passes through the lower right-hand pixel of both arrays 70,76).
  • the second stage also comprises a pair of second-stage beam splitters 80,82.
  • Beam splitter 80 is positioned to receive the outputs from array 76, and beam splitter 82 positioned to receive the outputs from array 78.
  • the second-stage beam splitters are oriented vertically to selectively displace the path of incident signals by a distance D measured vertically downwards.
  • Signal 12 emerging from array 76 is displaced downwards by beam splitter 80 whereas signal 14 is permitted to pass straight through.
  • Signal Il from array 78 is similarly displaced downwards by beam splitter 82 whereas signal 13 is permitted to pass straight through.
  • Each signal collector 84a,84b,84c,84d are positioned past the beam splitters 80 and 82 and each is connected to a respective output channel 01,02,03,04.
  • Each signal collector may be, for example a square lens which focuses any incident signal into a fibre optic cable (which provides the physical output channel).
  • Each collector is positioned so that it receives signals which have undergone a different set of transformations in the first and second stages.
  • any signal can follow any of these four paths, independently of the path of any other signal. No particular connection rule needs to be followed, and at any of the stages, the path of just one signal can be changed independently of any other signal, so the system is a strict-sense non-blocking switch.
  • a routing is presented for signals Il to 14 which displaces all four signals horizontally at the first stage 85 and subsequently displaces all four signals vertically at the second stage 86, so that all four signals are directed simultaneously to output channel 04.
  • Each signal follows its own channel, having a dedicated switching element or pixel available to it at each stage's array. So if it was desired to redirect signal 12 to output channel 01, one would simply change the state of the upper right hand pixel in the first stage array 70 (causing the signal to be directed onto array 76 rather than array 78 in the second stage) and set the corresponding pixel in the second stage array 76 to allow 12 to pass straight through that stage.
  • the first signal can be directed to four different positions (one on each collector), the second signal can be directed to four different positions (but again one of these four is located on each collector), and so on.
  • the four output positions at any given collector are degenerate, i.e. all signals landing on this collector end up in the optical fibre channel connected to it.
  • Each position in Table 1 has a 4-digit index: klmn where kl defines the index of the group as follows:
  • the four upper left pixels are group 00;
  • the four upper right pixels are group 01;
  • the four lower left pixels are group 10; and
  • the four lower right pixels are group 11.
  • the numbers mn define the index within each group.
  • the output channels collect all traces from the proper groups and the index of each output channel is a binary number of kl (e.g. 2k+[).
  • Such indexing provides a simple routing algorithm e.g. k ⁇ n is a condition for horizontal switching and / ⁇ n - for vertical switching.
  • Horizontal switching occurs when the light polarisation is vertical (f) and vertical switching occurs for horizontal polarization (+).
  • the twisted nematic liquid crystal pixels rotate polarisation if there is no voltage applied (voltage state 0) and they leave the polarization unchanged if an appropriate voltage is applied (voltage state 1).
  • Fig. 10 the full switching paths for the embodiment of Figs. 7 and 8 are shown in which signals, labelled in accordance with the scheme given above, are passed successively through the optical elements LCMl (liquid crystal matrix 1), BSl (beam splitter 1), LCM2 (liquid crystal matrix 2), BS2 (beam splitter 2) and the collector assembly.
  • Polarisation arrows show how the signals are differentiated at each point in the switch.
  • the switch indicated generally at 100, has a first stage 102, a second stage 104, a third stage 106, and a fourth stage 108.
  • the basic building block of the switching control part of each stage is a liquid crystal array 110 of 16 pixels.
  • the first stage 102 has a single array and the second stage 104 has two arrays disposed to receive the output of the first stage, exactly as was described above in relation to Figs. 7 and 8.
  • the output of the second stage 104 is directed to a set of four arrays in the third stage 106, each array being identical to the 16 x 16 arrays of the first and second stages.
  • the third stage 106 introduces a further important feature. Rather than doubling the number of beam splitters relative to the two beam splitters 112 of the second stage, as one might expect, the size of the third-stage beam splitter 114 is increased (each dimension of beam splitter 114 is doubled relative to the beam splitters 112 of the first and second stages, so that the useful incident area 116 is four times as big.
  • This "double strength" beam splitter receives the incident beams from any of the group of four third-stage arrays 110 and either passes a given beam straight through to the same position within the four left-most arrays in the fourth stage, or displaces them by a distance 2D (twice the displacement distance of the first and second stages) to the corresponding position within the four right-most arrays in the fourth stage 108.
  • the fourth stage thus employ eight arrays 110, and two double strength beam splitters 114, whose outputs can be directed onto any of 16 collectors 01,02, 03, ..., 015, 016.
  • a half wave plate 118 is positioned in the path between the lower half of the fourth stage beam splitters 114 and the bottom half set of eight output channel collectors 09,010, ...,015,016, to rectify the polarisation to its original state.
  • Il is displaced at the first stage, passes straight through the second stage, and is displaced again at both the third and fourth stages, to arrive at output 012. It can be seen that all along its path, Il impinges on the upper right-hand pixel of each array it passes through, such that the upper right hand pixels of all of the arrays collectively define a set of 16 divergent paths between the first stage array and each of the 16 collectors 01-016.
  • the path of 116 can be traced following the broken line in Fig. 9. Beam 116 is displaced by the first and third stages, but not by the second and fourth stages, resulting in it being directed to the output channel 04. As with the signal II, signal 116 has its own dedicated set of pixels, one per array. In the case of 116, it is always the lower right-hand corner pixel of the array.
  • the 256 output positions are of course the outputs available from the fourth stage, and are thus arranged in square fashion in sixteen 16-pixels groups.
  • the pixels indexing follow the basic klmn notation as described for the 4 x 4 switch, except that the 16 pixel groups are now labeled (kl) from 00 to 33, as are the sixteen pixels within each group.
  • the channels were labelled as Il to 116 in Fig. 9, they can be mathematically represented instead as 10 to 115 where the channel number is given by Am+ n. Similarly if the outputs are labeled OO to 015, the channel number is given by 4k + I.
  • a vertically polarizing filter (not shown) is placed between the half wave plate of the last stage and the 16 collectors 01-016, such that all signals coming from the last stage must pass through this filter on the way to the collectors.
  • all of the (valid) signals coming from the last stage are either inherently vertically polarized or have their polarization switched to vertical by the half wave plate. As such, those signals will pass through the final vertical polarizing filter unattenuated.
  • any cross-talk signals in contrast, will be inherently horizontally polarized if emerging from the upper half of the final stage beam splitters 114 or, if coming from the lower half, will have their polarization switched from vertical to horizontal by the half wave plate, and therefore all such cross talk signals will be attenuated by the final vertical filter (not shown).
  • Fig. 11 shows a representative part of the full switching path for a 16 x 16 switch (similar to the Fig. 9 embodiment), in particular showing the mapping of the paths from inputs 10, Il and 115 to the outputs 00, Ol and 015.
  • the first stage beam splitter which does a horizontal displacement on vertically polarized beams is labeled BSH 1.
  • the second stage beam splitters which conduct vertical displacement on horizontally polarized beams are labeled collectively as BSVl.
  • the third stage beam splitter is BSH2 and the fourth stage beam splitters are denoted as BSV2.
  • BSH2 the fourth stage beam splitters
  • the preferred configuration would comprise 3 different sets of three beam splitters.
  • the first stage would have one single-strength beam splitter to map a basic 8x8 array of 64 pixels onto two such arrays, and the second stage would employ two such single-strength beam splitters to map these two arrays onto four third-stage arrays.
  • the third stage would have one double-strength beam splitter to map the group of four arrays (again these are 8x8 arrays, so this beam splitter would operate on 256 pixels at a time) onto eight such arrays (512 pixels), and the fourth stage would employ two such double-strength beam splitters to map these eight arrays onto sixteen fifth-stage arrays.
  • the fifth and sixth stages would employ what can be referred to as "quarto-strength” beam splitters. Again these are double the size of the "double-strength” beam splitters in each dimension, providing four times the input area of the double-strength splitters (and 16 times that of the single strength splitters), with a displacement distance of 4D. Each quarto-strength beam splitter can therefore operate on 16 arrays or 1024 pixels. So using one such quarto-strength beam splitter, the outputs of the sixteen fifth-stage arrays are mapped onto thirty-two sixth stage arrays, and the sixth stage uses two quarto-strength beam splitters to map the outputs of these thirty-two sixth-stage arrays onto 64 output channels. Each output channel covers 64 potential input positions and collects them into a single channel.
  • the switches described above are intended to accept input channel optical signals in the following forms:
  • Non-polarized adds 3 dB insertion loss
  • Circular polarized adds 3 dB insertion loss
  • an input polarizer will generally be used to polarize such signals to the same initial polarization, hence the insertion loss mentioned.
  • Such switches may also accept:
  • each input channel may be split in two orthogonally polarized beams. This can be done by replacing the input polarizer with a polarizing beam splitter which is positioned and sized to decompose each beam into its horizontal and vertical polarized components, and to direct each component into its own unique channel.
  • each original beam will occupy two input channels of the switch, and therefore the number of channels will be halved.
  • Input IO is split into vertically polarized OA and horizontally polarized OB beams which occupy the channels reserved in Fig. 10 for 10 and II, and which can be routed to the same output channel.
  • the input channel 12 can be split into beams 2A and 2B, which occupy the other two inputs of the switch and again can be routed to the same output as one another.
  • the same concept can apply - halve the number of input signals and allow each input signal to be decomposed into its components which are individually received by an input channel to the switch.
  • the switch is insensitive to the polarization of the input channels

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Optical Modulation, Optical Deflection, Nonlinear Optics, Optical Demodulation, Optical Logic Elements (AREA)

Abstract

L’invention concerne un commutateur optique permettant de commuter jusqu’à N signaux optiques le long de trajets non bloquants indépendants. Le commutateur comporte un certain nombre d’étages de commutation conçus pour acheminer les signaux optiques en série. Le premier étage comprend un réseau ordonné ou une matrice de N éléments de commutation, et chaque étage successif comprend deux fois le nombre de réseaux de N éléments de commutation de l’étage précédent. Chaque élément de commutation peut commander indépendamment un signal optique reçu pour l’acheminer dans l’une de deux directions vers des éléments de commutation analogues dans deux réseaux ordonnés différents de l’étage suivant, de façon à créer des voies définies entre des éléments de commutation analogues dans des étages successifs, et de façon à ce que lesdites voies divergent au niveau de chaque étage vers une pluralité de trajets commutables, et à ce que chaque élément de commutation soit exclusivement associé à une seule voie.
PCT/EP2006/012450 2005-12-22 2006-12-22 Commutateur optique non bloquant WO2007071435A1 (fr)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115379318A (zh) * 2022-08-03 2022-11-22 无锡芯光互连技术研究院有限公司 一种benes网络路由投机求解方法和装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998047040A2 (fr) * 1997-04-02 1998-10-22 Chorum Technologies, Inc. COMMUTATEUR D'ACHEMINEMENT OPTIQUE NUMERIQUEMENT PROGRAMMABLE 1xN

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998047040A2 (fr) * 1997-04-02 1998-10-22 Chorum Technologies, Inc. COMMUTATEUR D'ACHEMINEMENT OPTIQUE NUMERIQUEMENT PROGRAMMABLE 1xN

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115379318A (zh) * 2022-08-03 2022-11-22 无锡芯光互连技术研究院有限公司 一种benes网络路由投机求解方法和装置
CN115379318B (zh) * 2022-08-03 2024-04-05 无锡芯光互连技术研究院有限公司 一种benes网络路由投机求解方法和装置

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