WO2007067013A8 - Capteur d'image cmos utilisant un balayage vertical - Google Patents
Capteur d'image cmos utilisant un balayage vertical Download PDFInfo
- Publication number
- WO2007067013A8 WO2007067013A8 PCT/KR2006/005354 KR2006005354W WO2007067013A8 WO 2007067013 A8 WO2007067013 A8 WO 2007067013A8 KR 2006005354 W KR2006005354 W KR 2006005354W WO 2007067013 A8 WO2007067013 A8 WO 2007067013A8
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- signals
- image sensor
- cmos image
- pixel array
- vertical scan
- Prior art date
Links
- 238000006243 chemical reaction Methods 0.000 abstract 1
- 230000003287 optical effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/40—Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
- H04N25/78—Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
La présente invention concerne un capteur d'image CMOS utilisant un balayage vertical. Cette invention concerne un capteur d'image CMOS comprenant un réseau de pixels, lequel comprend un ou plusieurs pixels unité qui transforment des signaux optiques entrés en signaux électriques et produit en sortie des données d'image par combinaison des pixels unité en m colonnes et en n rangs, m et n étant des nombres entiers et m étant inférieur à n, un circuit de commande de synchronisation qui génère des signaux de commande qui commande la synchronisation, un décodeur de colonne qui sélectionne une colonne du réseau de pixels en fonction des signaux de commande, un décodeur de rang qui sélectionne une rangée du réseau de pixels en fonction des signaux de commande, un circuit de lecture de signaux qui lit des signaux électriques de chaque pixel unité sur les colonnes sélectionnées par le décodeur de colonne et, un convertisseur A/N qui convertit les signaux électriques lus par le circuit de lecture de signaux en signaux de sortie via une conversion analogique/numérique. La distorsion de l'image d'un objet mobile peut être réduite.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020050120534A KR100759869B1 (ko) | 2005-12-09 | 2005-12-09 | 수직 스캔 방식 cmos형 이미지 센서 |
KR10-2005-0120534 | 2005-12-09 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2007067013A1 WO2007067013A1 (fr) | 2007-06-14 |
WO2007067013A8 true WO2007067013A8 (fr) | 2014-03-13 |
Family
ID=38123103
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/KR2006/005354 WO2007067013A1 (fr) | 2005-12-09 | 2006-12-08 | Capteur d'image cmos utilisant un balayage vertical |
Country Status (2)
Country | Link |
---|---|
KR (1) | KR100759869B1 (fr) |
WO (1) | WO2007067013A1 (fr) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101027306B1 (ko) * | 2009-12-14 | 2011-04-06 | 이명술 | 핸디 스캐너 장치 및 그 제어방법 |
KR101019164B1 (ko) * | 2010-10-15 | 2011-03-03 | 주식회사 루제익테크놀러지 | 엑스선 이미지 센서와 그 독출 방법 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002320235A (ja) * | 2001-04-19 | 2002-10-31 | Fujitsu Ltd | 空間解像度の低下を抑えて縮小画像信号を生成するcmosイメージセンサ |
US20030049925A1 (en) * | 2001-09-10 | 2003-03-13 | Layman Paul Arthur | High-density inter-die interconnect structure |
US7154075B2 (en) * | 2003-11-13 | 2006-12-26 | Micron Technology, Inc. | Method and apparatus for pixel signal binning and interpolation in column circuits of a sensor circuit |
-
2005
- 2005-12-09 KR KR1020050120534A patent/KR100759869B1/ko active Active
-
2006
- 2006-12-08 WO PCT/KR2006/005354 patent/WO2007067013A1/fr active Application Filing
Also Published As
Publication number | Publication date |
---|---|
KR100759869B1 (ko) | 2007-09-18 |
WO2007067013A1 (fr) | 2007-06-14 |
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