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WO2006035531A1 - High frequency signal switching circuit - Google Patents

High frequency signal switching circuit Download PDF

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Publication number
WO2006035531A1
WO2006035531A1 PCT/JP2005/010663 JP2005010663W WO2006035531A1 WO 2006035531 A1 WO2006035531 A1 WO 2006035531A1 JP 2005010663 W JP2005010663 W JP 2005010663W WO 2006035531 A1 WO2006035531 A1 WO 2006035531A1
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WO
WIPO (PCT)
Prior art keywords
signal
terminal
diode
input
output terminal
Prior art date
Application number
PCT/JP2005/010663
Other languages
French (fr)
Japanese (ja)
Inventor
Akira Kato
Original Assignee
Murata Manufacturing Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co., Ltd. filed Critical Murata Manufacturing Co., Ltd.
Priority to DE112005002018T priority Critical patent/DE112005002018B4/en
Priority to JP2006537636A priority patent/JP4404093B2/en
Publication of WO2006035531A1 publication Critical patent/WO2006035531A1/en

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40Circuits
    • H04B1/44Transmit/receive switching
    • H04B1/48Transmit/receive switching in circuits for connecting transmitter and receiver to a common transmission path, e.g. by energy of transmitter

Definitions

  • the present invention relates to a high-frequency signal switching circuit for switching two high-frequency input / output terminals to another high-frequency input / output terminal, and in particular, switching and connecting either a transmission circuit or a reception circuit to an antenna. It relates to an antenna switch.
  • the antenna switch includes an antenna input / output terminal (ANT terminal), a transmission signal input terminal (TX terminal), and a reception signal output terminal (RX terminal).
  • the antenna switch is switched so that the TX and ANT terminals are connected during transmission, and the ANT and RX terminals are connected during reception.
  • a SPDT switch using a diode for each of a transmission signal path and a reception signal path is often used.
  • one diode is installed in each signal path. It was.
  • Patent Document 1 discloses a high-frequency signal switching circuit in which a plurality of diodes are installed in each signal path.
  • Patent Document 1 Japanese Patent Laid-Open No. 7-288458
  • an object of the present invention is to provide a high-frequency signal switching circuit having a simple structure with a large isolation without increasing insertion loss.
  • a high-frequency signal switching circuit comprises an unbalanced-balanced conversion comprising one unbalanced terminal, a first balanced terminal having the same phase as the unbalanced terminal, and a second balanced terminal having an opposite phase to the unbalanced terminal.
  • a first signal input / output terminal connected to the first balanced terminal via the first switch element; a second signal input / output terminal connected to the second balanced terminal via the second switch element;
  • a switch element, a switch control means for performing on / off control of the second switch element, and a first signal input / output terminal and a second signal input / output terminal are connected to transmit a signal without changing the phase.
  • a signal cancel circuit network for transmission.
  • the signal cancellation network transmits the signal in the direction of the second signal input / output terminal without changing the phase of the high frequency signal input from the first signal input / output terminal.
  • the high-frequency signal transmitted through this signal cancellation circuit network (the high-frequency signal without phase shift) and the high-frequency signal with 180 ° phase shift leaking through the second switch circuit are combined to cancel each other and be attenuated. It is not output to the signal input / output terminal.
  • the present invention is characterized in that the first switch element and the second switch element are PIN diodes. In this configuration, the structure and control are simplified by the PIN diode. The invention's effect
  • the present invention it is possible to suppress transmission of a high-frequency signal that has also received a predetermined first terminal force without increasing the number of switch elements to a second terminal that is not desired to receive this signal. it can. Further, since the number of switch elements is small, a necessary signal can be transmitted to the second terminal without being attenuated. Specifically, in an antenna switch, transmission of a transmission signal to a reception signal output terminal can be suppressed without increasing the number of switch elements. At this time, the received signal is hardly attenuated before being transmitted to the received signal output terminal due to the small number of diodes!
  • the structure and control are simplified because the switch element is a diode.
  • the switch element is a diode.
  • FIG. 1 is a block diagram showing a configuration of an antenna switch according to the present embodiment.
  • FIG. 2 is a diagram showing a simulation result of isolation according to the configuration of the present embodiment, the configuration of the conventional example, and further the configuration of the present embodiment excluding the signal cancel circuit network.
  • the high-frequency signal switching circuit of the present invention will be described with reference to FIGS.
  • an antenna switch is shown as an example of the high-frequency signal switching circuit.
  • FIG. 1 is a block diagram showing the configuration of the antenna switch of this embodiment.
  • the balun transformer 1 is a trifilar wound balun transformer comprising a primary winding 11 on the unbalanced terminal side, a secondary winding 21 on the balanced terminal side, and a tertiary winding 31.
  • a signal is input to 11
  • the in-phase signal is excited on the tertiary winding 31, and a reverse-phase (180 ° phase shift) signal is excited on the secondary winding 21.
  • a reverse-phase (180 ° phase shift) signal is excited on the secondary winding 21.
  • an in-phase signal is excited on the primary winding 11
  • a 180 ° phase shift signal is excited on the secondary winding 21.
  • balun transformer 1 One end (unbalanced signal input / output end) of primary winding 11 of balun transformer 1 is connected to antenna input / output terminal 103, and the other end is grounded.
  • the connection between the secondary winding 21 on the balanced terminal side of the balun transformer 1 and the tertiary winding 31 (center tap on the balanced terminal side) is grounded, and the center tap of the secondary winding 21
  • the end facing the diode T2 is connected to the power sword of the diode D2 made of a PIN diode, and the end facing the center tap of the tertiary winding 31 is connected to the power sword of the diode D1 also having the PIN diode force.
  • the balun transformer 1 corresponds to the “unbalanced / equilibrium variation” of the present invention.
  • One end of the primary winding 11 of the current transformer 1 corresponds to the “unbalanced terminal” of the present invention, and the end facing the center tap of the secondary winding 21 of the noren transformer 1 is the “second balanced terminal”.
  • the end facing the center tap of the tertiary winding 31 of Baluntrans 1 corresponds to the “first balanced terminal”.
  • the diodes Dl and D2 correspond to “switch elements” of the present invention.
  • the anode of the diode D1 is connected to the transmission signal input terminal 101 via the DC cut capacitor C1, and the anode of the diode D2 is connected to the reception signal output terminal 102 via the DC cut capacitor C2.
  • the anode of the diode D1 is the first switch control signal input terminal via the resistor R40. This first switch control signal input terminal 104 is grounded at a high frequency by a capacitor C40.
  • the anode of the diode D2 is connected to the second switch control signal input terminal 105 via the resistor R50, and the second switch control signal input terminal 105 is grounded at high frequency by the capacitor C50.
  • resistors R40 and R50 should have high impedance for high-frequency signals, so replace them with RF choke coils.
  • the signal cancellation circuit network 2 also includes a resistor R20 and a capacitor C20 connected in series, and is connected between the anode of the diode D1 and the anode of the diode D2.
  • the first switch control signal VD1 in the Hi state is input from the first switch control signal input terminal 104 and supplied to the diode D1.
  • the diode D1 is turned on by the first switch control signal VD1 in the Hi state.
  • the second switch control signal VD2 that is in a DC low state is input from the second switch control signal input terminal 105 and supplied to the diode D2, and the second switch control signal VD2 is not input to the diode D2.
  • the second switch control signal is not supplied. As a result, the diode D2 is cut off.
  • the transmission signal input from the transmission signal input terminal 101 is also input to the signal cancellation circuit network 2.
  • Signal cancellation network 2 is a series circuit of resistor R20 and capacitor C20, but the transmission signal is set to depend mainly on resistor R20. The signal is attenuated by a certain amount without changing the phase. And output to the reception signal output terminal 102 side. At this time, the amount of attenuation of the transmission signal by the signal cancellation network 2 is set so as to correspond to the amount of attenuation of the transmission signal having a phase shift of 180 ° by the diode D2.
  • the transmission signal without phase shift transmitted through the signal cancellation circuit 2 and the transmission signal with 180 ° phase shift output from the anode of the diode D2 are the diode D2 and the signal cancellation circuit network. Join at the connection point with 2.
  • these two signals have almost the same amplitude and are 180 ° out of phase, that is, opposite in phase, so that they cancel each other and attenuate.
  • the transmission signal is not transmitted to the reception signal output terminal 102. In other words, it is possible to increase the isolation of the reception signal output terminal 102 with respect to the transmission signal.
  • the circuit configuration of the signal cancellation network 2 is set to a circuit mainly composed of the capacitor C20, a transmission signal passing through the signal cancellation network 2 and a transmission signal output from the diode D2
  • the frequency characteristics can be matched. As a result, it is possible to suppress degradation of isolation even if the frequency of the transmission signal changes (rises).
  • FIG. 2 is a diagram showing a simulation result of isolation according to the configuration of the present embodiment, the configuration of the conventional example, and further the configuration of the present embodiment excluding the signal cancellation circuit network.
  • Isolation in this case means insertion loss from the transmission signal input terminal 101 to the output terminal 102.
  • the conventional example corresponds to the high-frequency signal switching circuit described in Patent Document 1 described above.
  • the signal level was 0.1 lVrms at a frequency of 10 MHz to 100 MHz, a 1N4148 type diode was used, and the voltage of the switch control signal was 6V.
  • the second switch control signal VD2 in the Hi state is input from the second switch control signal input terminal 105 and supplied to the diode D2.
  • the diode D2 is turned on by the second switch control signal VD2 in the Hi state.
  • the first switch control signal VD1 that is in a DC low state is input from the first switch control signal input terminal 104 and supplied to the diode D1, and the first switch control signal VD1 is not input to the diode D1. 1 Switch control signal is not supplied. As a result, the diode D1 is cut off.
  • the reception signal can be transmitted to the reception signal output terminal 102 with almost no attenuation. That is, the insertion loss of the received signal can be kept small.
  • an antenna switch that suppresses insertion loss of a received signal and ensures large isolation from the received signal output terminal with respect to the transmitted signal is realized with a simple structure. can do.
  • the force diode showing the structure in which the force swords of the diodes Dl and D2 are connected to the balun transformer 1 functions as a switch element.
  • a structure in which the polarity of the nodes Dl and D2 is reversed, that is, the anode is connected to the balun transformer 1 may be used.
  • the switch control signal may be changed to one using a negative voltage.
  • a semiconductor element such as an FET may be used instead of a force using a diode as a switch element.
  • the shape of the trifilar winding is shown as the balun transformer.
  • a transformer having a transformer formed on a multilayer ceramic substrate having a thick film Z thin film may be used instead of a winding type.
  • a merchandise balun using a 1Z4 wavelength line may be used.
  • the high-frequency signal switching circuit that transmits and receives a high-frequency signal by switching and connecting two input / output terminals to one input / output terminal described as an example of an antenna switch. If so, the above-described configuration can be applied, and the above-described effects can be achieved.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Electronic Switches (AREA)
  • Transceivers (AREA)
  • Waveguide Switches, Polarizers, And Phase Shifters (AREA)

Abstract

When a diode (D1) is in the conduction state and a diode (D2) is in the interruption state, a transmission signal inputted from a transmission signal input terminal (101) is inputted to the tertiary winding (31) of a balun transformer (1) and a transmission signal having phase shift of 180° is excited in the secondary winding (21) and outputted to the diode (D2). Even if the diode (D2) is in the interruption state, the transmission signal having phase shift of 180° leaks to the reception signal output terminal (102) side. On the other hand, a signal cancel network (2) outputs the inputted transmission signal to the reception signal output terminal (102) side without varying the phase. Since these two transmission signals have phase shift of 180°, they are offset and attenuated. Consequently, the transmission signal is not transmitted to the reception signal output terminal (102).

Description

明 細 書  Specification
高周波信号切替回路  High frequency signal switching circuit
技術分野  Technical field
[0001] この発明は、 2つの高周波入出力端子を他の 1つの高周波入出力端子に切り替え て接続する高周波信号切替回路、特に、アンテナに対して送信回路または受信回路 のいずれかを切り替えて接続するアンテナスィッチに関するものである。  [0001] The present invention relates to a high-frequency signal switching circuit for switching two high-frequency input / output terminals to another high-frequency input / output terminal, and in particular, switching and connecting either a transmission circuit or a reception circuit to an antenna. It relates to an antenna switch.
背景技術  Background art
[0002] アンテナスィッチは、アンテナ入出力端子 (ANT端子)、送信信号入力端子 (TX端 子)、および受信信号出力端子 (RX端子)を備える。そして、アンテナスィッチは送信 時に TX端子と ANT端子とを接続し、受信時に ANT端子と RX端子とを接続するよう に切り替える。  [0002] The antenna switch includes an antenna input / output terminal (ANT terminal), a transmission signal input terminal (TX terminal), and a reception signal output terminal (RX terminal). The antenna switch is switched so that the TX and ANT terminals are connected during transmission, and the ANT and RX terminals are connected during reception.
[0003] 従来、このようなアンテナスィッチには送信信号経路と受信信号経路とのそれぞれ にダイオードを用いた SPDTスィッチが多く用いられており、この場合、各信号経路 には 1つのダイオードが設置されていた。  [0003] Conventionally, in such an antenna switch, a SPDT switch using a diode for each of a transmission signal path and a reception signal path is often used. In this case, one diode is installed in each signal path. It was.
[0004] し力しながら、各信号経路に 1つのダイオードを設置したアンテナスィッチでは、ァ イソレーシヨンを十分に大きく取ることができず、 TX端子力 入力された大電力の送 信信号が RX端子に伝送され、 RX端子に接続する SAWフィルタ等を破損すると ヽぅ 問題があった。この問題を解決するアンテナスィッチとして、特許文献 1には各信号 経路に複数のダイオードを設置した高周波信号切替回路が開示されている。  [0004] However, with an antenna switch with one diode installed in each signal path, the isolation cannot be made large enough, and the TX terminal force causes a large power transmission signal to be input to the RX terminal. There was a problem if the SAW filter etc. that was transmitted and connected to the RX terminal was damaged. As an antenna switch that solves this problem, Patent Document 1 discloses a high-frequency signal switching circuit in which a plurality of diodes are installed in each signal path.
特許文献 1:特開平 7 - 288458号公報  Patent Document 1: Japanese Patent Laid-Open No. 7-288458
発明の開示  Disclosure of the invention
発明が解決しょうとする課題  Problems to be solved by the invention
[0005] ところが、特許文献 1に記載の高周波信号切替回路では、設置ダイオード数が増 加することでアイソレーションを大きくすることはできる力 ダイオードの設置数に応じ て高周波信号切替回路が複雑で大きくなる。また、信号経路に接続されるダイオード 数が多くなることで、高周波信号切替回路としての挿入損失が大きくなる。すなわち、 必要な信号までも減衰させてしまうことになる。 [0006] したがって、この発明の目的は、挿入損失を増加させることなくアイソレーションを大 きく取り、簡素な構造の高周波信号切替回路を提供することにある。 However, the high-frequency signal switching circuit described in Patent Document 1 can increase isolation by increasing the number of installed diodes. The high-frequency signal switching circuit is complex and large depending on the number of installed diodes. Become. In addition, an increase in the number of diodes connected to the signal path increases insertion loss as a high-frequency signal switching circuit. In other words, even necessary signals are attenuated. [0006] Accordingly, an object of the present invention is to provide a high-frequency signal switching circuit having a simple structure with a large isolation without increasing insertion loss.
課題を解決するための手段  Means for solving the problem
[0007] この発明の高周波信号切替回路は、 1つの不平衡端子と該不平衡端子に同相の 第 1平衡端子と不平衡端子に逆相の第 2平衡端子とを備えた不平衡ー平衡変換器と 、第 1平衡端子に第 1スィッチ素子を介して接続する第 1信号入出力端子と、第 2平 衡端子に第 2スィッチ素子を介して接続する第 2信号入出力端子と、第 1スィッチ素 子、前記第 2スィッチ素子のオン'オフ制御を行うスィッチ制御手段と、第 1信号入出 力端子と第 2信号入出力端子との間に接続され、位相を変化させることなく信号を伝 送する信号キャンセル回路網と、を備えたことを特徴として 、る。  [0007] A high-frequency signal switching circuit according to the present invention comprises an unbalanced-balanced conversion comprising one unbalanced terminal, a first balanced terminal having the same phase as the unbalanced terminal, and a second balanced terminal having an opposite phase to the unbalanced terminal. A first signal input / output terminal connected to the first balanced terminal via the first switch element; a second signal input / output terminal connected to the second balanced terminal via the second switch element; A switch element, a switch control means for performing on / off control of the second switch element, and a first signal input / output terminal and a second signal input / output terminal are connected to transmit a signal without changing the phase. And a signal cancel circuit network for transmission.
[0008] この構成では、第 1スィッチ素子を導通状態にして第 2スィッチ素子を切断状態にし た状態で、第 1信号入出力端子から高周波信号を入力すると、この高周波信号が不 平衡 平衡変換器の第 1平衡端子に入力される。この高周波信号により不平衡一平 衡変 の不平衡端子力 は同相の高周波信号が出力され、第 2平衡端子からは 逆相(180° 位相ズレ)の高周波信号が出力される。第 2平衡端子から出力された 18 0° 位相ズレの高周波信号は、切断状態の第 2スィッチ素子を漏洩して第 2信号入出 力端子方向に伝送される。一方、信号キャンセル回路網は第 1信号入出力端子から 入力された高周波信号の位相を変えることなく第 2信号入出力端子方向に伝送する 。そして、この信号キャンセル回路網を伝送した高周波信号 (位相ズレの無い高周波 信号)と第 2スィッチ回路を漏洩した 180° 位相ズレの高周波信号とが結合すること で、互いに相殺し合い減衰されて第 2信号入出力端子には出力されない。  [0008] With this configuration, when a high-frequency signal is input from the first signal input / output terminal in a state where the first switch element is in a conductive state and the second switch element is in a disconnected state, the high-frequency signal is converted into an unbalanced balanced converter. Input to the first balanced terminal. With this high-frequency signal, a high-frequency signal with the same phase is output as the unbalanced terminal force of the unbalance-equilibrium change, and a high-frequency signal with the opposite phase (180 ° phase shift) is output from the second balanced terminal. The 180 ° phase-shifted high-frequency signal output from the second balanced terminal leaks through the disconnected second switch element and is transmitted in the direction of the second signal input / output terminal. On the other hand, the signal cancellation network transmits the signal in the direction of the second signal input / output terminal without changing the phase of the high frequency signal input from the first signal input / output terminal. The high-frequency signal transmitted through this signal cancellation circuit network (the high-frequency signal without phase shift) and the high-frequency signal with 180 ° phase shift leaking through the second switch circuit are combined to cancel each other and be attenuated. It is not output to the signal input / output terminal.
[0009] これをアンテナスィッチに適用すると、送信信号入力端子力 入力された高周波信 号すなわち送信信号が受信信号出力端子側に伝送される際に、不平衡ー平衡変換 器を経由する 180° 位相ズレの送信信号と、信号キャンセル回路網を経由する位相 ズレのな!/、送信信号とが互いに相殺し合!、減衰するので、受信信号出力端子には 伝送されない。 [0009] When this is applied to an antenna switch, when a high-frequency signal input to the transmission signal input terminal, that is, a transmission signal is transmitted to the reception signal output terminal side, a 180 ° phase passing through an unbalance-balance converter is transmitted. Since there is no phase shift via the signal cancellation circuit network and / or the transmission signal cancels each other and attenuates, the signal is not transmitted to the reception signal output terminal.
[0010] また、この発明は、第 1スィッチ素子、第 2スィッチ素子が PINダイオードであること を特徴としている。 [0011] この構成では、 PINダイオードであることで、構造および制御が簡素化される。 発明の効果 [0010] Further, the present invention is characterized in that the first switch element and the second switch element are PIN diodes. In this configuration, the structure and control are simplified by the PIN diode. The invention's effect
[0012] この発明によれば、スィッチ素子数を増カロさせることなく所定の第 1端子力も入力し た高周波信号を、この信号を入力させたくない第 2端子に伝送させることを抑制する ことができる。また、スィッチ素子数が少ないことで、必要な信号を減衰させることなく 前記第 2端子に伝送することができる。具体的にアンテナスィッチでは、スィッチ素子 数を増加させることなく送信信号を受信信号出力端子に伝送することを抑制すること ができる。この際、受信信号はダイオード数が少ないことで受信信号出力端子に伝送 されまでに殆ど減衰しな!、。  [0012] According to the present invention, it is possible to suppress transmission of a high-frequency signal that has also received a predetermined first terminal force without increasing the number of switch elements to a second terminal that is not desired to receive this signal. it can. Further, since the number of switch elements is small, a necessary signal can be transmitted to the second terminal without being attenuated. Specifically, in an antenna switch, transmission of a transmission signal to a reception signal output terminal can be suppressed without increasing the number of switch elements. At this time, the received signal is hardly attenuated before being transmitted to the received signal output terminal due to the small number of diodes!
[0013] これにより、簡素な構造でありながら、挿入損失が少なぐアイソレーションが大きい 高周波信号切替回路を構成することができる。  [0013] Thereby, it is possible to configure a high-frequency signal switching circuit with a simple structure and a large isolation with a small insertion loss.
[0014] また、この発明によれば、スィッチ素子がダイオードであることで、構造および制御 が簡素化される。これにより、さらに簡素な構造でありながら、挿入損失が少なぐアイ ソレーシヨンが大きい高周波信号切替回路を構成することができる。  [0014] Further, according to the present invention, the structure and control are simplified because the switch element is a diode. As a result, it is possible to construct a high-frequency signal switching circuit having a simpler structure and a large isolation with less insertion loss.
図面の簡単な説明  Brief Description of Drawings
[0015] [図 1]本実施形態のアンテナスィッチの構成を示すブロック図である。 FIG. 1 is a block diagram showing a configuration of an antenna switch according to the present embodiment.
[図 2]本実施形態の構成と従来例の構成と、さらには本実施形態の構成から信号キヤ ンセル回路網を除いた構成とによるアイソレーションのシミュレーション結果を示した 図である。  FIG. 2 is a diagram showing a simulation result of isolation according to the configuration of the present embodiment, the configuration of the conventional example, and further the configuration of the present embodiment excluding the signal cancel circuit network.
符号の説明  Explanation of symbols
[0016] 1ーバノレントランス [0016] 1-banolene transformer
11 -バルントランス 1の 1次卷線  11-Balun Trans 1 primary shoreline
21—バルントランス 1の 2次卷線  21—Secondary shoreline of Balun Trans 1
31 -バルントランス 1の 3次卷線  31-3rd shoreline of Balun Trans 1
2—信号キャンセル回路網 2  2—Signal cancellation network 2
101—送信信号入力端子  101—Transmission signal input terminal
102—受信信号出力端子  102—Received signal output terminal
103—アンテナ入出力端子 104—第 1スィッチ制御信号入力端子 103—Antenna input / output terminal 104—First switch control signal input terminal
105—第 2スィッチ制御信号入力端子  105—Second switch control signal input terminal
発明を実施するための最良の形態  BEST MODE FOR CARRYING OUT THE INVENTION
[0017] 本発明の高周波信号切替回路について図 1、図 2を参照して説明する。なお、以下 の説明では、高周波信号切替回路としてアンテナスィッチを例に示す。  The high-frequency signal switching circuit of the present invention will be described with reference to FIGS. In the following description, an antenna switch is shown as an example of the high-frequency signal switching circuit.
図 1は本実施形態のアンテナスィッチの構成を示すブロック図である。  FIG. 1 is a block diagram showing the configuration of the antenna switch of this embodiment.
[0018] バルントランス 1は、不平衡端子側の 1次卷線 11と、平衡端子側の 2次卷線 21、 3 次卷線 31とからなるトリフアイラ巻きのバルントランスであり、 1次卷線 11に信号が入 力されると 3次卷線 31に同相の信号が励起され、 2次卷線 21に逆相(180° 位相ズ レ)の信号が励起される形状で形成されている。この場合、 3次卷線 31に信号が入力 されると、 1次卷線 11には同相の信号が励起され、 2次卷線 21には 180° 位相ズレ の信号が励起される。  [0018] The balun transformer 1 is a trifilar wound balun transformer comprising a primary winding 11 on the unbalanced terminal side, a secondary winding 21 on the balanced terminal side, and a tertiary winding 31. When a signal is input to 11, the in-phase signal is excited on the tertiary winding 31, and a reverse-phase (180 ° phase shift) signal is excited on the secondary winding 21. In this case, when a signal is input to the tertiary winding 31, an in-phase signal is excited on the primary winding 11, and a 180 ° phase shift signal is excited on the secondary winding 21.
[0019] バルントランス 1の 1次卷線 11の一方端 (不平衡信号入出力端)はアンテナ入出力 端子 103に接続し、他方端は接地している。  [0019] One end (unbalanced signal input / output end) of primary winding 11 of balun transformer 1 is connected to antenna input / output terminal 103, and the other end is grounded.
[0020] また、バルントランス 1の平衡端子側の 2次卷線 21と 3次卷線 31との接続部(平衡 端子側のセンタータップ)は接地されており、 2次卷線 21のセンタータップと対向する 端部は PINダイオードからなるダイオード D2の力ソードに接続し、 3次卷線 31のセン タータップと対向する端部は PINダイオード力もなるダイオード D1の力ソードに接続 している。  [0020] In addition, the connection between the secondary winding 21 on the balanced terminal side of the balun transformer 1 and the tertiary winding 31 (center tap on the balanced terminal side) is grounded, and the center tap of the secondary winding 21 The end facing the diode T2 is connected to the power sword of the diode D2 made of a PIN diode, and the end facing the center tap of the tertiary winding 31 is connected to the power sword of the diode D1 also having the PIN diode force.
[0021] ここで、バルントランス 1が本発明の「不平衡一平衡変^^」に相当する。ノ レントラ ンス 1の 1次卷線 11の一方端が本発明の「不平衡端子」に相当し、ノ レントランス 1の 2次卷線 21のセンタータップと対向する端部が「第 2平衡端子」に相当し、バルントラ ンス 1の 3次卷線 31のセンタータップと対向する端部が「第 1平衡端子」に相当する。 また、ダイオード Dl, D2は本発明の「スィッチ素子」に相当する。  Here, the balun transformer 1 corresponds to the “unbalanced / equilibrium variation” of the present invention. One end of the primary winding 11 of the current transformer 1 corresponds to the “unbalanced terminal” of the present invention, and the end facing the center tap of the secondary winding 21 of the noren transformer 1 is the “second balanced terminal”. The end facing the center tap of the tertiary winding 31 of Baluntrans 1 corresponds to the “first balanced terminal”. The diodes Dl and D2 correspond to “switch elements” of the present invention.
[0022] ダイオード D1のアノードは DCカットコンデンサ C1を介して送信信号入力端子 101 に接続し、ダイオード D2のアノードは DCカットコンデンサ C2を介して受信信号出力 端子 102に接続している。  [0022] The anode of the diode D1 is connected to the transmission signal input terminal 101 via the DC cut capacitor C1, and the anode of the diode D2 is connected to the reception signal output terminal 102 via the DC cut capacitor C2.
[0023] また、ダイオード D1のアノードは抵抗 R40を介して第 1スィッチ制御信号入力端子 104に接続し、この第 1スィッチ制御信号入力端子 104がコンデンサ C40により高周 波的に接地している。また、ダイオード D2のアノードは抵抗 R50を介して第 2スィッチ 制御信号入力端子 105に接続し、この第 2スィッチ制御信号入力端子 105がコンデ ンサ C50により高周波的に接地している。なお、ここで、抵抗 R40, R50は高周波信 号に対して高 、インピーダンスを有すればよ!、ので、 RFチョークコイルに置き換えて ちょい。 [0023] The anode of the diode D1 is the first switch control signal input terminal via the resistor R40. This first switch control signal input terminal 104 is grounded at a high frequency by a capacitor C40. The anode of the diode D2 is connected to the second switch control signal input terminal 105 via the resistor R50, and the second switch control signal input terminal 105 is grounded at high frequency by the capacitor C50. Here, resistors R40 and R50 should have high impedance for high-frequency signals, so replace them with RF choke coils.
[0024] 信号キャンセル回路網 2は直列接続された抵抗 R20とコンデンサ C20と力もなり、 ダイオード D1のアノードとダイオード D2のアノードとの間に接続している。  [0024] The signal cancellation circuit network 2 also includes a resistor R20 and a capacitor C20 connected in series, and is connected between the anode of the diode D1 and the anode of the diode D2.
[0025] このような構成のアンテナスィッチの動作について次に説明する。  Next, the operation of the antenna switch having such a configuration will be described.
[0026] (1)送信時  [0026] (1) When sending
送信時には、第 1スィッチ制御信号入力端子 104から直流で Hi状態の第 1スィッチ 制御信号 VD1が入力されてダイオード D1に供給される。ダイオード D1はこの Hi状 態の第 1スィッチ制御信号 VD1により導通状態となる。また、第 2スィッチ制御信号入 力端子 105からは直流で Low状態の第 2スィッチ制御信号 VD2が入力されてダイォ ード D2に供給される力、第 2スィッチ制御信号 VD2が入力されずダイオード D2に第 2スィッチ制御信号が供給されない。これにより、ダイオード D2は遮断状態となる。  At the time of transmission, the first switch control signal VD1 in the Hi state is input from the first switch control signal input terminal 104 and supplied to the diode D1. The diode D1 is turned on by the first switch control signal VD1 in the Hi state. Also, the second switch control signal VD2 that is in a DC low state is input from the second switch control signal input terminal 105 and supplied to the diode D2, and the second switch control signal VD2 is not input to the diode D2. The second switch control signal is not supplied. As a result, the diode D2 is cut off.
[0027] このような状態で、送信信号入力端子 101から高周波の送信信号が入力されると、 ダイオード 1を通過してバルントランス 1の 3次卷線 31に供給される。バルントランス 1の 3次卷線 31に送信信号が入力されると、同相 (位相ズレ無し)の送信信号が 1次 卷線 11に励起され、アンテナ入出力端子 103に出力される。  In this state, when a high-frequency transmission signal is input from the transmission signal input terminal 101, it passes through the diode 1 and is supplied to the tertiary winding 31 of the balun transformer 1. When a transmission signal is input to the tertiary winding 31 of the balun transformer 1, an in-phase (no phase shift) transmission signal is excited to the primary winding 11 and output to the antenna input / output terminal 103.
[0028] また、 3次卷線 31に送信信号が入力されることで、 180° 位相ズレの送信信号が 2 次卷線 21に励起され、ダイオード D2に出力される。ここで、ダイオード D2は遮断状 態にあるので、力ソードから入力された送信信号を所定量減衰するが、この送信信号 の一部が漏洩してアノードから出力される。  [0028] In addition, when a transmission signal is input to tertiary winding 31, a transmission signal with a phase shift of 180 ° is excited to secondary winding 21 and output to diode D2. Here, since the diode D2 is in the cut-off state, the transmission signal input from the force sword is attenuated by a predetermined amount, but a part of the transmission signal leaks and is output from the anode.
[0029] 一方、送信信号入力端子 101から入力された送信信号は信号キャンセル回路網 2 にも入力される。信号キャンセル回路網 2は抵抗 R20とコンデンサ C20との直列回路 であるが、送信信号に対して主として抵抗 R20に依存する設定がされており、送信信 号入力端子 101側カゝら入力された送信信号は、位相を変化させないまま所定量減衰 して受信信号出力端子 102側に出力される。この際、信号キャンセル回路網 2で送 信信号を減衰する量は前記ダイオード D2により 180° 位相ズレの送信信号が減衰 される量に相当するように設定されて 、る。 On the other hand, the transmission signal input from the transmission signal input terminal 101 is also input to the signal cancellation circuit network 2. Signal cancellation network 2 is a series circuit of resistor R20 and capacitor C20, but the transmission signal is set to depend mainly on resistor R20. The signal is attenuated by a certain amount without changing the phase. And output to the reception signal output terminal 102 side. At this time, the amount of attenuation of the transmission signal by the signal cancellation network 2 is set so as to correspond to the amount of attenuation of the transmission signal having a phase shift of 180 ° by the diode D2.
[0030] このように、信号キャンセル回路網 2を伝送した位相ズレなしの送信信号と、ダイォ ード D2のアノードから出力される 180° 位相ズレの送信信号とは、ダイオード D2と 信号キャンセル回路網 2との接続点で結合する。ここで、前述のように、これら 2つの 信号は振幅が殆ど同じで、且つ、 180° 位相のズレがある、すなわち逆相であるので 、互いに相殺し合い、減衰する。これにより、受信信号出力端子 102には送信信号が 伝送されない。すなわち、受信信号出力端子 102の送信信号に対するアイソレーシ ヨンを大きくすることができる。  [0030] As described above, the transmission signal without phase shift transmitted through the signal cancellation circuit 2 and the transmission signal with 180 ° phase shift output from the anode of the diode D2 are the diode D2 and the signal cancellation circuit network. Join at the connection point with 2. Here, as described above, these two signals have almost the same amplitude and are 180 ° out of phase, that is, opposite in phase, so that they cancel each other and attenuate. As a result, the transmission signal is not transmitted to the reception signal output terminal 102. In other words, it is possible to increase the isolation of the reception signal output terminal 102 with respect to the transmission signal.
[0031] なお、信号キャンセル回路網 2の回路構成を、コンデンサ C20が主体となる回路に 設定した場合、信号キャンセル回路網 2を通過する送信信号と、ダイオード D2から出 力される送信信号との周波数特性を整合させることができる。これにより、送信信号の 周波数が変化 (上昇)してもアイソレーションが劣化することを抑制することができる。  [0031] When the circuit configuration of the signal cancellation network 2 is set to a circuit mainly composed of the capacitor C20, a transmission signal passing through the signal cancellation network 2 and a transmission signal output from the diode D2 The frequency characteristics can be matched. As a result, it is possible to suppress degradation of isolation even if the frequency of the transmission signal changes (rises).
[0032] 図 2は本実施形態の構成と従来例の構成と、さらには本実施形態の構成から信号 キャンセル回路網を除いた構成とによるアイソレーションのシミュレーション結果を示 した図である。この場合のアイソレーションは送信信号入力端子 101から出力端子 1 02までの挿入損失を意味する。ここで、従来例とは前述の特許文献 1に記載の高周 波信号切替回路に該当する。また、本シミュレーションは、 10MHz〜100MHzの周 波数で、信号レベルが 0. lVrmsであり、ダイオードに 1N4148型を用いてスィッチ 制御信号の電圧を 6Vにして行った。  [0032] FIG. 2 is a diagram showing a simulation result of isolation according to the configuration of the present embodiment, the configuration of the conventional example, and further the configuration of the present embodiment excluding the signal cancellation circuit network. Isolation in this case means insertion loss from the transmission signal input terminal 101 to the output terminal 102. Here, the conventional example corresponds to the high-frequency signal switching circuit described in Patent Document 1 described above. In this simulation, the signal level was 0.1 lVrms at a frequency of 10 MHz to 100 MHz, a 1N4148 type diode was used, and the voltage of the switch control signal was 6V.
[0033] 図 2に示すように、本実施形態の構成を用いることにより、殆ど全ての周波数帯域に ぉ 、て、従来例の高周波信号切替回路以上のアイソレーションを確保することができ る。特に 40MHz以上の周波数帯域では、従来例よりも 10dB以上高いアイソレーショ ンを確保することができる。  As shown in FIG. 2, by using the configuration of the present embodiment, it is possible to secure an isolation higher than that of the conventional high-frequency signal switching circuit in almost all frequency bands. In particular, in the frequency band of 40 MHz or higher, it is possible to secure an isolation of 10 dB or more higher than the conventional example.
[0034] 一方、信号キャンセル回路網がない場合には従来例よりも低いアイソレーションとな る。この結果、本実施形態に示すようにバルントランスとともに信号キャンセル回路網 を用いることで、従来例以上のアイソレーションを確保することができる。 [0035] (2)受信時 On the other hand, when there is no signal cancellation circuit network, the isolation is lower than in the conventional example. As a result, as shown in the present embodiment, by using a signal cancellation circuit network together with the balun transformer, it is possible to ensure isolation higher than that of the conventional example. [0035] (2) When receiving
受信時には、第 2スィッチ制御信号入力端子 105からは直流で Hi状態の第 2スイツ チ制御信号 VD2が入力されてダイオード D2に供給される。ダイオード D2はこの Hi 状態の第 2スィッチ制御信号 VD2により導通状態となる。また、第 1スィッチ制御信号 入力端子 104からは直流で Low状態の第 1スィッチ制御信号 VD1が入力されてダイ オード D1に供給される力、第 1スィッチ制御信号 VD1が入力されずダイオード D1に 第 1スィッチ制御信号が供給されない。これにより、ダイオード D1は遮断状態となる。  At the time of reception, the second switch control signal VD2 in the Hi state is input from the second switch control signal input terminal 105 and supplied to the diode D2. The diode D2 is turned on by the second switch control signal VD2 in the Hi state. Also, the first switch control signal VD1 that is in a DC low state is input from the first switch control signal input terminal 104 and supplied to the diode D1, and the first switch control signal VD1 is not input to the diode D1. 1 Switch control signal is not supplied. As a result, the diode D1 is cut off.
[0036] このような状態で、アンテナ入出力端子 103から高周波の受信信号が入力されると 、この受信信号はバルントランス 1の 1次卷線 11に供給される。バルントランス 1の 1次 卷線 11に受信信号が入力されると、逆相(180° 位相ズレ)の受信信号が 2次卷線 2 1に励起され、ダイオード D2の力ソードに出力される。ダイオード D2は導通状態にあ るので、力ソードに入力された受信信号を殆ど減衰させることなくアノードから受信信 号出力端子 102に出力する。なお、アノードから出力される受信信号はレベルが弱 V、ので信号キャンセル回路網 2に入力されても抵抗 R20で減衰されて、送信信号入 力端子 101には伝送されな 、。  In this state, when a high frequency received signal is input from the antenna input / output terminal 103, this received signal is supplied to the primary winding 11 of the balun transformer 1. When a received signal is input to the primary winding 11 of the balun transformer 1, a reverse-phase (180 ° phase shift) received signal is excited to the secondary winding 21 and output to the force sword of the diode D2. Since the diode D2 is in a conducting state, the received signal input to the force sword is output from the anode to the received signal output terminal 102 with almost no attenuation. Since the received signal output from the anode is weak V, even if it is input to the signal cancellation circuit 2, it is attenuated by the resistor R20 and is not transmitted to the transmission signal input terminal 101.
[0037] また、 1次卷線 11に受信信号が入力されることで、同相 (位相ズレなし)の受信信号 力 S3次卷線 31に励起され、ダイオード D1に出力される。ダイオード D1は遮断状態に あるので、力ソードに入力された受信信号を所定量減衰する。この際、受信信号は送 信信号と比較して信号レベルが低!ヽので、ダイオード D1により受信信号は遮断され て送信信号入力端子 101には伝送されな ヽ。  [0037] Further, when a reception signal is input to primary winding 11, it is excited by in-phase (no phase shift) reception signal force S3rd winding 31 and is output to diode D1. Since the diode D1 is cut off, the received signal input to the force sword is attenuated by a predetermined amount. At this time, the signal level of the received signal is lower than that of the transmitted signal! Therefore, the received signal is blocked by the diode D1 and not transmitted to the transmission signal input terminal 101.
[0038] このように、受信時には、受信信号を殆ど減衰させることなく受信信号出力端子 10 2に伝送することができる。すなわち、受信信号の挿入損失を小さく抑えることができ る。  In this way, at the time of reception, the reception signal can be transmitted to the reception signal output terminal 102 with almost no attenuation. That is, the insertion loss of the received signal can be kept small.
[0039] 以上のように、本実施形態の構成を用いることにより、受信信号の挿入損失を抑制 し、受信信号出力端子の送信信号に対するアイソレーションを大きく確保するアンテ ナスイッチを簡素な構造で実現することができる。  [0039] As described above, by using the configuration of the present embodiment, an antenna switch that suppresses insertion loss of a received signal and ensures large isolation from the received signal output terminal with respect to the transmitted signal is realized with a simple structure. can do.
[0040] なお、前述の説明では、ダイオード Dl, D2の力ソードをバルントランス 1に接続す る構造を示した力 ダイオードはスィッチ素子として機能するものであるので、ダイォ ード Dl, D2の極性を逆、すなわちアノードをバルントランス 1に接続する構造を用い てもよい。この場合、スィッチ制御信号は負電圧を利用するものに変更すればよい。 [0040] In the above description, the force diode showing the structure in which the force swords of the diodes Dl and D2 are connected to the balun transformer 1 functions as a switch element. A structure in which the polarity of the nodes Dl and D2 is reversed, that is, the anode is connected to the balun transformer 1 may be used. In this case, the switch control signal may be changed to one using a negative voltage.
[0041] また、前述の説明では、スィッチ素子として、送信信号経路と受信信号経路とにそ れぞれ 1つのダイオードを挿入した例を示したが、ダイオード数は 1つに限ることはな ぐ複数のダイオードを直列に接続してもよい。  [0041] In the above description, an example has been described in which one diode is inserted in each of the transmission signal path and the reception signal path as the switch element, but the number of diodes is not limited to one. A plurality of diodes may be connected in series.
[0042] また、前述の説明では、スィッチ素子としてダイオードを用いた力 代わりに FET等 の半導体素子を用いてもょ 、。  [0042] In the above description, a semiconductor element such as an FET may be used instead of a force using a diode as a switch element.
[0043] また、前述の説明では、バルントランスとしてトリフアイラ巻の形状を示したが、ノィフ アイラ巻きのものを 2つ用いた形状でもよい。さらに、卷線型を用いず、配線パターン を形成した多層基板や、厚膜 Z薄膜の多層セラミック基板にトランスをパターン形成 したノ レントランスであってもよい。また、 1Z4波長線路を用いたマーチャンダィズバ ルンであってもよい。  [0043] In the above description, the shape of the trifilar winding is shown as the balun transformer. Furthermore, a transformer having a transformer formed on a multilayer ceramic substrate having a thick film Z thin film may be used instead of a winding type. Alternatively, a merchandise balun using a 1Z4 wavelength line may be used.
[0044] また、前述の説明では、アンテナスィッチを例に説明した力 1つの入出力端子に 対して 2つの入出力端子を切り替えて接続することで、高周波信号の送受信を行う高 周波信号切替回路であれば、前述の構成を適用でき、前述の効果を奏することがで きる。  [0044] In the above description, the high-frequency signal switching circuit that transmits and receives a high-frequency signal by switching and connecting two input / output terminals to one input / output terminal described as an example of an antenna switch. If so, the above-described configuration can be applied, and the above-described effects can be achieved.

Claims

請求の範囲 The scope of the claims
[1] 1つの不平衡端子と、該不平衡端子に同相の第 1平衡端子と、前記不平衡端子に 逆相の第 2平衡端子とを備えた不平衡ー平衡変換器と、  [1] An unbalanced-balanced converter comprising one unbalanced terminal, a first balanced terminal having the same phase as the unbalanced terminal, and a second balanced terminal having an opposite phase to the unbalanced terminal;
前記第 1平衡端子に第 1スィッチ素子を介して接続する第 1信号入出力端子と、 前記第 2平衡端子に第 2スィッチ素子を介して接続する第 2信号入出力端子と、 前記第 1スィッチ素子、前記第 2スィッチ素子のオン'オフ制御を行うスィッチ制御 手段と、  A first signal input / output terminal connected to the first balanced terminal via a first switch element; a second signal input / output terminal connected to the second balanced terminal via a second switch element; and the first switch Element, switch control means for performing on / off control of the second switch element, and
前記第 1信号入出力端子と前記第 2信号入出力端子との間に接続され、位相を変 化させることなく信号を伝送する信号キャンセル回路網と、  A signal cancellation circuit connected between the first signal input / output terminal and the second signal input / output terminal and transmitting a signal without changing a phase;
を備えたことを特徴とする高周波信号切替回路。  A high-frequency signal switching circuit comprising:
[2] 前記第 1スィッチ素子、前記第 2スィッチ素子が PINダイオードである請求項 1に記 載の高周波信号切替回路。 2. The high-frequency signal switching circuit according to claim 1, wherein the first switch element and the second switch element are PIN diodes.
PCT/JP2005/010663 2004-09-27 2005-06-10 High frequency signal switching circuit WO2006035531A1 (en)

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* Cited by examiner, † Cited by third party
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JP2010081250A (en) * 2008-09-25 2010-04-08 Toshiba Corp Radio-frequency switch circuit
JP2010252161A (en) * 2009-04-17 2010-11-04 Hitachi Kokusai Electric Inc Diode switch circuit
FR2969428A1 (en) * 2010-12-21 2012-06-22 St Microelectronics Sa ELECTRONIC SWITCH AND COMMUNICATION APPARATUS INCLUDING SUCH A SWITCH

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JPH09107203A (en) * 1995-10-09 1997-04-22 Sanyo Electric Co Ltd Switching element and semiconductor device
JP2004242280A (en) * 2003-01-14 2004-08-26 Kyocera Corp High frequency switch circuit and high frequency switch parts

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Publication number Priority date Publication date Assignee Title
JPH09107203A (en) * 1995-10-09 1997-04-22 Sanyo Electric Co Ltd Switching element and semiconductor device
JP2004242280A (en) * 2003-01-14 2004-08-26 Kyocera Corp High frequency switch circuit and high frequency switch parts

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010081250A (en) * 2008-09-25 2010-04-08 Toshiba Corp Radio-frequency switch circuit
JP2010252161A (en) * 2009-04-17 2010-11-04 Hitachi Kokusai Electric Inc Diode switch circuit
FR2969428A1 (en) * 2010-12-21 2012-06-22 St Microelectronics Sa ELECTRONIC SWITCH AND COMMUNICATION APPARATUS INCLUDING SUCH A SWITCH
US8981882B2 (en) 2010-12-21 2015-03-17 Stmicroelectronics Sa Electronic switch and communication device including such a switch

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DE112005002018T5 (en) 2007-08-23
JPWO2006035531A1 (en) 2008-05-15
JP4404093B2 (en) 2010-01-27

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