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WO2005086546A2 - Lecteur de cartes securise - Google Patents

Lecteur de cartes securise Download PDF

Info

Publication number
WO2005086546A2
WO2005086546A2 PCT/EP2005/050727 EP2005050727W WO2005086546A2 WO 2005086546 A2 WO2005086546 A2 WO 2005086546A2 EP 2005050727 W EP2005050727 W EP 2005050727W WO 2005086546 A2 WO2005086546 A2 WO 2005086546A2
Authority
WO
WIPO (PCT)
Prior art keywords
enclosure
card
conductors
aperture
keypad
Prior art date
Application number
PCT/EP2005/050727
Other languages
English (en)
Other versions
WO2005086546A3 (fr
Inventor
Richard Ward
Gareth Alexander Richards
Enrique Garrido-Gadea
Andrew Graham Hodges
Richard Andrew Hodson
Original Assignee
Lipman Electronics Engineering Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GBGB0404922.7A external-priority patent/GB0404922D0/en
Application filed by Lipman Electronics Engineering Limited filed Critical Lipman Electronics Engineering Limited
Priority to US10/591,267 priority Critical patent/US7988054B2/en
Publication of WO2005086546A2 publication Critical patent/WO2005086546A2/fr
Publication of WO2005086546A3 publication Critical patent/WO2005086546A3/fr

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K7/00—Methods or arrangements for sensing record carriers, e.g. for reading patterns
    • G06K7/0013—Methods or arrangements for sensing record carriers, e.g. for reading patterns by galvanic contacts, e.g. card connectors for ISO-7816 compliant smart cards or memory cards, e.g. SD card readers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K7/00—Methods or arrangements for sensing record carriers, e.g. for reading patterns
    • G06K7/0013—Methods or arrangements for sensing record carriers, e.g. for reading patterns by galvanic contacts, e.g. card connectors for ISO-7816 compliant smart cards or memory cards, e.g. SD card readers
    • G06K7/0086—Methods or arrangements for sensing record carriers, e.g. for reading patterns by galvanic contacts, e.g. card connectors for ISO-7816 compliant smart cards or memory cards, e.g. SD card readers the connector comprising a circuit for steering the operations of the card connector
    • G06K7/0091—Methods or arrangements for sensing record carriers, e.g. for reading patterns by galvanic contacts, e.g. card connectors for ISO-7816 compliant smart cards or memory cards, e.g. SD card readers the connector comprising a circuit for steering the operations of the card connector the circuit comprising an arrangement for avoiding intrusions and unwanted access to data inside of the connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
    • H01H2239/00—Miscellaneous
    • H01H2239/032—Anti-tamper

Definitions

  • the present invention relates to a secure card reader and, more particularly, to various security features that may be employed individually or in combinations.
  • Card readers for reading credit cards or the like are a familiar feature of modern life. In order for commerce to proceed using such devices, the devices must be secure so that they cannot be manipulated to facilitate fraudulent transactions.
  • US-A-2004/0120101 discloses a card reader in which circuitry is enclosed in a tamper-detecting enclosure. However, the chip card contact module is mounted outside of the tamper-detecting enclosure.
  • an apparatus comprising a wall with an aperture in it, wherein at least on taper detection conductor path is embedded in said wall around the aperture for detection of widening of the aperture.
  • the wall is a wall of an anti-tamper enclosure having at least one tamper detection conductive path embedded therein, an electronic circuit is located within the enclosure and object receiving means, within the enclosure and aligned with the aperture, the aperture being configured to allow insertion of an object for which the object receiving means is configured. More preferably, the object receiving means serves as an anti-probing barrier behind the aperture preventing access to said electronic circuit.
  • the aperture may be configured for endways insertion of a credit card, in which case the object receiving means is a chip card contact module.
  • the conductive path or paths preferably extend across the whole of the enclosure such that cutting through the enclosure, to make electrical contact with the circuit, without breaking or grounding an embedded conductive path is substantially impracticable.
  • the conductive path or paths are arranged in a plurality of layers such that conductors in different layers are offset relative to each other. In other words, gaps between conductors in one layer are blocked by conductors in one or more other layers.
  • the enclosure may be assembled from a plurality of printed circuit boards, which can optionally be electrically connected and/or connected by an interlocking mechanical joint.
  • the electronic circuit may comprise means for feeding current through each conductive path and detecting disturbances thereof.
  • the electronic circuit may comprise a multi-layer printed circuit board having a first face on which components are mounted, a second face on which no components are mounted.
  • the conductors carrying signals between said components are preferably separated from the second face by a tamper detection conductive path.
  • an apparatus comprising a housing member and an enclosure fixed in the housing member by a potting material, wherein the enclosure includes holes, which may be through holes, into which the potting material extends.
  • the enclosure has an opening on one side and the opening is covered by a housing member. More preferably, the holes are provided around the rim of the opening, which may be received in a channel included in the housing member.
  • an apparatus comprising; a first housing shell having holes; a second housing shell press-fitted to the first shell; and a keypad membrane located in the first shell such that its keys extend through said holes, wherein a wall is provided in the first or second shell to form a barrier between the seam between the shells and the membrane.
  • a chip card contact module comprising a plurality of conductors leading from respective contacts, wherein none of the conductors leads from a contact in a direction opposite to any other.
  • the contact module preferably has a card input side into which a card can be inserted for reading, wherein none of said conductors leads from a contact towards the card input side.
  • the contacts may be arranged in two rows comprising a front row and a back row, the front row being nearer the card input side than is the back row.
  • the conductors from the back row lead directly away from the card input side and the conductors from the front row diverge and then lead directly away from the card input slot.
  • a keypad comprising a flexible membrane overlying a circuit board, the flexible membrane having a first set of conductive elements for connecting tracks on the circuit board so as to form push to make switches a second set of conductive elements connecting tracks on the circuit board.
  • the conductive elements of the first set are located in respective recesses aligned with respective buttons. More preferably, the conductive elements of the second set of located outside of said recesses.
  • the keypad is preferably installed behind an element which has apertures through which the buttons project and projections that bare against the membrane at positions aligned with the conductive elements of said second set.
  • the keypad may be included in an apparatus having means for passing current through the second set of conductive elements and means for detecting an interruption of current through the second set of conductive elements to produce a tamper condition indicating signal.
  • Figure 1 is a front view of a card reader module according to the present invention.
  • Figure 2 is an exploded view of the card reader shown in Figure 1;
  • Figure 3 is cross-section, somewhat exaggerated for clarity, of part of the PCB shown in Figure 2;
  • Figures 4(a) to 4(b) show, somewhat exaggerated for clarity, the tamper detection layers of the PCB shown in Figure 3;
  • Figure 5 is an exploded view of the cover shown in Figure 2;
  • Figure 6 shows a detail of the cover mounted to the front main member of the module shown in Figure 1 without potting material;
  • Figure 7 shows potting material holding the cover in place;
  • Figure 8 shows the keypad membrane installed on the front main member of the module shown in Figure 1;
  • Figure 9 shows part of the front face of the first PCB in Figure 2;
  • Figure 10 shows the keypad membrane
  • Figure 11 is a cross-section of the module of Figure 1 along the line AA;
  • Figures 12(a) and 12(b) are respectively front and top views of the chip card contact module used in the card reader module shown in Figure 1;
  • Figure 13 is a block diagram of the tamper detection circuitry of the card reader of
  • a card reader 1 comprises a body 2.
  • a window 4 revealing an LCD panel, is located in to top half of the body 2 and the keys 5 of a keypad are distributed below the window 4.
  • a card insertion slot 6 opens at the foot of the reader and chip cards can be inserted lengthways upwards into the slot 6 for reading.
  • the body 2 comprises a front and back main members 2a, 2b.
  • the front and back main members 2a, 2d are coupled together by screws (not shown).
  • the window 4 is incorporated into a befcel member 2c which is screwed to the front of the front main member 2a through PCB 8, thereby preventing removal of the window 4 when the module has been assembled.
  • the back main member 2d may be dispensed with and the front main member 2a fixed to another apparatus, which itself prevents access to the internals of the card reader 1 from behind.
  • a keypad membrane 7, a PCB 8, a cover 9 (shown exploded) are sandwiched with the keypad membrane 7 at the front and the cover 9 at the back.
  • the keypad membrane 7 includes keys 5 which project through corresponding holes 33 in the front main member 2a.
  • the PCB 8 is attached to the front main member 2a by screws 11 so that the keypad member 7 is located between the PCB 8 and the front main member 2a.
  • the cover 9 is assembled from multi-layer PCBs and its sidewalls 9a, 9b are received in channels 15 formed by walls projecting from the back of the front main member 2a. The cover 9 completely covers the PCB 8 such that the only access to the PCB 8 is through a card entry slot 9c in a first end wall 9d.
  • the PCB 8 is a multi-layer PCB.
  • the keypad side of the PCB 8 contains tracks 30 forming the fixed contacts of the keys.
  • Above the key contact tracks 30 are four layers containing serpentine tracks 18a, 18b, 18c, 18d.
  • These serpentine conductive tracks 18a, 18b, 18c, 18d are offset with respect to each other and arranged so that active signal paths 19 in other layers cannot be reached without breaHng one of the serpentine tracks 18a, 18b, 18c, 18d and interrupting a monitoring current flowing therethrough.
  • the loops of the serpentine tracks 18a, 18b, 18c, 18d are packed as close as is practicable.
  • the cover 9 comprises first and second side walls 9a, 9b, first and second end walls 9c, 9d and a roof 9f.
  • Each of the side walls 9a, 9b, the end walls 9d, 9e and the roof 9f is made from multi-layer PCB and contains mutually off-set and cross-crossing serpentine conductive tracks like those of the PCB 8 and shown exaggeratedly in Figures 4(a) to 4(d).
  • the serpentine tracks are configured to make it impossible to drill through the cover without breaking one of the paths.
  • the loops of the serpentine tracks are packed as close as is practicable.
  • a complete conductive sheet (not shown), forming a ground plane, is included on the outside of the serpentine paths to prevent visual inspection of the tracking layers beneath, to act as a grounding contact if a metal drill is used to attack the serpentine tracks and also acts to reduce electromagnetic emissions from the assembly. Additionally, there is the possibihty that a tool being using in an attempt to probe through the cover 9 will short a serpentine track 18a, 18b, 18c, 18d to the ground plane.
  • the ends of the side walls 9a, 9b and the first end wall 9e have notches.
  • the notches enable the first end wall 9e to be connected to the side walls 9a, 9b by halving joints.
  • the second end wall 9d has short tabs at either end which are received in the remaining notches in the first and second side walls 9a, 9b.
  • the roof 9f is rectangular and has a shallow notch in one end. This notch receives a short tongue, that projects from the top of the first end wall 9d, to locate the roof 9f.
  • the elements 9a, 9b, 9d, 9e, 9f of the cover 9 are held together by solder joints which also serve to interconnect the serpentine conductive paths in the different elements 9a, 9b, 9d, 9e, 9f.
  • the serpentine tracksin the cover are connected to the PCB 8 via a connector, comprising a part 10 located centrally on the PCB 8 which mates with another part (not shown) located centrally on the underside of the roof 9£. Electrical connection is only made by the connector when the male part is fully inserted into the female part. This prevents removal of the cover 9 from PCB 8 without breaking the tamper detection circuit.
  • the connector is completely enclosed by the cover 9
  • a slot 9c just large enough to allow a credit card to pass lengthwise is provided in the second end wall 9d.
  • the second end wall 9d includes embedded conductors up to the edge of the slot 9c such that the slot 9c cannot be enlarged without breaking a conductor.
  • the side walls 9a, 9b and the second end wall 9d each have a line of small through holes 20 in their lower margins, i.e. the parts received in the channels 15 formed on the back of the front main member 2a.
  • the cover 9 is secured in position by an epoxy potting material 21.
  • the potting material 21 extends into the through holes 20 locking the cover 9 in position.
  • the inner walls 16 of the channels 15 project upward beyond the installed keypad membrane 7 to form a barrier preventing probes being inserted sideways under the keypad membrane 7.
  • the front face of the first PCB is provided with a conductor pattern comprising first and second sets of pairs of interdigitated contacts 30, 31.
  • the key pad membrane 7 is moulded from an elastomeric material.
  • a recess 32 is formed under each key 5 and carbon pills 34 are mounted in the recesses 32. Additional carbon pills 35 are distributed in non-recessed parts of the keypad membrane 7.
  • the carbon pills 34 in the recesses 32 are aligned with the contact pairs 30 of the first set and are shorted only when keys 5 are pressed to produce user input signals.
  • the other carbon pills 35 are aligned with the contact pairs 31 of the second set.
  • the contact pairs of the second set are shorted by default.
  • the circuitry on the PCB 8 can detect attempts to probe behind the membrane by detecting an interruption in a current flowing through the contact pairs 31 of the second set.
  • the front main member 2a has a plurality of pillars 37 that project backwards between the holes. These pillars 37 are received by blind holes 38 in the keypad membrane 7 to press it towards the PCB 8.
  • the blind holes 38 are aligned with the carbon pills 35, associated with the contact pairs 31 of the second set, and ensure that these contacts remain shorted during normal use.
  • a chip card contact module 40 is mounted on the PCB 8.
  • the module 40 has a slot 41 that can receive a card inserted through the second slot 6 and slot 9c.
  • a set of contacts 42 is arranged to make contact with the contacts of a properly inserted card.
  • the contacts 42 are arranged in two rows 42a, 42b of four.
  • the rear row 42a i.e. the row furthest from the second slot 6, comprises the ends of four conductors 43, 44, 45, 46 that extend straight back away from the second slot 6.
  • the front row 42b comprises the ends of four conductors 47, 48, 48, 50 which also extend back away from the second slot 6. However, these conductors 47, 48, 48, 50 jink sideways so that two extend straight back on each.. side of the conductors 43, 44, 45, 46 from the first row 42a of contacts.
  • the card reader has three distinct tamper detection system. These comprise the serpentine tracks 18a, 18b, 18c, 18d and associated circuitry, the additional carbon pills 35 and associated circuitry, and a temperature sensor 51 located within the cover 9, and associated circuitry.
  • a small battery 52 located within the cover 9, provides a permanent supply of power for the tamper detection circuitry.
  • the serpentine tracks 18a, 18b, 18c, 18d are connected in series between first and second resistors 53, 56.
  • the first resistor 53 is connected to the positive terminal of the battery 52.
  • the second resistor 56 is connected to ground.
  • the node formed by the first resistor 53 and the serpentine tracks 18a, 18b, 18c, 18d is also connected to a first input of a window comparator 54.
  • a second input of the window comparator 54 is provided with a first reference voltage Vrefla, which is derived from the voltage across the battery 52
  • a third input of the window comparator 54 is provided with a second reference voltage Vreflb, which is derived from the voltage across the battery 52.
  • the first input of the window comparator 54 is between the first and second reference voltages Vrefla, Nreflb and the output of the first comparator 54 is low.
  • the voltage on the first input of the window comparator 54 rises past the first reference voltage Vrefl , causing the output of the window comparator 54 to go high.
  • the voltage on the first input of the window comparator 54 falls past the second reference voltage Vreflb, causing the output of the window comparator 54 to go high.
  • a first latch 55 latches the high state of the output of the window comparator 54 so that even fleeting disturbances of the current through the serpentine tracks 18a, 18b coordinator18c, 18d can be responded to reliably.
  • the carbon pills 35 and associated contact pairs 31 are connected in series between a pull-up resistor 57.
  • the node formed by the pull-up resistor 57 and current path through the carbon pills 35 and associated contact pairs is also connected to a first input of a first comparator 58
  • a second input of the first comparator 58 is provided with a third reference voltage Vref2, which is derived from the voltage across the battery 52.
  • the first input of the first comparator 58 is low and the output of the first comparator 58 is also low.
  • the voltage at the first input of the first comparator 58 rises past the third reference voltage Vre£2 and the output of the second comparator 58 then goes high.
  • a second latch 59 latches the high state of the output of the first comparator 58 so that even a fleeting lifting of part of the keypad membrane 7 can be reliable responded to.
  • the output of the temperature sensor 51 is connected to a first input of a second comparator 62.
  • the other input of the second comparator 62 is provided with a fourth reference voltage Vref3, which is derived from the voltage across the battery 52.
  • the output of the second comparator 62 is low. However, if the temperature, sensed by the temperature sensor 51 falls below —25°, which indicates cooling being used to slow the response of other tamper detection systems, the output of the second comparator 68 goes high and is latched by a third latch 63.
  • the outputs of the latches 55, 59, 63 are supphed to concentrating circuit 65, e.g. an AND-gate, which produces an erase signal when the outputs of any one or more of the latches 55, 59, 63 is high.
  • concentrating circuit 65 e.g. an AND-gate
  • the erase signal is fed to an erase circuit 67 which is responsible for zeroisation of the security module's memory 69.
  • the erase circuit 67 write zero to every location in the memory 69 and then opens a first switch 71 to remove power from the memory 69. Finally, a second switch 72 is closed to remove any residual charge from the memory 69.

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  • Engineering & Computer Science (AREA)
  • Artificial Intelligence (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Push-Button Switches (AREA)
  • Credit Cards Or The Like (AREA)

Abstract

Cette invention concerne un lecteur de cartes sécurisé (1) intégrant plusieurs mesures de sécurité. Une enveloppe (9) dont les parois contiennent des chemins conducteurs (18a, 18b, 18c) empêche l'accès au circuit principal du lecteur. La rupture ou la mise à la terre de l'un de ces chemins peut être détectée électroniquement. Un système analogue de chemins conducteurs empêche d'élargir la fente de réception de la carte (9c). En cas de détection d'une fraude au moyen des chemins conducteurs intégrés (18a, 18b, 18c), la mémoire (69) du lecteur est effacée. L'enveloppe (9) comporte des ouvertures (20) dans ses cloisons et est maintenue en place au moyen d'un matériau d'enrobage qui pénètre dans ces ouvertures. Des moyens (31, 35) permettent également de détecter des tentatives faites pour sonder une zone derrière une membrane de bloc numérique (7). Les contacts (42) du microcircuit intégré d'une carte à puce sont agencés de telle sorte que leurs fils sont orientés à l'écart de la fente d'insertion de la carte.
PCT/EP2005/050727 2004-03-04 2005-02-18 Lecteur de cartes securise WO2005086546A2 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US10/591,267 US7988054B2 (en) 2004-03-04 2005-02-18 Secure card reader

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
GB0404922.7 2004-03-04
GBGB0404922.7A GB0404922D0 (en) 2004-03-04 2004-03-04 Secure card reader
GB0502343A GB2411756B (en) 2004-03-04 2005-02-04 Secure card reader
GB0502343.7 2005-02-04

Publications (2)

Publication Number Publication Date
WO2005086546A2 true WO2005086546A2 (fr) 2005-09-15
WO2005086546A3 WO2005086546A3 (fr) 2006-01-12

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2005/050727 WO2005086546A2 (fr) 2004-03-04 2005-02-18 Lecteur de cartes securise

Country Status (1)

Country Link
WO (1) WO2005086546A2 (fr)

Cited By (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2889756A1 (fr) * 2005-08-11 2007-02-16 Itt Mfg Enterprises Inc Agencement de securite contre la fraude pour connecteur electrique pour carte a puce
EP1785911A1 (fr) * 2005-10-31 2007-05-16 ddm hopt + schuler GmbH & Co. KG. Lecteur de carte avec couvercle en plastique muni de pistes conductrices
EP1873680A1 (fr) * 2006-06-23 2008-01-02 ddm hopt + schuler GmbH & Co. KG. Lecteur de carte protégé contre la manipulation
FR2908552A1 (fr) * 2006-11-10 2008-05-16 Sagem Monetel Soc Par Actions Interrupteur de circuit electronique protege contre un acces exterieur
WO2008068740A2 (fr) 2006-12-08 2008-06-12 Verifone, Inc. Protection anti-altération pour lecteur de bande magnétique
EP2082517A2 (fr) * 2006-10-17 2009-07-29 Semtek Innovative Solutions, Inc. Transactions par jetons chiffrés
EP2180488A1 (fr) * 2008-10-21 2010-04-28 Tecvan Informática LTDA. Dispositif de construction introduit dans un clavier de sécurité pour des processus d'informations et de secrets stockés par des supports électroniques
US7784691B2 (en) 2006-12-08 2010-08-31 Verifone Inc. Security functionality for magnetic card readers and point of sales devices
US7878397B2 (en) 2007-11-15 2011-02-01 Verifone, Inc. Enhanced security magnetic card reader especially useful in point of sale devices
US7898413B2 (en) 2007-01-25 2011-03-01 Verifone, Inc. Anti-tamper protected enclosure
EP2180466A3 (fr) * 2008-10-22 2011-08-24 Tecvan Informática LTDA. Améliorations introduites dans un lecteur à carte magnétique avec une protection contre les attaques exothermiques et thermiques, et processus d'assemblage
US8330606B2 (en) 2010-04-12 2012-12-11 Verifone, Inc. Secure data entry device
US8358218B2 (en) 2010-03-02 2013-01-22 Verifone, Inc. Point of sale terminal having enhanced security
US8405506B2 (en) 2010-08-02 2013-03-26 Verifone, Inc. Secure data entry device
US8593824B2 (en) 2010-10-27 2013-11-26 Verifone, Inc. Tamper secure circuitry especially for point of sale terminal
US8595514B2 (en) 2008-01-22 2013-11-26 Verifone, Inc. Secure point of sale terminal
US8621235B2 (en) 2011-01-06 2013-12-31 Verifone, Inc. Secure pin entry device
US8884757B2 (en) 2011-07-11 2014-11-11 Verifone, Inc. Anti-tampering protection assembly
US9013336B2 (en) 2008-01-22 2015-04-21 Verifone, Inc. Secured keypad devices
US9691066B2 (en) 2012-07-03 2017-06-27 Verifone, Inc. Location-based payment system and method
US10544923B1 (en) 2018-11-06 2020-01-28 Verifone, Inc. Devices and methods for optical-based tamper detection using variable light characteristics
CN112150701A (zh) * 2020-09-25 2020-12-29 南京佳照福网络科技有限公司 一种避免电子卡被折断的新一代信息技术刷卡机辅助装置
US11397835B2 (en) 2014-07-23 2022-07-26 Verifone, Inc. Data device including OFN functionality

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WO2010111655A1 (fr) 2009-03-26 2010-09-30 Hypercom Corporation Sécurité de membrane de clavier
US9213869B2 (en) 2013-10-04 2015-12-15 Verifone, Inc. Magnetic stripe reading device
US9595174B2 (en) 2015-04-21 2017-03-14 Verifone, Inc. Point of sale terminal having enhanced security

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DE9105960U1 (de) * 1991-05-14 1992-06-11 Siemens Nixdorf Informationssysteme AG, 4790 Paderborn Schutzvorrichtung für Schaltungsteile und/oder Daten in einem Gerät zur Authentifikation und Betragsbestätigung
US6185507B1 (en) * 1996-08-23 2001-02-06 Siemens Aktiengesellschaft Microprocessor, in particular for use in a chip card, with a control unit and with a housing surrounding the control unit

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Publication number Priority date Publication date Assignee Title
DE3023427A1 (de) * 1979-06-28 1981-01-08 Gretag Ag Mobiler datenbehaelter
DE9105960U1 (de) * 1991-05-14 1992-06-11 Siemens Nixdorf Informationssysteme AG, 4790 Paderborn Schutzvorrichtung für Schaltungsteile und/oder Daten in einem Gerät zur Authentifikation und Betragsbestätigung
US6185507B1 (en) * 1996-08-23 2001-02-06 Siemens Aktiengesellschaft Microprocessor, in particular for use in a chip card, with a control unit and with a housing surrounding the control unit

Cited By (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2889756A1 (fr) * 2005-08-11 2007-02-16 Itt Mfg Enterprises Inc Agencement de securite contre la fraude pour connecteur electrique pour carte a puce
EP1785911A1 (fr) * 2005-10-31 2007-05-16 ddm hopt + schuler GmbH & Co. KG. Lecteur de carte avec couvercle en plastique muni de pistes conductrices
EP1873680A1 (fr) * 2006-06-23 2008-01-02 ddm hopt + schuler GmbH & Co. KG. Lecteur de carte protégé contre la manipulation
EP2082517A2 (fr) * 2006-10-17 2009-07-29 Semtek Innovative Solutions, Inc. Transactions par jetons chiffrés
EP2082517A4 (fr) * 2006-10-17 2011-09-28 Semtek Innovative Solutions Inc Transactions par jetons chiffrés
FR2908552A1 (fr) * 2006-11-10 2008-05-16 Sagem Monetel Soc Par Actions Interrupteur de circuit electronique protege contre un acces exterieur
WO2008068740A2 (fr) 2006-12-08 2008-06-12 Verifone, Inc. Protection anti-altération pour lecteur de bande magnétique
US7597261B2 (en) 2006-12-08 2009-10-06 Verifone, Inc. Anti-tampering protection for magnetic stripe reader
US7497378B2 (en) 2006-12-08 2009-03-03 Verifone, Inc. Anti-tampering protection for magnetic stripe reader
US7784691B2 (en) 2006-12-08 2010-08-31 Verifone Inc. Security functionality for magnetic card readers and point of sales devices
US7898413B2 (en) 2007-01-25 2011-03-01 Verifone, Inc. Anti-tamper protected enclosure
US7878397B2 (en) 2007-11-15 2011-02-01 Verifone, Inc. Enhanced security magnetic card reader especially useful in point of sale devices
US9779270B2 (en) 2008-01-22 2017-10-03 Verifone, Inc. Secured keypad devices
US8595514B2 (en) 2008-01-22 2013-11-26 Verifone, Inc. Secure point of sale terminal
US9436293B2 (en) 2008-01-22 2016-09-06 Verifone, Inc. Secured keypad devices
US9250709B2 (en) 2008-01-22 2016-02-02 Verifone, Inc. Secure point of sale terminal
US9032222B2 (en) 2008-01-22 2015-05-12 Verifone, Inc. Secure point of sale terminal
US9013336B2 (en) 2008-01-22 2015-04-21 Verifone, Inc. Secured keypad devices
EP2180488A1 (fr) * 2008-10-21 2010-04-28 Tecvan Informática LTDA. Dispositif de construction introduit dans un clavier de sécurité pour des processus d'informations et de secrets stockés par des supports électroniques
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