WO2005073946A1 - プラズマディスプレイパネルの駆動方法 - Google Patents
プラズマディスプレイパネルの駆動方法 Download PDFInfo
- Publication number
- WO2005073946A1 WO2005073946A1 PCT/JP2005/001436 JP2005001436W WO2005073946A1 WO 2005073946 A1 WO2005073946 A1 WO 2005073946A1 JP 2005001436 W JP2005001436 W JP 2005001436W WO 2005073946 A1 WO2005073946 A1 WO 2005073946A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- period
- initialization
- subfield
- cell
- discharge
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims description 41
- 238000010586 diagram Methods 0.000 description 15
- 239000010410 layer Substances 0.000 description 12
- 101000631760 Homo sapiens Sodium channel protein type 1 subunit alpha Proteins 0.000 description 10
- 102100028910 Sodium channel protein type 1 subunit alpha Human genes 0.000 description 10
- 239000000758 substrate Substances 0.000 description 9
- 101000920618 Homo sapiens Transcription and mRNA export factor ENY2 Proteins 0.000 description 8
- 102100031954 Transcription and mRNA export factor ENY2 Human genes 0.000 description 8
- 230000037452 priming Effects 0.000 description 8
- 230000007423 decrease Effects 0.000 description 7
- 238000001514 detection method Methods 0.000 description 5
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 4
- 238000005192 partition Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 239000012212 insulator Substances 0.000 description 3
- 238000012423 maintenance Methods 0.000 description 3
- 239000002245 particle Substances 0.000 description 2
- 239000011241 protective layer Substances 0.000 description 2
- 230000001174 ascending effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 230000003313 weakening effect Effects 0.000 description 1
- 229910052724 xenon Inorganic materials 0.000 description 1
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
- G09G3/292—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for reset discharge, priming discharge or erase discharge occurring in a phase other than addressing
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals
- G09G3/2022—Display of intermediate tones by time modulation using two or more time intervals using sub-frames
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
- G09G3/292—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for reset discharge, priming discharge or erase discharge occurring in a phase other than addressing
- G09G3/2927—Details of initialising
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/296—Driving circuits for producing the waveforms applied to the driving electrodes
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0238—Improving the black level
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2360/00—Aspects of the architecture of display systems
- G09G2360/16—Calculation or use of calculated indices related to luminance levels in display data
Definitions
- the present invention relates to a method for driving a plasma display panel.
- a typical AC surface-discharge type panel as a plasma display panel (hereinafter abbreviated as a panel) has a large number of discharge cells formed between a front plate and a rear plate which are arranged opposite to each other.
- the front plate includes a plurality of pairs of display electrodes including a pair of scan electrodes and sustain electrodes formed on a front glass substrate in parallel with each other, and a dielectric layer and a protective layer formed to cover the display electrodes.
- the back plate is composed of a plurality of parallel data electrodes on a back glass substrate, a dielectric layer covering them, and a plurality of partitions formed thereon in parallel with the data electrodes.
- the phosphor layer is formed on the side surfaces of the partition wall.
- the front plate and the back plate are disposed so as to face each other so that the display electrode and the data electrode are three-dimensionally intersecting with each other and are sealed, and a discharge gas is sealed in an internal discharge space.
- a discharge cell is formed at a portion where the display electrode and the data electrode face each other.
- an ultraviolet ray is generated by gas discharge in each discharge cell, and the ultraviolet light excites and emits phosphors of each of RGB colors to perform color display.
- a subfield method that is, a method in which one field period is divided into a plurality of subfields, and gradation display is performed by a combination of subfields to emit light is generally used. Also, among the subfield methods, a novel driving method in which light emission not related to gradation display is reduced as much as possible to improve the contrast ratio is disclosed in Japanese Patent Application Laid-Open No. 2000-224224. .
- FIG. 8 is a driving waveform diagram of the conventional plasma display panel described in the above publication.
- One field period is composed of N subfields having an initialization period, a write period, and a sustain period. These are abbreviated as the 13th, 25th, '*', and NSFth, respectively.
- the initialization operation is performed only on the discharge cells that are lit during the sustain period of the previous subfield. I have.
- a weak discharge is generated by applying a gradually rising ramp voltage to the scan electrode, and wall charges necessary for the address operation are formed on each electrode. At this time, excessive wall charges are formed in anticipation of optimizing the wall charges later. Then, in the second half of the subsequent initialization period, a weak discharge is caused again by applying a gradually falling ramp voltage to the scan electrodes, weakening the wall charges excessively stored on each electrode, and causing each discharge cell To an appropriate wall charge.
- an address discharge occurs in a discharge cell to be displayed.
- a sustain pulse is applied to the scan electrode and the sustain electrode, a sustain discharge is generated in the discharge cell in which the address discharge has occurred, and the phosphor layer of the corresponding discharge cell emits light to display an image. I do.
- a drive waveform similar to that in the latter half of the first SF initialization period that is, a ramp voltage that gradually decreases is applied to the scan electrodes.
- the discharge cells that have undergone the sustain discharge in the first SF generate a weak discharge, weaken the wall charges excessively stored on each electrode, and adjust the wall charges to be appropriate for each discharge cell.
- the discharge cells that have not undergone the sustain discharge retain the wall charges at the end of the first SF initialization period, and do not discharge.
- the initializing operation of the first SF is an all-cell initializing operation of discharging all the discharge cells, and the initializing operation of the second SF and thereafter is performed to initialize only the discharge cells that have undergone the sustain discharge. This is an initialization operation. Therefore, light emission not related to display is only weak discharge for initializing the first SF, and an image display with high contrast can be performed.
- simply increasing the number of all-cell initializations increases the black luminance, reduces contrast, and degrades image display quality.
- a method for driving a plasma display panel according to the present invention has been made in view of the above problems, and provides a method for driving a plasma display panel capable of performing stable high-speed writing and suppressing an increase in black luminance. With the goal. Disclosure of the invention
- a method for driving a plasma display panel is a method for driving a plasma display panel in which a discharge cell is formed at an intersection of a scan electrode, a sustain electrode, and a data electrode. It consists of a plurality of sub-fields having a period and a maintenance period.In the initialization period of the plurality of sub-fields, all cells perform an initializing discharge to all discharge cells that perform image display. One of the selective initializing operations for selectively performing the initializing discharge on the discharge cells that have undergone the sustain discharge in the subfield is performed, and each of the subfields is operated based on the image signal to be displayed. The initialization operation in the initialization period is determined to be either an all-cell initialization operation or a selective initialization operation.Brief Description of Drawings
- FIG. 1 is a perspective view showing a main part of a panel used in Embodiment 1 of the present invention.
- FIG. 2 is an electrode array diagram of the panel.
- FIG. 3 is a circuit block diagram of a plasma display device using the panel driving method.
- FIG. 4 is a driving waveform diagram applied to each electrode of the panel.
- FIG. 5 is a diagram showing a subfield configuration of the panel driving method.
- FIG. 6 is a circuit block diagram of a plasma display device using the panel driving method according to the second embodiment of the present invention.
- FIG. 7 is a diagram showing a subfield configuration of the panel driving method.
- FIG. 8 is a driving waveform diagram of a conventional panel. BEST MODE FOR CARRYING OUT THE INVENTION
- FIG. 1 is a perspective view showing a main part of a panel used in Embodiment 1 of the present invention.
- the panel 1 is configured such that a front substrate 2 and a rear substrate 3 made of glass are arranged to face each other, and a discharge space is formed therebetween.
- a plurality of scan electrodes 4 and sustain electrodes 5 constituting display electrodes are formed in parallel on the front substrate 2 in parallel with each other.
- a dielectric layer 6 is formed so as to cover scan electrode 4 and sustain electrode 5, and a protective layer 7 is formed on dielectric layer 6.
- a plurality of data electrodes 9 covered with an insulator layer 8 are provided on the rear substrate 3, and a partition 10 is provided on the insulator layer 8 between the data electrodes 9 in parallel with the data electrode 9.
- a partition 10 is provided on the insulator layer 8 between the data electrodes 9 in parallel with the data electrode 9.
- the phosphor layer 11 is provided on the surface of the insulator layer 8 and the side surface of the partition wall 10.
- the front substrate 2 and the rear substrate 3 are arranged facing each other in the direction in which the scan electrode 4, the sustain electrode 5, and the data electrode 9 intersect, and a discharge space formed between the front substrate 2 and the And a gas mixture of xenon.
- FIG. 2 is an electrode array diagram of the panel used in the first embodiment of the present invention.
- n scan electrodes SCNl to SCNn (scan electrode 4 in Fig. 1) and n sustain electrodes SUSl to SUsn (sustain electrode 5 in Fig. 1) are alternately arranged, and m scan electrodes in the column direction.
- the data electrodes Dl to Dm (data electrode 9 in Fig. 1) are arranged.
- FIG. 3 is a circuit block diagram of a plasma display device using the panel driving method according to the first embodiment of the present invention.
- This plasma display device includes a panel 1, a data electrode drive circuit 12, a scan electrode drive circuit 13, a sustain electrode drive circuit 14, a timing generation circuit 15, an AD (analog / digital) converter 18, and a scan number conversion unit 1. 9. It has a subfield converter 20, an average picture level (APL) detector 30, and a power supply circuit (not shown).
- APL average picture level
- the image signal VD is input to the AD converter 18. Further, the horizontal synchronizing signal H and the vertical synchronizing signal V are input to the timing generation circuit 15, the AD converter 18, the number-of-scans converter 19, and the subfield converter 20.
- the AD converter 18 converts the image signal VD into digital signal image data, and outputs the image data to the scanning number conversion unit 19 and the APL detection unit 30.
- APL detector 30 detects the average luminance level of the image data.
- the scan number converter 19 converts the image data into image data corresponding to the number of pixels of the panel 1 and outputs the image data to the subfield converter 20.
- the subfield conversion unit 20 divides the image data of each pixel into a plurality of bits corresponding to a plurality of subfields, and outputs the image data of each subfield to the data electrode driving circuit 12.
- the data electrode drive circuit 12 converts the image data for each subfield into signals corresponding to the data electrodes D1 to Dm and drives the data electrodes D1 to Dm.
- the timing generation circuit 15 generates a timing signal based on the horizontal synchronization signal H and the vertical synchronization signal V, and outputs the timing signal to the scan electrode drive circuit 13 and the sustain electrode drive circuit 14.
- Scan electrode drive circuit 13 supplies a drive waveform to scan electrodes SCNl to SCNn based on the timing signal
- sustain electrode drive circuit 14 supplies a drive waveform to sustain electrodes SUSl to SUsn based on the timing signal
- the evening imaging generation circuit 15 controls the drive waveform based on the APL output from the APL detection unit 30. Specifically, as described later, the initialization operation of each subfield constituting one field is determined as either all-cell initialization or selective initialization based on the APL, and all fields in one field are initialized. Controls the number of cell initialization operations.
- FIG. 4 is a driving waveform diagram applied to each electrode of the panel according to Embodiment 1 of the present invention, A subfield having an initializing period for performing an all-cell initializing operation (hereinafter, abbreviated as an all-cell initializing subfield) and a subfield having an initializing period for performing a selective initializing operation (hereinafter, referred to as a selective initializing subfield) It is a drive waveform diagram with respect to (abbreviated).
- FIG. 4 shows the first subfield as an all-cell initializing subfield and the second subfield as a selective initializing subfield for simplicity of explanation.
- the driving waveform of the all-cell initializing subfield and its operation will be described.
- the data electrodes Dl to Dm and the sustain electrodes SUSl to SUSn are kept at 0 (V), and the scan electrodes SCNl to SCNn are discharged from the voltage Vp (V) which is lower than the discharge start voltage. Apply a ramp voltage that gradually rises toward the voltage Vr (V) that exceeds the starting voltage.
- the first weak initializing discharge occurs in all the discharge cells, a negative wall voltage is stored on scan electrodes S CN1 to S CNn, and the sustain wall S US1 to SU n A positive wall voltage is stored on the electrodes Dl to Dm.
- the wall voltage on the electrode means a voltage generated by wall charges accumulated on the dielectric layer or the phosphor layer covering the electrode.
- the sustain electrodes SUS1 to SUSn are maintained at the positive voltage Vh (V), and the scan electrodes SCN1 to SCNn are supplied with the ramp voltage that gradually decreases from the voltage Vg (V) to the voltage Va (V).
- the second weak initializing discharge occurs in all the discharge cells, and the wall pressure on scan electrodes SCN1 to SCNn and the wall voltage on sustain electrodes SUS1 to SUSn are weakened.
- the wall voltage on the evening electrodes Dl to Dm is also adjusted to a value suitable for the write operation.
- the initialization operation in the all-cell initialization subfield is an all-cell initialization operation in which all discharge cells are initialized and discharged.
- the scan electrodes 5 ⁇ 1 ⁇ 1 to 3 ⁇ 1 ⁇ 11 are maintained at 5 (V).
- a positive address pulse voltage Vw (V) is applied to the data electrode Dk of the discharge cell to be displayed in the first row, and the scan electrode S CN in the first row is applied. Apply the scanning pulse voltage Vb (V) to 1.
- Vw-Vb externally applied voltage
- an address discharge occurs between the data electrode Dk and the scan electrode SCN1 and between the sustain electrode SUS1 and the scan electrode SCN1. Occurs, a positive wall voltage is accumulated on the scan electrode SCN 1 of this discharge cell, a negative wall voltage is accumulated on the sustain electrode SUS 1, and a negative wall voltage is also accumulated on the data electrode Dk. . In this way, an address operation is performed to cause an address discharge in the discharge cells to be displayed on the first row and accumulate the wall voltage on each electrode. On the other hand, since the voltage at the intersection of the scan electrode SCN1 and the non-applied positive address pulse voltage Vw (V) does not exceed the discharge start voltage, no address discharge occurs. The above address operation is sequentially performed up to the discharge cells in the nth row, and the address period is completed.
- the sustain electrodes SUS1 to SUSn are returned to 0 (V), and a positive sustain pulse voltage Vm (V) is applied to the scan electrodes SCN1 to SCNn.
- Vm the sustain pulse voltage
- the scan electrode SCNi and the sustain electrode SUSi changes to the sustain pulse voltage Vm (V)
- the scan electrode SCNi and the sustain electrode SUS The magnitude of the wall voltage on i is added and exceeds the discharge start voltage.
- a sustain discharge occurs between scan electrode SCNi and sustain electrode SUSi, and a negative wall voltage is accumulated on scan electrode SCNi and a positive wall voltage is accumulated on sustain electrode SUSi.
- a sustain discharge occurs, a negative wall voltage is accumulated on sustain electrode SUSi, and a positive wall voltage is accumulated on scan electrode SCNi.
- sustain pulses are applied alternately to scan electrodes SCNl to SCNn and sustain electrodes SUSl to SUSn, so that sustain discharge is continuously performed in the discharge cells that have generated the address discharge in the address period.
- a so-called narrow pulse is applied between the scanning electrodes SCN1 to SCNn and the sustaining electrodes SUS1 to SUSn, leaving a positive wall charge on the data electrode Dk.
- the wall voltages on the scan electrodes SCNl to SCNn and the sustain electrodes SUS1 to SUSn are eliminated.
- the sustain electrodes SUS1 to SUSn are maintained at Vh (V)
- the data electrodes Dl to Dm are maintained at 0 (V)
- the scan electrodes SCN1 to SCNn are applied from VQ (V) to Va. Apply a ramp voltage that gradually decreases toward (V).
- a weak initializing discharge was generated, the wall voltage on scan electrode SCN i and sustain electrode SUS i was weakened, and data electrode Dk was weakened.
- the wall voltage is also adjusted to a value suitable for a write operation.
- the initializing operation of the selective initializing subfield is a selective initializing operation in which the initializing discharge is performed in the discharge cells that have undergone the sustain discharge in the previous subfield.
- the address period and the sustain period are the same as the address period and the sustain period of the all-cell initializing subfield, and therefore description thereof is omitted.
- one field is composed of 11 subfields, and the luminance weight of each subfield is (1, 2, 3, 7, 11, 14, 23, 37, 39, 57, 61, respectively).
- the number of subfields ⁇ the luminance weight of each subfield is not limited to the above value.
- FIG. 5 is a diagram showing a subfield configuration of the panel driving method according to the first embodiment of the present invention, in which the subfield configuration is switched based on the APL of an image signal to be displayed.
- Fig. 5 A is eight? This is a configuration used when the image signal is between 0% and 1.5% .All cells are initialized only during the first SF initialization period, and selective initialization is performed during the second SF through 11th SF initialization periods. This is a subfield configuration for performing an operation.
- FIG. 5B shows a configuration used when an image signal of 1.5 to 5% is used, wherein the first SF and the 10 SF are initialized in an all-cell initialization period, and the second SF to the ninth SF are used.
- the initialization period of the 11th SF is a subfield configuration that is a selective initialization period.
- FIG. 5C shows a configuration used when the image signal has an APL of 5% to 10%.
- the setup period of the first OSF has a subfield configuration that is the all-cell setup period, the setup period of the second SF, the third SF, the fifth SF to the ninth SF, and the setup period of the first SF is a selective setup period. I have.
- FIG.5D shows a configuration used when the APL is at an image signal of 10% to 15% .
- the first SF, the fourth SF, the eighth SF, and the tenth SF are all cell initialization periods, the second SF,
- the initialization period of the third SF, the fifth SF to the seventh SF, the ninth SF, and the eleventh SF has a subfield configuration that is a selective initialization period.
- FIG.5E shows a configuration in which the APL is used when the image signal is 15% to 100%, and the first SF, the fourth SF, the sixth SF, the eighth SF, and the tenth SF are all cell initializing periods,
- the initialization period of the second SF, the third SF, the fifth SF, the seventh SF, the ninth SF, and the eleventh SF has a subfield configuration that is a selective initialization period.
- Table 1 shows the relationship between the above-mentioned subfield configuration and APL.
- the subfield configuration is controlled so that the number of the all-cell initializing operation decreases when the APL decreases.
- the number of all-cell initialization operations per field is determined depending on the APL, various forms are conceivable in determining the position of the subfield in which the all-cell initialization operation is performed.
- Table 1 the reason why the all-cell initialization period is set to the 10th SF instead of the 1st SF is to avoid allocating it continuously to the 1st SF in the next field.
- Embodiment 1 has an initialization period for performing an all-cell initialization operation.
- the subfields are preferentially placed in the early or late one-field period compared to the central part of the one-field period. That is, as shown in Table 1, when the number of all-cell initialization operations is sequentially reduced from five to one, the reduction is started from the sixth SF in the center, and the eighth SF, the fourth SF, It is reduced in the order of the 10th SF.
- the position to reduce the all-cell initialization period should be reduced in order from the all-cell initialization period, which has the least effect on the image display quality. This is because the luminance weighting for each subfield and the coding method (the lighting subfield for each gradation) Assignment method).
- the weighting is in ascending order, and in the case of leading-justification coding, it is experimentally that reducing the initialization of all cells in the subfield located at the center of one field has little effect on image quality. could be confirmed.
- the initialization of all cells in the first SF has a significant effect on image display quality. The reason for this is that when displaying a dark image, it is necessary to write reliably from the first subfield, and priming is important. This is because Initialization of all cells in the rear subfield is also important for image display quality.However, when surrounding discharge cells are lit in a subfield with a large luminance weight, they are not lit due to excessive priming. This is because it is conceivable that the wall charges of the discharge cells are neutralized and the address operation in the subsequent subfield becomes unstable.
- the black image display area is considered to be wide, so the number of times of initializing all cells is reduced, and the black display quality is improved. Therefore, even if there is an area with high brightness, if the APL is low, the brightness of the black display area is low and an image with high contrast can be displayed.
- Table 2 shows an example in which the number of all-cell initializations is controlled within the range of 1 to 4 times, and the subfield for performing all-cell initialization is also changed.
- Table 3 shows an example in which the number of all-cell initializations is controlled within the range of 1 to 3 times, and the initialization of the subfield near the top is prioritized.
- FIG. 6 is a circuit block diagram of a plasma display device using the panel driving method according to Embodiment 2 of the present invention.
- the same components as those in the first embodiment are denoted by the same reference numerals, and description thereof is omitted.
- the subfield conversion unit 20 divides the image data of each pixel into a plurality of bits corresponding to a plurality of subfields, and divides the image data of each subfield into a data electrode driving circuit 12 and a lighting rate detection unit 31.
- Output to The lighting rate detector 31 detects the lighting rate of a predetermined subfield, and in the second embodiment, the lighting rate of the 10th subfield. To detect.
- the timing generation circuit 15 generates a timing signal based on the horizontal synchronization signal H and the vertical synchronization signal V, and outputs the timing signal to the scan electrode driving circuit 13 and the sustain electrode driving circuit 14, respectively.
- the timing generation circuit 15 controls the drive waveform based on the APL output from the APL detection unit 30 and the lighting rate output from the lighting rate detection unit 31.
- the initialization operation of each subfield constituting one field is determined to be either all-cell initialization or selective initialization based on the lighting rate of the APL and the 10th SF. , Controls the number and position of all cell initialization operations in one field.
- FIG. 7 is a diagram showing a subfield configuration of the panel driving method according to the second embodiment of the present invention.
- the subfield configuration is based on the APL of the image signal to be displayed and the lighting rate of the tenth SF. Switching.
- FIG. 7A shows a configuration used when the image signal has an APL of 0 to 1.5% .All cells are initialized only during the first SF initialization period regardless of the lighting rate of the tenth SF.
- the initialization period from 2 SF to 11 SF is a subfield configuration for performing a selective initialization operation. Fig.
- FIG. 7B shows a configuration used when the APL is 1.5 to 5% and the lighting rate of the 10th SF is 0 to 1%, and the initializing period of the 1st SF and 4th SF is all cell initialization.
- the initialization period of the period, the second SF, the third SF, and the fifth SF to the eleventh SF has a subfield configuration that is a selective initialization period.
- Figure 7C shows Eight? This configuration is used when the image signal is 1.5 to 5% and the lighting rate of the 10th SF is 1% or more.
- the initializing period of the 1st SF and 10th SF is the all-cell initializing period,
- the initialization period from SF to 9th SF and 11th SF has a subfield configuration that is a selective initialization period.
- Fig. 7D shows a configuration used when the image signal has an APL of 15 to 100%, and the first SF, fourth SF, sixth SF, eighth SF, and tenth SF are initialized regardless of the lighting rate of the tenth SF.
- the period is an all-cell initializing period, and the initializing period of the 2nd SF, 3rd SF, 5th SF, 7th SF, 9th SF, and 1st SF is a subfield configuration that is a selective initialization period. I have. Eight? Although the configuration used for the image signal of 5 to 15% is not shown, the subfield configuration is different from that described above.
- Table 4 shows the relationship between the above-mentioned subfield configuration, AP, and lighting rate. [Table 4]
- the subfield configuration is controlled so that the number of all-cell initializing operations decreases when the APL decreases. Even if the number of all-cell initializations is the same, pay attention to the lighting rate of the 10th SF, and if the lighting rate is low, give priority to the all-cell initialization subfield in the initial period of one field period. If the lighting rate is high, priority is given to the latter half of one field period. However, even if the lighting rate is high, the first SF is the all-cell initialization subfield.
- the number of all-cell initialization operations per field is determined depending on the APL, and the position of the subfield where the all-cell initialization operation is performed is determined depending on the lighting rate.
- Table 4 the reason why the all-cell initializing period is arranged at the 10th SF instead of the 1st SF is to avoid arranging it continuously with the 1st SF of the next field.
- a subfield having an initializing period for performing an all-cell initializing operation is preferentially arranged in the initial or later period of one field period as compared with the central period of one field period. are doing. If the lighting rate of the 10th SF is low, the all-cell initialization subfield Priority is given to the early period of one field period, and if the lighting rate is high, priority is given to the latter period of one field period.
- the black image display area is considered to be wide, so the number of times of initializing all cells is reduced, and the black display quality is improved.
- all cells are used to ensure priming for surely writing from the first subfield.
- the initialization subfield is preferentially placed in the initial period of one field period.
- the second embodiment has been described with respect to an example in which one field is composed of 1 1 SF and the number of times of initialization of all cells is controlled to 1 to 5 times, the present invention is not limited to this. .
- the 10th SF is used in Embodiment 2 as the predetermined subfield, If the subfield has a large luminance weight, another subfield, for example, the ninth SF or the 11th SF may be used. Further, a plurality of subfields having large luminance weights may be used.
- Table 5 shows that the number of all-cell initializations is controlled in the range of 1 to 4 times, and only in the case of 2 all-cell initializations, the total number depends on the sum of the lighting rates of the 9th SF to 11th SF.
- An example of switching the position of the cell initialization subfield has been described.
- the APL when the APL is low, the number of subfields having an initialization period for performing the all-cell initialization operation is reduced, and when the APL is high, the number of subfields having an initialization period for performing the all-cell initialization operation is reduced.
- By increasing the number when displaying images with low lighting rates in subfields with high luminance weight, all cell initialization subfields are preferentially placed in the initial period of one field period, and the lighting rate is high.
- the method of driving a panel according to the present invention enables stable high-speed writing and enables driving of the panel while suppressing an increase in black luminance, and is useful as an image display device using the panel.
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of Gas Discharge Display Tubes (AREA)
Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/546,640 US7583240B2 (en) | 2004-01-28 | 2005-01-26 | Method of driving plasma display panel |
EP05704334A EP1596356A4 (en) | 2004-01-28 | 2005-01-26 | PLASMAANZEIGETAFELANSTEUERVERFAHREN |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004-019617 | 2004-01-28 | ||
JP2004019617A JP3988728B2 (ja) | 2004-01-28 | 2004-01-28 | プラズマディスプレイパネルの駆動方法 |
JP2004-030348 | 2004-02-06 | ||
JP2004030348A JP4120594B2 (ja) | 2004-02-06 | 2004-02-06 | プラズマディスプレイパネルの駆動方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2005073946A1 true WO2005073946A1 (ja) | 2005-08-11 |
Family
ID=34829404
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2005/001436 WO2005073946A1 (ja) | 2004-01-28 | 2005-01-26 | プラズマディスプレイパネルの駆動方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US7583240B2 (ja) |
EP (1) | EP1596356A4 (ja) |
KR (1) | KR100714187B1 (ja) |
WO (1) | WO2005073946A1 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2006112346A1 (ja) * | 2005-04-13 | 2006-10-26 | Matsushita Electric Industrial Co., Ltd. | プラズマディスプレイパネルの駆動方法およびプラズマディスプレイ装置 |
WO2006112345A1 (ja) * | 2005-04-13 | 2006-10-26 | Matsushita Electric Industrial Co., Ltd. | プラズマディスプレイパネルの駆動方法およびプラズマディスプレイ装置 |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4738122B2 (ja) * | 2005-09-30 | 2011-08-03 | 日立プラズマディスプレイ株式会社 | プラズマディスプレイ装置の駆動方法 |
JP5168896B2 (ja) * | 2006-02-14 | 2013-03-27 | パナソニック株式会社 | プラズマディスプレイパネルの駆動方法およびプラズマディスプレイ装置 |
KR20070100392A (ko) * | 2006-02-24 | 2007-10-10 | 마쯔시다덴기산교 가부시키가이샤 | 플라즈마 디스플레이 패널의 구동 방법 및 플라즈마디스플레이 장치 |
EP1988531A4 (en) * | 2006-02-24 | 2011-09-21 | Panasonic Corp | METHOD FOR SUPPLYING A PLASMA DISPLAY AND PLASMA DISPLAY |
JP4828994B2 (ja) * | 2006-04-13 | 2011-11-30 | パナソニック株式会社 | プラズマディスプレイパネルの駆動方法 |
US8242977B2 (en) * | 2006-06-30 | 2012-08-14 | Hitachi, Ltd. | Plasma display apparatus with driving and controlling circuit unit |
KR100884798B1 (ko) * | 2007-04-12 | 2009-02-20 | 삼성에스디아이 주식회사 | 플라즈마 디스플레이 패널 및 그의 구동 방법 |
KR100831018B1 (ko) * | 2007-05-03 | 2008-05-20 | 삼성에스디아이 주식회사 | 플라즈마 표시 장치 및 그 구동 방법 |
KR100879289B1 (ko) * | 2007-08-08 | 2009-01-16 | 삼성에스디아이 주식회사 | 플라즈마 표시 장치 및 그 구동 방법 |
JP5081583B2 (ja) * | 2007-10-31 | 2012-11-28 | 株式会社リコー | 画像表示装置及びその制御方法 |
JP5169960B2 (ja) * | 2009-04-08 | 2013-03-27 | パナソニック株式会社 | プラズマディスプレイパネルの駆動方法およびプラズマディスプレイ装置 |
JP5003714B2 (ja) * | 2009-04-13 | 2012-08-15 | パナソニック株式会社 | プラズマディスプレイパネルの駆動方法およびプラズマディスプレイ装置 |
JP5003713B2 (ja) * | 2009-04-13 | 2012-08-15 | パナソニック株式会社 | プラズマディスプレイパネルの駆動方法およびプラズマディスプレイ装置 |
JP5170319B2 (ja) * | 2009-10-13 | 2013-03-27 | パナソニック株式会社 | プラズマディスプレイ装置の駆動方法、プラズマディスプレイ装置およびプラズマディスプレイシステム |
US20130002733A1 (en) * | 2010-03-05 | 2013-01-03 | Takahiko Origuchi | Plasma display device driving method, plasma display device, and plasma display system |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS643281A (en) * | 1987-06-25 | 1989-01-09 | Jidosha Kiki Co | Vane pump |
JPH08129357A (ja) * | 1994-10-31 | 1996-05-21 | Fujitsu Ltd | プラズマディスプレイ装置 |
JPH08221036A (ja) * | 1995-02-13 | 1996-08-30 | Nec Corp | プラズマディスプレイパネルの駆動方法および駆動装 置 |
JPH10319900A (ja) * | 1997-05-23 | 1998-12-04 | Fujitsu Ltd | プラズマディスプレイ装置の駆動方法 |
JP2001255847A (ja) * | 2000-03-10 | 2001-09-21 | Nec Corp | プラズマディスプレイパネルの駆動方法 |
JP2003076320A (ja) * | 2001-06-12 | 2003-03-14 | Matsushita Electric Ind Co Ltd | プラズマディスプレイパネル表示装置およびその駆動方法 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0724409B2 (ja) * | 1986-11-25 | 1995-03-15 | 日本電気ホームエレクトロニクス株式会社 | 4相psk復調装置のキ−ド自動レベル制御回路 |
JP3704813B2 (ja) | 1996-06-18 | 2005-10-12 | 三菱電機株式会社 | プラズマディスプレイパネルの駆動方法及びプラズマディスプレイ |
JP3703247B2 (ja) * | 1997-03-31 | 2005-10-05 | 三菱電機株式会社 | プラズマディスプレイ装置及びプラズマディスプレイ駆動方法 |
US6597331B1 (en) * | 1998-11-30 | 2003-07-22 | Orion Electric Co. Ltd. | Method of driving a plasma display panel |
TWI244103B (en) * | 2000-10-16 | 2005-11-21 | Matsushita Electric Ind Co Ltd | Plasma display panel apparatus and method of driving the plasma display panel apparatus |
WO2002058041A1 (en) * | 2001-01-18 | 2002-07-25 | Lg Electronics Inc. | Plasma display panel and driving method thereof |
KR100385216B1 (ko) * | 2001-05-16 | 2003-05-27 | 삼성에스디아이 주식회사 | 리셋 안정화를 위한 플라즈마 디스플레이 패널의 구동방법및 그 장치 |
KR100493912B1 (ko) * | 2001-11-24 | 2005-06-10 | 엘지전자 주식회사 | 플라즈마 디스플레이 패널의 구동장치 및 방법 |
JP3695746B2 (ja) * | 2001-12-27 | 2005-09-14 | パイオニア株式会社 | プラズマディスプレイパネルの駆動方法 |
EP1335341B1 (en) * | 2002-01-16 | 2008-10-01 | Deutsche Thomson-Brandt Gmbh | Method and apparatus for processing video pictures |
EP1329869A1 (en) * | 2002-01-16 | 2003-07-23 | Deutsche Thomson-Brandt Gmbh | Method and apparatus for processing video pictures |
KR100454027B1 (ko) * | 2002-06-14 | 2004-10-20 | 삼성에스디아이 주식회사 | 플라즈마 표시 패널의 잔상 방지 방법과 장치, 그 장치를갖는 플라즈마 표시 패널 장치 |
KR100480172B1 (ko) * | 2002-07-16 | 2005-04-06 | 엘지전자 주식회사 | 플라즈마 디스플레이 패널의 구동방법 및 장치 |
KR100490542B1 (ko) * | 2002-11-26 | 2005-05-17 | 삼성에스디아이 주식회사 | 어드레스기간과 유지기간의 혼합 방식으로 동작하는패널구동방법 및 그 장치 |
US7068245B2 (en) * | 2003-06-24 | 2006-06-27 | Matsushita Electric Industrial Co., Ltd. | Plasma display apparatus |
-
2005
- 2005-01-26 KR KR1020057018174A patent/KR100714187B1/ko not_active Expired - Fee Related
- 2005-01-26 US US10/546,640 patent/US7583240B2/en not_active Expired - Fee Related
- 2005-01-26 WO PCT/JP2005/001436 patent/WO2005073946A1/ja active IP Right Grant
- 2005-01-26 EP EP05704334A patent/EP1596356A4/en not_active Withdrawn
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS643281A (en) * | 1987-06-25 | 1989-01-09 | Jidosha Kiki Co | Vane pump |
JPH08129357A (ja) * | 1994-10-31 | 1996-05-21 | Fujitsu Ltd | プラズマディスプレイ装置 |
JPH08221036A (ja) * | 1995-02-13 | 1996-08-30 | Nec Corp | プラズマディスプレイパネルの駆動方法および駆動装 置 |
JPH10319900A (ja) * | 1997-05-23 | 1998-12-04 | Fujitsu Ltd | プラズマディスプレイ装置の駆動方法 |
JP2001255847A (ja) * | 2000-03-10 | 2001-09-21 | Nec Corp | プラズマディスプレイパネルの駆動方法 |
JP2003076320A (ja) * | 2001-06-12 | 2003-03-14 | Matsushita Electric Ind Co Ltd | プラズマディスプレイパネル表示装置およびその駆動方法 |
Non-Patent Citations (1)
Title |
---|
See also references of EP1596356A4 * |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2006112346A1 (ja) * | 2005-04-13 | 2006-10-26 | Matsushita Electric Industrial Co., Ltd. | プラズマディスプレイパネルの駆動方法およびプラズマディスプレイ装置 |
WO2006112345A1 (ja) * | 2005-04-13 | 2006-10-26 | Matsushita Electric Industrial Co., Ltd. | プラズマディスプレイパネルの駆動方法およびプラズマディスプレイ装置 |
KR100833405B1 (ko) * | 2005-04-13 | 2008-05-28 | 마츠시타 덴끼 산교 가부시키가이샤 | 플라즈마 디스플레이 패널의 구동 방법 및 플라즈마디스플레이 장치 |
Also Published As
Publication number | Publication date |
---|---|
US20060152446A1 (en) | 2006-07-13 |
EP1596356A1 (en) | 2005-11-16 |
KR100714187B1 (ko) | 2007-05-02 |
US7583240B2 (en) | 2009-09-01 |
EP1596356A4 (en) | 2009-11-11 |
KR20060024354A (ko) | 2006-03-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN100463035C (zh) | 等离子显示面板的驱动方法和等离子显示装置 | |
JP2004206094A (ja) | プラズマディスプレイパネルの駆動方法 | |
WO2005073946A1 (ja) | プラズマディスプレイパネルの駆動方法 | |
KR100805502B1 (ko) | 플라즈마 디스플레이 패널의 구동 방법 및 플라즈마디스플레이 장치 | |
JP2000172226A (ja) | プラズマディスプレイパネル装置 | |
KR100859238B1 (ko) | 플라즈마 디스플레이 패널의 구동 방법 | |
JP4443998B2 (ja) | プラズマディスプレイパネルの駆動方法 | |
KR100793483B1 (ko) | 플라즈마 디스플레이 패널의 구동 방법 | |
CN100426352C (zh) | 等离子体显示板的驱动方法 | |
KR100784003B1 (ko) | 플라즈마 디스플레이 패널의 구동 방법 | |
JP2004206093A (ja) | プラズマディスプレイパネルの駆動方法 | |
JP4736530B2 (ja) | プラズマディスプレイパネルの駆動方法 | |
JP4120594B2 (ja) | プラズマディスプレイパネルの駆動方法 | |
JP5017796B2 (ja) | プラズマディスプレイパネルの駆動方法およびプラズマディスプレイ装置 | |
JP4706214B2 (ja) | プラズマディスプレイパネルの駆動方法 | |
JP2006317856A (ja) | プラズマディスプレイパネルの駆動方法 | |
JP2005321499A (ja) | プラズマディスプレイパネルの駆動方法 | |
JP2005321500A (ja) | プラズマディスプレイパネルの駆動方法 | |
JP2006195328A (ja) | プラズマディスプレイパネルの駆動方法 | |
JP2005338121A (ja) | プラズマディスプレイパネルの駆動方法 | |
KR20060091203A (ko) | 플라즈마 디스플레이 패널의 구동 장치 및 방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW |
|
AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LT LU MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG |
|
ENP | Entry into the national phase |
Ref document number: 2006152446 Country of ref document: US Kind code of ref document: A1 |
|
WWE | Wipo information: entry into national phase |
Ref document number: 10546640 Country of ref document: US |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2005704334 Country of ref document: EP |
|
WWE | Wipo information: entry into national phase |
Ref document number: 1020057018174 Country of ref document: KR |
|
WWE | Wipo information: entry into national phase |
Ref document number: 20058001018 Country of ref document: CN |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
WWP | Wipo information: published in national office |
Ref document number: 2005704334 Country of ref document: EP |
|
WWP | Wipo information: published in national office |
Ref document number: 1020057018174 Country of ref document: KR |
|
WWP | Wipo information: published in national office |
Ref document number: 10546640 Country of ref document: US |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
WWW | Wipo information: withdrawn in national office |
Country of ref document: DE |
|
WWG | Wipo information: grant in national office |
Ref document number: 1020057018174 Country of ref document: KR |