WO2004027688A2 - Alimentation d'un circuit de traitement asynchrone de donnees - Google Patents
Alimentation d'un circuit de traitement asynchrone de donnees Download PDFInfo
- Publication number
- WO2004027688A2 WO2004027688A2 PCT/FR2003/050055 FR0350055W WO2004027688A2 WO 2004027688 A2 WO2004027688 A2 WO 2004027688A2 FR 0350055 W FR0350055 W FR 0350055W WO 2004027688 A2 WO2004027688 A2 WO 2004027688A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- asynchronous
- circuit
- data
- energy
- supply
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/75—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation
- G06F21/755—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation with measures against power attack
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/81—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer by operating on the power supply, e.g. enabling or disabling power-on, sleep or resume operations
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
Definitions
- the present invention relates to integrated circuits or integrated circuit elements performing asynchronous processing of digital data.
- the invention relates more particularly to circuits handling data which it is desired to protect, for example, confidential data or authentication keys.
- a common type of data attack on an integrated circuit executing secure algorithms is to analyze the consumption of the integrated circuit or the part of it executing the algorithm handling secret data.
- Such attacks by consumption analysis are known by the abbreviations SPA (Single Power Analysis) or DPA (Differential Power Analysis) and consist in analyzing the consumption of an integrated circuit as a function of the data which it processes in order to discover supposed data. be secret.
- the circuit In an asynchronously operating circuit, the circuit provides the output data along with information that this data is available, once it has completed processing.
- An attack by analyzing the consumption of an asynchronous circuit consists in observing the energy peaks which in fact correspond to data (at the times when this data is processed). It is then possible, for a hacker, to discover the algorithm or the secret data manipulated.
- a known solution consists in adding additional processing circuits, useless for the secure process proper, but which consume energy when they handle the data.
- the data handled by the asynchronous process to be protected are then in a way masked by the energy taken up by the additional processing circuits.
- the effectiveness of such a solution is in a way proportional to the number of additional processing circuits provided, therefore to the additional space requirement in the integrated circuit, it only increases the number of possible data combinations. that the hacker should assess.
- the present invention aims to propose another solution for protecting the execution of an asynchronous algorithmic process against attacks by analysis of the consumption of the integrated circuit or of the part of the circuit executing this process.
- the present invention aims in particular to propose a solution whose effectiveness is not linked to the additional bulk in the integrated circuit.
- the invention also aims to propose a solution which does not simply result in an increase in the possible combinations to be examined by the pirate.
- the present invention provides a method of supplying an asynchronous calculation element of an integrated circuit, consisting in making randomly vary the instantaneous supply energy of the calculation element.
- the instantaneous energy supplied to the calculation element is distributed randomly, in a predetermined pole window, the total energy in the window being predetermined.
- the total energy supplied to the calculation element in the time window is determined as a function of the maximum possible consumption of the calculation element.
- the present invention also provides a power supply circuit for at least one asynchronous processing element of an integrated circuit, comprising a variable power element controlled randomly or pseudo-randomly. According to an embodiment of the present invention, said variable supply element varies the supply voltage of the asynchronous processing element.
- variable supply element is controlled by a pseudo-random generator.
- FIG. 1 shows, very schematically and in the form of blocks, an embodiment of a supply circuit for an asynchronous computing element according to the present invention
- FIG. 2 illustrates, by a timing diagram, an embodiment of the feeding method according to the invention.
- a feature of the present invention is to randomly vary the energy supplied to the asynchronous processing element of the data to be protected.
- the present invention takes advantage of the fact that, in an asynchronous processing element, an energy defect with respect to the energy necessary for handling a data item does not result in an operating error but simply in a delay in data processing. In fact, an asynchronous processing element somehow waits for the energy necessary for processing to continue its calculation.
- the energy source is sufficient to supply the processing element with all the energy it requires at all times.
- the energy supplied to the processing element is imposed.
- the only counterpart of the implementation of the invention is an extension of the execution time.
- This execution time can however be maintained in a predetermined window thanks to a pseudo-random generation.
- FIG. 1 represents, in a very schematic way and in the form of blocks, an embodiment of a supply circuit for an element 1 of asynchronous execution of a data processing algorithm (ASYNC-ALGO).
- ASYNC-ALGO asynchronous execution of a data processing algorithm
- the asynchronous computational element can be diagrammed as a circuit receiving input data E, supplying output data S and exchanging control signals (CTRL) with the rest of the integrated circuit (for example, with a microprocessor not shown).
- CTRL control signals
- the control signals is in particular the signal by which the element 1 indicates to the rest of the integrated circuit that the output data S are available.
- circuit 1 is supplied by means of circuit 2 (VAR).
- Circuit 2 supplies variable energy to circuit 1 and is supplied by a voltage Valim, for example, the supply voltage of the integrated circuit.
- Valim for example, the supply voltage of the integrated circuit.
- the energy variation can be carried out in voltage or in current, respecting if necessary the minimum supply constraints (for example, in voltage level) so as not to lose the data during processing by the asynchronous circuit 1.
- the circuit 2 for varying the supply is controlled by a pseudo-random generator 3 (PRG) in order to distribute the energy randomly while respecting a predetermined time window T corresponding to the desired duration for the execution of the calculation.
- PRG pseudo-random generator 3
- the generator 3 receives the setpoint T, for example, from the central unit of the integrated circuit fixing the time window. In the case where the same integrated circuit contains several distinct asynchronous processing elements, these can be supplied separately from each other or in common by means of the same variable generator 2.
- Figure 2 illustrates the operation of the circuit of Figure 1 by a flow diagram representing the energy (PW) supplied to circuit 1 in a time window T for executing the calculation.
- An advantage of the present invention is that it makes it possible to mask the data handled by an asynchronous element in a particularly efficient manner and, in particular, without this resulting in an increase in the combinations to be examined by the possible hacker. In fact, no additional processing (calculation) of the data is provided for by the invention. Consequently, the efficiency of the system is not linked to the increase in the size of the processing circuits.
- Another advantage of the invention is that it does not require any modification of the asynchronous processing element proper. We just intervene on its diet. This advantage leads in particular to the fact that the invention can be implemented in any existing asynchronous processing process without causing modifications to the calculation part of the existing integrated circuit.
- Another advantage of the present invention is that it does not generate additional energy consumption for the execution of the calculation itself, unlike solutions requiring additional processing circuits.
- the present invention is susceptible to various variants and modifications which will appear to those skilled in the art.
- determining the possible minimum energy level that must be supplied to an asynchronous processing element to preserve the data which it is processing depends on the application and the person skilled in the art will be able to set the appropriate thresholds. For example, it is possible to fix a minimum supply voltage threshold and to randomly vary the supply voltage of the processing circuit within a predetermined range.
- the production of a generator of a random or pseudo-random setpoint uses conventional means which are within the reach of those skilled in the art.
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Mathematical Physics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
- Logic Circuits (AREA)
Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP03780268A EP1558982A2 (fr) | 2002-09-19 | 2003-09-19 | Alimentation d'un circuit de traitement asynchrone de donnees |
JP2004537246A JP2005539447A (ja) | 2002-09-19 | 2003-09-19 | 非同期データ処理回路のための電力供給 |
US10/528,523 US20060156039A1 (en) | 2002-09-19 | 2003-09-19 | Power supply for an asynchronous data treatment circuit |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR02/11657 | 2002-09-19 | ||
FR0211657A FR2844896A1 (fr) | 2002-09-19 | 2002-09-19 | Alimentation d'un circuit de traitement asynchrone de donnees |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2004027688A2 true WO2004027688A2 (fr) | 2004-04-01 |
WO2004027688A3 WO2004027688A3 (fr) | 2004-05-13 |
Family
ID=31970845
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/FR2003/050055 WO2004027688A2 (fr) | 2002-09-19 | 2003-09-19 | Alimentation d'un circuit de traitement asynchrone de donnees |
Country Status (5)
Country | Link |
---|---|
US (1) | US20060156039A1 (fr) |
EP (1) | EP1558982A2 (fr) |
JP (1) | JP2005539447A (fr) |
FR (1) | FR2844896A1 (fr) |
WO (1) | WO2004027688A2 (fr) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2011117781A1 (fr) * | 2010-03-24 | 2011-09-29 | Stmicroelectronics (Rousset) Sas | Procédé et dispositif de contremesure pour protéger des données circulant dans un microcircuit électronique |
FR2958098A1 (fr) * | 2010-03-24 | 2011-09-30 | St Microelectronics Rousset | Procede et dispositif de contremesure pour proteger des donnees circulant dans un microcircuit electronique |
FR3042066A1 (fr) * | 2015-10-01 | 2017-04-07 | Stmicroelectronics Rousset | Procede de lissage d'un courant consomme par un circuit integre et dispositif correspondant |
US11698651B2 (en) | 2020-08-25 | 2023-07-11 | Stmicroelectronics (Rousset) Sas | Device and method for electronic circuit power |
US11768512B2 (en) | 2019-12-12 | 2023-09-26 | Stmicroelectronics (Rousset) Sas | Method of smoothing a current consumed by an integrated circuit, and corresponding device |
US11829178B2 (en) | 2020-08-25 | 2023-11-28 | Stmicroelectronics (Rousset) Sas | Device and method for protecting confidential data in an electronic circuit powered by a power supply |
US12282589B2 (en) | 2022-02-23 | 2025-04-22 | Stmicroelectronics (Rousset) Sas | Electronic device including an electronic module and a compensation circuit |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8595274B2 (en) * | 2007-12-31 | 2013-11-26 | Intel Corporation | Random number generator |
JP5776927B2 (ja) * | 2011-03-28 | 2015-09-09 | ソニー株式会社 | 情報処理装置及び方法、並びにプログラム |
CN105844179A (zh) * | 2016-03-18 | 2016-08-10 | 广东欧珀移动通信有限公司 | 一种终端保护方法及装置 |
CN105912956B (zh) * | 2016-04-05 | 2018-09-04 | 山东超越数控电子有限公司 | 一种控制电路及关机控制方法 |
FR3065556B1 (fr) * | 2017-04-19 | 2020-11-06 | Tiempo | Circuit electronique securise par perturbation de son alimentation. |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2638869B1 (fr) * | 1988-11-10 | 1990-12-21 | Sgs Thomson Microelectronics | Dispositif de securite contre la detection non autorisee de donnees protegees |
FR2745924B1 (fr) * | 1996-03-07 | 1998-12-11 | Bull Cp8 | Circuit integre perfectionne et procede d'utilisation d'un tel circuit integre |
FR2776410B1 (fr) * | 1998-03-20 | 2002-11-15 | Gemplus Card Int | Dispositifs pour masquer les operations effectuees dans une carte a microprocesseur |
EP1084543B1 (fr) * | 1998-06-03 | 2008-01-23 | Cryptography Research Inc. | Utilisation d'informations non prévisible pour réduire au maximum les fuites provenant des cartes à puces et autres systèmes cryptographiques |
ATE418763T1 (de) * | 1998-09-30 | 2009-01-15 | Nxp Bv | Datenträger |
DE19911673A1 (de) * | 1999-03-09 | 2000-09-14 | Deutsche Telekom Ag | Verfahren und Anordnung für den Schutz der Daten auf einer Smartcard |
US6298135B1 (en) * | 1999-04-29 | 2001-10-02 | Motorola, Inc. | Method of preventing power analysis attacks on microelectronic assemblies |
US6419159B1 (en) * | 1999-06-14 | 2002-07-16 | Microsoft Corporation | Integrated circuit device with power analysis protection circuitry |
EP1098469B1 (fr) * | 1999-11-03 | 2007-06-06 | Infineon Technologies AG | Dispositiv de codage |
US6507913B1 (en) * | 1999-12-30 | 2003-01-14 | Yeda Research And Development Co. Ltd. | Protecting smart cards from power analysis with detachable power supplies |
TW536672B (en) * | 2000-01-12 | 2003-06-11 | Hitachi Ltd | IC card and microcomputer |
JP3926532B2 (ja) * | 2000-03-16 | 2007-06-06 | 株式会社日立製作所 | 情報処理装置、情報処理方法、及びカード部材 |
FR2811790A1 (fr) * | 2000-07-11 | 2002-01-18 | Schlumberger Systems & Service | Microcontroleur securise contre des attaques dites en courant |
US6625737B1 (en) * | 2000-09-20 | 2003-09-23 | Mips Technologies Inc. | System for prediction and control of power consumption in digital system |
FR2819070B1 (fr) * | 2000-12-28 | 2003-03-21 | St Microelectronics Sa | Procede et dispositif de protection conte le piratage de circuits integres |
JP4596686B2 (ja) * | 2001-06-13 | 2010-12-08 | 富士通株式会社 | Dpaに対して安全な暗号化 |
DE10128573A1 (de) * | 2001-06-13 | 2003-01-02 | Infineon Technologies Ag | Verhindern der unerwünschten externen Erfassung von Operationen in integrierten Digitalschaltungen |
JP2003018143A (ja) * | 2001-06-28 | 2003-01-17 | Mitsubishi Electric Corp | 情報処理装置 |
DE10162309A1 (de) * | 2001-12-19 | 2003-07-03 | Philips Intellectual Property | Verfahren und Anordnung zur Erhöhung der Sicherheit von Schaltkreisen gegen unbefugten Zugriff |
-
2002
- 2002-09-19 FR FR0211657A patent/FR2844896A1/fr active Pending
-
2003
- 2003-09-19 US US10/528,523 patent/US20060156039A1/en not_active Abandoned
- 2003-09-19 EP EP03780268A patent/EP1558982A2/fr not_active Withdrawn
- 2003-09-19 WO PCT/FR2003/050055 patent/WO2004027688A2/fr active Application Filing
- 2003-09-19 JP JP2004537246A patent/JP2005539447A/ja not_active Withdrawn
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2011117781A1 (fr) * | 2010-03-24 | 2011-09-29 | Stmicroelectronics (Rousset) Sas | Procédé et dispositif de contremesure pour protéger des données circulant dans un microcircuit électronique |
FR2958098A1 (fr) * | 2010-03-24 | 2011-09-30 | St Microelectronics Rousset | Procede et dispositif de contremesure pour proteger des donnees circulant dans un microcircuit electronique |
FR3042066A1 (fr) * | 2015-10-01 | 2017-04-07 | Stmicroelectronics Rousset | Procede de lissage d'un courant consomme par un circuit integre et dispositif correspondant |
US9678525B2 (en) | 2015-10-01 | 2017-06-13 | Stmicroelectronics (Rousset) Sas | Method for smoothing a current consumed by an integrated circuit and corresponding device |
US10054973B2 (en) | 2015-10-01 | 2018-08-21 | Stmicroelectronics (Rousset) Sas | Method for smoothing a current consumed by an integrated circuit and corresponding device |
US11768512B2 (en) | 2019-12-12 | 2023-09-26 | Stmicroelectronics (Rousset) Sas | Method of smoothing a current consumed by an integrated circuit, and corresponding device |
US11698651B2 (en) | 2020-08-25 | 2023-07-11 | Stmicroelectronics (Rousset) Sas | Device and method for electronic circuit power |
US11829178B2 (en) | 2020-08-25 | 2023-11-28 | Stmicroelectronics (Rousset) Sas | Device and method for protecting confidential data in an electronic circuit powered by a power supply |
US12282589B2 (en) | 2022-02-23 | 2025-04-22 | Stmicroelectronics (Rousset) Sas | Electronic device including an electronic module and a compensation circuit |
Also Published As
Publication number | Publication date |
---|---|
JP2005539447A (ja) | 2005-12-22 |
EP1558982A2 (fr) | 2005-08-03 |
US20060156039A1 (en) | 2006-07-13 |
FR2844896A1 (fr) | 2004-03-26 |
WO2004027688A3 (fr) | 2004-05-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP1558982A2 (fr) | Alimentation d'un circuit de traitement asynchrone de donnees | |
EP0800691B1 (fr) | Procede pour la mise en oeuvre d'un protocole de communication a cle secrete entre deux dispositifs de traitement | |
EP3633495B1 (fr) | Procédé de gestion d'une alimentation dvfs et système correspondant | |
FR2689264A1 (fr) | Procédé d'authentification accompli entre une carte à circuit intégré et une unité terminale et système prévu dans ce but. | |
EP1688870A1 (fr) | Brouillage de la signature en courant d'un circuit intégré | |
FR2985624A1 (fr) | Procede de chiffrement protege contre des attaques par canaux auxiliaires | |
EP1220101B1 (fr) | Procédé et dispositif de protection contre le piratage de circuits intégrés | |
WO2003050750A1 (fr) | Composant electronique numerique protege contre des analyses de type electrique | |
EP1121629A1 (fr) | Composant electronique et procede pour masquer l'execution d'instructions ou la manipulation de donnees | |
FR2811790A1 (fr) | Microcontroleur securise contre des attaques dites en courant | |
FR2808360A1 (fr) | Procede de contre mesure dans un microcircuit mettant en oeuvre le procede et carte a puce comportant ledit microcircuit | |
FR2840083A1 (fr) | Test d'un algorithme execute par un circuit integre | |
FR2817361A1 (fr) | Generateur de signal aleatoire | |
FR2903508A1 (fr) | Protection d'un programme interprete par une machine virtuelle | |
EP1399807B1 (fr) | Brouillage d'un calcul mettant en oeuvre une fonction modulaire | |
FR2829645A1 (fr) | Protocole d'authentification a verification d'integrite de memoire | |
EP1742162B1 (fr) | Protection de l'exécution d'un programme | |
FR3012234A1 (fr) | Protection de l'execution d'un algorithme contre des attaques par canaux caches | |
FR2890482A1 (fr) | Dispositif a semiconducteur utilisant un procede d'embrouillage / desembrouillage de memoire morte, et procede pour le faire fonctionner | |
EP3327985A1 (fr) | Brouillage du fonctionnement d'un circuit intégré | |
EP2129115B1 (fr) | Méthode de mise à jour de données de sécurité dans un module de sécurité et module de sécurité pour la mise en oeuvre de cette méthode | |
WO2007051770A1 (fr) | Procede securise de manipulations de donnees lors de l'execution d'algorithmes cryptographiques sur systemes embarques | |
FR2925991A1 (fr) | Procede de securisation d'un branchement conditionnel, support d'informations, programme, systeme securise et processeur de securite pour ce procede | |
FR2835328A1 (fr) | Circuit de demarrage et de protection contre les chutes de tension d'alimentation pour un circuit sans contact | |
EP0309347A1 (fr) | Procédé et dispositif de cryptage/décryptage analogique d'un signal vidéo analogique |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A2 Designated state(s): JP US |
|
AL | Designated countries for regional patents |
Kind code of ref document: A2 Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PT RO SE SI SK TR |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
WWE | Wipo information: entry into national phase |
Ref document number: 2004537246 Country of ref document: JP |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2003780268 Country of ref document: EP |
|
WWP | Wipo information: published in national office |
Ref document number: 2003780268 Country of ref document: EP |
|
ENP | Entry into the national phase |
Ref document number: 2006156039 Country of ref document: US Kind code of ref document: A1 |
|
WWE | Wipo information: entry into national phase |
Ref document number: 10528523 Country of ref document: US |
|
WWP | Wipo information: published in national office |
Ref document number: 10528523 Country of ref document: US |